trap.c revision 1.48.12.1 1 1.48.12.1 wrstuden /* $NetBSD: trap.c,v 1.48.12.1 2008/05/10 23:48:45 wrstuden Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2001 Wasabi Systems, Inc.
5 1.1 simonb * All rights reserved.
6 1.1 simonb *
7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed for the NetBSD Project by
20 1.1 simonb * Wasabi Systems, Inc.
21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 simonb * or promote products derived from this software without specific prior
23 1.1 simonb * written permission.
24 1.1 simonb *
25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE.
36 1.1 simonb */
37 1.1 simonb
38 1.1 simonb /*
39 1.1 simonb * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 1.1 simonb * Copyright (C) 1995, 1996 TooLs GmbH.
41 1.1 simonb * All rights reserved.
42 1.1 simonb *
43 1.1 simonb * Redistribution and use in source and binary forms, with or without
44 1.1 simonb * modification, are permitted provided that the following conditions
45 1.1 simonb * are met:
46 1.1 simonb * 1. Redistributions of source code must retain the above copyright
47 1.1 simonb * notice, this list of conditions and the following disclaimer.
48 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 simonb * notice, this list of conditions and the following disclaimer in the
50 1.1 simonb * documentation and/or other materials provided with the distribution.
51 1.1 simonb * 3. All advertising materials mentioning features or use of this software
52 1.1 simonb * must display the following acknowledgement:
53 1.1 simonb * This product includes software developed by TooLs GmbH.
54 1.1 simonb * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 1.1 simonb * derived from this software without specific prior written permission.
56 1.1 simonb *
57 1.1 simonb * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 1.1 simonb * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 1.1 simonb * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 1.1 simonb * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 1.1 simonb * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 1.1 simonb * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 1.1 simonb * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 1.1 simonb * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 1.1 simonb */
68 1.14 lukem
69 1.14 lukem #include <sys/cdefs.h>
70 1.48.12.1 wrstuden __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.48.12.1 2008/05/10 23:48:45 wrstuden Exp $");
71 1.1 simonb
72 1.1 simonb #include "opt_altivec.h"
73 1.1 simonb #include "opt_ddb.h"
74 1.44 garbled #include "opt_kgdb.h"
75 1.1 simonb
76 1.1 simonb #include <sys/param.h>
77 1.1 simonb #include <sys/proc.h>
78 1.1 simonb #include <sys/reboot.h>
79 1.1 simonb #include <sys/syscall.h>
80 1.1 simonb #include <sys/systm.h>
81 1.1 simonb #include <sys/user.h>
82 1.10 thorpej #include <sys/pool.h>
83 1.48.12.1 wrstuden #include <sys/sa.h>
84 1.48.12.1 wrstuden #include <sys/savar.h>
85 1.20 cl #include <sys/userret.h>
86 1.34 yamt #include <sys/kauth.h>
87 1.1 simonb
88 1.44 garbled #if defined(KGDB)
89 1.44 garbled #include <sys/kgdb.h>
90 1.44 garbled #endif
91 1.44 garbled
92 1.1 simonb #include <uvm/uvm_extern.h>
93 1.1 simonb
94 1.1 simonb #include <dev/cons.h>
95 1.1 simonb
96 1.1 simonb #include <machine/cpu.h>
97 1.1 simonb #include <machine/db_machdep.h>
98 1.1 simonb #include <machine/fpu.h>
99 1.1 simonb #include <machine/frame.h>
100 1.1 simonb #include <machine/pcb.h>
101 1.1 simonb #include <machine/psl.h>
102 1.1 simonb #include <machine/trap.h>
103 1.1 simonb
104 1.1 simonb #include <powerpc/spr.h>
105 1.1 simonb #include <powerpc/ibm4xx/pmap.h>
106 1.1 simonb #include <powerpc/ibm4xx/tlb.h>
107 1.1 simonb #include <powerpc/fpu/fpu_extern.h>
108 1.1 simonb
109 1.1 simonb /* These definitions should probably be somewhere else XXX */
110 1.1 simonb #define FIRSTARG 3 /* first argument is in reg 3 */
111 1.1 simonb #define NARGREG 8 /* 8 args are in registers */
112 1.40 christos #define MOREARGS(sp) ((void *)((int)(sp) + 8)) /* more args go here */
113 1.1 simonb
114 1.10 thorpej static int fix_unaligned __P((struct lwp *l, struct trapframe *frame));
115 1.1 simonb
116 1.1 simonb void trap __P((struct trapframe *)); /* Called from locore / trap_subr */
117 1.1 simonb /* Why are these not defined in a header? */
118 1.1 simonb int badaddr __P((void *, size_t));
119 1.1 simonb int badaddr_read __P((void *, size_t, int *));
120 1.1 simonb int ctx_setup __P((int, int));
121 1.1 simonb
122 1.1 simonb #ifdef DEBUG
123 1.1 simonb #define TDB_ALL 0x1
124 1.1 simonb int trapdebug = /* TDB_ALL */ 0;
125 1.1 simonb #define DBPRINTF(x, y) if (trapdebug & (x)) printf y
126 1.1 simonb #else
127 1.1 simonb #define DBPRINTF(x, y)
128 1.1 simonb #endif
129 1.1 simonb
130 1.1 simonb void
131 1.1 simonb trap(struct trapframe *frame)
132 1.1 simonb {
133 1.10 thorpej struct lwp *l = curlwp;
134 1.10 thorpej struct proc *p = l ? l->l_proc : NULL;
135 1.1 simonb int type = frame->exc;
136 1.1 simonb int ftype, rv;
137 1.18 eeh ksiginfo_t ksi;
138 1.1 simonb
139 1.10 thorpej KASSERT(l == 0 || (l->l_stat == LSONPROC));
140 1.1 simonb
141 1.35 ad if (frame->srr1 & PSL_PR) {
142 1.35 ad LWP_CACHE_CREDS(l, p);
143 1.1 simonb type |= EXC_USER;
144 1.35 ad }
145 1.1 simonb
146 1.1 simonb ftype = VM_PROT_READ;
147 1.1 simonb
148 1.13 simonb DBPRINTF(TDB_ALL, ("trap(%x) at %lx from frame %p &frame %p\n",
149 1.13 simonb type, frame->srr0, frame, &frame));
150 1.1 simonb
151 1.1 simonb switch (type) {
152 1.1 simonb case EXC_DEBUG|EXC_USER:
153 1.13 simonb {
154 1.13 simonb int srr2, srr3;
155 1.13 simonb
156 1.28 perry __asm volatile("mfspr %0,0x3f0" :
157 1.13 simonb "=r" (rv), "=r" (srr2), "=r" (srr3) :);
158 1.13 simonb printf("debug reg is %x srr2 %x srr3 %x\n", rv, srr2,
159 1.13 simonb srr3);
160 1.13 simonb /* XXX fall through or break here?! */
161 1.13 simonb }
162 1.1 simonb /*
163 1.1 simonb * DEBUG intr -- probably single-step.
164 1.1 simonb */
165 1.1 simonb case EXC_TRC|EXC_USER:
166 1.17 matt frame->srr1 &= ~PSL_SE;
167 1.19 thorpej KSI_INIT_TRAP(&ksi);
168 1.17 matt ksi.ksi_signo = SIGTRAP;
169 1.17 matt ksi.ksi_trap = EXC_TRC;
170 1.17 matt ksi.ksi_addr = (void *)frame->srr0;
171 1.17 matt trapsignal(l, &ksi);
172 1.1 simonb break;
173 1.7 simonb
174 1.13 simonb /*
175 1.13 simonb * If we could not find and install appropriate TLB entry, fall through.
176 1.13 simonb */
177 1.7 simonb
178 1.1 simonb case EXC_DSI:
179 1.1 simonb /* FALLTHROUGH */
180 1.1 simonb case EXC_DTMISS:
181 1.1 simonb {
182 1.1 simonb struct vm_map *map;
183 1.1 simonb vaddr_t va;
184 1.11 matt struct faultbuf *fb = NULL;
185 1.1 simonb
186 1.11 matt va = frame->dar;
187 1.11 matt if (frame->tf_xtra[TF_PID] == KERNEL_PID) {
188 1.1 simonb map = kernel_map;
189 1.1 simonb } else {
190 1.1 simonb map = &p->p_vmspace->vm_map;
191 1.1 simonb }
192 1.1 simonb
193 1.11 matt if (frame->tf_xtra[TF_ESR] & (ESR_DST|ESR_DIZ))
194 1.3 chs ftype = VM_PROT_WRITE;
195 1.1 simonb
196 1.13 simonb DBPRINTF(TDB_ALL,
197 1.13 simonb ("trap(EXC_DSI) at %lx %s fault on %p esr %x\n",
198 1.13 simonb frame->srr0,
199 1.13 simonb (ftype & VM_PROT_WRITE) ? "write" : "read",
200 1.13 simonb (void *)va, frame->tf_xtra[TF_ESR]));
201 1.32 drochner rv = uvm_fault(map, trunc_page(va), ftype);
202 1.1 simonb if (rv == 0)
203 1.1 simonb goto done;
204 1.10 thorpej if ((fb = l->l_addr->u_pcb.pcb_onfault) != NULL) {
205 1.11 matt frame->tf_xtra[TF_PID] = KERNEL_PID;
206 1.11 matt frame->srr0 = fb->fb_pc;
207 1.1 simonb frame->srr1 |= PSL_IR; /* Re-enable IMMU */
208 1.11 matt frame->fixreg[1] = fb->fb_sp;
209 1.11 matt frame->fixreg[2] = fb->fb_r2;
210 1.1 simonb frame->fixreg[3] = 1; /* Return TRUE */
211 1.11 matt frame->cr = fb->fb_cr;
212 1.11 matt memcpy(&frame->fixreg[13], fb->fb_fixreg,
213 1.11 matt sizeof(fb->fb_fixreg));
214 1.1 simonb goto done;
215 1.1 simonb }
216 1.1 simonb }
217 1.1 simonb goto brain_damage;
218 1.7 simonb
219 1.1 simonb case EXC_DSI|EXC_USER:
220 1.1 simonb /* FALLTHROUGH */
221 1.1 simonb case EXC_DTMISS|EXC_USER:
222 1.11 matt if (frame->tf_xtra[TF_ESR] & (ESR_DST|ESR_DIZ))
223 1.3 chs ftype = VM_PROT_WRITE;
224 1.1 simonb
225 1.13 simonb DBPRINTF(TDB_ALL,
226 1.13 simonb ("trap(EXC_DSI|EXC_USER) at %lx %s fault on %lx %x\n",
227 1.13 simonb frame->srr0, (ftype & VM_PROT_WRITE) ? "write" : "read",
228 1.13 simonb frame->dar, frame->tf_xtra[TF_ESR]));
229 1.13 simonb KASSERT(l == curlwp && (l->l_stat == LSONPROC));
230 1.13 simonb rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(frame->dar),
231 1.32 drochner ftype);
232 1.1 simonb if (rv == 0) {
233 1.13 simonb break;
234 1.1 simonb }
235 1.19 thorpej KSI_INIT_TRAP(&ksi);
236 1.17 matt ksi.ksi_signo = SIGSEGV;
237 1.17 matt ksi.ksi_trap = EXC_DSI;
238 1.17 matt ksi.ksi_addr = (void *)frame->dar;
239 1.1 simonb if (rv == ENOMEM) {
240 1.10 thorpej printf("UVM: pid %d (%s) lid %d, uid %d killed: "
241 1.13 simonb "out of swap\n",
242 1.13 simonb p->p_pid, p->p_comm, l->l_lid,
243 1.36 ad l->l_cred ?
244 1.36 ad kauth_cred_geteuid(l->l_cred) : -1);
245 1.17 matt ksi.ksi_signo = SIGKILL;
246 1.1 simonb }
247 1.17 matt trapsignal(l, &ksi);
248 1.1 simonb break;
249 1.15 chs
250 1.1 simonb case EXC_ITMISS|EXC_USER:
251 1.1 simonb case EXC_ISI|EXC_USER:
252 1.15 chs ftype = VM_PROT_EXECUTE;
253 1.13 simonb DBPRINTF(TDB_ALL,
254 1.15 chs ("trap(EXC_ISI|EXC_USER) at %lx execute fault tf %p\n",
255 1.13 simonb frame->srr0, frame));
256 1.13 simonb rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(frame->srr0),
257 1.32 drochner ftype);
258 1.1 simonb if (rv == 0) {
259 1.13 simonb break;
260 1.1 simonb }
261 1.19 thorpej KSI_INIT_TRAP(&ksi);
262 1.17 matt ksi.ksi_signo = SIGSEGV;
263 1.17 matt ksi.ksi_trap = EXC_ISI;
264 1.17 matt ksi.ksi_addr = (void *)frame->srr0;
265 1.21 drochner ksi.ksi_code = (rv == EACCES ? SEGV_ACCERR : SEGV_MAPERR);
266 1.17 matt trapsignal(l, &ksi);
267 1.1 simonb break;
268 1.1 simonb
269 1.1 simonb case EXC_AST|EXC_USER:
270 1.11 matt curcpu()->ci_astpending = 0; /* we are about to do it */
271 1.1 simonb uvmexp.softs++;
272 1.39 ad if (l->l_pflag & LP_OWEUPC) {
273 1.39 ad l->l_pflag &= ~LP_OWEUPC;
274 1.39 ad ADDUPROF(l);
275 1.1 simonb }
276 1.1 simonb /* Check whether we are being preempted. */
277 1.42 rjs if (curcpu()->ci_want_resched)
278 1.38 ad preempt();
279 1.1 simonb break;
280 1.1 simonb
281 1.1 simonb
282 1.1 simonb case EXC_ALI|EXC_USER:
283 1.17 matt if (fix_unaligned(l, frame) != 0) {
284 1.19 thorpej KSI_INIT_TRAP(&ksi);
285 1.17 matt ksi.ksi_signo = SIGBUS;
286 1.17 matt ksi.ksi_trap = EXC_ALI;
287 1.17 matt ksi.ksi_addr = (void *)frame->dar;
288 1.17 matt trapsignal(l, &ksi);
289 1.17 matt } else
290 1.1 simonb frame->srr0 += 4;
291 1.1 simonb break;
292 1.1 simonb
293 1.1 simonb case EXC_PGM|EXC_USER:
294 1.7 simonb /*
295 1.7 simonb * Illegal insn:
296 1.1 simonb *
297 1.7 simonb * let's try to see if it's FPU and can be emulated.
298 1.1 simonb */
299 1.24 simonb uvmexp.traps++;
300 1.10 thorpej if (!(l->l_addr->u_pcb.pcb_flags & PCB_FPU)) {
301 1.10 thorpej memset(&l->l_addr->u_pcb.pcb_fpu, 0,
302 1.10 thorpej sizeof l->l_addr->u_pcb.pcb_fpu);
303 1.10 thorpej l->l_addr->u_pcb.pcb_flags |= PCB_FPU;
304 1.1 simonb }
305 1.1 simonb
306 1.7 simonb if ((rv = fpu_emulate(frame,
307 1.10 thorpej (struct fpreg *)&l->l_addr->u_pcb.pcb_fpu))) {
308 1.19 thorpej KSI_INIT_TRAP(&ksi);
309 1.17 matt ksi.ksi_signo = rv;
310 1.17 matt ksi.ksi_trap = EXC_PGM;
311 1.17 matt ksi.ksi_addr = (void *)frame->srr0;
312 1.17 matt trapsignal(l, &ksi);
313 1.1 simonb }
314 1.1 simonb break;
315 1.1 simonb
316 1.1 simonb case EXC_MCHK:
317 1.1 simonb {
318 1.11 matt struct faultbuf *fb;
319 1.1 simonb
320 1.10 thorpej if ((fb = l->l_addr->u_pcb.pcb_onfault) != NULL) {
321 1.11 matt frame->tf_xtra[TF_PID] = KERNEL_PID;
322 1.11 matt frame->srr0 = fb->fb_pc;
323 1.1 simonb frame->srr1 |= PSL_IR; /* Re-enable IMMU */
324 1.11 matt frame->fixreg[1] = fb->fb_sp;
325 1.11 matt frame->fixreg[2] = fb->fb_r2;
326 1.1 simonb frame->fixreg[3] = 1; /* Return TRUE */
327 1.11 matt frame->cr = fb->fb_cr;
328 1.11 matt memcpy(&frame->fixreg[13], fb->fb_fixreg,
329 1.11 matt sizeof(fb->fb_fixreg));
330 1.1 simonb goto done;
331 1.1 simonb }
332 1.1 simonb }
333 1.1 simonb goto brain_damage;
334 1.1 simonb default:
335 1.13 simonb brain_damage:
336 1.11 matt printf("trap type 0x%x at 0x%lx\n", type, frame->srr0);
337 1.44 garbled #if defined(DDB) || defined(KGDB)
338 1.1 simonb if (kdb_trap(type, frame))
339 1.1 simonb goto done;
340 1.1 simonb #endif
341 1.1 simonb #ifdef TRAP_PANICWAIT
342 1.1 simonb printf("Press a key to panic.\n");
343 1.1 simonb cngetc();
344 1.1 simonb #endif
345 1.1 simonb panic("trap");
346 1.1 simonb }
347 1.1 simonb
348 1.20 cl /* Invoke MI userret code */
349 1.20 cl mi_userret(l);
350 1.13 simonb done:
351 1.9 thorpej return;
352 1.1 simonb }
353 1.1 simonb
354 1.1 simonb int
355 1.1 simonb ctx_setup(int ctx, int srr1)
356 1.1 simonb {
357 1.1 simonb volatile struct pmap *pm;
358 1.1 simonb
359 1.1 simonb /* Update PID if we're returning to user mode. */
360 1.1 simonb if (srr1 & PSL_PR) {
361 1.1 simonb pm = curproc->p_vmspace->vm_map.pmap;
362 1.1 simonb if (!pm->pm_ctx) {
363 1.26 scw ctx_alloc(__UNVOLATILE(pm));
364 1.1 simonb }
365 1.1 simonb ctx = pm->pm_ctx;
366 1.1 simonb if (srr1 & PSL_SE) {
367 1.1 simonb int dbreg, mask = 0x48000000;
368 1.1 simonb /*
369 1.1 simonb * Set the Internal Debug and
370 1.1 simonb * Instruction Completion bits of
371 1.1 simonb * the DBCR0 register.
372 1.1 simonb *
373 1.1 simonb * XXX this is also used by jtag debuggers...
374 1.1 simonb */
375 1.28 perry __asm volatile("mfspr %0,0x3f2;"
376 1.13 simonb "or %0,%0,%1;"
377 1.13 simonb "mtspr 0x3f2,%0;" :
378 1.13 simonb "=&r" (dbreg) : "r" (mask));
379 1.1 simonb }
380 1.1 simonb }
381 1.1 simonb else if (!ctx) {
382 1.1 simonb ctx = KERNEL_PID;
383 1.1 simonb }
384 1.1 simonb return (ctx);
385 1.1 simonb }
386 1.1 simonb
387 1.1 simonb /*
388 1.1 simonb * Used by copyin()/copyout()
389 1.1 simonb */
390 1.1 simonb extern vaddr_t vmaprange __P((struct proc *, vaddr_t, vsize_t, int));
391 1.1 simonb extern void vunmaprange __P((vaddr_t, vsize_t));
392 1.13 simonb static int bigcopyin __P((const void *, void *, size_t ));
393 1.1 simonb static int bigcopyout __P((const void *, void *, size_t ));
394 1.1 simonb
395 1.1 simonb int
396 1.1 simonb copyin(const void *udaddr, void *kaddr, size_t len)
397 1.1 simonb {
398 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
399 1.46 hpeyerl int msr, pid, tmp, ctx, count=0;
400 1.11 matt struct faultbuf env;
401 1.1 simonb
402 1.1 simonb /* For bigger buffers use the faster copy */
403 1.46 hpeyerl if (len > 1024)
404 1.25 simonb return (bigcopyin(udaddr, kaddr, len));
405 1.1 simonb
406 1.11 matt if (setfault(&env)) {
407 1.1 simonb curpcb->pcb_onfault = 0;
408 1.1 simonb return EFAULT;
409 1.1 simonb }
410 1.1 simonb
411 1.1 simonb if (!(ctx = pm->pm_ctx)) {
412 1.1 simonb /* No context -- assign it one */
413 1.1 simonb ctx_alloc(pm);
414 1.1 simonb ctx = pm->pm_ctx;
415 1.1 simonb }
416 1.1 simonb
417 1.46 hpeyerl __asm volatile(
418 1.46 hpeyerl " mfmsr %[msr];" /* Save MSR */
419 1.46 hpeyerl " li %[pid],0x20; "
420 1.46 hpeyerl " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */
421 1.46 hpeyerl " mfpid %[pid];" /* Save old PID */
422 1.46 hpeyerl " sync; isync;"
423 1.46 hpeyerl
424 1.46 hpeyerl " srwi. %[count],%[len],0x2;" /* How many words? */
425 1.46 hpeyerl " beq- 2f;" /* No words. Go do bytes */
426 1.46 hpeyerl " mtctr %[count];"
427 1.46 hpeyerl "1: mtpid %[ctx]; sync;"
428 1.47 simonb " lswi %[tmp],%[udaddr],4;" /* Load user word */
429 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */
430 1.46 hpeyerl " sync; isync;"
431 1.46 hpeyerl " mtpid %[pid];sync;"
432 1.47 simonb " stswi %[tmp],%[kaddr],4;" /* Store kernel word */
433 1.46 hpeyerl " dcbf 0,%[kaddr];" /* flush cache */
434 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x4;" /* next udaddr word */
435 1.46 hpeyerl " sync; isync;"
436 1.46 hpeyerl " bdnz 1b;" /* repeat */
437 1.46 hpeyerl
438 1.46 hpeyerl "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */
439 1.46 hpeyerl " addi %[count],%[count],0x1;"
440 1.46 hpeyerl " mtctr %[count];"
441 1.46 hpeyerl "3: bdz 10f;" /* while count */
442 1.46 hpeyerl " mtpid %[ctx];sync;"
443 1.46 hpeyerl " lbz %[tmp],0(%[udaddr]);" /* Load user byte */
444 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x1;" /* next udaddr byte */
445 1.46 hpeyerl " sync; isync;"
446 1.46 hpeyerl " mtpid %[pid]; sync;"
447 1.46 hpeyerl " stb %[tmp],0(%[kaddr]);" /* Store kernel byte */
448 1.46 hpeyerl " dcbf 0,%[kaddr];" /* flush cache */
449 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x1;"
450 1.46 hpeyerl " sync; isync;"
451 1.46 hpeyerl " b 3b;"
452 1.46 hpeyerl "10:mtpid %[pid]; mtmsr %[msr]; sync; isync;" /* Restore PID and MSR */
453 1.46 hpeyerl : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp)
454 1.46 hpeyerl : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr), [len] "b" (len), [count] "b" (count));
455 1.1 simonb
456 1.1 simonb curpcb->pcb_onfault = 0;
457 1.1 simonb return 0;
458 1.1 simonb }
459 1.1 simonb
460 1.1 simonb static int
461 1.1 simonb bigcopyin(const void *udaddr, void *kaddr, size_t len)
462 1.1 simonb {
463 1.1 simonb const char *up;
464 1.1 simonb char *kp = kaddr;
465 1.10 thorpej struct lwp *l = curlwp;
466 1.10 thorpej struct proc *p;
467 1.1 simonb int error;
468 1.1 simonb
469 1.10 thorpej if (!l) {
470 1.1 simonb return EFAULT;
471 1.1 simonb }
472 1.1 simonb
473 1.10 thorpej p = l->l_proc;
474 1.10 thorpej
475 1.1 simonb /*
476 1.7 simonb * Stolen from physio():
477 1.1 simonb */
478 1.43 ad uvm_lwp_hold(l);
479 1.37 chs error = uvm_vslock(p->p_vmspace, __UNCONST(udaddr), len, VM_PROT_READ);
480 1.1 simonb if (error) {
481 1.43 ad uvm_lwp_rele(l);
482 1.1 simonb return EFAULT;
483 1.1 simonb }
484 1.1 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len, VM_PROT_READ);
485 1.1 simonb
486 1.2 wiz memcpy(kp, up, len);
487 1.1 simonb vunmaprange((vaddr_t)up, len);
488 1.37 chs uvm_vsunlock(p->p_vmspace, __UNCONST(udaddr), len);
489 1.43 ad uvm_lwp_rele(l);
490 1.1 simonb
491 1.7 simonb return 0;
492 1.1 simonb }
493 1.1 simonb
494 1.1 simonb int
495 1.1 simonb copyout(const void *kaddr, void *udaddr, size_t len)
496 1.1 simonb {
497 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
498 1.46 hpeyerl int msr, pid, tmp, ctx, count=0;
499 1.11 matt struct faultbuf env;
500 1.1 simonb
501 1.1 simonb /* For big copies use more efficient routine */
502 1.46 hpeyerl if (len > 1024)
503 1.25 simonb return (bigcopyout(kaddr, udaddr, len));
504 1.1 simonb
505 1.11 matt if (setfault(&env)) {
506 1.1 simonb curpcb->pcb_onfault = 0;
507 1.1 simonb return EFAULT;
508 1.1 simonb }
509 1.1 simonb
510 1.1 simonb if (!(ctx = pm->pm_ctx)) {
511 1.1 simonb /* No context -- assign it one */
512 1.1 simonb ctx_alloc(pm);
513 1.1 simonb ctx = pm->pm_ctx;
514 1.1 simonb }
515 1.1 simonb
516 1.46 hpeyerl __asm volatile(
517 1.46 hpeyerl " mfmsr %[msr];" /* Save MSR */ \
518 1.46 hpeyerl " li %[pid],0x20; " \
519 1.46 hpeyerl " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */ \
520 1.46 hpeyerl " mfpid %[pid];" /* Save old PID */ \
521 1.46 hpeyerl " sync; isync;"
522 1.46 hpeyerl
523 1.46 hpeyerl " srwi. %[count],%[len],0x2;" /* How many words? */
524 1.46 hpeyerl " beq- 2f;" /* No words. Go do bytes */
525 1.46 hpeyerl " mtctr %[count];"
526 1.46 hpeyerl "1: mtpid %[pid];sync;"
527 1.47 simonb " lswi %[tmp],%[kaddr],4;" /* Load kernel word */
528 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x4;" /* next kaddr word */
529 1.46 hpeyerl " sync; isync;"
530 1.46 hpeyerl " mtpid %[ctx]; sync;"
531 1.47 simonb " stswi %[tmp],%[udaddr],4;" /* Store user word */
532 1.46 hpeyerl " dcbf 0,%[udaddr];" /* flush cache */
533 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */
534 1.46 hpeyerl " sync; isync;"
535 1.46 hpeyerl " bdnz 1b;" /* repeat */
536 1.46 hpeyerl
537 1.46 hpeyerl "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */
538 1.46 hpeyerl " addi %[count],%[count],0x1;"
539 1.46 hpeyerl " mtctr %[count];"
540 1.46 hpeyerl "3: bdz 10f;" /* while count */
541 1.46 hpeyerl " mtpid %[pid];sync;"
542 1.46 hpeyerl " lbz %[tmp],0(%[kaddr]);" /* Load kernel byte */
543 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x1;" /* next kaddr byte */
544 1.46 hpeyerl " sync; isync;"
545 1.46 hpeyerl " mtpid %[ctx]; sync;"
546 1.46 hpeyerl " stb %[tmp],0(%[udaddr]);" /* Store user byte */
547 1.46 hpeyerl " dcbf 0,%[udaddr];" /* flush cache */
548 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x1;"
549 1.46 hpeyerl " sync; isync;"
550 1.46 hpeyerl " b 3b;"
551 1.46 hpeyerl "10:mtpid %[pid]; mtmsr %[msr]; sync; isync;" /* Restore PID and MSR */
552 1.46 hpeyerl : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp)
553 1.46 hpeyerl : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr), [len] "b" (len), [count] "b" (count));
554 1.1 simonb
555 1.1 simonb curpcb->pcb_onfault = 0;
556 1.1 simonb return 0;
557 1.1 simonb }
558 1.1 simonb
559 1.1 simonb static int
560 1.1 simonb bigcopyout(const void *kaddr, void *udaddr, size_t len)
561 1.1 simonb {
562 1.1 simonb char *up;
563 1.26 scw const char *kp = (const char *)kaddr;
564 1.10 thorpej struct lwp *l = curlwp;
565 1.10 thorpej struct proc *p;
566 1.1 simonb int error;
567 1.1 simonb
568 1.10 thorpej if (!l) {
569 1.1 simonb return EFAULT;
570 1.1 simonb }
571 1.1 simonb
572 1.10 thorpej p = l->l_proc;
573 1.10 thorpej
574 1.1 simonb /*
575 1.7 simonb * Stolen from physio():
576 1.1 simonb */
577 1.43 ad uvm_lwp_hold(l);
578 1.37 chs error = uvm_vslock(p->p_vmspace, udaddr, len, VM_PROT_WRITE);
579 1.1 simonb if (error) {
580 1.43 ad uvm_lwp_rele(l);
581 1.1 simonb return EFAULT;
582 1.1 simonb }
583 1.7 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len,
584 1.13 simonb VM_PROT_READ | VM_PROT_WRITE);
585 1.1 simonb
586 1.2 wiz memcpy(up, kp, len);
587 1.1 simonb vunmaprange((vaddr_t)up, len);
588 1.37 chs uvm_vsunlock(p->p_vmspace, udaddr, len);
589 1.43 ad uvm_lwp_rele(l);
590 1.1 simonb
591 1.7 simonb return 0;
592 1.1 simonb }
593 1.1 simonb
594 1.1 simonb /*
595 1.1 simonb * kcopy(const void *src, void *dst, size_t len);
596 1.1 simonb *
597 1.1 simonb * Copy len bytes from src to dst, aborting if we encounter a fatal
598 1.1 simonb * page fault.
599 1.1 simonb *
600 1.1 simonb * kcopy() _must_ save and restore the old fault handler since it is
601 1.1 simonb * called by uiomove(), which may be in the path of servicing a non-fatal
602 1.1 simonb * page fault.
603 1.1 simonb */
604 1.1 simonb int
605 1.1 simonb kcopy(const void *src, void *dst, size_t len)
606 1.1 simonb {
607 1.11 matt struct faultbuf env, *oldfault;
608 1.1 simonb
609 1.1 simonb oldfault = curpcb->pcb_onfault;
610 1.11 matt if (setfault(&env)) {
611 1.1 simonb curpcb->pcb_onfault = oldfault;
612 1.1 simonb return EFAULT;
613 1.1 simonb }
614 1.1 simonb
615 1.2 wiz memcpy(dst, src, len);
616 1.1 simonb
617 1.1 simonb curpcb->pcb_onfault = oldfault;
618 1.1 simonb return 0;
619 1.1 simonb }
620 1.1 simonb
621 1.1 simonb int
622 1.1 simonb badaddr(void *addr, size_t size)
623 1.1 simonb {
624 1.1 simonb
625 1.1 simonb return badaddr_read(addr, size, NULL);
626 1.1 simonb }
627 1.1 simonb
628 1.1 simonb int
629 1.1 simonb badaddr_read(void *addr, size_t size, int *rptr)
630 1.1 simonb {
631 1.11 matt struct faultbuf env;
632 1.1 simonb int x;
633 1.1 simonb
634 1.1 simonb /* Get rid of any stale machine checks that have been waiting. */
635 1.28 perry __asm volatile ("sync; isync");
636 1.1 simonb
637 1.11 matt if (setfault(&env)) {
638 1.1 simonb curpcb->pcb_onfault = 0;
639 1.28 perry __asm volatile ("sync");
640 1.1 simonb return 1;
641 1.1 simonb }
642 1.1 simonb
643 1.28 perry __asm volatile ("sync");
644 1.1 simonb
645 1.1 simonb switch (size) {
646 1.1 simonb case 1:
647 1.1 simonb x = *(volatile int8_t *)addr;
648 1.1 simonb break;
649 1.1 simonb case 2:
650 1.1 simonb x = *(volatile int16_t *)addr;
651 1.1 simonb break;
652 1.1 simonb case 4:
653 1.1 simonb x = *(volatile int32_t *)addr;
654 1.1 simonb break;
655 1.1 simonb default:
656 1.1 simonb panic("badaddr: invalid size (%d)", size);
657 1.1 simonb }
658 1.1 simonb
659 1.1 simonb /* Make sure we took the machine check, if we caused one. */
660 1.28 perry __asm volatile ("sync; isync");
661 1.1 simonb
662 1.1 simonb curpcb->pcb_onfault = 0;
663 1.28 perry __asm volatile ("sync"); /* To be sure. */
664 1.1 simonb
665 1.1 simonb /* Use the value to avoid reorder. */
666 1.1 simonb if (rptr)
667 1.1 simonb *rptr = x;
668 1.1 simonb
669 1.1 simonb return 0;
670 1.1 simonb }
671 1.1 simonb
672 1.1 simonb /*
673 1.1 simonb * For now, this only deals with the particular unaligned access case
674 1.1 simonb * that gcc tends to generate. Eventually it should handle all of the
675 1.1 simonb * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
676 1.1 simonb */
677 1.1 simonb
678 1.1 simonb static int
679 1.10 thorpej fix_unaligned(struct lwp *l, struct trapframe *frame)
680 1.1 simonb {
681 1.1 simonb
682 1.1 simonb return -1;
683 1.10 thorpej }
684 1.10 thorpej
685 1.10 thorpej /*
686 1.10 thorpej * Start a new LWP
687 1.10 thorpej */
688 1.10 thorpej void
689 1.10 thorpej startlwp(arg)
690 1.10 thorpej void *arg;
691 1.10 thorpej {
692 1.10 thorpej int err;
693 1.10 thorpej ucontext_t *uc = arg;
694 1.10 thorpej struct lwp *l = curlwp;
695 1.10 thorpej
696 1.10 thorpej err = cpu_setmcontext(l, &uc->uc_mcontext, uc->uc_flags);
697 1.10 thorpej #if DIAGNOSTIC
698 1.10 thorpej if (err) {
699 1.10 thorpej printf("Error %d from cpu_setmcontext.", err);
700 1.10 thorpej }
701 1.10 thorpej #endif
702 1.10 thorpej pool_put(&lwp_uc_pool, uc);
703 1.10 thorpej
704 1.20 cl /* Invoke MI userret code */
705 1.20 cl mi_userret(l);
706 1.1 simonb }
707