trap.c revision 1.49.16.2 1 1.49.16.2 matt /* $NetBSD: trap.c,v 1.49.16.2 2011/01/17 07:45:59 matt Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2001 Wasabi Systems, Inc.
5 1.1 simonb * All rights reserved.
6 1.1 simonb *
7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed for the NetBSD Project by
20 1.1 simonb * Wasabi Systems, Inc.
21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 simonb * or promote products derived from this software without specific prior
23 1.1 simonb * written permission.
24 1.1 simonb *
25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE.
36 1.1 simonb */
37 1.1 simonb
38 1.1 simonb /*
39 1.1 simonb * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 1.1 simonb * Copyright (C) 1995, 1996 TooLs GmbH.
41 1.1 simonb * All rights reserved.
42 1.1 simonb *
43 1.1 simonb * Redistribution and use in source and binary forms, with or without
44 1.1 simonb * modification, are permitted provided that the following conditions
45 1.1 simonb * are met:
46 1.1 simonb * 1. Redistributions of source code must retain the above copyright
47 1.1 simonb * notice, this list of conditions and the following disclaimer.
48 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 simonb * notice, this list of conditions and the following disclaimer in the
50 1.1 simonb * documentation and/or other materials provided with the distribution.
51 1.1 simonb * 3. All advertising materials mentioning features or use of this software
52 1.1 simonb * must display the following acknowledgement:
53 1.1 simonb * This product includes software developed by TooLs GmbH.
54 1.1 simonb * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 1.1 simonb * derived from this software without specific prior written permission.
56 1.1 simonb *
57 1.1 simonb * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 1.1 simonb * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 1.1 simonb * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 1.1 simonb * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 1.1 simonb * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 1.1 simonb * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 1.1 simonb * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 1.1 simonb * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 1.1 simonb */
68 1.14 lukem
69 1.14 lukem #include <sys/cdefs.h>
70 1.49.16.2 matt __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.49.16.2 2011/01/17 07:45:59 matt Exp $");
71 1.1 simonb
72 1.1 simonb #include "opt_altivec.h"
73 1.1 simonb #include "opt_ddb.h"
74 1.44 garbled #include "opt_kgdb.h"
75 1.1 simonb
76 1.1 simonb #include <sys/param.h>
77 1.1 simonb #include <sys/proc.h>
78 1.1 simonb #include <sys/reboot.h>
79 1.1 simonb #include <sys/syscall.h>
80 1.1 simonb #include <sys/systm.h>
81 1.1 simonb #include <sys/user.h>
82 1.10 thorpej #include <sys/pool.h>
83 1.49 wrstuden #include <sys/sa.h>
84 1.49 wrstuden #include <sys/savar.h>
85 1.20 cl #include <sys/userret.h>
86 1.34 yamt #include <sys/kauth.h>
87 1.1 simonb
88 1.44 garbled #if defined(KGDB)
89 1.44 garbled #include <sys/kgdb.h>
90 1.44 garbled #endif
91 1.44 garbled
92 1.1 simonb #include <uvm/uvm_extern.h>
93 1.1 simonb
94 1.1 simonb #include <dev/cons.h>
95 1.1 simonb
96 1.1 simonb #include <machine/cpu.h>
97 1.1 simonb #include <machine/db_machdep.h>
98 1.1 simonb #include <machine/fpu.h>
99 1.1 simonb #include <machine/frame.h>
100 1.1 simonb #include <machine/pcb.h>
101 1.1 simonb #include <machine/psl.h>
102 1.1 simonb #include <machine/trap.h>
103 1.1 simonb
104 1.1 simonb #include <powerpc/spr.h>
105 1.49.16.1 matt #include <powerpc/ibm4xx/spr.h>
106 1.1 simonb #include <powerpc/ibm4xx/pmap.h>
107 1.1 simonb #include <powerpc/ibm4xx/tlb.h>
108 1.1 simonb #include <powerpc/fpu/fpu_extern.h>
109 1.1 simonb
110 1.1 simonb /* These definitions should probably be somewhere else XXX */
111 1.1 simonb #define FIRSTARG 3 /* first argument is in reg 3 */
112 1.1 simonb #define NARGREG 8 /* 8 args are in registers */
113 1.40 christos #define MOREARGS(sp) ((void *)((int)(sp) + 8)) /* more args go here */
114 1.1 simonb
115 1.10 thorpej static int fix_unaligned __P((struct lwp *l, struct trapframe *frame));
116 1.1 simonb
117 1.1 simonb void trap __P((struct trapframe *)); /* Called from locore / trap_subr */
118 1.1 simonb /* Why are these not defined in a header? */
119 1.1 simonb int badaddr __P((void *, size_t));
120 1.1 simonb int badaddr_read __P((void *, size_t, int *));
121 1.1 simonb int ctx_setup __P((int, int));
122 1.1 simonb
123 1.1 simonb #ifdef DEBUG
124 1.1 simonb #define TDB_ALL 0x1
125 1.1 simonb int trapdebug = /* TDB_ALL */ 0;
126 1.1 simonb #define DBPRINTF(x, y) if (trapdebug & (x)) printf y
127 1.1 simonb #else
128 1.1 simonb #define DBPRINTF(x, y)
129 1.1 simonb #endif
130 1.1 simonb
131 1.1 simonb void
132 1.49.16.1 matt trap(struct trapframe *tf)
133 1.1 simonb {
134 1.10 thorpej struct lwp *l = curlwp;
135 1.49.16.2 matt struct proc *p = l->l_proc;
136 1.49.16.1 matt int type = tf->tf_exc;
137 1.1 simonb int ftype, rv;
138 1.18 eeh ksiginfo_t ksi;
139 1.1 simonb
140 1.49.16.2 matt KASSERT(l->l_stat == LSONPROC);
141 1.1 simonb
142 1.49.16.1 matt if (tf->tf_srr1 & PSL_PR) {
143 1.35 ad LWP_CACHE_CREDS(l, p);
144 1.1 simonb type |= EXC_USER;
145 1.35 ad }
146 1.1 simonb
147 1.1 simonb ftype = VM_PROT_READ;
148 1.1 simonb
149 1.13 simonb DBPRINTF(TDB_ALL, ("trap(%x) at %lx from frame %p &frame %p\n",
150 1.49.16.1 matt type, tf->tf_srr0, tf, &tf));
151 1.1 simonb
152 1.1 simonb switch (type) {
153 1.1 simonb case EXC_DEBUG|EXC_USER:
154 1.13 simonb {
155 1.13 simonb int srr2, srr3;
156 1.13 simonb
157 1.28 perry __asm volatile("mfspr %0,0x3f0" :
158 1.13 simonb "=r" (rv), "=r" (srr2), "=r" (srr3) :);
159 1.13 simonb printf("debug reg is %x srr2 %x srr3 %x\n", rv, srr2,
160 1.13 simonb srr3);
161 1.13 simonb /* XXX fall through or break here?! */
162 1.13 simonb }
163 1.1 simonb /*
164 1.1 simonb * DEBUG intr -- probably single-step.
165 1.1 simonb */
166 1.1 simonb case EXC_TRC|EXC_USER:
167 1.49.16.1 matt tf->tf_srr1 &= ~PSL_SE;
168 1.19 thorpej KSI_INIT_TRAP(&ksi);
169 1.17 matt ksi.ksi_signo = SIGTRAP;
170 1.17 matt ksi.ksi_trap = EXC_TRC;
171 1.49.16.1 matt ksi.ksi_addr = (void *)tf->tf_srr0;
172 1.17 matt trapsignal(l, &ksi);
173 1.1 simonb break;
174 1.7 simonb
175 1.13 simonb /*
176 1.13 simonb * If we could not find and install appropriate TLB entry, fall through.
177 1.13 simonb */
178 1.7 simonb
179 1.1 simonb case EXC_DSI:
180 1.1 simonb /* FALLTHROUGH */
181 1.1 simonb case EXC_DTMISS:
182 1.1 simonb {
183 1.1 simonb struct vm_map *map;
184 1.1 simonb vaddr_t va;
185 1.11 matt struct faultbuf *fb = NULL;
186 1.1 simonb
187 1.49.16.1 matt va = tf->tf_dear;
188 1.49.16.1 matt if (tf->tf_pid == KERNEL_PID) {
189 1.1 simonb map = kernel_map;
190 1.1 simonb } else {
191 1.1 simonb map = &p->p_vmspace->vm_map;
192 1.49 wrstuden if ((l->l_flag & LW_SA)
193 1.49 wrstuden && (~l->l_pflag & LP_SA_NOBLOCK)) {
194 1.49 wrstuden l->l_savp->savp_faultaddr = va;
195 1.49 wrstuden l->l_pflag |= LP_SA_PAGEFAULT;
196 1.49 wrstuden }
197 1.1 simonb }
198 1.1 simonb
199 1.49.16.1 matt if (tf->tf_esr & (ESR_DST|ESR_DIZ))
200 1.3 chs ftype = VM_PROT_WRITE;
201 1.1 simonb
202 1.13 simonb DBPRINTF(TDB_ALL,
203 1.13 simonb ("trap(EXC_DSI) at %lx %s fault on %p esr %x\n",
204 1.49.16.1 matt tf->tf_srr0,
205 1.13 simonb (ftype & VM_PROT_WRITE) ? "write" : "read",
206 1.49.16.1 matt (void *)va, tf->tf_esr));
207 1.49.16.1 matt
208 1.49.16.2 matt struct pcb * const pcb = lwp_getpcb(l);
209 1.49.16.2 matt fb = pcb->pcb_onfault;
210 1.49.16.2 matt pcb->pcb_onfault = NULL;
211 1.32 drochner rv = uvm_fault(map, trunc_page(va), ftype);
212 1.49.16.2 matt pcb->pcb_onfault = fb;
213 1.49 wrstuden if (map != kernel_map) {
214 1.49 wrstuden l->l_pflag &= ~LP_SA_PAGEFAULT;
215 1.49 wrstuden }
216 1.1 simonb if (rv == 0)
217 1.1 simonb goto done;
218 1.49.16.1 matt if (fb != NULL) {
219 1.49.16.1 matt tf->tf_pid = KERNEL_PID;
220 1.49.16.1 matt tf->tf_srr0 = fb->fb_pc;
221 1.49.16.1 matt tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
222 1.49.16.1 matt tf->tf_cr = fb->fb_cr;
223 1.49.16.1 matt tf->tf_fixreg[1] = fb->fb_sp;
224 1.49.16.1 matt tf->tf_fixreg[2] = fb->fb_r2;
225 1.49.16.1 matt tf->tf_fixreg[3] = 1; /* Return TRUE */
226 1.49.16.1 matt memcpy(&tf->tf_fixreg[13], fb->fb_fixreg,
227 1.11 matt sizeof(fb->fb_fixreg));
228 1.1 simonb goto done;
229 1.1 simonb }
230 1.1 simonb }
231 1.1 simonb goto brain_damage;
232 1.7 simonb
233 1.1 simonb case EXC_DSI|EXC_USER:
234 1.1 simonb /* FALLTHROUGH */
235 1.1 simonb case EXC_DTMISS|EXC_USER:
236 1.49.16.1 matt if (tf->tf_esr & (ESR_DST|ESR_DIZ))
237 1.3 chs ftype = VM_PROT_WRITE;
238 1.1 simonb
239 1.13 simonb DBPRINTF(TDB_ALL,
240 1.13 simonb ("trap(EXC_DSI|EXC_USER) at %lx %s fault on %lx %x\n",
241 1.49.16.1 matt tf->tf_srr0, (ftype & VM_PROT_WRITE) ? "write" : "read",
242 1.49.16.1 matt tf->tf_dear, tf->tf_esr));
243 1.13 simonb KASSERT(l == curlwp && (l->l_stat == LSONPROC));
244 1.49 wrstuden if (l->l_flag & LW_SA) {
245 1.49.16.1 matt l->l_savp->savp_faultaddr = (vaddr_t)tf->tf_dear;
246 1.49 wrstuden l->l_pflag |= LP_SA_PAGEFAULT;
247 1.49 wrstuden }
248 1.49.16.1 matt rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_dear),
249 1.32 drochner ftype);
250 1.1 simonb if (rv == 0) {
251 1.49 wrstuden l->l_pflag &= ~LP_SA_PAGEFAULT;
252 1.13 simonb break;
253 1.1 simonb }
254 1.19 thorpej KSI_INIT_TRAP(&ksi);
255 1.17 matt ksi.ksi_signo = SIGSEGV;
256 1.17 matt ksi.ksi_trap = EXC_DSI;
257 1.49.16.1 matt ksi.ksi_addr = (void *)tf->tf_dear;
258 1.1 simonb if (rv == ENOMEM) {
259 1.10 thorpej printf("UVM: pid %d (%s) lid %d, uid %d killed: "
260 1.13 simonb "out of swap\n",
261 1.13 simonb p->p_pid, p->p_comm, l->l_lid,
262 1.36 ad l->l_cred ?
263 1.36 ad kauth_cred_geteuid(l->l_cred) : -1);
264 1.17 matt ksi.ksi_signo = SIGKILL;
265 1.1 simonb }
266 1.17 matt trapsignal(l, &ksi);
267 1.49 wrstuden l->l_pflag &= ~LP_SA_PAGEFAULT;
268 1.1 simonb break;
269 1.15 chs
270 1.1 simonb case EXC_ITMISS|EXC_USER:
271 1.49.16.1 matt case EXC_ISI|EXC_USER: {
272 1.49 wrstuden if (l->l_flag & LW_SA) {
273 1.49.16.1 matt l->l_savp->savp_faultaddr = (vaddr_t)tf->tf_srr0;
274 1.49 wrstuden l->l_pflag |= LP_SA_PAGEFAULT;
275 1.49 wrstuden }
276 1.15 chs ftype = VM_PROT_EXECUTE;
277 1.13 simonb DBPRINTF(TDB_ALL,
278 1.15 chs ("trap(EXC_ISI|EXC_USER) at %lx execute fault tf %p\n",
279 1.49.16.1 matt tf->tf_srr0, tf));
280 1.49.16.1 matt rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_srr0),
281 1.32 drochner ftype);
282 1.1 simonb if (rv == 0) {
283 1.49 wrstuden l->l_pflag &= ~LP_SA_PAGEFAULT;
284 1.13 simonb break;
285 1.1 simonb }
286 1.19 thorpej KSI_INIT_TRAP(&ksi);
287 1.17 matt ksi.ksi_signo = SIGSEGV;
288 1.17 matt ksi.ksi_trap = EXC_ISI;
289 1.49.16.1 matt ksi.ksi_addr = (void *)tf->tf_srr0;
290 1.21 drochner ksi.ksi_code = (rv == EACCES ? SEGV_ACCERR : SEGV_MAPERR);
291 1.17 matt trapsignal(l, &ksi);
292 1.49 wrstuden l->l_pflag &= ~LP_SA_PAGEFAULT;
293 1.1 simonb break;
294 1.49.16.1 matt }
295 1.1 simonb case EXC_AST|EXC_USER:
296 1.11 matt curcpu()->ci_astpending = 0; /* we are about to do it */
297 1.1 simonb uvmexp.softs++;
298 1.39 ad if (l->l_pflag & LP_OWEUPC) {
299 1.39 ad l->l_pflag &= ~LP_OWEUPC;
300 1.39 ad ADDUPROF(l);
301 1.1 simonb }
302 1.1 simonb /* Check whether we are being preempted. */
303 1.42 rjs if (curcpu()->ci_want_resched)
304 1.38 ad preempt();
305 1.1 simonb break;
306 1.1 simonb
307 1.1 simonb
308 1.1 simonb case EXC_ALI|EXC_USER:
309 1.49.16.1 matt if (fix_unaligned(l, tf) != 0) {
310 1.19 thorpej KSI_INIT_TRAP(&ksi);
311 1.17 matt ksi.ksi_signo = SIGBUS;
312 1.17 matt ksi.ksi_trap = EXC_ALI;
313 1.49.16.1 matt ksi.ksi_addr = (void *)tf->tf_dear;
314 1.17 matt trapsignal(l, &ksi);
315 1.17 matt } else
316 1.49.16.1 matt tf->tf_srr0 += 4;
317 1.1 simonb break;
318 1.1 simonb
319 1.49.16.2 matt case EXC_PGM|EXC_USER: {
320 1.7 simonb /*
321 1.7 simonb * Illegal insn:
322 1.1 simonb *
323 1.7 simonb * let's try to see if it's FPU and can be emulated.
324 1.1 simonb */
325 1.24 simonb uvmexp.traps++;
326 1.49.16.2 matt struct pcb * const pcb = lwp_getpcb(l);
327 1.49.16.2 matt if (!(l->l_md.md_flags & MDLWP_USEDFPU)) {
328 1.49.16.2 matt memset(&pcb->pcb_fpu, 0, sizeof pcb->pcb_fpu);
329 1.49.16.2 matt l->l_md.md_flags |= MDLWP_USEDFPU;
330 1.1 simonb }
331 1.1 simonb
332 1.49.16.2 matt rv = fpu_emulate(tf, (struct fpreg *)pcb->pcb_fpu.fpreg);
333 1.49.16.2 matt if (rv != 0) {
334 1.19 thorpej KSI_INIT_TRAP(&ksi);
335 1.17 matt ksi.ksi_signo = rv;
336 1.17 matt ksi.ksi_trap = EXC_PGM;
337 1.49.16.1 matt ksi.ksi_addr = (void *)tf->tf_srr0;
338 1.17 matt trapsignal(l, &ksi);
339 1.1 simonb }
340 1.1 simonb break;
341 1.49.16.2 matt }
342 1.1 simonb
343 1.49.16.2 matt case EXC_MCHK: {
344 1.49.16.2 matt struct pcb * const pcb = lwp_getpcb(l);
345 1.49.16.2 matt struct faultbuf * const fb = pcb->pcb_onfault;
346 1.49.16.2 matt
347 1.49.16.2 matt if (fb != NULL) {
348 1.49.16.2 matt tf->tf_pid = KERNEL_PID;
349 1.49.16.2 matt tf->tf_srr0 = fb->fb_pc;
350 1.49.16.2 matt tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
351 1.49.16.2 matt tf->tf_fixreg[1] = fb->fb_sp;
352 1.49.16.2 matt tf->tf_fixreg[2] = fb->fb_r2;
353 1.49.16.2 matt tf->tf_fixreg[3] = 1; /* Return TRUE */
354 1.49.16.2 matt tf->tf_cr = fb->fb_cr;
355 1.49.16.2 matt memcpy(&tf->tf_fixreg[13], fb->fb_fixreg,
356 1.49.16.2 matt sizeof(fb->fb_fixreg));
357 1.49.16.2 matt goto done;
358 1.1 simonb }
359 1.1 simonb goto brain_damage;
360 1.49.16.2 matt }
361 1.1 simonb default:
362 1.13 simonb brain_damage:
363 1.49.16.1 matt printf("trap type 0x%x at 0x%lx\n", type, tf->tf_srr0);
364 1.44 garbled #if defined(DDB) || defined(KGDB)
365 1.49.16.1 matt if (kdb_trap(type, tf))
366 1.1 simonb goto done;
367 1.1 simonb #endif
368 1.1 simonb #ifdef TRAP_PANICWAIT
369 1.1 simonb printf("Press a key to panic.\n");
370 1.1 simonb cngetc();
371 1.1 simonb #endif
372 1.1 simonb panic("trap");
373 1.1 simonb }
374 1.1 simonb
375 1.20 cl /* Invoke MI userret code */
376 1.20 cl mi_userret(l);
377 1.13 simonb done:
378 1.9 thorpej return;
379 1.1 simonb }
380 1.1 simonb
381 1.1 simonb int
382 1.1 simonb ctx_setup(int ctx, int srr1)
383 1.1 simonb {
384 1.1 simonb volatile struct pmap *pm;
385 1.1 simonb
386 1.1 simonb /* Update PID if we're returning to user mode. */
387 1.1 simonb if (srr1 & PSL_PR) {
388 1.1 simonb pm = curproc->p_vmspace->vm_map.pmap;
389 1.1 simonb if (!pm->pm_ctx) {
390 1.26 scw ctx_alloc(__UNVOLATILE(pm));
391 1.1 simonb }
392 1.1 simonb ctx = pm->pm_ctx;
393 1.1 simonb if (srr1 & PSL_SE) {
394 1.1 simonb int dbreg, mask = 0x48000000;
395 1.1 simonb /*
396 1.1 simonb * Set the Internal Debug and
397 1.1 simonb * Instruction Completion bits of
398 1.1 simonb * the DBCR0 register.
399 1.1 simonb *
400 1.1 simonb * XXX this is also used by jtag debuggers...
401 1.1 simonb */
402 1.28 perry __asm volatile("mfspr %0,0x3f2;"
403 1.13 simonb "or %0,%0,%1;"
404 1.13 simonb "mtspr 0x3f2,%0;" :
405 1.13 simonb "=&r" (dbreg) : "r" (mask));
406 1.1 simonb }
407 1.1 simonb }
408 1.1 simonb else if (!ctx) {
409 1.1 simonb ctx = KERNEL_PID;
410 1.1 simonb }
411 1.1 simonb return (ctx);
412 1.1 simonb }
413 1.1 simonb
414 1.1 simonb /*
415 1.1 simonb * Used by copyin()/copyout()
416 1.1 simonb */
417 1.1 simonb extern vaddr_t vmaprange __P((struct proc *, vaddr_t, vsize_t, int));
418 1.1 simonb extern void vunmaprange __P((vaddr_t, vsize_t));
419 1.13 simonb static int bigcopyin __P((const void *, void *, size_t ));
420 1.1 simonb static int bigcopyout __P((const void *, void *, size_t ));
421 1.1 simonb
422 1.1 simonb int
423 1.1 simonb copyin(const void *udaddr, void *kaddr, size_t len)
424 1.1 simonb {
425 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
426 1.46 hpeyerl int msr, pid, tmp, ctx, count=0;
427 1.11 matt struct faultbuf env;
428 1.1 simonb
429 1.1 simonb /* For bigger buffers use the faster copy */
430 1.46 hpeyerl if (len > 1024)
431 1.25 simonb return (bigcopyin(udaddr, kaddr, len));
432 1.1 simonb
433 1.11 matt if (setfault(&env)) {
434 1.1 simonb curpcb->pcb_onfault = 0;
435 1.1 simonb return EFAULT;
436 1.1 simonb }
437 1.1 simonb
438 1.1 simonb if (!(ctx = pm->pm_ctx)) {
439 1.1 simonb /* No context -- assign it one */
440 1.1 simonb ctx_alloc(pm);
441 1.1 simonb ctx = pm->pm_ctx;
442 1.1 simonb }
443 1.1 simonb
444 1.46 hpeyerl __asm volatile(
445 1.46 hpeyerl " mfmsr %[msr];" /* Save MSR */
446 1.46 hpeyerl " li %[pid],0x20; "
447 1.46 hpeyerl " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */
448 1.46 hpeyerl " mfpid %[pid];" /* Save old PID */
449 1.46 hpeyerl " sync; isync;"
450 1.46 hpeyerl
451 1.46 hpeyerl " srwi. %[count],%[len],0x2;" /* How many words? */
452 1.46 hpeyerl " beq- 2f;" /* No words. Go do bytes */
453 1.46 hpeyerl " mtctr %[count];"
454 1.46 hpeyerl "1: mtpid %[ctx]; sync;"
455 1.47 simonb " lswi %[tmp],%[udaddr],4;" /* Load user word */
456 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */
457 1.46 hpeyerl " sync; isync;"
458 1.46 hpeyerl " mtpid %[pid];sync;"
459 1.47 simonb " stswi %[tmp],%[kaddr],4;" /* Store kernel word */
460 1.46 hpeyerl " dcbf 0,%[kaddr];" /* flush cache */
461 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x4;" /* next udaddr word */
462 1.46 hpeyerl " sync; isync;"
463 1.46 hpeyerl " bdnz 1b;" /* repeat */
464 1.46 hpeyerl
465 1.46 hpeyerl "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */
466 1.46 hpeyerl " addi %[count],%[count],0x1;"
467 1.46 hpeyerl " mtctr %[count];"
468 1.46 hpeyerl "3: bdz 10f;" /* while count */
469 1.46 hpeyerl " mtpid %[ctx];sync;"
470 1.46 hpeyerl " lbz %[tmp],0(%[udaddr]);" /* Load user byte */
471 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x1;" /* next udaddr byte */
472 1.46 hpeyerl " sync; isync;"
473 1.46 hpeyerl " mtpid %[pid]; sync;"
474 1.46 hpeyerl " stb %[tmp],0(%[kaddr]);" /* Store kernel byte */
475 1.46 hpeyerl " dcbf 0,%[kaddr];" /* flush cache */
476 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x1;"
477 1.46 hpeyerl " sync; isync;"
478 1.46 hpeyerl " b 3b;"
479 1.46 hpeyerl "10:mtpid %[pid]; mtmsr %[msr]; sync; isync;" /* Restore PID and MSR */
480 1.46 hpeyerl : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp)
481 1.46 hpeyerl : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr), [len] "b" (len), [count] "b" (count));
482 1.1 simonb
483 1.1 simonb curpcb->pcb_onfault = 0;
484 1.1 simonb return 0;
485 1.1 simonb }
486 1.1 simonb
487 1.1 simonb static int
488 1.1 simonb bigcopyin(const void *udaddr, void *kaddr, size_t len)
489 1.1 simonb {
490 1.1 simonb const char *up;
491 1.1 simonb char *kp = kaddr;
492 1.10 thorpej struct lwp *l = curlwp;
493 1.10 thorpej struct proc *p;
494 1.1 simonb int error;
495 1.1 simonb
496 1.10 thorpej if (!l) {
497 1.1 simonb return EFAULT;
498 1.1 simonb }
499 1.1 simonb
500 1.10 thorpej p = l->l_proc;
501 1.10 thorpej
502 1.1 simonb /*
503 1.7 simonb * Stolen from physio():
504 1.1 simonb */
505 1.43 ad uvm_lwp_hold(l);
506 1.37 chs error = uvm_vslock(p->p_vmspace, __UNCONST(udaddr), len, VM_PROT_READ);
507 1.1 simonb if (error) {
508 1.43 ad uvm_lwp_rele(l);
509 1.1 simonb return EFAULT;
510 1.1 simonb }
511 1.1 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len, VM_PROT_READ);
512 1.1 simonb
513 1.2 wiz memcpy(kp, up, len);
514 1.1 simonb vunmaprange((vaddr_t)up, len);
515 1.37 chs uvm_vsunlock(p->p_vmspace, __UNCONST(udaddr), len);
516 1.43 ad uvm_lwp_rele(l);
517 1.1 simonb
518 1.7 simonb return 0;
519 1.1 simonb }
520 1.1 simonb
521 1.1 simonb int
522 1.1 simonb copyout(const void *kaddr, void *udaddr, size_t len)
523 1.1 simonb {
524 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
525 1.46 hpeyerl int msr, pid, tmp, ctx, count=0;
526 1.11 matt struct faultbuf env;
527 1.1 simonb
528 1.1 simonb /* For big copies use more efficient routine */
529 1.46 hpeyerl if (len > 1024)
530 1.25 simonb return (bigcopyout(kaddr, udaddr, len));
531 1.1 simonb
532 1.11 matt if (setfault(&env)) {
533 1.1 simonb curpcb->pcb_onfault = 0;
534 1.1 simonb return EFAULT;
535 1.1 simonb }
536 1.1 simonb
537 1.1 simonb if (!(ctx = pm->pm_ctx)) {
538 1.1 simonb /* No context -- assign it one */
539 1.1 simonb ctx_alloc(pm);
540 1.1 simonb ctx = pm->pm_ctx;
541 1.1 simonb }
542 1.1 simonb
543 1.46 hpeyerl __asm volatile(
544 1.46 hpeyerl " mfmsr %[msr];" /* Save MSR */ \
545 1.46 hpeyerl " li %[pid],0x20; " \
546 1.46 hpeyerl " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */ \
547 1.46 hpeyerl " mfpid %[pid];" /* Save old PID */ \
548 1.46 hpeyerl " sync; isync;"
549 1.46 hpeyerl
550 1.46 hpeyerl " srwi. %[count],%[len],0x2;" /* How many words? */
551 1.46 hpeyerl " beq- 2f;" /* No words. Go do bytes */
552 1.46 hpeyerl " mtctr %[count];"
553 1.46 hpeyerl "1: mtpid %[pid];sync;"
554 1.47 simonb " lswi %[tmp],%[kaddr],4;" /* Load kernel word */
555 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x4;" /* next kaddr word */
556 1.46 hpeyerl " sync; isync;"
557 1.46 hpeyerl " mtpid %[ctx]; sync;"
558 1.47 simonb " stswi %[tmp],%[udaddr],4;" /* Store user word */
559 1.46 hpeyerl " dcbf 0,%[udaddr];" /* flush cache */
560 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */
561 1.46 hpeyerl " sync; isync;"
562 1.46 hpeyerl " bdnz 1b;" /* repeat */
563 1.46 hpeyerl
564 1.46 hpeyerl "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */
565 1.46 hpeyerl " addi %[count],%[count],0x1;"
566 1.46 hpeyerl " mtctr %[count];"
567 1.46 hpeyerl "3: bdz 10f;" /* while count */
568 1.46 hpeyerl " mtpid %[pid];sync;"
569 1.46 hpeyerl " lbz %[tmp],0(%[kaddr]);" /* Load kernel byte */
570 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x1;" /* next kaddr byte */
571 1.46 hpeyerl " sync; isync;"
572 1.46 hpeyerl " mtpid %[ctx]; sync;"
573 1.46 hpeyerl " stb %[tmp],0(%[udaddr]);" /* Store user byte */
574 1.46 hpeyerl " dcbf 0,%[udaddr];" /* flush cache */
575 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x1;"
576 1.46 hpeyerl " sync; isync;"
577 1.46 hpeyerl " b 3b;"
578 1.46 hpeyerl "10:mtpid %[pid]; mtmsr %[msr]; sync; isync;" /* Restore PID and MSR */
579 1.46 hpeyerl : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp)
580 1.46 hpeyerl : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr), [len] "b" (len), [count] "b" (count));
581 1.1 simonb
582 1.1 simonb curpcb->pcb_onfault = 0;
583 1.1 simonb return 0;
584 1.1 simonb }
585 1.1 simonb
586 1.1 simonb static int
587 1.1 simonb bigcopyout(const void *kaddr, void *udaddr, size_t len)
588 1.1 simonb {
589 1.1 simonb char *up;
590 1.26 scw const char *kp = (const char *)kaddr;
591 1.10 thorpej struct lwp *l = curlwp;
592 1.10 thorpej struct proc *p;
593 1.1 simonb int error;
594 1.1 simonb
595 1.10 thorpej if (!l) {
596 1.1 simonb return EFAULT;
597 1.1 simonb }
598 1.1 simonb
599 1.10 thorpej p = l->l_proc;
600 1.10 thorpej
601 1.1 simonb /*
602 1.7 simonb * Stolen from physio():
603 1.1 simonb */
604 1.43 ad uvm_lwp_hold(l);
605 1.37 chs error = uvm_vslock(p->p_vmspace, udaddr, len, VM_PROT_WRITE);
606 1.1 simonb if (error) {
607 1.43 ad uvm_lwp_rele(l);
608 1.1 simonb return EFAULT;
609 1.1 simonb }
610 1.7 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len,
611 1.13 simonb VM_PROT_READ | VM_PROT_WRITE);
612 1.1 simonb
613 1.2 wiz memcpy(up, kp, len);
614 1.1 simonb vunmaprange((vaddr_t)up, len);
615 1.37 chs uvm_vsunlock(p->p_vmspace, udaddr, len);
616 1.43 ad uvm_lwp_rele(l);
617 1.1 simonb
618 1.7 simonb return 0;
619 1.1 simonb }
620 1.1 simonb
621 1.1 simonb /*
622 1.1 simonb * kcopy(const void *src, void *dst, size_t len);
623 1.1 simonb *
624 1.1 simonb * Copy len bytes from src to dst, aborting if we encounter a fatal
625 1.1 simonb * page fault.
626 1.1 simonb *
627 1.1 simonb * kcopy() _must_ save and restore the old fault handler since it is
628 1.1 simonb * called by uiomove(), which may be in the path of servicing a non-fatal
629 1.1 simonb * page fault.
630 1.1 simonb */
631 1.1 simonb int
632 1.1 simonb kcopy(const void *src, void *dst, size_t len)
633 1.1 simonb {
634 1.11 matt struct faultbuf env, *oldfault;
635 1.1 simonb
636 1.1 simonb oldfault = curpcb->pcb_onfault;
637 1.11 matt if (setfault(&env)) {
638 1.1 simonb curpcb->pcb_onfault = oldfault;
639 1.1 simonb return EFAULT;
640 1.1 simonb }
641 1.1 simonb
642 1.2 wiz memcpy(dst, src, len);
643 1.1 simonb
644 1.1 simonb curpcb->pcb_onfault = oldfault;
645 1.1 simonb return 0;
646 1.1 simonb }
647 1.1 simonb
648 1.1 simonb int
649 1.1 simonb badaddr(void *addr, size_t size)
650 1.1 simonb {
651 1.1 simonb
652 1.1 simonb return badaddr_read(addr, size, NULL);
653 1.1 simonb }
654 1.1 simonb
655 1.1 simonb int
656 1.1 simonb badaddr_read(void *addr, size_t size, int *rptr)
657 1.1 simonb {
658 1.11 matt struct faultbuf env;
659 1.1 simonb int x;
660 1.1 simonb
661 1.1 simonb /* Get rid of any stale machine checks that have been waiting. */
662 1.28 perry __asm volatile ("sync; isync");
663 1.1 simonb
664 1.11 matt if (setfault(&env)) {
665 1.1 simonb curpcb->pcb_onfault = 0;
666 1.28 perry __asm volatile ("sync");
667 1.1 simonb return 1;
668 1.1 simonb }
669 1.1 simonb
670 1.28 perry __asm volatile ("sync");
671 1.1 simonb
672 1.1 simonb switch (size) {
673 1.1 simonb case 1:
674 1.1 simonb x = *(volatile int8_t *)addr;
675 1.1 simonb break;
676 1.1 simonb case 2:
677 1.1 simonb x = *(volatile int16_t *)addr;
678 1.1 simonb break;
679 1.1 simonb case 4:
680 1.1 simonb x = *(volatile int32_t *)addr;
681 1.1 simonb break;
682 1.1 simonb default:
683 1.1 simonb panic("badaddr: invalid size (%d)", size);
684 1.1 simonb }
685 1.1 simonb
686 1.1 simonb /* Make sure we took the machine check, if we caused one. */
687 1.28 perry __asm volatile ("sync; isync");
688 1.1 simonb
689 1.1 simonb curpcb->pcb_onfault = 0;
690 1.28 perry __asm volatile ("sync"); /* To be sure. */
691 1.1 simonb
692 1.1 simonb /* Use the value to avoid reorder. */
693 1.1 simonb if (rptr)
694 1.1 simonb *rptr = x;
695 1.1 simonb
696 1.1 simonb return 0;
697 1.1 simonb }
698 1.1 simonb
699 1.1 simonb /*
700 1.1 simonb * For now, this only deals with the particular unaligned access case
701 1.1 simonb * that gcc tends to generate. Eventually it should handle all of the
702 1.1 simonb * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
703 1.1 simonb */
704 1.1 simonb
705 1.1 simonb static int
706 1.49.16.1 matt fix_unaligned(struct lwp *l, struct trapframe *tf)
707 1.1 simonb {
708 1.1 simonb
709 1.1 simonb return -1;
710 1.10 thorpej }
711 1.10 thorpej
712 1.10 thorpej /*
713 1.10 thorpej * Start a new LWP
714 1.10 thorpej */
715 1.10 thorpej void
716 1.10 thorpej startlwp(arg)
717 1.10 thorpej void *arg;
718 1.10 thorpej {
719 1.10 thorpej int err;
720 1.10 thorpej ucontext_t *uc = arg;
721 1.10 thorpej struct lwp *l = curlwp;
722 1.10 thorpej
723 1.10 thorpej err = cpu_setmcontext(l, &uc->uc_mcontext, uc->uc_flags);
724 1.10 thorpej #if DIAGNOSTIC
725 1.10 thorpej if (err) {
726 1.10 thorpej printf("Error %d from cpu_setmcontext.", err);
727 1.10 thorpej }
728 1.10 thorpej #endif
729 1.10 thorpej pool_put(&lwp_uc_pool, uc);
730 1.10 thorpej
731 1.49 wrstuden upcallret(l);
732 1.49 wrstuden }
733 1.49 wrstuden
734 1.49 wrstuden /*
735 1.49 wrstuden * XXX This is a terrible name.
736 1.49 wrstuden */
737 1.49 wrstuden void
738 1.49 wrstuden upcallret(l)
739 1.49 wrstuden struct lwp *l;
740 1.49 wrstuden {
741 1.49 wrstuden
742 1.20 cl /* Invoke MI userret code */
743 1.20 cl mi_userret(l);
744 1.1 simonb }
745