trap.c revision 1.61 1 1.61 matt /* $NetBSD: trap.c,v 1.61 2011/06/18 06:41:41 matt Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2001 Wasabi Systems, Inc.
5 1.1 simonb * All rights reserved.
6 1.1 simonb *
7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed for the NetBSD Project by
20 1.1 simonb * Wasabi Systems, Inc.
21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 simonb * or promote products derived from this software without specific prior
23 1.1 simonb * written permission.
24 1.1 simonb *
25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE.
36 1.1 simonb */
37 1.1 simonb
38 1.1 simonb /*
39 1.1 simonb * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 1.1 simonb * Copyright (C) 1995, 1996 TooLs GmbH.
41 1.1 simonb * All rights reserved.
42 1.1 simonb *
43 1.1 simonb * Redistribution and use in source and binary forms, with or without
44 1.1 simonb * modification, are permitted provided that the following conditions
45 1.1 simonb * are met:
46 1.1 simonb * 1. Redistributions of source code must retain the above copyright
47 1.1 simonb * notice, this list of conditions and the following disclaimer.
48 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 simonb * notice, this list of conditions and the following disclaimer in the
50 1.1 simonb * documentation and/or other materials provided with the distribution.
51 1.1 simonb * 3. All advertising materials mentioning features or use of this software
52 1.1 simonb * must display the following acknowledgement:
53 1.1 simonb * This product includes software developed by TooLs GmbH.
54 1.1 simonb * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 1.1 simonb * derived from this software without specific prior written permission.
56 1.1 simonb *
57 1.1 simonb * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 1.1 simonb * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 1.1 simonb * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 1.1 simonb * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 1.1 simonb * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 1.1 simonb * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 1.1 simonb * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 1.1 simonb * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 1.1 simonb */
68 1.14 lukem
69 1.14 lukem #include <sys/cdefs.h>
70 1.61 matt __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.61 2011/06/18 06:41:41 matt Exp $");
71 1.1 simonb
72 1.1 simonb #include "opt_altivec.h"
73 1.1 simonb #include "opt_ddb.h"
74 1.44 garbled #include "opt_kgdb.h"
75 1.1 simonb
76 1.1 simonb #include <sys/param.h>
77 1.1 simonb #include <sys/proc.h>
78 1.1 simonb #include <sys/reboot.h>
79 1.1 simonb #include <sys/syscall.h>
80 1.1 simonb #include <sys/systm.h>
81 1.49 wrstuden #include <sys/sa.h>
82 1.49 wrstuden #include <sys/savar.h>
83 1.20 cl #include <sys/userret.h>
84 1.34 yamt #include <sys/kauth.h>
85 1.61 matt #include <sys/cpu.h>
86 1.1 simonb
87 1.44 garbled #if defined(KGDB)
88 1.44 garbled #include <sys/kgdb.h>
89 1.44 garbled #endif
90 1.44 garbled
91 1.1 simonb #include <uvm/uvm_extern.h>
92 1.1 simonb
93 1.1 simonb #include <dev/cons.h>
94 1.1 simonb
95 1.1 simonb #include <machine/fpu.h>
96 1.1 simonb #include <machine/frame.h>
97 1.1 simonb #include <machine/pcb.h>
98 1.1 simonb #include <machine/psl.h>
99 1.1 simonb #include <machine/trap.h>
100 1.1 simonb
101 1.61 matt #include <powerpc/db_machdep.h>
102 1.1 simonb #include <powerpc/spr.h>
103 1.54 matt #include <powerpc/ibm4xx/spr.h>
104 1.61 matt
105 1.61 matt #include <powerpc/ibm4xx/cpu.h>
106 1.1 simonb #include <powerpc/ibm4xx/pmap.h>
107 1.1 simonb #include <powerpc/ibm4xx/tlb.h>
108 1.61 matt
109 1.1 simonb #include <powerpc/fpu/fpu_extern.h>
110 1.1 simonb
111 1.1 simonb /* These definitions should probably be somewhere else XXX */
112 1.1 simonb #define FIRSTARG 3 /* first argument is in reg 3 */
113 1.1 simonb #define NARGREG 8 /* 8 args are in registers */
114 1.40 christos #define MOREARGS(sp) ((void *)((int)(sp) + 8)) /* more args go here */
115 1.1 simonb
116 1.50 dsl static int fix_unaligned(struct lwp *l, struct trapframe *frame);
117 1.1 simonb
118 1.50 dsl void trap(struct trapframe *); /* Called from locore / trap_subr */
119 1.1 simonb /* Why are these not defined in a header? */
120 1.50 dsl int badaddr(void *, size_t);
121 1.50 dsl int badaddr_read(void *, size_t, int *);
122 1.50 dsl int ctx_setup(int, int);
123 1.1 simonb
124 1.1 simonb #ifdef DEBUG
125 1.1 simonb #define TDB_ALL 0x1
126 1.1 simonb int trapdebug = /* TDB_ALL */ 0;
127 1.1 simonb #define DBPRINTF(x, y) if (trapdebug & (x)) printf y
128 1.1 simonb #else
129 1.1 simonb #define DBPRINTF(x, y)
130 1.1 simonb #endif
131 1.1 simonb
132 1.1 simonb void
133 1.58 matt trap(struct trapframe *tf)
134 1.1 simonb {
135 1.10 thorpej struct lwp *l = curlwp;
136 1.55 chs struct proc *p = l->l_proc;
137 1.53 rmind struct pcb *pcb;
138 1.58 matt int type = tf->tf_exc;
139 1.1 simonb int ftype, rv;
140 1.18 eeh ksiginfo_t ksi;
141 1.1 simonb
142 1.55 chs KASSERT(l->l_stat == LSONPROC);
143 1.1 simonb
144 1.58 matt if (tf->tf_srr1 & PSL_PR) {
145 1.35 ad LWP_CACHE_CREDS(l, p);
146 1.1 simonb type |= EXC_USER;
147 1.35 ad }
148 1.1 simonb
149 1.1 simonb ftype = VM_PROT_READ;
150 1.1 simonb
151 1.13 simonb DBPRINTF(TDB_ALL, ("trap(%x) at %lx from frame %p &frame %p\n",
152 1.58 matt type, tf->tf_srr0, tf, &tf));
153 1.1 simonb
154 1.1 simonb switch (type) {
155 1.1 simonb case EXC_DEBUG|EXC_USER:
156 1.13 simonb {
157 1.13 simonb int srr2, srr3;
158 1.13 simonb
159 1.28 perry __asm volatile("mfspr %0,0x3f0" :
160 1.13 simonb "=r" (rv), "=r" (srr2), "=r" (srr3) :);
161 1.13 simonb printf("debug reg is %x srr2 %x srr3 %x\n", rv, srr2,
162 1.13 simonb srr3);
163 1.13 simonb /* XXX fall through or break here?! */
164 1.13 simonb }
165 1.1 simonb /*
166 1.1 simonb * DEBUG intr -- probably single-step.
167 1.1 simonb */
168 1.1 simonb case EXC_TRC|EXC_USER:
169 1.58 matt tf->tf_srr1 &= ~PSL_SE;
170 1.19 thorpej KSI_INIT_TRAP(&ksi);
171 1.17 matt ksi.ksi_signo = SIGTRAP;
172 1.17 matt ksi.ksi_trap = EXC_TRC;
173 1.58 matt ksi.ksi_addr = (void *)tf->tf_srr0;
174 1.17 matt trapsignal(l, &ksi);
175 1.1 simonb break;
176 1.7 simonb
177 1.13 simonb /*
178 1.13 simonb * If we could not find and install appropriate TLB entry, fall through.
179 1.13 simonb */
180 1.7 simonb
181 1.1 simonb case EXC_DSI:
182 1.1 simonb /* FALLTHROUGH */
183 1.1 simonb case EXC_DTMISS:
184 1.1 simonb {
185 1.1 simonb struct vm_map *map;
186 1.1 simonb vaddr_t va;
187 1.11 matt struct faultbuf *fb = NULL;
188 1.1 simonb
189 1.58 matt va = tf->tf_dear;
190 1.58 matt if (tf->tf_pid == KERNEL_PID) {
191 1.1 simonb map = kernel_map;
192 1.1 simonb } else {
193 1.1 simonb map = &p->p_vmspace->vm_map;
194 1.49 wrstuden if ((l->l_flag & LW_SA)
195 1.49 wrstuden && (~l->l_pflag & LP_SA_NOBLOCK)) {
196 1.49 wrstuden l->l_savp->savp_faultaddr = va;
197 1.49 wrstuden l->l_pflag |= LP_SA_PAGEFAULT;
198 1.49 wrstuden }
199 1.1 simonb }
200 1.1 simonb
201 1.58 matt if (tf->tf_esr & (ESR_DST|ESR_DIZ))
202 1.3 chs ftype = VM_PROT_WRITE;
203 1.1 simonb
204 1.13 simonb DBPRINTF(TDB_ALL,
205 1.13 simonb ("trap(EXC_DSI) at %lx %s fault on %p esr %x\n",
206 1.58 matt tf->tf_srr0,
207 1.13 simonb (ftype & VM_PROT_WRITE) ? "write" : "read",
208 1.58 matt (void *)va, tf->tf_esr));
209 1.58 matt
210 1.55 chs pcb = lwp_getpcb(l);
211 1.55 chs fb = pcb->pcb_onfault;
212 1.55 chs pcb->pcb_onfault = NULL;
213 1.32 drochner rv = uvm_fault(map, trunc_page(va), ftype);
214 1.55 chs pcb->pcb_onfault = fb;
215 1.49 wrstuden if (map != kernel_map) {
216 1.49 wrstuden l->l_pflag &= ~LP_SA_PAGEFAULT;
217 1.49 wrstuden }
218 1.1 simonb if (rv == 0)
219 1.1 simonb goto done;
220 1.55 chs if (fb != NULL) {
221 1.58 matt tf->tf_pid = KERNEL_PID;
222 1.58 matt tf->tf_srr0 = fb->fb_pc;
223 1.58 matt tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
224 1.58 matt tf->tf_cr = fb->fb_cr;
225 1.58 matt tf->tf_fixreg[1] = fb->fb_sp;
226 1.58 matt tf->tf_fixreg[2] = fb->fb_r2;
227 1.58 matt tf->tf_fixreg[3] = 1; /* Return TRUE */
228 1.58 matt memcpy(&tf->tf_fixreg[13], fb->fb_fixreg,
229 1.11 matt sizeof(fb->fb_fixreg));
230 1.1 simonb goto done;
231 1.1 simonb }
232 1.1 simonb }
233 1.1 simonb goto brain_damage;
234 1.7 simonb
235 1.1 simonb case EXC_DSI|EXC_USER:
236 1.1 simonb /* FALLTHROUGH */
237 1.1 simonb case EXC_DTMISS|EXC_USER:
238 1.58 matt if (tf->tf_esr & (ESR_DST|ESR_DIZ))
239 1.3 chs ftype = VM_PROT_WRITE;
240 1.1 simonb
241 1.13 simonb DBPRINTF(TDB_ALL,
242 1.13 simonb ("trap(EXC_DSI|EXC_USER) at %lx %s fault on %lx %x\n",
243 1.58 matt tf->tf_srr0, (ftype & VM_PROT_WRITE) ? "write" : "read",
244 1.58 matt tf->tf_dear, tf->tf_esr));
245 1.13 simonb KASSERT(l == curlwp && (l->l_stat == LSONPROC));
246 1.49 wrstuden if (l->l_flag & LW_SA) {
247 1.58 matt l->l_savp->savp_faultaddr = (vaddr_t)tf->tf_dear;
248 1.49 wrstuden l->l_pflag |= LP_SA_PAGEFAULT;
249 1.49 wrstuden }
250 1.55 chs // KASSERT(curpcb->pcb_onfault == NULL);
251 1.58 matt rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_dear),
252 1.32 drochner ftype);
253 1.1 simonb if (rv == 0) {
254 1.49 wrstuden l->l_pflag &= ~LP_SA_PAGEFAULT;
255 1.13 simonb break;
256 1.1 simonb }
257 1.19 thorpej KSI_INIT_TRAP(&ksi);
258 1.17 matt ksi.ksi_signo = SIGSEGV;
259 1.17 matt ksi.ksi_trap = EXC_DSI;
260 1.58 matt ksi.ksi_addr = (void *)tf->tf_dear;
261 1.1 simonb if (rv == ENOMEM) {
262 1.10 thorpej printf("UVM: pid %d (%s) lid %d, uid %d killed: "
263 1.13 simonb "out of swap\n",
264 1.13 simonb p->p_pid, p->p_comm, l->l_lid,
265 1.36 ad l->l_cred ?
266 1.36 ad kauth_cred_geteuid(l->l_cred) : -1);
267 1.17 matt ksi.ksi_signo = SIGKILL;
268 1.1 simonb }
269 1.17 matt trapsignal(l, &ksi);
270 1.49 wrstuden l->l_pflag &= ~LP_SA_PAGEFAULT;
271 1.1 simonb break;
272 1.15 chs
273 1.1 simonb case EXC_ITMISS|EXC_USER:
274 1.1 simonb case EXC_ISI|EXC_USER:
275 1.49 wrstuden if (l->l_flag & LW_SA) {
276 1.58 matt l->l_savp->savp_faultaddr = (vaddr_t)tf->tf_srr0;
277 1.49 wrstuden l->l_pflag |= LP_SA_PAGEFAULT;
278 1.49 wrstuden }
279 1.15 chs ftype = VM_PROT_EXECUTE;
280 1.13 simonb DBPRINTF(TDB_ALL,
281 1.15 chs ("trap(EXC_ISI|EXC_USER) at %lx execute fault tf %p\n",
282 1.58 matt tf->tf_srr0, tf));
283 1.55 chs // KASSERT(curpcb->pcb_onfault == NULL);
284 1.58 matt rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_srr0),
285 1.32 drochner ftype);
286 1.1 simonb if (rv == 0) {
287 1.49 wrstuden l->l_pflag &= ~LP_SA_PAGEFAULT;
288 1.13 simonb break;
289 1.1 simonb }
290 1.19 thorpej KSI_INIT_TRAP(&ksi);
291 1.17 matt ksi.ksi_signo = SIGSEGV;
292 1.17 matt ksi.ksi_trap = EXC_ISI;
293 1.58 matt ksi.ksi_addr = (void *)tf->tf_srr0;
294 1.21 drochner ksi.ksi_code = (rv == EACCES ? SEGV_ACCERR : SEGV_MAPERR);
295 1.17 matt trapsignal(l, &ksi);
296 1.49 wrstuden l->l_pflag &= ~LP_SA_PAGEFAULT;
297 1.1 simonb break;
298 1.1 simonb
299 1.1 simonb case EXC_AST|EXC_USER:
300 1.59 matt l->l_md.md_astpending = 0; /* we are about to do it */
301 1.57 matt //curcpu()->ci_data.cpu_nast++;
302 1.39 ad if (l->l_pflag & LP_OWEUPC) {
303 1.39 ad l->l_pflag &= ~LP_OWEUPC;
304 1.39 ad ADDUPROF(l);
305 1.1 simonb }
306 1.1 simonb /* Check whether we are being preempted. */
307 1.42 rjs if (curcpu()->ci_want_resched)
308 1.38 ad preempt();
309 1.1 simonb break;
310 1.1 simonb
311 1.1 simonb
312 1.1 simonb case EXC_ALI|EXC_USER:
313 1.58 matt if (fix_unaligned(l, tf) != 0) {
314 1.19 thorpej KSI_INIT_TRAP(&ksi);
315 1.17 matt ksi.ksi_signo = SIGBUS;
316 1.17 matt ksi.ksi_trap = EXC_ALI;
317 1.58 matt ksi.ksi_addr = (void *)tf->tf_dear;
318 1.17 matt trapsignal(l, &ksi);
319 1.17 matt } else
320 1.58 matt tf->tf_srr0 += 4;
321 1.1 simonb break;
322 1.1 simonb
323 1.1 simonb case EXC_PGM|EXC_USER:
324 1.7 simonb /*
325 1.7 simonb * Illegal insn:
326 1.1 simonb *
327 1.7 simonb * let's try to see if it's FPU and can be emulated.
328 1.1 simonb */
329 1.57 matt curcpu()->ci_data.cpu_ntrap++;
330 1.53 rmind pcb = lwp_getpcb(l);
331 1.53 rmind
332 1.58 matt if (!(l->l_md.md_flags & MDLWP_USEDFPU)) {
333 1.53 rmind memset(&pcb->pcb_fpu, 0, sizeof(pcb->pcb_fpu));
334 1.58 matt l->l_md.md_flags |= MDLWP_USEDFPU;
335 1.1 simonb }
336 1.1 simonb
337 1.58 matt if ((rv = fpu_emulate(tf, (struct fpreg *)&pcb->pcb_fpu))) {
338 1.19 thorpej KSI_INIT_TRAP(&ksi);
339 1.17 matt ksi.ksi_signo = rv;
340 1.17 matt ksi.ksi_trap = EXC_PGM;
341 1.58 matt ksi.ksi_addr = (void *)tf->tf_srr0;
342 1.17 matt trapsignal(l, &ksi);
343 1.1 simonb }
344 1.1 simonb break;
345 1.1 simonb
346 1.1 simonb case EXC_MCHK:
347 1.1 simonb {
348 1.11 matt struct faultbuf *fb;
349 1.1 simonb
350 1.53 rmind pcb = lwp_getpcb(l);
351 1.53 rmind if ((fb = pcb->pcb_onfault) != NULL) {
352 1.58 matt tf->tf_pid = KERNEL_PID;
353 1.58 matt tf->tf_srr0 = fb->fb_pc;
354 1.58 matt tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
355 1.58 matt tf->tf_fixreg[1] = fb->fb_sp;
356 1.58 matt tf->tf_fixreg[2] = fb->fb_r2;
357 1.58 matt tf->tf_fixreg[3] = 1; /* Return TRUE */
358 1.58 matt tf->tf_cr = fb->fb_cr;
359 1.58 matt memcpy(&tf->tf_fixreg[13], fb->fb_fixreg,
360 1.11 matt sizeof(fb->fb_fixreg));
361 1.1 simonb goto done;
362 1.1 simonb }
363 1.1 simonb }
364 1.1 simonb goto brain_damage;
365 1.1 simonb default:
366 1.13 simonb brain_damage:
367 1.58 matt printf("trap type 0x%x at 0x%lx\n", type, tf->tf_srr0);
368 1.44 garbled #if defined(DDB) || defined(KGDB)
369 1.58 matt if (kdb_trap(type, tf))
370 1.1 simonb goto done;
371 1.1 simonb #endif
372 1.1 simonb #ifdef TRAP_PANICWAIT
373 1.1 simonb printf("Press a key to panic.\n");
374 1.1 simonb cngetc();
375 1.1 simonb #endif
376 1.1 simonb panic("trap");
377 1.1 simonb }
378 1.1 simonb
379 1.20 cl /* Invoke MI userret code */
380 1.20 cl mi_userret(l);
381 1.13 simonb done:
382 1.9 thorpej return;
383 1.1 simonb }
384 1.1 simonb
385 1.1 simonb int
386 1.1 simonb ctx_setup(int ctx, int srr1)
387 1.1 simonb {
388 1.1 simonb volatile struct pmap *pm;
389 1.1 simonb
390 1.1 simonb /* Update PID if we're returning to user mode. */
391 1.1 simonb if (srr1 & PSL_PR) {
392 1.1 simonb pm = curproc->p_vmspace->vm_map.pmap;
393 1.1 simonb if (!pm->pm_ctx) {
394 1.26 scw ctx_alloc(__UNVOLATILE(pm));
395 1.1 simonb }
396 1.1 simonb ctx = pm->pm_ctx;
397 1.1 simonb if (srr1 & PSL_SE) {
398 1.1 simonb int dbreg, mask = 0x48000000;
399 1.1 simonb /*
400 1.1 simonb * Set the Internal Debug and
401 1.1 simonb * Instruction Completion bits of
402 1.1 simonb * the DBCR0 register.
403 1.1 simonb *
404 1.1 simonb * XXX this is also used by jtag debuggers...
405 1.1 simonb */
406 1.28 perry __asm volatile("mfspr %0,0x3f2;"
407 1.13 simonb "or %0,%0,%1;"
408 1.13 simonb "mtspr 0x3f2,%0;" :
409 1.13 simonb "=&r" (dbreg) : "r" (mask));
410 1.1 simonb }
411 1.1 simonb }
412 1.1 simonb else if (!ctx) {
413 1.1 simonb ctx = KERNEL_PID;
414 1.1 simonb }
415 1.1 simonb return (ctx);
416 1.1 simonb }
417 1.1 simonb
418 1.1 simonb /*
419 1.1 simonb * Used by copyin()/copyout()
420 1.1 simonb */
421 1.50 dsl extern vaddr_t vmaprange(struct proc *, vaddr_t, vsize_t, int);
422 1.50 dsl extern void vunmaprange(vaddr_t, vsize_t);
423 1.50 dsl static int bigcopyin(const void *, void *, size_t );
424 1.50 dsl static int bigcopyout(const void *, void *, size_t );
425 1.1 simonb
426 1.1 simonb int
427 1.1 simonb copyin(const void *udaddr, void *kaddr, size_t len)
428 1.1 simonb {
429 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
430 1.55 chs int rv, msr, pid, tmp, ctx, count = 0;
431 1.11 matt struct faultbuf env;
432 1.1 simonb
433 1.1 simonb /* For bigger buffers use the faster copy */
434 1.46 hpeyerl if (len > 1024)
435 1.25 simonb return (bigcopyin(udaddr, kaddr, len));
436 1.1 simonb
437 1.55 chs if ((rv = setfault(&env))) {
438 1.55 chs curpcb->pcb_onfault = NULL;
439 1.55 chs return rv;
440 1.1 simonb }
441 1.1 simonb
442 1.1 simonb if (!(ctx = pm->pm_ctx)) {
443 1.1 simonb /* No context -- assign it one */
444 1.1 simonb ctx_alloc(pm);
445 1.1 simonb ctx = pm->pm_ctx;
446 1.1 simonb }
447 1.1 simonb
448 1.46 hpeyerl __asm volatile(
449 1.46 hpeyerl " mfmsr %[msr];" /* Save MSR */
450 1.46 hpeyerl " li %[pid],0x20; "
451 1.46 hpeyerl " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */
452 1.46 hpeyerl " mfpid %[pid];" /* Save old PID */
453 1.46 hpeyerl " sync; isync;"
454 1.46 hpeyerl
455 1.46 hpeyerl " srwi. %[count],%[len],0x2;" /* How many words? */
456 1.46 hpeyerl " beq- 2f;" /* No words. Go do bytes */
457 1.46 hpeyerl " mtctr %[count];"
458 1.46 hpeyerl "1: mtpid %[ctx]; sync;"
459 1.47 simonb " lswi %[tmp],%[udaddr],4;" /* Load user word */
460 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */
461 1.46 hpeyerl " sync; isync;"
462 1.46 hpeyerl " mtpid %[pid];sync;"
463 1.47 simonb " stswi %[tmp],%[kaddr],4;" /* Store kernel word */
464 1.46 hpeyerl " dcbf 0,%[kaddr];" /* flush cache */
465 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x4;" /* next udaddr word */
466 1.46 hpeyerl " sync; isync;"
467 1.46 hpeyerl " bdnz 1b;" /* repeat */
468 1.46 hpeyerl
469 1.46 hpeyerl "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */
470 1.46 hpeyerl " addi %[count],%[count],0x1;"
471 1.46 hpeyerl " mtctr %[count];"
472 1.46 hpeyerl "3: bdz 10f;" /* while count */
473 1.46 hpeyerl " mtpid %[ctx];sync;"
474 1.46 hpeyerl " lbz %[tmp],0(%[udaddr]);" /* Load user byte */
475 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x1;" /* next udaddr byte */
476 1.46 hpeyerl " sync; isync;"
477 1.46 hpeyerl " mtpid %[pid]; sync;"
478 1.46 hpeyerl " stb %[tmp],0(%[kaddr]);" /* Store kernel byte */
479 1.46 hpeyerl " dcbf 0,%[kaddr];" /* flush cache */
480 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x1;"
481 1.46 hpeyerl " sync; isync;"
482 1.46 hpeyerl " b 3b;"
483 1.46 hpeyerl "10:mtpid %[pid]; mtmsr %[msr]; sync; isync;" /* Restore PID and MSR */
484 1.46 hpeyerl : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp)
485 1.46 hpeyerl : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr), [len] "b" (len), [count] "b" (count));
486 1.1 simonb
487 1.55 chs curpcb->pcb_onfault = NULL;
488 1.1 simonb return 0;
489 1.1 simonb }
490 1.1 simonb
491 1.1 simonb static int
492 1.1 simonb bigcopyin(const void *udaddr, void *kaddr, size_t len)
493 1.1 simonb {
494 1.1 simonb const char *up;
495 1.1 simonb char *kp = kaddr;
496 1.10 thorpej struct lwp *l = curlwp;
497 1.10 thorpej struct proc *p;
498 1.55 chs struct faultbuf env;
499 1.1 simonb int error;
500 1.1 simonb
501 1.10 thorpej p = l->l_proc;
502 1.10 thorpej
503 1.1 simonb /*
504 1.7 simonb * Stolen from physio():
505 1.1 simonb */
506 1.37 chs error = uvm_vslock(p->p_vmspace, __UNCONST(udaddr), len, VM_PROT_READ);
507 1.1 simonb if (error) {
508 1.55 chs return error;
509 1.1 simonb }
510 1.1 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len, VM_PROT_READ);
511 1.1 simonb
512 1.55 chs if ((error = setfault(&env)) == 0) {
513 1.55 chs memcpy(kp, up, len);
514 1.55 chs }
515 1.55 chs
516 1.55 chs curpcb->pcb_onfault = NULL;
517 1.1 simonb vunmaprange((vaddr_t)up, len);
518 1.37 chs uvm_vsunlock(p->p_vmspace, __UNCONST(udaddr), len);
519 1.1 simonb
520 1.55 chs return error;
521 1.1 simonb }
522 1.1 simonb
523 1.1 simonb int
524 1.1 simonb copyout(const void *kaddr, void *udaddr, size_t len)
525 1.1 simonb {
526 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
527 1.55 chs int rv, msr, pid, tmp, ctx, count = 0;
528 1.11 matt struct faultbuf env;
529 1.1 simonb
530 1.1 simonb /* For big copies use more efficient routine */
531 1.46 hpeyerl if (len > 1024)
532 1.25 simonb return (bigcopyout(kaddr, udaddr, len));
533 1.1 simonb
534 1.55 chs if ((rv = setfault(&env))) {
535 1.55 chs curpcb->pcb_onfault = NULL;
536 1.55 chs return rv;
537 1.1 simonb }
538 1.1 simonb
539 1.1 simonb if (!(ctx = pm->pm_ctx)) {
540 1.1 simonb /* No context -- assign it one */
541 1.1 simonb ctx_alloc(pm);
542 1.1 simonb ctx = pm->pm_ctx;
543 1.1 simonb }
544 1.1 simonb
545 1.46 hpeyerl __asm volatile(
546 1.46 hpeyerl " mfmsr %[msr];" /* Save MSR */ \
547 1.46 hpeyerl " li %[pid],0x20; " \
548 1.46 hpeyerl " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */ \
549 1.46 hpeyerl " mfpid %[pid];" /* Save old PID */ \
550 1.46 hpeyerl " sync; isync;"
551 1.46 hpeyerl
552 1.46 hpeyerl " srwi. %[count],%[len],0x2;" /* How many words? */
553 1.46 hpeyerl " beq- 2f;" /* No words. Go do bytes */
554 1.46 hpeyerl " mtctr %[count];"
555 1.46 hpeyerl "1: mtpid %[pid];sync;"
556 1.47 simonb " lswi %[tmp],%[kaddr],4;" /* Load kernel word */
557 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x4;" /* next kaddr word */
558 1.46 hpeyerl " sync; isync;"
559 1.46 hpeyerl " mtpid %[ctx]; sync;"
560 1.47 simonb " stswi %[tmp],%[udaddr],4;" /* Store user word */
561 1.46 hpeyerl " dcbf 0,%[udaddr];" /* flush cache */
562 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */
563 1.46 hpeyerl " sync; isync;"
564 1.46 hpeyerl " bdnz 1b;" /* repeat */
565 1.46 hpeyerl
566 1.46 hpeyerl "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */
567 1.46 hpeyerl " addi %[count],%[count],0x1;"
568 1.46 hpeyerl " mtctr %[count];"
569 1.46 hpeyerl "3: bdz 10f;" /* while count */
570 1.46 hpeyerl " mtpid %[pid];sync;"
571 1.46 hpeyerl " lbz %[tmp],0(%[kaddr]);" /* Load kernel byte */
572 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x1;" /* next kaddr byte */
573 1.46 hpeyerl " sync; isync;"
574 1.46 hpeyerl " mtpid %[ctx]; sync;"
575 1.46 hpeyerl " stb %[tmp],0(%[udaddr]);" /* Store user byte */
576 1.46 hpeyerl " dcbf 0,%[udaddr];" /* flush cache */
577 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x1;"
578 1.46 hpeyerl " sync; isync;"
579 1.46 hpeyerl " b 3b;"
580 1.46 hpeyerl "10:mtpid %[pid]; mtmsr %[msr]; sync; isync;" /* Restore PID and MSR */
581 1.46 hpeyerl : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp)
582 1.46 hpeyerl : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr), [len] "b" (len), [count] "b" (count));
583 1.1 simonb
584 1.55 chs curpcb->pcb_onfault = NULL;
585 1.1 simonb return 0;
586 1.1 simonb }
587 1.1 simonb
588 1.1 simonb static int
589 1.1 simonb bigcopyout(const void *kaddr, void *udaddr, size_t len)
590 1.1 simonb {
591 1.1 simonb char *up;
592 1.26 scw const char *kp = (const char *)kaddr;
593 1.10 thorpej struct lwp *l = curlwp;
594 1.10 thorpej struct proc *p;
595 1.55 chs struct faultbuf env;
596 1.1 simonb int error;
597 1.1 simonb
598 1.10 thorpej p = l->l_proc;
599 1.10 thorpej
600 1.1 simonb /*
601 1.7 simonb * Stolen from physio():
602 1.1 simonb */
603 1.37 chs error = uvm_vslock(p->p_vmspace, udaddr, len, VM_PROT_WRITE);
604 1.1 simonb if (error) {
605 1.55 chs return error;
606 1.1 simonb }
607 1.7 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len,
608 1.13 simonb VM_PROT_READ | VM_PROT_WRITE);
609 1.1 simonb
610 1.55 chs if ((error = setfault(&env)) == 0) {
611 1.55 chs memcpy(up, kp, len);
612 1.55 chs }
613 1.55 chs
614 1.55 chs curpcb->pcb_onfault = NULL;
615 1.1 simonb vunmaprange((vaddr_t)up, len);
616 1.37 chs uvm_vsunlock(p->p_vmspace, udaddr, len);
617 1.1 simonb
618 1.55 chs return error;
619 1.1 simonb }
620 1.1 simonb
621 1.1 simonb /*
622 1.1 simonb * kcopy(const void *src, void *dst, size_t len);
623 1.1 simonb *
624 1.1 simonb * Copy len bytes from src to dst, aborting if we encounter a fatal
625 1.1 simonb * page fault.
626 1.1 simonb *
627 1.1 simonb * kcopy() _must_ save and restore the old fault handler since it is
628 1.1 simonb * called by uiomove(), which may be in the path of servicing a non-fatal
629 1.1 simonb * page fault.
630 1.1 simonb */
631 1.1 simonb int
632 1.1 simonb kcopy(const void *src, void *dst, size_t len)
633 1.1 simonb {
634 1.11 matt struct faultbuf env, *oldfault;
635 1.55 chs int rv;
636 1.1 simonb
637 1.1 simonb oldfault = curpcb->pcb_onfault;
638 1.55 chs if ((rv = setfault(&env))) {
639 1.1 simonb curpcb->pcb_onfault = oldfault;
640 1.55 chs return rv;
641 1.1 simonb }
642 1.1 simonb
643 1.2 wiz memcpy(dst, src, len);
644 1.1 simonb
645 1.1 simonb curpcb->pcb_onfault = oldfault;
646 1.1 simonb return 0;
647 1.1 simonb }
648 1.1 simonb
649 1.1 simonb int
650 1.1 simonb badaddr(void *addr, size_t size)
651 1.1 simonb {
652 1.1 simonb
653 1.1 simonb return badaddr_read(addr, size, NULL);
654 1.1 simonb }
655 1.1 simonb
656 1.1 simonb int
657 1.1 simonb badaddr_read(void *addr, size_t size, int *rptr)
658 1.1 simonb {
659 1.11 matt struct faultbuf env;
660 1.1 simonb int x;
661 1.1 simonb
662 1.1 simonb /* Get rid of any stale machine checks that have been waiting. */
663 1.28 perry __asm volatile ("sync; isync");
664 1.1 simonb
665 1.11 matt if (setfault(&env)) {
666 1.55 chs curpcb->pcb_onfault = NULL;
667 1.28 perry __asm volatile ("sync");
668 1.1 simonb return 1;
669 1.1 simonb }
670 1.1 simonb
671 1.28 perry __asm volatile ("sync");
672 1.1 simonb
673 1.1 simonb switch (size) {
674 1.1 simonb case 1:
675 1.1 simonb x = *(volatile int8_t *)addr;
676 1.1 simonb break;
677 1.1 simonb case 2:
678 1.1 simonb x = *(volatile int16_t *)addr;
679 1.1 simonb break;
680 1.1 simonb case 4:
681 1.1 simonb x = *(volatile int32_t *)addr;
682 1.1 simonb break;
683 1.1 simonb default:
684 1.1 simonb panic("badaddr: invalid size (%d)", size);
685 1.1 simonb }
686 1.1 simonb
687 1.1 simonb /* Make sure we took the machine check, if we caused one. */
688 1.28 perry __asm volatile ("sync; isync");
689 1.1 simonb
690 1.55 chs curpcb->pcb_onfault = NULL;
691 1.28 perry __asm volatile ("sync"); /* To be sure. */
692 1.1 simonb
693 1.1 simonb /* Use the value to avoid reorder. */
694 1.1 simonb if (rptr)
695 1.1 simonb *rptr = x;
696 1.1 simonb
697 1.1 simonb return 0;
698 1.1 simonb }
699 1.1 simonb
700 1.1 simonb /*
701 1.1 simonb * For now, this only deals with the particular unaligned access case
702 1.1 simonb * that gcc tends to generate. Eventually it should handle all of the
703 1.1 simonb * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
704 1.1 simonb */
705 1.1 simonb
706 1.1 simonb static int
707 1.58 matt fix_unaligned(struct lwp *l, struct trapframe *tf)
708 1.1 simonb {
709 1.1 simonb
710 1.1 simonb return -1;
711 1.10 thorpej }
712