trap.c revision 1.80 1 1.80 rin /* $NetBSD: trap.c,v 1.80 2020/06/19 07:24:41 rin Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2001 Wasabi Systems, Inc.
5 1.1 simonb * All rights reserved.
6 1.1 simonb *
7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed for the NetBSD Project by
20 1.1 simonb * Wasabi Systems, Inc.
21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 simonb * or promote products derived from this software without specific prior
23 1.1 simonb * written permission.
24 1.1 simonb *
25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE.
36 1.1 simonb */
37 1.1 simonb
38 1.1 simonb /*
39 1.1 simonb * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 1.1 simonb * Copyright (C) 1995, 1996 TooLs GmbH.
41 1.1 simonb * All rights reserved.
42 1.1 simonb *
43 1.1 simonb * Redistribution and use in source and binary forms, with or without
44 1.1 simonb * modification, are permitted provided that the following conditions
45 1.1 simonb * are met:
46 1.1 simonb * 1. Redistributions of source code must retain the above copyright
47 1.1 simonb * notice, this list of conditions and the following disclaimer.
48 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 simonb * notice, this list of conditions and the following disclaimer in the
50 1.1 simonb * documentation and/or other materials provided with the distribution.
51 1.1 simonb * 3. All advertising materials mentioning features or use of this software
52 1.1 simonb * must display the following acknowledgement:
53 1.1 simonb * This product includes software developed by TooLs GmbH.
54 1.1 simonb * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 1.1 simonb * derived from this software without specific prior written permission.
56 1.1 simonb *
57 1.1 simonb * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 1.1 simonb * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 1.1 simonb * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 1.1 simonb * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 1.1 simonb * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 1.1 simonb * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 1.1 simonb * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 1.1 simonb * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 1.1 simonb */
68 1.14 lukem
69 1.14 lukem #include <sys/cdefs.h>
70 1.80 rin __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.80 2020/06/19 07:24:41 rin Exp $");
71 1.1 simonb
72 1.1 simonb #include "opt_altivec.h"
73 1.1 simonb #include "opt_ddb.h"
74 1.44 garbled #include "opt_kgdb.h"
75 1.1 simonb
76 1.70 thorpej #define __UFETCHSTORE_PRIVATE
77 1.70 thorpej
78 1.1 simonb #include <sys/param.h>
79 1.72 rin #include <sys/cpu.h>
80 1.72 rin #include <sys/kauth.h>
81 1.1 simonb #include <sys/proc.h>
82 1.1 simonb #include <sys/reboot.h>
83 1.1 simonb #include <sys/syscall.h>
84 1.1 simonb #include <sys/systm.h>
85 1.1 simonb
86 1.44 garbled #if defined(KGDB)
87 1.44 garbled #include <sys/kgdb.h>
88 1.44 garbled #endif
89 1.44 garbled
90 1.1 simonb #include <uvm/uvm_extern.h>
91 1.1 simonb
92 1.1 simonb #include <dev/cons.h>
93 1.1 simonb
94 1.1 simonb #include <machine/fpu.h>
95 1.1 simonb #include <machine/frame.h>
96 1.1 simonb #include <machine/pcb.h>
97 1.1 simonb #include <machine/psl.h>
98 1.1 simonb #include <machine/trap.h>
99 1.1 simonb
100 1.61 matt #include <powerpc/db_machdep.h>
101 1.1 simonb #include <powerpc/spr.h>
102 1.74 rin #include <powerpc/userret.h>
103 1.61 matt
104 1.61 matt #include <powerpc/ibm4xx/cpu.h>
105 1.1 simonb #include <powerpc/ibm4xx/pmap.h>
106 1.71 rin #include <powerpc/ibm4xx/spr.h>
107 1.1 simonb #include <powerpc/ibm4xx/tlb.h>
108 1.61 matt
109 1.1 simonb #include <powerpc/fpu/fpu_extern.h>
110 1.1 simonb
111 1.1 simonb /* These definitions should probably be somewhere else XXX */
112 1.1 simonb #define FIRSTARG 3 /* first argument is in reg 3 */
113 1.1 simonb #define NARGREG 8 /* 8 args are in registers */
114 1.40 christos #define MOREARGS(sp) ((void *)((int)(sp) + 8)) /* more args go here */
115 1.1 simonb
116 1.63 kiyohara static int fix_unaligned(struct lwp *l, struct trapframe *tf);
117 1.1 simonb
118 1.50 dsl void trap(struct trapframe *); /* Called from locore / trap_subr */
119 1.75 rin #if 0
120 1.75 rin /* Not currently used nor exposed externally in any header file */
121 1.50 dsl int badaddr(void *, size_t);
122 1.50 dsl int badaddr_read(void *, size_t, int *);
123 1.75 rin #endif
124 1.50 dsl int ctx_setup(int, int);
125 1.1 simonb
126 1.1 simonb #ifdef DEBUG
127 1.1 simonb #define TDB_ALL 0x1
128 1.1 simonb int trapdebug = /* TDB_ALL */ 0;
129 1.1 simonb #define DBPRINTF(x, y) if (trapdebug & (x)) printf y
130 1.1 simonb #else
131 1.1 simonb #define DBPRINTF(x, y)
132 1.1 simonb #endif
133 1.1 simonb
134 1.1 simonb void
135 1.58 matt trap(struct trapframe *tf)
136 1.1 simonb {
137 1.10 thorpej struct lwp *l = curlwp;
138 1.55 chs struct proc *p = l->l_proc;
139 1.53 rmind struct pcb *pcb;
140 1.58 matt int type = tf->tf_exc;
141 1.1 simonb int ftype, rv;
142 1.18 eeh ksiginfo_t ksi;
143 1.1 simonb
144 1.55 chs KASSERT(l->l_stat == LSONPROC);
145 1.1 simonb
146 1.58 matt if (tf->tf_srr1 & PSL_PR) {
147 1.35 ad LWP_CACHE_CREDS(l, p);
148 1.1 simonb type |= EXC_USER;
149 1.35 ad }
150 1.1 simonb
151 1.1 simonb ftype = VM_PROT_READ;
152 1.1 simonb
153 1.13 simonb DBPRINTF(TDB_ALL, ("trap(%x) at %lx from frame %p &frame %p\n",
154 1.58 matt type, tf->tf_srr0, tf, &tf));
155 1.1 simonb
156 1.1 simonb switch (type) {
157 1.1 simonb case EXC_DEBUG|EXC_USER:
158 1.13 simonb {
159 1.13 simonb int srr2, srr3;
160 1.13 simonb
161 1.28 perry __asm volatile("mfspr %0,0x3f0" :
162 1.13 simonb "=r" (rv), "=r" (srr2), "=r" (srr3) :);
163 1.13 simonb printf("debug reg is %x srr2 %x srr3 %x\n", rv, srr2,
164 1.13 simonb srr3);
165 1.13 simonb /* XXX fall through or break here?! */
166 1.13 simonb }
167 1.1 simonb /*
168 1.1 simonb * DEBUG intr -- probably single-step.
169 1.1 simonb */
170 1.1 simonb case EXC_TRC|EXC_USER:
171 1.58 matt tf->tf_srr1 &= ~PSL_SE;
172 1.19 thorpej KSI_INIT_TRAP(&ksi);
173 1.17 matt ksi.ksi_signo = SIGTRAP;
174 1.17 matt ksi.ksi_trap = EXC_TRC;
175 1.58 matt ksi.ksi_addr = (void *)tf->tf_srr0;
176 1.17 matt trapsignal(l, &ksi);
177 1.1 simonb break;
178 1.7 simonb
179 1.1 simonb case EXC_DSI:
180 1.1 simonb /* FALLTHROUGH */
181 1.1 simonb case EXC_DTMISS:
182 1.1 simonb {
183 1.1 simonb struct vm_map *map;
184 1.1 simonb vaddr_t va;
185 1.78 rin struct faultbuf *fb;
186 1.78 rin
187 1.78 rin pcb = lwp_getpcb(l);
188 1.78 rin fb = pcb->pcb_onfault;
189 1.78 rin
190 1.78 rin if (curcpu()->ci_idepth >= 0) {
191 1.78 rin rv = EFAULT;
192 1.78 rin goto out;
193 1.78 rin }
194 1.1 simonb
195 1.58 matt va = tf->tf_dear;
196 1.58 matt if (tf->tf_pid == KERNEL_PID) {
197 1.1 simonb map = kernel_map;
198 1.1 simonb } else {
199 1.1 simonb map = &p->p_vmspace->vm_map;
200 1.1 simonb }
201 1.1 simonb
202 1.58 matt if (tf->tf_esr & (ESR_DST|ESR_DIZ))
203 1.3 chs ftype = VM_PROT_WRITE;
204 1.1 simonb
205 1.13 simonb DBPRINTF(TDB_ALL,
206 1.13 simonb ("trap(EXC_DSI) at %lx %s fault on %p esr %x\n",
207 1.58 matt tf->tf_srr0,
208 1.13 simonb (ftype & VM_PROT_WRITE) ? "write" : "read",
209 1.58 matt (void *)va, tf->tf_esr));
210 1.58 matt
211 1.55 chs pcb->pcb_onfault = NULL;
212 1.32 drochner rv = uvm_fault(map, trunc_page(va), ftype);
213 1.55 chs pcb->pcb_onfault = fb;
214 1.1 simonb if (rv == 0)
215 1.68 rin return;
216 1.78 rin out:
217 1.55 chs if (fb != NULL) {
218 1.58 matt tf->tf_pid = KERNEL_PID;
219 1.58 matt tf->tf_srr0 = fb->fb_pc;
220 1.58 matt tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
221 1.58 matt tf->tf_cr = fb->fb_cr;
222 1.58 matt tf->tf_fixreg[1] = fb->fb_sp;
223 1.58 matt tf->tf_fixreg[2] = fb->fb_r2;
224 1.79 rin tf->tf_fixreg[3] = rv;
225 1.58 matt memcpy(&tf->tf_fixreg[13], fb->fb_fixreg,
226 1.11 matt sizeof(fb->fb_fixreg));
227 1.68 rin return;
228 1.1 simonb }
229 1.1 simonb }
230 1.1 simonb goto brain_damage;
231 1.7 simonb
232 1.1 simonb case EXC_DSI|EXC_USER:
233 1.1 simonb /* FALLTHROUGH */
234 1.1 simonb case EXC_DTMISS|EXC_USER:
235 1.58 matt if (tf->tf_esr & (ESR_DST|ESR_DIZ))
236 1.3 chs ftype = VM_PROT_WRITE;
237 1.1 simonb
238 1.13 simonb DBPRINTF(TDB_ALL,
239 1.13 simonb ("trap(EXC_DSI|EXC_USER) at %lx %s fault on %lx %x\n",
240 1.58 matt tf->tf_srr0, (ftype & VM_PROT_WRITE) ? "write" : "read",
241 1.58 matt tf->tf_dear, tf->tf_esr));
242 1.13 simonb KASSERT(l == curlwp && (l->l_stat == LSONPROC));
243 1.55 chs // KASSERT(curpcb->pcb_onfault == NULL);
244 1.58 matt rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_dear),
245 1.32 drochner ftype);
246 1.1 simonb if (rv == 0) {
247 1.13 simonb break;
248 1.1 simonb }
249 1.19 thorpej KSI_INIT_TRAP(&ksi);
250 1.17 matt ksi.ksi_trap = EXC_DSI;
251 1.58 matt ksi.ksi_addr = (void *)tf->tf_dear;
252 1.80 rin vm_signal:
253 1.80 rin switch (rv) {
254 1.80 rin case EINVAL:
255 1.80 rin ksi.ksi_signo = SIGBUS;
256 1.80 rin ksi.ksi_code = BUS_ADRERR;
257 1.80 rin break;
258 1.80 rin case EACCES:
259 1.80 rin ksi.ksi_signo = SIGSEGV;
260 1.80 rin ksi.ksi_code = SEGV_ACCERR;
261 1.80 rin break;
262 1.80 rin case ENOMEM:
263 1.17 matt ksi.ksi_signo = SIGKILL;
264 1.80 rin printf("UVM: pid %d.%d (%s), uid %d killed: "
265 1.80 rin "out of swap\n", p->p_pid, l->l_lid, p->p_comm,
266 1.80 rin l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
267 1.80 rin break;
268 1.80 rin default:
269 1.80 rin ksi.ksi_signo = SIGSEGV;
270 1.80 rin ksi.ksi_code = SEGV_MAPERR;
271 1.80 rin break;
272 1.1 simonb }
273 1.17 matt trapsignal(l, &ksi);
274 1.1 simonb break;
275 1.15 chs
276 1.1 simonb case EXC_ITMISS|EXC_USER:
277 1.1 simonb case EXC_ISI|EXC_USER:
278 1.15 chs ftype = VM_PROT_EXECUTE;
279 1.13 simonb DBPRINTF(TDB_ALL,
280 1.15 chs ("trap(EXC_ISI|EXC_USER) at %lx execute fault tf %p\n",
281 1.58 matt tf->tf_srr0, tf));
282 1.55 chs // KASSERT(curpcb->pcb_onfault == NULL);
283 1.58 matt rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_srr0),
284 1.32 drochner ftype);
285 1.1 simonb if (rv == 0) {
286 1.13 simonb break;
287 1.1 simonb }
288 1.19 thorpej KSI_INIT_TRAP(&ksi);
289 1.17 matt ksi.ksi_trap = EXC_ISI;
290 1.58 matt ksi.ksi_addr = (void *)tf->tf_srr0;
291 1.80 rin goto vm_signal;
292 1.1 simonb break;
293 1.1 simonb
294 1.1 simonb case EXC_AST|EXC_USER:
295 1.62 matt cpu_ast(l, curcpu());
296 1.1 simonb break;
297 1.1 simonb
298 1.1 simonb case EXC_ALI|EXC_USER:
299 1.58 matt if (fix_unaligned(l, tf) != 0) {
300 1.19 thorpej KSI_INIT_TRAP(&ksi);
301 1.17 matt ksi.ksi_signo = SIGBUS;
302 1.17 matt ksi.ksi_trap = EXC_ALI;
303 1.58 matt ksi.ksi_addr = (void *)tf->tf_dear;
304 1.17 matt trapsignal(l, &ksi);
305 1.17 matt } else
306 1.58 matt tf->tf_srr0 += 4;
307 1.1 simonb break;
308 1.1 simonb
309 1.1 simonb case EXC_PGM|EXC_USER:
310 1.7 simonb /*
311 1.7 simonb * Illegal insn:
312 1.1 simonb *
313 1.67 snj * let's try to see if its FPU and can be emulated.
314 1.1 simonb */
315 1.57 matt curcpu()->ci_data.cpu_ntrap++;
316 1.53 rmind pcb = lwp_getpcb(l);
317 1.53 rmind
318 1.66 matt if (__predict_false(!fpu_used_p(l))) {
319 1.53 rmind memset(&pcb->pcb_fpu, 0, sizeof(pcb->pcb_fpu));
320 1.66 matt fpu_mark_used(l);
321 1.1 simonb }
322 1.1 simonb
323 1.65 matt if (fpu_emulate(tf, &pcb->pcb_fpu, &ksi)) {
324 1.65 matt if (ksi.ksi_signo == 0) /* was emulated */
325 1.65 matt break;
326 1.65 matt } else {
327 1.65 matt ksi.ksi_signo = SIGILL;
328 1.65 matt ksi.ksi_code = ILL_ILLOPC;
329 1.17 matt ksi.ksi_trap = EXC_PGM;
330 1.58 matt ksi.ksi_addr = (void *)tf->tf_srr0;
331 1.1 simonb }
332 1.65 matt
333 1.65 matt trapsignal(l, &ksi);
334 1.1 simonb break;
335 1.1 simonb
336 1.1 simonb case EXC_MCHK:
337 1.1 simonb {
338 1.11 matt struct faultbuf *fb;
339 1.1 simonb
340 1.53 rmind pcb = lwp_getpcb(l);
341 1.53 rmind if ((fb = pcb->pcb_onfault) != NULL) {
342 1.58 matt tf->tf_pid = KERNEL_PID;
343 1.58 matt tf->tf_srr0 = fb->fb_pc;
344 1.58 matt tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
345 1.58 matt tf->tf_fixreg[1] = fb->fb_sp;
346 1.58 matt tf->tf_fixreg[2] = fb->fb_r2;
347 1.58 matt tf->tf_fixreg[3] = 1; /* Return TRUE */
348 1.58 matt tf->tf_cr = fb->fb_cr;
349 1.58 matt memcpy(&tf->tf_fixreg[13], fb->fb_fixreg,
350 1.11 matt sizeof(fb->fb_fixreg));
351 1.68 rin return;
352 1.1 simonb }
353 1.1 simonb }
354 1.1 simonb goto brain_damage;
355 1.68 rin
356 1.1 simonb default:
357 1.68 rin brain_damage:
358 1.58 matt printf("trap type 0x%x at 0x%lx\n", type, tf->tf_srr0);
359 1.44 garbled #if defined(DDB) || defined(KGDB)
360 1.58 matt if (kdb_trap(type, tf))
361 1.68 rin return;
362 1.1 simonb #endif
363 1.1 simonb #ifdef TRAP_PANICWAIT
364 1.1 simonb printf("Press a key to panic.\n");
365 1.1 simonb cngetc();
366 1.1 simonb #endif
367 1.1 simonb panic("trap");
368 1.1 simonb }
369 1.1 simonb
370 1.73 rin /* Invoke powerpc userret code */
371 1.73 rin userret(l, tf);
372 1.1 simonb }
373 1.1 simonb
374 1.1 simonb int
375 1.1 simonb ctx_setup(int ctx, int srr1)
376 1.1 simonb {
377 1.1 simonb volatile struct pmap *pm;
378 1.1 simonb
379 1.1 simonb /* Update PID if we're returning to user mode. */
380 1.1 simonb if (srr1 & PSL_PR) {
381 1.1 simonb pm = curproc->p_vmspace->vm_map.pmap;
382 1.1 simonb if (!pm->pm_ctx) {
383 1.26 scw ctx_alloc(__UNVOLATILE(pm));
384 1.1 simonb }
385 1.1 simonb ctx = pm->pm_ctx;
386 1.1 simonb if (srr1 & PSL_SE) {
387 1.1 simonb int dbreg, mask = 0x48000000;
388 1.1 simonb /*
389 1.1 simonb * Set the Internal Debug and
390 1.1 simonb * Instruction Completion bits of
391 1.1 simonb * the DBCR0 register.
392 1.1 simonb *
393 1.1 simonb * XXX this is also used by jtag debuggers...
394 1.1 simonb */
395 1.28 perry __asm volatile("mfspr %0,0x3f2;"
396 1.13 simonb "or %0,%0,%1;"
397 1.13 simonb "mtspr 0x3f2,%0;" :
398 1.13 simonb "=&r" (dbreg) : "r" (mask));
399 1.1 simonb }
400 1.1 simonb }
401 1.1 simonb else if (!ctx) {
402 1.1 simonb ctx = KERNEL_PID;
403 1.1 simonb }
404 1.1 simonb return (ctx);
405 1.1 simonb }
406 1.1 simonb
407 1.1 simonb /*
408 1.1 simonb * Used by copyin()/copyout()
409 1.1 simonb */
410 1.50 dsl extern vaddr_t vmaprange(struct proc *, vaddr_t, vsize_t, int);
411 1.50 dsl extern void vunmaprange(vaddr_t, vsize_t);
412 1.50 dsl static int bigcopyin(const void *, void *, size_t );
413 1.50 dsl static int bigcopyout(const void *, void *, size_t );
414 1.1 simonb
415 1.1 simonb int
416 1.1 simonb copyin(const void *udaddr, void *kaddr, size_t len)
417 1.1 simonb {
418 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
419 1.55 chs int rv, msr, pid, tmp, ctx, count = 0;
420 1.11 matt struct faultbuf env;
421 1.1 simonb
422 1.1 simonb /* For bigger buffers use the faster copy */
423 1.46 hpeyerl if (len > 1024)
424 1.25 simonb return (bigcopyin(udaddr, kaddr, len));
425 1.1 simonb
426 1.55 chs if ((rv = setfault(&env))) {
427 1.55 chs curpcb->pcb_onfault = NULL;
428 1.55 chs return rv;
429 1.1 simonb }
430 1.1 simonb
431 1.1 simonb if (!(ctx = pm->pm_ctx)) {
432 1.1 simonb /* No context -- assign it one */
433 1.1 simonb ctx_alloc(pm);
434 1.1 simonb ctx = pm->pm_ctx;
435 1.1 simonb }
436 1.1 simonb
437 1.46 hpeyerl __asm volatile(
438 1.76 rin " mfmsr %[msr];" /* Save MSR */
439 1.76 rin " li %[pid],0x20;"
440 1.76 rin " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */
441 1.76 rin " mfpid %[pid];" /* Save old PID */
442 1.46 hpeyerl " sync; isync;"
443 1.46 hpeyerl
444 1.76 rin " srwi. %[count],%[len],0x2;" /* How many words? */
445 1.76 rin " beq- 2f;" /* No words. Go do bytes */
446 1.46 hpeyerl " mtctr %[count];"
447 1.46 hpeyerl "1: mtpid %[ctx]; sync;"
448 1.77 rin #ifdef PPC_IBM403
449 1.76 rin " lswi %[tmp],%[udaddr],4;" /* Load user word */
450 1.77 rin #else
451 1.77 rin " lwz %[tmp],0(%[udaddr]);"
452 1.77 rin #endif
453 1.76 rin " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */
454 1.46 hpeyerl " sync; isync;"
455 1.76 rin " mtpid %[pid]; sync;"
456 1.77 rin #ifdef PPC_IBM403
457 1.76 rin " stswi %[tmp],%[kaddr],4;" /* Store kernel word */
458 1.77 rin #else
459 1.77 rin " stw %[tmp],0(%[kaddr]);"
460 1.77 rin #endif
461 1.77 rin " dcbst 0,%[kaddr];" /* flush cache */
462 1.76 rin " addi %[kaddr],%[kaddr],0x4;" /* next udaddr word */
463 1.46 hpeyerl " sync; isync;"
464 1.76 rin " bdnz 1b;" /* repeat */
465 1.46 hpeyerl
466 1.76 rin "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */
467 1.46 hpeyerl " addi %[count],%[count],0x1;"
468 1.46 hpeyerl " mtctr %[count];"
469 1.76 rin "3: bdz 10f;" /* while count */
470 1.76 rin " mtpid %[ctx]; sync;"
471 1.76 rin " lbz %[tmp],0(%[udaddr]);" /* Load user byte */
472 1.76 rin " addi %[udaddr],%[udaddr],0x1;" /* next udaddr byte */
473 1.46 hpeyerl " sync; isync;"
474 1.46 hpeyerl " mtpid %[pid]; sync;"
475 1.76 rin " stb %[tmp],0(%[kaddr]);" /* Store kernel byte */
476 1.77 rin " dcbst 0,%[kaddr];" /* flush cache */
477 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x1;"
478 1.46 hpeyerl " sync; isync;"
479 1.46 hpeyerl " b 3b;"
480 1.76 rin "10:mtpid %[pid]; mtmsr %[msr]; sync; isync;"
481 1.76 rin /* Restore PID and MSR */
482 1.46 hpeyerl : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp)
483 1.76 rin : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr),
484 1.76 rin [len] "b" (len), [count] "b" (count));
485 1.1 simonb
486 1.55 chs curpcb->pcb_onfault = NULL;
487 1.1 simonb return 0;
488 1.1 simonb }
489 1.1 simonb
490 1.1 simonb static int
491 1.1 simonb bigcopyin(const void *udaddr, void *kaddr, size_t len)
492 1.1 simonb {
493 1.1 simonb const char *up;
494 1.1 simonb char *kp = kaddr;
495 1.10 thorpej struct lwp *l = curlwp;
496 1.10 thorpej struct proc *p;
497 1.55 chs struct faultbuf env;
498 1.1 simonb int error;
499 1.1 simonb
500 1.10 thorpej p = l->l_proc;
501 1.10 thorpej
502 1.1 simonb /*
503 1.7 simonb * Stolen from physio():
504 1.1 simonb */
505 1.37 chs error = uvm_vslock(p->p_vmspace, __UNCONST(udaddr), len, VM_PROT_READ);
506 1.1 simonb if (error) {
507 1.55 chs return error;
508 1.1 simonb }
509 1.1 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len, VM_PROT_READ);
510 1.1 simonb
511 1.55 chs if ((error = setfault(&env)) == 0) {
512 1.55 chs memcpy(kp, up, len);
513 1.55 chs }
514 1.55 chs
515 1.55 chs curpcb->pcb_onfault = NULL;
516 1.1 simonb vunmaprange((vaddr_t)up, len);
517 1.37 chs uvm_vsunlock(p->p_vmspace, __UNCONST(udaddr), len);
518 1.1 simonb
519 1.55 chs return error;
520 1.1 simonb }
521 1.1 simonb
522 1.1 simonb int
523 1.1 simonb copyout(const void *kaddr, void *udaddr, size_t len)
524 1.1 simonb {
525 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
526 1.55 chs int rv, msr, pid, tmp, ctx, count = 0;
527 1.11 matt struct faultbuf env;
528 1.1 simonb
529 1.1 simonb /* For big copies use more efficient routine */
530 1.46 hpeyerl if (len > 1024)
531 1.25 simonb return (bigcopyout(kaddr, udaddr, len));
532 1.1 simonb
533 1.55 chs if ((rv = setfault(&env))) {
534 1.55 chs curpcb->pcb_onfault = NULL;
535 1.55 chs return rv;
536 1.1 simonb }
537 1.1 simonb
538 1.1 simonb if (!(ctx = pm->pm_ctx)) {
539 1.1 simonb /* No context -- assign it one */
540 1.1 simonb ctx_alloc(pm);
541 1.1 simonb ctx = pm->pm_ctx;
542 1.1 simonb }
543 1.1 simonb
544 1.46 hpeyerl __asm volatile(
545 1.76 rin " mfmsr %[msr];" /* Save MSR */
546 1.76 rin " li %[pid],0x20;"
547 1.76 rin " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */
548 1.76 rin " mfpid %[pid];" /* Save old PID */
549 1.46 hpeyerl " sync; isync;"
550 1.46 hpeyerl
551 1.76 rin " srwi. %[count],%[len],0x2;" /* How many words? */
552 1.76 rin " beq- 2f;" /* No words. Go do bytes */
553 1.46 hpeyerl " mtctr %[count];"
554 1.76 rin "1: mtpid %[pid]; sync;"
555 1.77 rin #ifdef PPC_IBM403
556 1.76 rin " lswi %[tmp],%[kaddr],4;" /* Load kernel word */
557 1.77 rin #else
558 1.77 rin " lwz %[tmp],0(%[kaddr]);"
559 1.77 rin #endif
560 1.76 rin " addi %[kaddr],%[kaddr],0x4;" /* next kaddr word */
561 1.46 hpeyerl " sync; isync;"
562 1.46 hpeyerl " mtpid %[ctx]; sync;"
563 1.77 rin #ifdef PPC_IBM403
564 1.76 rin " stswi %[tmp],%[udaddr],4;" /* Store user word */
565 1.77 rin #else
566 1.77 rin " stw %[tmp],0(%[udaddr]);"
567 1.77 rin #endif
568 1.77 rin " dcbst 0,%[udaddr];" /* flush cache */
569 1.76 rin " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */
570 1.46 hpeyerl " sync; isync;"
571 1.76 rin " bdnz 1b;" /* repeat */
572 1.46 hpeyerl
573 1.76 rin "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */
574 1.46 hpeyerl " addi %[count],%[count],0x1;"
575 1.46 hpeyerl " mtctr %[count];"
576 1.76 rin "3: bdz 10f;" /* while count */
577 1.76 rin " mtpid %[pid]; sync;"
578 1.76 rin " lbz %[tmp],0(%[kaddr]);" /* Load kernel byte */
579 1.76 rin " addi %[kaddr],%[kaddr],0x1;" /* next kaddr byte */
580 1.46 hpeyerl " sync; isync;"
581 1.46 hpeyerl " mtpid %[ctx]; sync;"
582 1.76 rin " stb %[tmp],0(%[udaddr]);" /* Store user byte */
583 1.77 rin " dcbst 0,%[udaddr];" /* flush cache */
584 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x1;"
585 1.46 hpeyerl " sync; isync;"
586 1.46 hpeyerl " b 3b;"
587 1.76 rin "10:mtpid %[pid]; mtmsr %[msr]; sync; isync;"
588 1.76 rin /* Restore PID and MSR */
589 1.46 hpeyerl : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp)
590 1.76 rin : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr),
591 1.76 rin [len] "b" (len), [count] "b" (count));
592 1.1 simonb
593 1.55 chs curpcb->pcb_onfault = NULL;
594 1.1 simonb return 0;
595 1.1 simonb }
596 1.1 simonb
597 1.1 simonb static int
598 1.1 simonb bigcopyout(const void *kaddr, void *udaddr, size_t len)
599 1.1 simonb {
600 1.1 simonb char *up;
601 1.26 scw const char *kp = (const char *)kaddr;
602 1.10 thorpej struct lwp *l = curlwp;
603 1.10 thorpej struct proc *p;
604 1.55 chs struct faultbuf env;
605 1.1 simonb int error;
606 1.1 simonb
607 1.10 thorpej p = l->l_proc;
608 1.10 thorpej
609 1.1 simonb /*
610 1.7 simonb * Stolen from physio():
611 1.1 simonb */
612 1.37 chs error = uvm_vslock(p->p_vmspace, udaddr, len, VM_PROT_WRITE);
613 1.1 simonb if (error) {
614 1.55 chs return error;
615 1.1 simonb }
616 1.7 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len,
617 1.13 simonb VM_PROT_READ | VM_PROT_WRITE);
618 1.1 simonb
619 1.55 chs if ((error = setfault(&env)) == 0) {
620 1.55 chs memcpy(up, kp, len);
621 1.55 chs }
622 1.55 chs
623 1.55 chs curpcb->pcb_onfault = NULL;
624 1.1 simonb vunmaprange((vaddr_t)up, len);
625 1.37 chs uvm_vsunlock(p->p_vmspace, udaddr, len);
626 1.1 simonb
627 1.55 chs return error;
628 1.1 simonb }
629 1.1 simonb
630 1.1 simonb /*
631 1.1 simonb * kcopy(const void *src, void *dst, size_t len);
632 1.1 simonb *
633 1.1 simonb * Copy len bytes from src to dst, aborting if we encounter a fatal
634 1.1 simonb * page fault.
635 1.1 simonb *
636 1.1 simonb * kcopy() _must_ save and restore the old fault handler since it is
637 1.1 simonb * called by uiomove(), which may be in the path of servicing a non-fatal
638 1.1 simonb * page fault.
639 1.1 simonb */
640 1.1 simonb int
641 1.1 simonb kcopy(const void *src, void *dst, size_t len)
642 1.1 simonb {
643 1.11 matt struct faultbuf env, *oldfault;
644 1.55 chs int rv;
645 1.1 simonb
646 1.1 simonb oldfault = curpcb->pcb_onfault;
647 1.55 chs if ((rv = setfault(&env))) {
648 1.1 simonb curpcb->pcb_onfault = oldfault;
649 1.55 chs return rv;
650 1.1 simonb }
651 1.1 simonb
652 1.2 wiz memcpy(dst, src, len);
653 1.1 simonb
654 1.1 simonb curpcb->pcb_onfault = oldfault;
655 1.1 simonb return 0;
656 1.1 simonb }
657 1.1 simonb
658 1.75 rin #if 0
659 1.1 simonb int
660 1.1 simonb badaddr(void *addr, size_t size)
661 1.1 simonb {
662 1.1 simonb
663 1.1 simonb return badaddr_read(addr, size, NULL);
664 1.1 simonb }
665 1.1 simonb
666 1.1 simonb int
667 1.1 simonb badaddr_read(void *addr, size_t size, int *rptr)
668 1.1 simonb {
669 1.11 matt struct faultbuf env;
670 1.1 simonb int x;
671 1.1 simonb
672 1.1 simonb /* Get rid of any stale machine checks that have been waiting. */
673 1.28 perry __asm volatile ("sync; isync");
674 1.1 simonb
675 1.11 matt if (setfault(&env)) {
676 1.55 chs curpcb->pcb_onfault = NULL;
677 1.28 perry __asm volatile ("sync");
678 1.1 simonb return 1;
679 1.1 simonb }
680 1.1 simonb
681 1.28 perry __asm volatile ("sync");
682 1.1 simonb
683 1.1 simonb switch (size) {
684 1.1 simonb case 1:
685 1.1 simonb x = *(volatile int8_t *)addr;
686 1.1 simonb break;
687 1.1 simonb case 2:
688 1.1 simonb x = *(volatile int16_t *)addr;
689 1.1 simonb break;
690 1.1 simonb case 4:
691 1.1 simonb x = *(volatile int32_t *)addr;
692 1.1 simonb break;
693 1.1 simonb default:
694 1.1 simonb panic("badaddr: invalid size (%d)", size);
695 1.1 simonb }
696 1.1 simonb
697 1.1 simonb /* Make sure we took the machine check, if we caused one. */
698 1.28 perry __asm volatile ("sync; isync");
699 1.1 simonb
700 1.55 chs curpcb->pcb_onfault = NULL;
701 1.28 perry __asm volatile ("sync"); /* To be sure. */
702 1.1 simonb
703 1.1 simonb /* Use the value to avoid reorder. */
704 1.1 simonb if (rptr)
705 1.1 simonb *rptr = x;
706 1.1 simonb
707 1.1 simonb return 0;
708 1.1 simonb }
709 1.75 rin #endif
710 1.1 simonb
711 1.1 simonb /*
712 1.1 simonb * For now, this only deals with the particular unaligned access case
713 1.1 simonb * that gcc tends to generate. Eventually it should handle all of the
714 1.1 simonb * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
715 1.1 simonb */
716 1.1 simonb
717 1.1 simonb static int
718 1.58 matt fix_unaligned(struct lwp *l, struct trapframe *tf)
719 1.1 simonb {
720 1.1 simonb
721 1.1 simonb return -1;
722 1.10 thorpej }
723 1.70 thorpej
724 1.70 thorpej /*
725 1.70 thorpej * XXX Extremely lame implementations of _ufetch_* / _ustore_*. IBM 4xx
726 1.70 thorpej * experts should make versions that are good.
727 1.70 thorpej */
728 1.70 thorpej
729 1.70 thorpej #define UFETCH(sz) \
730 1.70 thorpej int \
731 1.70 thorpej _ufetch_ ## sz(const uint ## sz ## _t *uaddr, uint ## sz ## _t *valp) \
732 1.70 thorpej { \
733 1.70 thorpej return copyin(uaddr, valp, sizeof(*valp)); \
734 1.70 thorpej }
735 1.70 thorpej
736 1.70 thorpej UFETCH(8)
737 1.70 thorpej UFETCH(16)
738 1.70 thorpej UFETCH(32)
739 1.70 thorpej
740 1.70 thorpej #define USTORE(sz) \
741 1.70 thorpej int \
742 1.70 thorpej _ustore_ ## sz(uint ## sz ## _t *uaddr, uint ## sz ## _t val) \
743 1.70 thorpej { \
744 1.70 thorpej return copyout(&val, uaddr, sizeof(val)); \
745 1.70 thorpej }
746 1.70 thorpej
747 1.70 thorpej USTORE(8)
748 1.70 thorpej USTORE(16)
749 1.70 thorpej USTORE(32)
750