trap.c revision 1.84 1 1.84 rin /* $NetBSD: trap.c,v 1.84 2020/07/15 08:48:40 rin Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2001 Wasabi Systems, Inc.
5 1.1 simonb * All rights reserved.
6 1.1 simonb *
7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed for the NetBSD Project by
20 1.1 simonb * Wasabi Systems, Inc.
21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 simonb * or promote products derived from this software without specific prior
23 1.1 simonb * written permission.
24 1.1 simonb *
25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE.
36 1.1 simonb */
37 1.1 simonb
38 1.1 simonb /*
39 1.1 simonb * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 1.1 simonb * Copyright (C) 1995, 1996 TooLs GmbH.
41 1.1 simonb * All rights reserved.
42 1.1 simonb *
43 1.1 simonb * Redistribution and use in source and binary forms, with or without
44 1.1 simonb * modification, are permitted provided that the following conditions
45 1.1 simonb * are met:
46 1.1 simonb * 1. Redistributions of source code must retain the above copyright
47 1.1 simonb * notice, this list of conditions and the following disclaimer.
48 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 simonb * notice, this list of conditions and the following disclaimer in the
50 1.1 simonb * documentation and/or other materials provided with the distribution.
51 1.1 simonb * 3. All advertising materials mentioning features or use of this software
52 1.1 simonb * must display the following acknowledgement:
53 1.1 simonb * This product includes software developed by TooLs GmbH.
54 1.1 simonb * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 1.1 simonb * derived from this software without specific prior written permission.
56 1.1 simonb *
57 1.1 simonb * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 1.1 simonb * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 1.1 simonb * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 1.1 simonb * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 1.1 simonb * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 1.1 simonb * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 1.1 simonb * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 1.1 simonb * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 1.1 simonb */
68 1.14 lukem
69 1.82 rin #define __UFETCHSTORE_PRIVATE
70 1.82 rin
71 1.14 lukem #include <sys/cdefs.h>
72 1.84 rin __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.84 2020/07/15 08:48:40 rin Exp $");
73 1.1 simonb
74 1.82 rin #ifdef _KERNEL_OPT
75 1.1 simonb #include "opt_ddb.h"
76 1.44 garbled #include "opt_kgdb.h"
77 1.83 rin #include "opt_ppcarch.h"
78 1.82 rin #endif
79 1.70 thorpej
80 1.1 simonb #include <sys/param.h>
81 1.72 rin #include <sys/cpu.h>
82 1.72 rin #include <sys/kauth.h>
83 1.1 simonb #include <sys/proc.h>
84 1.1 simonb #include <sys/reboot.h>
85 1.1 simonb #include <sys/syscall.h>
86 1.1 simonb #include <sys/systm.h>
87 1.1 simonb
88 1.44 garbled #if defined(KGDB)
89 1.44 garbled #include <sys/kgdb.h>
90 1.44 garbled #endif
91 1.44 garbled
92 1.1 simonb #include <uvm/uvm_extern.h>
93 1.1 simonb
94 1.1 simonb #include <dev/cons.h>
95 1.1 simonb
96 1.1 simonb #include <machine/fpu.h>
97 1.1 simonb #include <machine/frame.h>
98 1.1 simonb #include <machine/pcb.h>
99 1.1 simonb #include <machine/psl.h>
100 1.1 simonb #include <machine/trap.h>
101 1.1 simonb
102 1.61 matt #include <powerpc/db_machdep.h>
103 1.1 simonb #include <powerpc/spr.h>
104 1.74 rin #include <powerpc/userret.h>
105 1.61 matt
106 1.61 matt #include <powerpc/ibm4xx/cpu.h>
107 1.1 simonb #include <powerpc/ibm4xx/pmap.h>
108 1.71 rin #include <powerpc/ibm4xx/spr.h>
109 1.1 simonb #include <powerpc/ibm4xx/tlb.h>
110 1.61 matt
111 1.1 simonb #include <powerpc/fpu/fpu_extern.h>
112 1.1 simonb
113 1.1 simonb /* These definitions should probably be somewhere else XXX */
114 1.1 simonb #define FIRSTARG 3 /* first argument is in reg 3 */
115 1.1 simonb #define NARGREG 8 /* 8 args are in registers */
116 1.40 christos #define MOREARGS(sp) ((void *)((int)(sp) + 8)) /* more args go here */
117 1.1 simonb
118 1.63 kiyohara static int fix_unaligned(struct lwp *l, struct trapframe *tf);
119 1.1 simonb
120 1.50 dsl void trap(struct trapframe *); /* Called from locore / trap_subr */
121 1.75 rin #if 0
122 1.75 rin /* Not currently used nor exposed externally in any header file */
123 1.50 dsl int badaddr(void *, size_t);
124 1.50 dsl int badaddr_read(void *, size_t, int *);
125 1.75 rin #endif
126 1.50 dsl int ctx_setup(int, int);
127 1.1 simonb
128 1.1 simonb #ifdef DEBUG
129 1.1 simonb #define TDB_ALL 0x1
130 1.1 simonb int trapdebug = /* TDB_ALL */ 0;
131 1.1 simonb #define DBPRINTF(x, y) if (trapdebug & (x)) printf y
132 1.1 simonb #else
133 1.1 simonb #define DBPRINTF(x, y)
134 1.1 simonb #endif
135 1.1 simonb
136 1.1 simonb void
137 1.58 matt trap(struct trapframe *tf)
138 1.1 simonb {
139 1.10 thorpej struct lwp *l = curlwp;
140 1.55 chs struct proc *p = l->l_proc;
141 1.53 rmind struct pcb *pcb;
142 1.58 matt int type = tf->tf_exc;
143 1.1 simonb int ftype, rv;
144 1.18 eeh ksiginfo_t ksi;
145 1.1 simonb
146 1.55 chs KASSERT(l->l_stat == LSONPROC);
147 1.1 simonb
148 1.58 matt if (tf->tf_srr1 & PSL_PR) {
149 1.35 ad LWP_CACHE_CREDS(l, p);
150 1.1 simonb type |= EXC_USER;
151 1.35 ad }
152 1.1 simonb
153 1.1 simonb ftype = VM_PROT_READ;
154 1.1 simonb
155 1.13 simonb DBPRINTF(TDB_ALL, ("trap(%x) at %lx from frame %p &frame %p\n",
156 1.58 matt type, tf->tf_srr0, tf, &tf));
157 1.1 simonb
158 1.1 simonb switch (type) {
159 1.1 simonb case EXC_DEBUG|EXC_USER:
160 1.13 simonb {
161 1.13 simonb int srr2, srr3;
162 1.13 simonb
163 1.28 perry __asm volatile("mfspr %0,0x3f0" :
164 1.13 simonb "=r" (rv), "=r" (srr2), "=r" (srr3) :);
165 1.13 simonb printf("debug reg is %x srr2 %x srr3 %x\n", rv, srr2,
166 1.13 simonb srr3);
167 1.13 simonb /* XXX fall through or break here?! */
168 1.13 simonb }
169 1.1 simonb /*
170 1.1 simonb * DEBUG intr -- probably single-step.
171 1.1 simonb */
172 1.1 simonb case EXC_TRC|EXC_USER:
173 1.58 matt tf->tf_srr1 &= ~PSL_SE;
174 1.19 thorpej KSI_INIT_TRAP(&ksi);
175 1.17 matt ksi.ksi_signo = SIGTRAP;
176 1.17 matt ksi.ksi_trap = EXC_TRC;
177 1.58 matt ksi.ksi_addr = (void *)tf->tf_srr0;
178 1.17 matt trapsignal(l, &ksi);
179 1.1 simonb break;
180 1.7 simonb
181 1.1 simonb case EXC_DSI:
182 1.1 simonb /* FALLTHROUGH */
183 1.1 simonb case EXC_DTMISS:
184 1.1 simonb {
185 1.1 simonb struct vm_map *map;
186 1.1 simonb vaddr_t va;
187 1.78 rin struct faultbuf *fb;
188 1.78 rin
189 1.78 rin pcb = lwp_getpcb(l);
190 1.78 rin fb = pcb->pcb_onfault;
191 1.78 rin
192 1.78 rin if (curcpu()->ci_idepth >= 0) {
193 1.78 rin rv = EFAULT;
194 1.78 rin goto out;
195 1.78 rin }
196 1.1 simonb
197 1.58 matt va = tf->tf_dear;
198 1.58 matt if (tf->tf_pid == KERNEL_PID) {
199 1.1 simonb map = kernel_map;
200 1.1 simonb } else {
201 1.1 simonb map = &p->p_vmspace->vm_map;
202 1.1 simonb }
203 1.1 simonb
204 1.58 matt if (tf->tf_esr & (ESR_DST|ESR_DIZ))
205 1.3 chs ftype = VM_PROT_WRITE;
206 1.1 simonb
207 1.13 simonb DBPRINTF(TDB_ALL,
208 1.13 simonb ("trap(EXC_DSI) at %lx %s fault on %p esr %x\n",
209 1.58 matt tf->tf_srr0,
210 1.13 simonb (ftype & VM_PROT_WRITE) ? "write" : "read",
211 1.58 matt (void *)va, tf->tf_esr));
212 1.58 matt
213 1.55 chs pcb->pcb_onfault = NULL;
214 1.32 drochner rv = uvm_fault(map, trunc_page(va), ftype);
215 1.55 chs pcb->pcb_onfault = fb;
216 1.1 simonb if (rv == 0)
217 1.68 rin return;
218 1.78 rin out:
219 1.55 chs if (fb != NULL) {
220 1.58 matt tf->tf_pid = KERNEL_PID;
221 1.58 matt tf->tf_srr0 = fb->fb_pc;
222 1.58 matt tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
223 1.58 matt tf->tf_cr = fb->fb_cr;
224 1.58 matt tf->tf_fixreg[1] = fb->fb_sp;
225 1.58 matt tf->tf_fixreg[2] = fb->fb_r2;
226 1.79 rin tf->tf_fixreg[3] = rv;
227 1.58 matt memcpy(&tf->tf_fixreg[13], fb->fb_fixreg,
228 1.11 matt sizeof(fb->fb_fixreg));
229 1.68 rin return;
230 1.1 simonb }
231 1.1 simonb }
232 1.1 simonb goto brain_damage;
233 1.7 simonb
234 1.1 simonb case EXC_DSI|EXC_USER:
235 1.1 simonb /* FALLTHROUGH */
236 1.1 simonb case EXC_DTMISS|EXC_USER:
237 1.58 matt if (tf->tf_esr & (ESR_DST|ESR_DIZ))
238 1.3 chs ftype = VM_PROT_WRITE;
239 1.1 simonb
240 1.13 simonb DBPRINTF(TDB_ALL,
241 1.13 simonb ("trap(EXC_DSI|EXC_USER) at %lx %s fault on %lx %x\n",
242 1.58 matt tf->tf_srr0, (ftype & VM_PROT_WRITE) ? "write" : "read",
243 1.58 matt tf->tf_dear, tf->tf_esr));
244 1.13 simonb KASSERT(l == curlwp && (l->l_stat == LSONPROC));
245 1.55 chs // KASSERT(curpcb->pcb_onfault == NULL);
246 1.58 matt rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_dear),
247 1.32 drochner ftype);
248 1.1 simonb if (rv == 0) {
249 1.13 simonb break;
250 1.1 simonb }
251 1.19 thorpej KSI_INIT_TRAP(&ksi);
252 1.17 matt ksi.ksi_trap = EXC_DSI;
253 1.58 matt ksi.ksi_addr = (void *)tf->tf_dear;
254 1.80 rin vm_signal:
255 1.80 rin switch (rv) {
256 1.80 rin case EINVAL:
257 1.80 rin ksi.ksi_signo = SIGBUS;
258 1.80 rin ksi.ksi_code = BUS_ADRERR;
259 1.80 rin break;
260 1.80 rin case EACCES:
261 1.80 rin ksi.ksi_signo = SIGSEGV;
262 1.80 rin ksi.ksi_code = SEGV_ACCERR;
263 1.80 rin break;
264 1.80 rin case ENOMEM:
265 1.17 matt ksi.ksi_signo = SIGKILL;
266 1.80 rin printf("UVM: pid %d.%d (%s), uid %d killed: "
267 1.80 rin "out of swap\n", p->p_pid, l->l_lid, p->p_comm,
268 1.80 rin l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
269 1.80 rin break;
270 1.80 rin default:
271 1.80 rin ksi.ksi_signo = SIGSEGV;
272 1.80 rin ksi.ksi_code = SEGV_MAPERR;
273 1.80 rin break;
274 1.1 simonb }
275 1.17 matt trapsignal(l, &ksi);
276 1.1 simonb break;
277 1.15 chs
278 1.1 simonb case EXC_ITMISS|EXC_USER:
279 1.1 simonb case EXC_ISI|EXC_USER:
280 1.15 chs ftype = VM_PROT_EXECUTE;
281 1.13 simonb DBPRINTF(TDB_ALL,
282 1.15 chs ("trap(EXC_ISI|EXC_USER) at %lx execute fault tf %p\n",
283 1.58 matt tf->tf_srr0, tf));
284 1.55 chs // KASSERT(curpcb->pcb_onfault == NULL);
285 1.58 matt rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_srr0),
286 1.32 drochner ftype);
287 1.1 simonb if (rv == 0) {
288 1.13 simonb break;
289 1.1 simonb }
290 1.19 thorpej KSI_INIT_TRAP(&ksi);
291 1.17 matt ksi.ksi_trap = EXC_ISI;
292 1.58 matt ksi.ksi_addr = (void *)tf->tf_srr0;
293 1.80 rin goto vm_signal;
294 1.1 simonb break;
295 1.1 simonb
296 1.1 simonb case EXC_AST|EXC_USER:
297 1.62 matt cpu_ast(l, curcpu());
298 1.1 simonb break;
299 1.1 simonb
300 1.1 simonb case EXC_ALI|EXC_USER:
301 1.58 matt if (fix_unaligned(l, tf) != 0) {
302 1.19 thorpej KSI_INIT_TRAP(&ksi);
303 1.17 matt ksi.ksi_signo = SIGBUS;
304 1.17 matt ksi.ksi_trap = EXC_ALI;
305 1.58 matt ksi.ksi_addr = (void *)tf->tf_dear;
306 1.17 matt trapsignal(l, &ksi);
307 1.17 matt } else
308 1.58 matt tf->tf_srr0 += 4;
309 1.1 simonb break;
310 1.1 simonb
311 1.1 simonb case EXC_PGM|EXC_USER:
312 1.57 matt curcpu()->ci_data.cpu_ntrap++;
313 1.53 rmind
314 1.84 rin KSI_INIT_TRAP(&ksi);
315 1.84 rin ksi.ksi_trap = EXC_PGM;
316 1.84 rin ksi.ksi_addr = (void *)tf->tf_srr0;
317 1.1 simonb
318 1.84 rin if (tf->tf_esr & ESR_PTR) {
319 1.84 rin sigtrap:
320 1.84 rin if (p->p_raslist != NULL &&
321 1.84 rin ras_lookup(p, (void *)tf->tf_srr0) != (void *) -1) {
322 1.84 rin tf->tf_srr1 += 4;
323 1.65 matt break;
324 1.84 rin }
325 1.84 rin ksi.ksi_code = TRAP_BRKPT;
326 1.84 rin ksi.ksi_signo = SIGTRAP;
327 1.65 matt } else {
328 1.84 rin pcb = lwp_getpcb(l);
329 1.84 rin
330 1.84 rin if (__predict_false(!fpu_used_p(l))) {
331 1.84 rin memset(&pcb->pcb_fpu, 0, sizeof(pcb->pcb_fpu));
332 1.84 rin fpu_mark_used(l);
333 1.84 rin }
334 1.84 rin
335 1.84 rin if (fpu_emulate(tf, &pcb->pcb_fpu, &ksi)) {
336 1.84 rin if (ksi.ksi_signo == 0) /* was emulated */
337 1.84 rin break;
338 1.84 rin else if (ksi.ksi_signo == SIGTRAP)
339 1.84 rin goto sigtrap; /* XXX H/W bug? */
340 1.84 rin } else {
341 1.84 rin ksi.ksi_code = ILL_ILLOPC;
342 1.84 rin ksi.ksi_signo = SIGILL;
343 1.84 rin }
344 1.1 simonb }
345 1.65 matt
346 1.65 matt trapsignal(l, &ksi);
347 1.1 simonb break;
348 1.1 simonb
349 1.1 simonb case EXC_MCHK:
350 1.1 simonb {
351 1.11 matt struct faultbuf *fb;
352 1.1 simonb
353 1.53 rmind pcb = lwp_getpcb(l);
354 1.53 rmind if ((fb = pcb->pcb_onfault) != NULL) {
355 1.58 matt tf->tf_pid = KERNEL_PID;
356 1.58 matt tf->tf_srr0 = fb->fb_pc;
357 1.58 matt tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
358 1.58 matt tf->tf_fixreg[1] = fb->fb_sp;
359 1.58 matt tf->tf_fixreg[2] = fb->fb_r2;
360 1.58 matt tf->tf_fixreg[3] = 1; /* Return TRUE */
361 1.58 matt tf->tf_cr = fb->fb_cr;
362 1.58 matt memcpy(&tf->tf_fixreg[13], fb->fb_fixreg,
363 1.11 matt sizeof(fb->fb_fixreg));
364 1.68 rin return;
365 1.1 simonb }
366 1.1 simonb }
367 1.1 simonb goto brain_damage;
368 1.68 rin
369 1.1 simonb default:
370 1.68 rin brain_damage:
371 1.58 matt printf("trap type 0x%x at 0x%lx\n", type, tf->tf_srr0);
372 1.44 garbled #if defined(DDB) || defined(KGDB)
373 1.58 matt if (kdb_trap(type, tf))
374 1.68 rin return;
375 1.1 simonb #endif
376 1.1 simonb #ifdef TRAP_PANICWAIT
377 1.1 simonb printf("Press a key to panic.\n");
378 1.1 simonb cngetc();
379 1.1 simonb #endif
380 1.1 simonb panic("trap");
381 1.1 simonb }
382 1.1 simonb
383 1.73 rin /* Invoke powerpc userret code */
384 1.73 rin userret(l, tf);
385 1.1 simonb }
386 1.1 simonb
387 1.1 simonb int
388 1.1 simonb ctx_setup(int ctx, int srr1)
389 1.1 simonb {
390 1.1 simonb volatile struct pmap *pm;
391 1.1 simonb
392 1.1 simonb /* Update PID if we're returning to user mode. */
393 1.1 simonb if (srr1 & PSL_PR) {
394 1.1 simonb pm = curproc->p_vmspace->vm_map.pmap;
395 1.1 simonb if (!pm->pm_ctx) {
396 1.26 scw ctx_alloc(__UNVOLATILE(pm));
397 1.1 simonb }
398 1.1 simonb ctx = pm->pm_ctx;
399 1.1 simonb if (srr1 & PSL_SE) {
400 1.1 simonb int dbreg, mask = 0x48000000;
401 1.1 simonb /*
402 1.1 simonb * Set the Internal Debug and
403 1.1 simonb * Instruction Completion bits of
404 1.1 simonb * the DBCR0 register.
405 1.1 simonb *
406 1.1 simonb * XXX this is also used by jtag debuggers...
407 1.1 simonb */
408 1.28 perry __asm volatile("mfspr %0,0x3f2;"
409 1.13 simonb "or %0,%0,%1;"
410 1.13 simonb "mtspr 0x3f2,%0;" :
411 1.13 simonb "=&r" (dbreg) : "r" (mask));
412 1.1 simonb }
413 1.1 simonb }
414 1.1 simonb else if (!ctx) {
415 1.1 simonb ctx = KERNEL_PID;
416 1.1 simonb }
417 1.1 simonb return (ctx);
418 1.1 simonb }
419 1.1 simonb
420 1.1 simonb /*
421 1.1 simonb * Used by copyin()/copyout()
422 1.1 simonb */
423 1.50 dsl extern vaddr_t vmaprange(struct proc *, vaddr_t, vsize_t, int);
424 1.50 dsl extern void vunmaprange(vaddr_t, vsize_t);
425 1.50 dsl static int bigcopyin(const void *, void *, size_t );
426 1.50 dsl static int bigcopyout(const void *, void *, size_t );
427 1.1 simonb
428 1.1 simonb int
429 1.1 simonb copyin(const void *udaddr, void *kaddr, size_t len)
430 1.1 simonb {
431 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
432 1.55 chs int rv, msr, pid, tmp, ctx, count = 0;
433 1.11 matt struct faultbuf env;
434 1.1 simonb
435 1.1 simonb /* For bigger buffers use the faster copy */
436 1.46 hpeyerl if (len > 1024)
437 1.25 simonb return (bigcopyin(udaddr, kaddr, len));
438 1.1 simonb
439 1.55 chs if ((rv = setfault(&env))) {
440 1.55 chs curpcb->pcb_onfault = NULL;
441 1.55 chs return rv;
442 1.1 simonb }
443 1.1 simonb
444 1.1 simonb if (!(ctx = pm->pm_ctx)) {
445 1.1 simonb /* No context -- assign it one */
446 1.1 simonb ctx_alloc(pm);
447 1.1 simonb ctx = pm->pm_ctx;
448 1.1 simonb }
449 1.1 simonb
450 1.46 hpeyerl __asm volatile(
451 1.76 rin " mfmsr %[msr];" /* Save MSR */
452 1.76 rin " li %[pid],0x20;"
453 1.76 rin " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */
454 1.81 rin " isync;"
455 1.76 rin " mfpid %[pid];" /* Save old PID */
456 1.46 hpeyerl
457 1.76 rin " srwi. %[count],%[len],0x2;" /* How many words? */
458 1.76 rin " beq- 2f;" /* No words. Go do bytes */
459 1.46 hpeyerl " mtctr %[count];"
460 1.81 rin "1: mtpid %[ctx]; isync;"
461 1.77 rin #ifdef PPC_IBM403
462 1.76 rin " lswi %[tmp],%[udaddr],4;" /* Load user word */
463 1.77 rin #else
464 1.77 rin " lwz %[tmp],0(%[udaddr]);"
465 1.77 rin #endif
466 1.76 rin " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */
467 1.81 rin " sync;"
468 1.81 rin " mtpid %[pid]; isync;"
469 1.77 rin #ifdef PPC_IBM403
470 1.76 rin " stswi %[tmp],%[kaddr],4;" /* Store kernel word */
471 1.77 rin #else
472 1.77 rin " stw %[tmp],0(%[kaddr]);"
473 1.77 rin #endif
474 1.77 rin " dcbst 0,%[kaddr];" /* flush cache */
475 1.76 rin " addi %[kaddr],%[kaddr],0x4;" /* next udaddr word */
476 1.81 rin " sync;"
477 1.76 rin " bdnz 1b;" /* repeat */
478 1.46 hpeyerl
479 1.76 rin "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */
480 1.46 hpeyerl " addi %[count],%[count],0x1;"
481 1.46 hpeyerl " mtctr %[count];"
482 1.76 rin "3: bdz 10f;" /* while count */
483 1.81 rin " mtpid %[ctx]; isync;"
484 1.76 rin " lbz %[tmp],0(%[udaddr]);" /* Load user byte */
485 1.76 rin " addi %[udaddr],%[udaddr],0x1;" /* next udaddr byte */
486 1.81 rin " sync;"
487 1.81 rin " mtpid %[pid]; isync;"
488 1.76 rin " stb %[tmp],0(%[kaddr]);" /* Store kernel byte */
489 1.77 rin " dcbst 0,%[kaddr];" /* flush cache */
490 1.46 hpeyerl " addi %[kaddr],%[kaddr],0x1;"
491 1.81 rin " sync;"
492 1.46 hpeyerl " b 3b;"
493 1.81 rin "10:mtpid %[pid]; mtmsr %[msr]; isync;"
494 1.76 rin /* Restore PID and MSR */
495 1.46 hpeyerl : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp)
496 1.76 rin : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr),
497 1.76 rin [len] "b" (len), [count] "b" (count));
498 1.1 simonb
499 1.55 chs curpcb->pcb_onfault = NULL;
500 1.1 simonb return 0;
501 1.1 simonb }
502 1.1 simonb
503 1.1 simonb static int
504 1.1 simonb bigcopyin(const void *udaddr, void *kaddr, size_t len)
505 1.1 simonb {
506 1.1 simonb const char *up;
507 1.1 simonb char *kp = kaddr;
508 1.10 thorpej struct lwp *l = curlwp;
509 1.10 thorpej struct proc *p;
510 1.55 chs struct faultbuf env;
511 1.1 simonb int error;
512 1.1 simonb
513 1.10 thorpej p = l->l_proc;
514 1.10 thorpej
515 1.1 simonb /*
516 1.7 simonb * Stolen from physio():
517 1.1 simonb */
518 1.37 chs error = uvm_vslock(p->p_vmspace, __UNCONST(udaddr), len, VM_PROT_READ);
519 1.1 simonb if (error) {
520 1.55 chs return error;
521 1.1 simonb }
522 1.1 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len, VM_PROT_READ);
523 1.1 simonb
524 1.55 chs if ((error = setfault(&env)) == 0) {
525 1.55 chs memcpy(kp, up, len);
526 1.55 chs }
527 1.55 chs
528 1.55 chs curpcb->pcb_onfault = NULL;
529 1.1 simonb vunmaprange((vaddr_t)up, len);
530 1.37 chs uvm_vsunlock(p->p_vmspace, __UNCONST(udaddr), len);
531 1.1 simonb
532 1.55 chs return error;
533 1.1 simonb }
534 1.1 simonb
535 1.1 simonb int
536 1.1 simonb copyout(const void *kaddr, void *udaddr, size_t len)
537 1.1 simonb {
538 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
539 1.55 chs int rv, msr, pid, tmp, ctx, count = 0;
540 1.11 matt struct faultbuf env;
541 1.1 simonb
542 1.1 simonb /* For big copies use more efficient routine */
543 1.46 hpeyerl if (len > 1024)
544 1.25 simonb return (bigcopyout(kaddr, udaddr, len));
545 1.1 simonb
546 1.55 chs if ((rv = setfault(&env))) {
547 1.55 chs curpcb->pcb_onfault = NULL;
548 1.55 chs return rv;
549 1.1 simonb }
550 1.1 simonb
551 1.1 simonb if (!(ctx = pm->pm_ctx)) {
552 1.1 simonb /* No context -- assign it one */
553 1.1 simonb ctx_alloc(pm);
554 1.1 simonb ctx = pm->pm_ctx;
555 1.1 simonb }
556 1.1 simonb
557 1.46 hpeyerl __asm volatile(
558 1.76 rin " mfmsr %[msr];" /* Save MSR */
559 1.76 rin " li %[pid],0x20;"
560 1.76 rin " andc %[pid],%[msr],%[pid]; mtmsr %[pid];" /* Disable IMMU */
561 1.81 rin " isync;"
562 1.76 rin " mfpid %[pid];" /* Save old PID */
563 1.46 hpeyerl
564 1.76 rin " srwi. %[count],%[len],0x2;" /* How many words? */
565 1.76 rin " beq- 2f;" /* No words. Go do bytes */
566 1.46 hpeyerl " mtctr %[count];"
567 1.81 rin "1: mtpid %[pid]; isync;"
568 1.77 rin #ifdef PPC_IBM403
569 1.76 rin " lswi %[tmp],%[kaddr],4;" /* Load kernel word */
570 1.77 rin #else
571 1.77 rin " lwz %[tmp],0(%[kaddr]);"
572 1.77 rin #endif
573 1.76 rin " addi %[kaddr],%[kaddr],0x4;" /* next kaddr word */
574 1.81 rin " sync;"
575 1.81 rin " mtpid %[ctx]; isync;"
576 1.77 rin #ifdef PPC_IBM403
577 1.76 rin " stswi %[tmp],%[udaddr],4;" /* Store user word */
578 1.77 rin #else
579 1.77 rin " stw %[tmp],0(%[udaddr]);"
580 1.77 rin #endif
581 1.77 rin " dcbst 0,%[udaddr];" /* flush cache */
582 1.76 rin " addi %[udaddr],%[udaddr],0x4;" /* next udaddr word */
583 1.81 rin " sync;"
584 1.76 rin " bdnz 1b;" /* repeat */
585 1.46 hpeyerl
586 1.76 rin "2: andi. %[count],%[len],0x3;" /* How many remaining bytes? */
587 1.46 hpeyerl " addi %[count],%[count],0x1;"
588 1.46 hpeyerl " mtctr %[count];"
589 1.76 rin "3: bdz 10f;" /* while count */
590 1.81 rin " mtpid %[pid]; isync;"
591 1.76 rin " lbz %[tmp],0(%[kaddr]);" /* Load kernel byte */
592 1.76 rin " addi %[kaddr],%[kaddr],0x1;" /* next kaddr byte */
593 1.81 rin " sync;"
594 1.81 rin " mtpid %[ctx]; isync;"
595 1.76 rin " stb %[tmp],0(%[udaddr]);" /* Store user byte */
596 1.77 rin " dcbst 0,%[udaddr];" /* flush cache */
597 1.46 hpeyerl " addi %[udaddr],%[udaddr],0x1;"
598 1.81 rin " sync;"
599 1.46 hpeyerl " b 3b;"
600 1.81 rin "10:mtpid %[pid]; mtmsr %[msr]; isync;"
601 1.76 rin /* Restore PID and MSR */
602 1.46 hpeyerl : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp)
603 1.76 rin : [udaddr] "b" (udaddr), [ctx] "b" (ctx), [kaddr] "b" (kaddr),
604 1.76 rin [len] "b" (len), [count] "b" (count));
605 1.1 simonb
606 1.55 chs curpcb->pcb_onfault = NULL;
607 1.1 simonb return 0;
608 1.1 simonb }
609 1.1 simonb
610 1.1 simonb static int
611 1.1 simonb bigcopyout(const void *kaddr, void *udaddr, size_t len)
612 1.1 simonb {
613 1.1 simonb char *up;
614 1.26 scw const char *kp = (const char *)kaddr;
615 1.10 thorpej struct lwp *l = curlwp;
616 1.10 thorpej struct proc *p;
617 1.55 chs struct faultbuf env;
618 1.1 simonb int error;
619 1.1 simonb
620 1.10 thorpej p = l->l_proc;
621 1.10 thorpej
622 1.1 simonb /*
623 1.7 simonb * Stolen from physio():
624 1.1 simonb */
625 1.37 chs error = uvm_vslock(p->p_vmspace, udaddr, len, VM_PROT_WRITE);
626 1.1 simonb if (error) {
627 1.55 chs return error;
628 1.1 simonb }
629 1.7 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len,
630 1.13 simonb VM_PROT_READ | VM_PROT_WRITE);
631 1.1 simonb
632 1.55 chs if ((error = setfault(&env)) == 0) {
633 1.55 chs memcpy(up, kp, len);
634 1.55 chs }
635 1.55 chs
636 1.55 chs curpcb->pcb_onfault = NULL;
637 1.1 simonb vunmaprange((vaddr_t)up, len);
638 1.37 chs uvm_vsunlock(p->p_vmspace, udaddr, len);
639 1.1 simonb
640 1.55 chs return error;
641 1.1 simonb }
642 1.1 simonb
643 1.1 simonb /*
644 1.1 simonb * kcopy(const void *src, void *dst, size_t len);
645 1.1 simonb *
646 1.1 simonb * Copy len bytes from src to dst, aborting if we encounter a fatal
647 1.1 simonb * page fault.
648 1.1 simonb *
649 1.1 simonb * kcopy() _must_ save and restore the old fault handler since it is
650 1.1 simonb * called by uiomove(), which may be in the path of servicing a non-fatal
651 1.1 simonb * page fault.
652 1.1 simonb */
653 1.1 simonb int
654 1.1 simonb kcopy(const void *src, void *dst, size_t len)
655 1.1 simonb {
656 1.11 matt struct faultbuf env, *oldfault;
657 1.55 chs int rv;
658 1.1 simonb
659 1.1 simonb oldfault = curpcb->pcb_onfault;
660 1.55 chs if ((rv = setfault(&env))) {
661 1.1 simonb curpcb->pcb_onfault = oldfault;
662 1.55 chs return rv;
663 1.1 simonb }
664 1.1 simonb
665 1.2 wiz memcpy(dst, src, len);
666 1.1 simonb
667 1.1 simonb curpcb->pcb_onfault = oldfault;
668 1.1 simonb return 0;
669 1.1 simonb }
670 1.1 simonb
671 1.75 rin #if 0
672 1.1 simonb int
673 1.1 simonb badaddr(void *addr, size_t size)
674 1.1 simonb {
675 1.1 simonb
676 1.1 simonb return badaddr_read(addr, size, NULL);
677 1.1 simonb }
678 1.1 simonb
679 1.1 simonb int
680 1.1 simonb badaddr_read(void *addr, size_t size, int *rptr)
681 1.1 simonb {
682 1.11 matt struct faultbuf env;
683 1.1 simonb int x;
684 1.1 simonb
685 1.1 simonb /* Get rid of any stale machine checks that have been waiting. */
686 1.28 perry __asm volatile ("sync; isync");
687 1.1 simonb
688 1.11 matt if (setfault(&env)) {
689 1.55 chs curpcb->pcb_onfault = NULL;
690 1.28 perry __asm volatile ("sync");
691 1.1 simonb return 1;
692 1.1 simonb }
693 1.1 simonb
694 1.28 perry __asm volatile ("sync");
695 1.1 simonb
696 1.1 simonb switch (size) {
697 1.1 simonb case 1:
698 1.1 simonb x = *(volatile int8_t *)addr;
699 1.1 simonb break;
700 1.1 simonb case 2:
701 1.1 simonb x = *(volatile int16_t *)addr;
702 1.1 simonb break;
703 1.1 simonb case 4:
704 1.1 simonb x = *(volatile int32_t *)addr;
705 1.1 simonb break;
706 1.1 simonb default:
707 1.1 simonb panic("badaddr: invalid size (%d)", size);
708 1.1 simonb }
709 1.1 simonb
710 1.1 simonb /* Make sure we took the machine check, if we caused one. */
711 1.28 perry __asm volatile ("sync; isync");
712 1.1 simonb
713 1.55 chs curpcb->pcb_onfault = NULL;
714 1.28 perry __asm volatile ("sync"); /* To be sure. */
715 1.1 simonb
716 1.1 simonb /* Use the value to avoid reorder. */
717 1.1 simonb if (rptr)
718 1.1 simonb *rptr = x;
719 1.1 simonb
720 1.1 simonb return 0;
721 1.1 simonb }
722 1.75 rin #endif
723 1.1 simonb
724 1.1 simonb /*
725 1.1 simonb * For now, this only deals with the particular unaligned access case
726 1.1 simonb * that gcc tends to generate. Eventually it should handle all of the
727 1.1 simonb * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
728 1.1 simonb */
729 1.1 simonb
730 1.1 simonb static int
731 1.58 matt fix_unaligned(struct lwp *l, struct trapframe *tf)
732 1.1 simonb {
733 1.1 simonb
734 1.1 simonb return -1;
735 1.10 thorpej }
736 1.70 thorpej
737 1.70 thorpej /*
738 1.70 thorpej * XXX Extremely lame implementations of _ufetch_* / _ustore_*. IBM 4xx
739 1.70 thorpej * experts should make versions that are good.
740 1.70 thorpej */
741 1.70 thorpej
742 1.70 thorpej #define UFETCH(sz) \
743 1.70 thorpej int \
744 1.70 thorpej _ufetch_ ## sz(const uint ## sz ## _t *uaddr, uint ## sz ## _t *valp) \
745 1.70 thorpej { \
746 1.70 thorpej return copyin(uaddr, valp, sizeof(*valp)); \
747 1.70 thorpej }
748 1.70 thorpej
749 1.70 thorpej UFETCH(8)
750 1.70 thorpej UFETCH(16)
751 1.70 thorpej UFETCH(32)
752 1.70 thorpej
753 1.70 thorpej #define USTORE(sz) \
754 1.70 thorpej int \
755 1.70 thorpej _ustore_ ## sz(uint ## sz ## _t *uaddr, uint ## sz ## _t val) \
756 1.70 thorpej { \
757 1.70 thorpej return copyout(&val, uaddr, sizeof(val)); \
758 1.70 thorpej }
759 1.70 thorpej
760 1.70 thorpej USTORE(8)
761 1.70 thorpej USTORE(16)
762 1.70 thorpej USTORE(32)
763