trap.c revision 1.9.2.1 1 1.9.2.1 gmcgarry /* $NetBSD: trap.c,v 1.9.2.1 2002/12/18 01:05:34 gmcgarry Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2001 Wasabi Systems, Inc.
5 1.1 simonb * All rights reserved.
6 1.1 simonb *
7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed for the NetBSD Project by
20 1.1 simonb * Wasabi Systems, Inc.
21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 simonb * or promote products derived from this software without specific prior
23 1.1 simonb * written permission.
24 1.1 simonb *
25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE.
36 1.1 simonb */
37 1.1 simonb
38 1.1 simonb /*
39 1.1 simonb * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 1.1 simonb * Copyright (C) 1995, 1996 TooLs GmbH.
41 1.1 simonb * All rights reserved.
42 1.1 simonb *
43 1.1 simonb * Redistribution and use in source and binary forms, with or without
44 1.1 simonb * modification, are permitted provided that the following conditions
45 1.1 simonb * are met:
46 1.1 simonb * 1. Redistributions of source code must retain the above copyright
47 1.1 simonb * notice, this list of conditions and the following disclaimer.
48 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 simonb * notice, this list of conditions and the following disclaimer in the
50 1.1 simonb * documentation and/or other materials provided with the distribution.
51 1.1 simonb * 3. All advertising materials mentioning features or use of this software
52 1.1 simonb * must display the following acknowledgement:
53 1.1 simonb * This product includes software developed by TooLs GmbH.
54 1.1 simonb * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 1.1 simonb * derived from this software without specific prior written permission.
56 1.1 simonb *
57 1.1 simonb * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 1.1 simonb * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 1.1 simonb * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 1.1 simonb * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 1.1 simonb * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 1.1 simonb * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 1.1 simonb * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 1.1 simonb * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 1.1 simonb */
68 1.1 simonb
69 1.1 simonb #include "opt_altivec.h"
70 1.1 simonb #include "opt_ddb.h"
71 1.1 simonb #include "opt_ktrace.h"
72 1.4 christos #include "opt_systrace.h"
73 1.1 simonb #include "opt_syscall_debug.h"
74 1.1 simonb
75 1.1 simonb #include <sys/param.h>
76 1.1 simonb #include <sys/proc.h>
77 1.1 simonb #include <sys/reboot.h>
78 1.1 simonb #include <sys/syscall.h>
79 1.1 simonb #include <sys/systm.h>
80 1.1 simonb #include <sys/user.h>
81 1.4 christos #ifdef KTRACE
82 1.1 simonb #include <sys/ktrace.h>
83 1.4 christos #endif
84 1.4 christos #ifdef SYSTRACE
85 1.4 christos #include <sys/systrace.h>
86 1.4 christos #endif
87 1.1 simonb
88 1.1 simonb #include <uvm/uvm_extern.h>
89 1.1 simonb
90 1.1 simonb #include <dev/cons.h>
91 1.1 simonb
92 1.1 simonb #include <machine/cpu.h>
93 1.1 simonb #include <machine/db_machdep.h>
94 1.1 simonb #include <machine/fpu.h>
95 1.1 simonb #include <machine/frame.h>
96 1.1 simonb #include <machine/pcb.h>
97 1.1 simonb #include <machine/psl.h>
98 1.1 simonb #include <machine/trap.h>
99 1.1 simonb
100 1.1 simonb #include <powerpc/spr.h>
101 1.1 simonb #include <powerpc/ibm4xx/pmap.h>
102 1.1 simonb #include <powerpc/ibm4xx/tlb.h>
103 1.1 simonb #include <powerpc/fpu/fpu_extern.h>
104 1.1 simonb
105 1.1 simonb /* These definitions should probably be somewhere else XXX */
106 1.1 simonb #define FIRSTARG 3 /* first argument is in reg 3 */
107 1.1 simonb #define NARGREG 8 /* 8 args are in registers */
108 1.1 simonb #define MOREARGS(sp) ((caddr_t)((int)(sp) + 8)) /* more args go here */
109 1.1 simonb
110 1.1 simonb #ifndef MULTIPROCESSOR
111 1.1 simonb volatile int astpending;
112 1.1 simonb volatile int want_resched;
113 1.1 simonb #endif
114 1.1 simonb
115 1.1 simonb static int fix_unaligned __P((struct proc *p, struct trapframe *frame));
116 1.1 simonb
117 1.1 simonb void trap __P((struct trapframe *)); /* Called from locore / trap_subr */
118 1.1 simonb int setfault __P((faultbuf)); /* defined in locore.S */
119 1.1 simonb /* Why are these not defined in a header? */
120 1.1 simonb int badaddr __P((void *, size_t));
121 1.1 simonb int badaddr_read __P((void *, size_t, int *));
122 1.1 simonb int ctx_setup __P((int, int));
123 1.1 simonb
124 1.1 simonb #ifdef DEBUG
125 1.1 simonb #define TDB_ALL 0x1
126 1.1 simonb int trapdebug = /* TDB_ALL */ 0;
127 1.1 simonb #define DBPRINTF(x, y) if (trapdebug & (x)) printf y
128 1.1 simonb #else
129 1.1 simonb #define DBPRINTF(x, y)
130 1.1 simonb #endif
131 1.1 simonb
132 1.1 simonb void
133 1.1 simonb trap(struct trapframe *frame)
134 1.1 simonb {
135 1.1 simonb struct proc *p = curproc;
136 1.1 simonb int type = frame->exc;
137 1.1 simonb int ftype, rv;
138 1.1 simonb
139 1.1 simonb KASSERT(p == 0 || (p->p_stat == SONPROC));
140 1.1 simonb
141 1.1 simonb if (frame->srr1 & PSL_PR)
142 1.1 simonb type |= EXC_USER;
143 1.1 simonb
144 1.1 simonb ftype = VM_PROT_READ;
145 1.1 simonb
146 1.7 simonb DBPRINTF(TDB_ALL, ("trap(%x) at %x from frame %p &frame %p\n",
147 1.1 simonb type, frame->srr0, frame, &frame));
148 1.1 simonb
149 1.1 simonb switch (type) {
150 1.1 simonb case EXC_DEBUG|EXC_USER:
151 1.1 simonb {
152 1.1 simonb int srr2, srr3;
153 1.1 simonb __asm __volatile("mfspr %0,0x3f0" : "=r" (rv), "=r" (srr2), "=r" (srr3) :);
154 1.1 simonb printf("debug reg is %x srr2 %x srr3 %x\n", rv, srr2, srr3);
155 1.1 simonb }
156 1.1 simonb /*
157 1.1 simonb * DEBUG intr -- probably single-step.
158 1.1 simonb */
159 1.1 simonb case EXC_TRC|EXC_USER:
160 1.1 simonb KERNEL_PROC_LOCK(p);
161 1.1 simonb frame->srr1 &= ~PSL_SE;
162 1.1 simonb trapsignal(p, SIGTRAP, EXC_TRC);
163 1.1 simonb KERNEL_PROC_UNLOCK(p);
164 1.1 simonb break;
165 1.7 simonb
166 1.1 simonb /* If we could not find and install appropriate TLB entry, fall through */
167 1.7 simonb
168 1.1 simonb case EXC_DSI:
169 1.1 simonb /* FALLTHROUGH */
170 1.1 simonb case EXC_DTMISS:
171 1.1 simonb {
172 1.1 simonb struct vm_map *map;
173 1.1 simonb vaddr_t va;
174 1.1 simonb faultbuf *fb = NULL;
175 1.1 simonb
176 1.1 simonb KERNEL_LOCK(LK_CANRECURSE|LK_EXCLUSIVE);
177 1.1 simonb va = frame->dear;
178 1.1 simonb if (frame->pid == KERNEL_PID) {
179 1.1 simonb map = kernel_map;
180 1.1 simonb } else {
181 1.1 simonb map = &p->p_vmspace->vm_map;
182 1.1 simonb }
183 1.1 simonb
184 1.1 simonb if (frame->esr & (ESR_DST|ESR_DIZ))
185 1.3 chs ftype = VM_PROT_WRITE;
186 1.1 simonb
187 1.7 simonb DBPRINTF(TDB_ALL, ("trap(EXC_DSI) at %x %s fault on %p esr %x\n",
188 1.1 simonb frame->srr0, (ftype&VM_PROT_WRITE) ? "write" : "read", (void *)va, frame->esr));
189 1.1 simonb rv = uvm_fault(map, trunc_page(va), 0, ftype);
190 1.1 simonb KERNEL_UNLOCK();
191 1.1 simonb if (rv == 0)
192 1.1 simonb goto done;
193 1.1 simonb if ((fb = p->p_addr->u_pcb.pcb_onfault) != NULL) {
194 1.1 simonb frame->pid = KERNEL_PID;
195 1.1 simonb frame->srr0 = (*fb)[0];
196 1.1 simonb frame->srr1 |= PSL_IR; /* Re-enable IMMU */
197 1.1 simonb frame->fixreg[1] = (*fb)[1];
198 1.1 simonb frame->fixreg[2] = (*fb)[2];
199 1.1 simonb frame->fixreg[3] = 1; /* Return TRUE */
200 1.1 simonb frame->cr = (*fb)[3];
201 1.2 wiz memcpy(&frame->fixreg[13], &(*fb)[4],
202 1.1 simonb 19 * sizeof(register_t));
203 1.1 simonb goto done;
204 1.1 simonb }
205 1.1 simonb }
206 1.1 simonb goto brain_damage;
207 1.7 simonb
208 1.1 simonb case EXC_DSI|EXC_USER:
209 1.1 simonb /* FALLTHROUGH */
210 1.1 simonb case EXC_DTMISS|EXC_USER:
211 1.1 simonb KERNEL_PROC_LOCK(p);
212 1.7 simonb
213 1.1 simonb if (frame->esr & (ESR_DST|ESR_DIZ))
214 1.3 chs ftype = VM_PROT_WRITE;
215 1.1 simonb
216 1.7 simonb DBPRINTF(TDB_ALL, ("trap(EXC_DSI|EXC_USER) at %x %s fault on %x %x\n",
217 1.1 simonb frame->srr0, (ftype&VM_PROT_WRITE) ? "write" : "read", frame->dear, frame->esr));
218 1.1 simonb KASSERT(p == curproc && (p->p_stat == SONPROC));
219 1.1 simonb rv = uvm_fault(&p->p_vmspace->vm_map,
220 1.1 simonb trunc_page(frame->dear), 0, ftype);
221 1.1 simonb if (rv == 0) {
222 1.1 simonb KERNEL_PROC_UNLOCK(p);
223 1.1 simonb break;
224 1.1 simonb }
225 1.1 simonb if (rv == ENOMEM) {
226 1.1 simonb printf("UVM: pid %d (%s), uid %d killed: "
227 1.1 simonb "out of swap\n",
228 1.1 simonb p->p_pid, p->p_comm,
229 1.9.2.1 gmcgarry p->p_ucred ? p->p_ucred->cr_uid : -1);
230 1.1 simonb trapsignal(p, SIGKILL, EXC_DSI);
231 1.1 simonb } else {
232 1.1 simonb trapsignal(p, SIGSEGV, EXC_DSI);
233 1.1 simonb }
234 1.1 simonb KERNEL_PROC_UNLOCK(p);
235 1.1 simonb break;
236 1.1 simonb case EXC_ITMISS|EXC_USER:
237 1.1 simonb case EXC_ISI|EXC_USER:
238 1.1 simonb KERNEL_PROC_LOCK(p);
239 1.1 simonb ftype = VM_PROT_READ | VM_PROT_EXECUTE;
240 1.7 simonb DBPRINTF(TDB_ALL, ("trap(EXC_ISI|EXC_USER) at %x %s fault on %x tf %p\n",
241 1.1 simonb frame->srr0, (ftype&VM_PROT_WRITE) ? "write" : "read", frame->srr0, frame));
242 1.1 simonb rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(frame->srr0), 0, ftype);
243 1.1 simonb if (rv == 0) {
244 1.1 simonb KERNEL_PROC_UNLOCK(p);
245 1.1 simonb break;
246 1.1 simonb }
247 1.1 simonb trapsignal(p, SIGSEGV, EXC_ISI);
248 1.1 simonb KERNEL_PROC_UNLOCK(p);
249 1.1 simonb break;
250 1.1 simonb
251 1.1 simonb case EXC_AST|EXC_USER:
252 1.1 simonb astpending = 0; /* we are about to do it */
253 1.1 simonb KERNEL_PROC_LOCK(p);
254 1.1 simonb uvmexp.softs++;
255 1.1 simonb if (p->p_flag & P_OWEUPC) {
256 1.1 simonb p->p_flag &= ~P_OWEUPC;
257 1.1 simonb ADDUPROF(p);
258 1.1 simonb }
259 1.1 simonb /* Check whether we are being preempted. */
260 1.1 simonb if (want_resched)
261 1.1 simonb preempt(NULL);
262 1.1 simonb KERNEL_PROC_UNLOCK(p);
263 1.1 simonb break;
264 1.1 simonb
265 1.1 simonb
266 1.1 simonb case EXC_ALI|EXC_USER:
267 1.1 simonb KERNEL_PROC_LOCK(p);
268 1.1 simonb if (fix_unaligned(p, frame) != 0)
269 1.1 simonb trapsignal(p, SIGBUS, EXC_ALI);
270 1.1 simonb else
271 1.1 simonb frame->srr0 += 4;
272 1.1 simonb KERNEL_PROC_UNLOCK(p);
273 1.1 simonb break;
274 1.1 simonb
275 1.1 simonb case EXC_PGM|EXC_USER:
276 1.7 simonb /*
277 1.7 simonb * Illegal insn:
278 1.1 simonb *
279 1.7 simonb * let's try to see if it's FPU and can be emulated.
280 1.1 simonb */
281 1.1 simonb uvmexp.traps ++;
282 1.1 simonb if (!(p->p_addr->u_pcb.pcb_flags & PCB_FPU)) {
283 1.2 wiz memset(&p->p_addr->u_pcb.pcb_fpu, 0,
284 1.1 simonb sizeof p->p_addr->u_pcb.pcb_fpu);
285 1.1 simonb p->p_addr->u_pcb.pcb_flags |= PCB_FPU;
286 1.1 simonb }
287 1.1 simonb
288 1.7 simonb if ((rv = fpu_emulate(frame,
289 1.1 simonb (struct fpreg *)&p->p_addr->u_pcb.pcb_fpu))) {
290 1.1 simonb KERNEL_PROC_LOCK(p);
291 1.1 simonb trapsignal(p, rv, EXC_PGM);
292 1.1 simonb KERNEL_PROC_UNLOCK(p);
293 1.1 simonb }
294 1.1 simonb break;
295 1.1 simonb
296 1.1 simonb case EXC_MCHK:
297 1.1 simonb {
298 1.1 simonb faultbuf *fb;
299 1.1 simonb
300 1.1 simonb if ((fb = p->p_addr->u_pcb.pcb_onfault) != NULL) {
301 1.1 simonb frame->pid = KERNEL_PID;
302 1.1 simonb frame->srr0 = (*fb)[0];
303 1.1 simonb frame->srr1 |= PSL_IR; /* Re-enable IMMU */
304 1.1 simonb frame->fixreg[1] = (*fb)[1];
305 1.1 simonb frame->fixreg[2] = (*fb)[2];
306 1.1 simonb frame->fixreg[3] = 1; /* Return TRUE */
307 1.1 simonb frame->cr = (*fb)[3];
308 1.2 wiz memcpy(&frame->fixreg[13], &(*fb)[4],
309 1.1 simonb 19 * sizeof(register_t));
310 1.1 simonb goto done;
311 1.1 simonb }
312 1.1 simonb }
313 1.1 simonb goto brain_damage;
314 1.1 simonb default:
315 1.1 simonb brain_damage:
316 1.1 simonb printf("trap type 0x%x at 0x%x\n", type, frame->srr0);
317 1.1 simonb #ifdef DDB
318 1.1 simonb if (kdb_trap(type, frame))
319 1.1 simonb goto done;
320 1.1 simonb #endif
321 1.1 simonb #ifdef TRAP_PANICWAIT
322 1.1 simonb printf("Press a key to panic.\n");
323 1.1 simonb cngetc();
324 1.1 simonb #endif
325 1.1 simonb panic("trap");
326 1.1 simonb }
327 1.1 simonb
328 1.1 simonb /* Take pending signals. */
329 1.1 simonb {
330 1.1 simonb int sig;
331 1.1 simonb
332 1.1 simonb while ((sig = CURSIG(p)) != 0)
333 1.1 simonb postsig(sig);
334 1.1 simonb }
335 1.1 simonb
336 1.1 simonb curcpu()->ci_schedstate.spc_curpriority = p->p_priority = p->p_usrpri;
337 1.1 simonb done:
338 1.9 thorpej return;
339 1.1 simonb }
340 1.1 simonb
341 1.1 simonb int
342 1.1 simonb ctx_setup(int ctx, int srr1)
343 1.1 simonb {
344 1.1 simonb volatile struct pmap *pm;
345 1.1 simonb
346 1.1 simonb /* Update PID if we're returning to user mode. */
347 1.1 simonb if (srr1 & PSL_PR) {
348 1.1 simonb pm = curproc->p_vmspace->vm_map.pmap;
349 1.1 simonb if (!pm->pm_ctx) {
350 1.1 simonb ctx_alloc((struct pmap *)pm);
351 1.1 simonb }
352 1.1 simonb ctx = pm->pm_ctx;
353 1.1 simonb if (srr1 & PSL_SE) {
354 1.1 simonb int dbreg, mask = 0x48000000;
355 1.1 simonb /*
356 1.1 simonb * Set the Internal Debug and
357 1.1 simonb * Instruction Completion bits of
358 1.1 simonb * the DBCR0 register.
359 1.1 simonb *
360 1.1 simonb * XXX this is also used by jtag debuggers...
361 1.1 simonb */
362 1.1 simonb __asm __volatile("mfspr %0,0x3f2;"
363 1.1 simonb "or %0,%0,%1;"
364 1.1 simonb "mtspr 0x3f2,%0;" :
365 1.1 simonb "=&r" (dbreg) : "r" (mask));
366 1.1 simonb }
367 1.1 simonb }
368 1.1 simonb else if (!ctx) {
369 1.1 simonb ctx = KERNEL_PID;
370 1.1 simonb }
371 1.1 simonb return (ctx);
372 1.1 simonb }
373 1.1 simonb
374 1.1 simonb /*
375 1.1 simonb * Used by copyin()/copyout()
376 1.1 simonb */
377 1.1 simonb extern vaddr_t vmaprange __P((struct proc *, vaddr_t, vsize_t, int));
378 1.1 simonb extern void vunmaprange __P((vaddr_t, vsize_t));
379 1.1 simonb static int bigcopyin __P((const void *, void *, size_t ));
380 1.1 simonb static int bigcopyout __P((const void *, void *, size_t ));
381 1.1 simonb
382 1.1 simonb int
383 1.1 simonb copyin(const void *udaddr, void *kaddr, size_t len)
384 1.1 simonb {
385 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
386 1.1 simonb int msr, pid, tmp, ctx;
387 1.1 simonb faultbuf env;
388 1.1 simonb
389 1.1 simonb /* For bigger buffers use the faster copy */
390 1.1 simonb if (len > 256) return (bigcopyin(udaddr, kaddr, len));
391 1.1 simonb
392 1.1 simonb if (setfault(env)) {
393 1.1 simonb curpcb->pcb_onfault = 0;
394 1.1 simonb return EFAULT;
395 1.1 simonb }
396 1.1 simonb
397 1.1 simonb if (!(ctx = pm->pm_ctx)) {
398 1.1 simonb /* No context -- assign it one */
399 1.1 simonb ctx_alloc(pm);
400 1.1 simonb ctx = pm->pm_ctx;
401 1.1 simonb }
402 1.1 simonb
403 1.1 simonb asm volatile("addi %6,%6,1; mtctr %6;" /* Set up counter */
404 1.1 simonb "mfmsr %0;" /* Save MSR */
405 1.1 simonb "li %1,0x20; "
406 1.1 simonb "andc %1,%0,%1; mtmsr %1;" /* Disable IMMU */
407 1.1 simonb "mfpid %1;" /* Save old PID */
408 1.1 simonb "sync; isync;"
409 1.1 simonb
410 1.1 simonb "1: bdz 2f;" /* while len */
411 1.1 simonb "mtpid %3; sync;" /* Load user ctx */
412 1.1 simonb "lbz %2,0(%4); addi %4,%4,1;" /* Load byte */
413 1.1 simonb "sync; isync;"
414 1.1 simonb "mtpid %1;sync;"
415 1.1 simonb "stb %2,0(%5); dcbf 0,%5; addi %5,%5,1;" /* Store kernel byte */
416 1.1 simonb "sync; isync;"
417 1.1 simonb "b 1b;" /* repeat */
418 1.1 simonb
419 1.1 simonb "2: mtpid %1; mtmsr %0;" /* Restore PID and MSR */
420 1.1 simonb "sync; isync;"
421 1.1 simonb : "=&r" (msr), "=&r" (pid), "=&r" (tmp)
422 1.1 simonb : "r" (ctx), "r" (udaddr), "r" (kaddr), "r" (len));
423 1.1 simonb
424 1.1 simonb curpcb->pcb_onfault = 0;
425 1.1 simonb return 0;
426 1.1 simonb }
427 1.1 simonb
428 1.1 simonb static int
429 1.1 simonb bigcopyin(const void *udaddr, void *kaddr, size_t len)
430 1.1 simonb {
431 1.1 simonb const char *up;
432 1.1 simonb char *kp = kaddr;
433 1.1 simonb struct proc *p = curproc;
434 1.1 simonb int error;
435 1.1 simonb
436 1.1 simonb if (!p) {
437 1.1 simonb return EFAULT;
438 1.1 simonb }
439 1.1 simonb
440 1.1 simonb /*
441 1.7 simonb * Stolen from physio():
442 1.1 simonb */
443 1.1 simonb PHOLD(p);
444 1.1 simonb error = uvm_vslock(p, (caddr_t)udaddr, len, VM_PROT_READ);
445 1.1 simonb if (error) {
446 1.1 simonb PRELE(p);
447 1.1 simonb return EFAULT;
448 1.1 simonb }
449 1.1 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len, VM_PROT_READ);
450 1.1 simonb
451 1.2 wiz memcpy(kp, up, len);
452 1.1 simonb vunmaprange((vaddr_t)up, len);
453 1.1 simonb uvm_vsunlock(p, (caddr_t)udaddr, len);
454 1.1 simonb PRELE(p);
455 1.1 simonb
456 1.7 simonb return 0;
457 1.1 simonb }
458 1.1 simonb
459 1.1 simonb int
460 1.1 simonb copyout(const void *kaddr, void *udaddr, size_t len)
461 1.1 simonb {
462 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
463 1.1 simonb int msr, pid, tmp, ctx;
464 1.1 simonb faultbuf env;
465 1.1 simonb
466 1.1 simonb /* For big copies use more efficient routine */
467 1.1 simonb if (len > 256) return (bigcopyout(kaddr, udaddr, len));
468 1.1 simonb
469 1.1 simonb if (setfault(env)) {
470 1.1 simonb curpcb->pcb_onfault = 0;
471 1.1 simonb return EFAULT;
472 1.1 simonb }
473 1.1 simonb
474 1.1 simonb if (!(ctx = pm->pm_ctx)) {
475 1.1 simonb /* No context -- assign it one */
476 1.1 simonb ctx_alloc(pm);
477 1.1 simonb ctx = pm->pm_ctx;
478 1.1 simonb }
479 1.1 simonb
480 1.1 simonb asm volatile("addi %6,%6,1; mtctr %6;" /* Set up counter */
481 1.1 simonb "mfmsr %0;" /* Save MSR */
482 1.1 simonb "li %1,0x20; "
483 1.1 simonb "andc %1,%0,%1; mtmsr %1;" /* Disable IMMU */
484 1.1 simonb "mfpid %1;" /* Save old PID */
485 1.1 simonb "sync; isync;"
486 1.1 simonb
487 1.1 simonb "1: bdz 2f;" /* while len */
488 1.1 simonb "mtpid %1;sync;"
489 1.1 simonb "lbz %2,0(%5); addi %5,%5,1;" /* Load kernel byte */
490 1.1 simonb "sync; isync;"
491 1.1 simonb "mtpid %3; sync;" /* Load user ctx */
492 1.1 simonb "stb %2,0(%4); dcbf 0,%4; addi %4,%4,1;" /* Store user byte */
493 1.1 simonb "sync; isync;"
494 1.1 simonb "b 1b;" /* repeat */
495 1.1 simonb
496 1.1 simonb "2: mtpid %1; mtmsr %0;" /* Restore PID and MSR */
497 1.1 simonb "sync; isync;"
498 1.1 simonb : "=&r" (msr), "=&r" (pid), "=&r" (tmp)
499 1.1 simonb : "r" (ctx), "r" (udaddr), "r" (kaddr), "r" (len));
500 1.1 simonb
501 1.1 simonb curpcb->pcb_onfault = 0;
502 1.1 simonb return 0;
503 1.1 simonb }
504 1.1 simonb
505 1.1 simonb static int
506 1.1 simonb bigcopyout(const void *kaddr, void *udaddr, size_t len)
507 1.1 simonb {
508 1.1 simonb char *up;
509 1.1 simonb const char *kp = (char *)kaddr;
510 1.1 simonb struct proc *p = curproc;
511 1.1 simonb int error;
512 1.1 simonb
513 1.1 simonb if (!p) {
514 1.1 simonb return EFAULT;
515 1.1 simonb }
516 1.1 simonb
517 1.1 simonb /*
518 1.7 simonb * Stolen from physio():
519 1.1 simonb */
520 1.1 simonb PHOLD(p);
521 1.3 chs error = uvm_vslock(p, udaddr, len, VM_PROT_WRITE);
522 1.1 simonb if (error) {
523 1.1 simonb PRELE(p);
524 1.1 simonb return EFAULT;
525 1.1 simonb }
526 1.7 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len,
527 1.1 simonb VM_PROT_READ|VM_PROT_WRITE);
528 1.1 simonb
529 1.2 wiz memcpy(up, kp, len);
530 1.1 simonb vunmaprange((vaddr_t)up, len);
531 1.1 simonb uvm_vsunlock(p, udaddr, len);
532 1.1 simonb PRELE(p);
533 1.1 simonb
534 1.7 simonb return 0;
535 1.1 simonb }
536 1.1 simonb
537 1.1 simonb /*
538 1.1 simonb * kcopy(const void *src, void *dst, size_t len);
539 1.1 simonb *
540 1.1 simonb * Copy len bytes from src to dst, aborting if we encounter a fatal
541 1.1 simonb * page fault.
542 1.1 simonb *
543 1.1 simonb * kcopy() _must_ save and restore the old fault handler since it is
544 1.1 simonb * called by uiomove(), which may be in the path of servicing a non-fatal
545 1.1 simonb * page fault.
546 1.1 simonb */
547 1.1 simonb int
548 1.1 simonb kcopy(const void *src, void *dst, size_t len)
549 1.1 simonb {
550 1.1 simonb faultbuf env, *oldfault;
551 1.1 simonb
552 1.1 simonb oldfault = curpcb->pcb_onfault;
553 1.1 simonb if (setfault(env)) {
554 1.1 simonb curpcb->pcb_onfault = oldfault;
555 1.1 simonb return EFAULT;
556 1.1 simonb }
557 1.1 simonb
558 1.2 wiz memcpy(dst, src, len);
559 1.1 simonb
560 1.1 simonb curpcb->pcb_onfault = oldfault;
561 1.1 simonb return 0;
562 1.1 simonb }
563 1.1 simonb
564 1.1 simonb int
565 1.1 simonb badaddr(void *addr, size_t size)
566 1.1 simonb {
567 1.1 simonb
568 1.1 simonb return badaddr_read(addr, size, NULL);
569 1.1 simonb }
570 1.1 simonb
571 1.1 simonb int
572 1.1 simonb badaddr_read(void *addr, size_t size, int *rptr)
573 1.1 simonb {
574 1.1 simonb faultbuf env;
575 1.1 simonb int x;
576 1.1 simonb
577 1.1 simonb /* Get rid of any stale machine checks that have been waiting. */
578 1.1 simonb __asm __volatile ("sync; isync");
579 1.1 simonb
580 1.1 simonb if (setfault(env)) {
581 1.1 simonb curpcb->pcb_onfault = 0;
582 1.1 simonb __asm __volatile ("sync");
583 1.1 simonb return 1;
584 1.1 simonb }
585 1.1 simonb
586 1.1 simonb __asm __volatile ("sync");
587 1.1 simonb
588 1.1 simonb switch (size) {
589 1.1 simonb case 1:
590 1.1 simonb x = *(volatile int8_t *)addr;
591 1.1 simonb break;
592 1.1 simonb case 2:
593 1.1 simonb x = *(volatile int16_t *)addr;
594 1.1 simonb break;
595 1.1 simonb case 4:
596 1.1 simonb x = *(volatile int32_t *)addr;
597 1.1 simonb break;
598 1.1 simonb default:
599 1.1 simonb panic("badaddr: invalid size (%d)", size);
600 1.1 simonb }
601 1.1 simonb
602 1.1 simonb /* Make sure we took the machine check, if we caused one. */
603 1.1 simonb __asm __volatile ("sync; isync");
604 1.1 simonb
605 1.1 simonb curpcb->pcb_onfault = 0;
606 1.1 simonb __asm __volatile ("sync"); /* To be sure. */
607 1.1 simonb
608 1.1 simonb /* Use the value to avoid reorder. */
609 1.1 simonb if (rptr)
610 1.1 simonb *rptr = x;
611 1.1 simonb
612 1.1 simonb return 0;
613 1.1 simonb }
614 1.1 simonb
615 1.1 simonb /*
616 1.1 simonb * For now, this only deals with the particular unaligned access case
617 1.1 simonb * that gcc tends to generate. Eventually it should handle all of the
618 1.1 simonb * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
619 1.1 simonb */
620 1.1 simonb
621 1.1 simonb static int
622 1.1 simonb fix_unaligned(struct proc *p, struct trapframe *frame)
623 1.1 simonb {
624 1.1 simonb
625 1.1 simonb return -1;
626 1.1 simonb }
627