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trap_subr.S revision 1.11.42.3
      1 /*	$NetBSD: trap_subr.S,v 1.11.42.3 2011/06/12 00:24:04 rmind Exp $	*/
      2 
      3 /*
      4  * Copyright 2001 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *      This product includes software developed for the NetBSD Project by
     20  *      Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 /*
     39  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
     40  * Copyright (C) 1995, 1996 TooLs GmbH.
     41  * All rights reserved.
     42  *
     43  * Redistribution and use in source and binary forms, with or without
     44  * modification, are permitted provided that the following conditions
     45  * are met:
     46  * 1. Redistributions of source code must retain the above copyright
     47  *    notice, this list of conditions and the following disclaimer.
     48  * 2. Redistributions in binary form must reproduce the above copyright
     49  *    notice, this list of conditions and the following disclaimer in the
     50  *    documentation and/or other materials provided with the distribution.
     51  * 3. All advertising materials mentioning features or use of this software
     52  *    must display the following acknowledgement:
     53  *	This product includes software developed by TooLs GmbH.
     54  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     55  *    derived from this software without specific prior written permission.
     56  *
     57  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     58  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     59  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     60  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     61  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     62  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     63  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     64  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     65  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     66  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     67  */
     68 
     69 /*
     70  * NOTICE: This is not a standalone file.  to use it, #include it in
     71  * your port's locore.S, like so:
     72  *
     73  *	#include <powerpc/ibm4xx/trap_subr.S>
     74  */
     75 
     76 /*
     77  * XXX Interrupt and spill stacks need to be per-CPU.
     78  */
     79 
     80 #define	GET_PCB(rX)	\
     81 	GET_CPUINFO(rX);	\
     82 	lwz	rX,CI_CURPCB(rX)
     83 
     84 #define	STANDARD_PROLOG(savearea)	\
     85 	mtsprg1	%r1;			/* save SP */ 		\
     86 	GET_CPUINFO(%r1);					\
     87 	stmw	%r28,(savearea+CPUSAVE_R28)(%r1); /* free r28-r31 */	\
     88 	mflr	%r28;			/* save LR */		\
     89 	mfcr	%r29;			/* save CR */		\
     90 	mfsrr0	%r30;						\
     91 	mfsrr1	%r31; /* Test whether we already had PR set */	\
     92 	stmw	%r30,(savearea+CPUSAVE_SRR0)(%r1); /* save srr0/srr1 */	\
     93 	mfsprg1	%r1;			/* restore SP */ 	\
     94 	mtcr	%r31;						\
     95 	bf	MSR_PR,1f;		/* branch if MSR[PR] is clear */ \
     96 	GET_PCB(%r1);						\
     97 	addi	%r1,%r1,USPACE-CALLFRAMELEN; /* stack is top of user struct */ \
     98 1:
     99 
    100 #define	ACCESS_PROLOG(savearea)					\
    101 	mtsprg1	%r1;			/* save SP temporalily */	\
    102 	GET_CPUINFO(%r1);					\
    103 	stmw	%r28,(savearea+CPUSAVE_R28)(%r1); /* free r28-r31 */	\
    104 	mflr	%r28;			/* save LR */		\
    105 	mfcr	%r29;			/* save CR */		\
    106 	mfdear	%r30;						\
    107 	mfesr	%r31;						\
    108 	stmw	%r30,(savearea+CPUSAVE_DEAR)(%r1);		\
    109 	mfsrr0	%r30;						\
    110 	mfsrr1	%r31; /* Test whether we already had PR set */	\
    111 	stmw	%r30,(savearea+CPUSAVE_SRR0)(%r1); /* save srr0/srr1 */	\
    112 	mfsprg1	%r1;			/* restore SP */ 	\
    113 	mtcr	%r31;						\
    114 	bf	MSR_PR,1f;		/* branch if MSR[PR] is clear */ \
    115 	GET_PCB(%r1);						\
    116 	addi	%r1,%r1,USPACE-CALLFRAMELEN; /* stack is top of user struct */ \
    117 1:
    118 
    119 #define	CRITICAL_PROLOG(savearea)				\
    120 	mtsprg1	%r1;			/* save SP */ 		\
    121 	GET_CPUINFO(%r1);					\
    122 	stmw	%r28,(savearea+CPUSAVE_R28)(%r1); /* free r28-r31 */	\
    123 	mflr	%r28;			/* save LR */		\
    124 	mfcr	%r29;			/* save CR */		\
    125 	mfsrr2	%r30; /* Fake a standard trap */		\
    126 	mfsrr3	%r31; /* Test whether we already had PR set */	\
    127 	stmw	%r30,(savearea+CPUSAVE_SRR0)(%r1); /* save srr0/srr1 */	\
    128 	mfsprg1	%r1;			/* restore SP */ 	\
    129 	mtcr	%r31;						\
    130 	bf	MSR_PR,1f;		/* branch if MSR[PR] is clear */ \
    131 	GET_PCB(%r1);						\
    132 	addi	%r1,%r1,USPACE-CALLFRAMELEN; /* stack is top of user struct */ \
    133 1:
    134 
    135 
    136 /* Standard handler saves r1,r28-31,LR,CR, sets up the stack and calls s_trap */
    137 #define STANDARD_EXC_HANDLER(name)\
    138 	.globl	_C_LABEL(name ## trap),_C_LABEL(name ## size) ;	\
    139 _C_LABEL(name ## trap):						\
    140 	STANDARD_PROLOG(CI_TEMPSAVE);				\
    141 	bla	s_trap  ;					\
    142 _C_LABEL(name ## size) = .-_C_LABEL(name ## trap)
    143 
    144 /* Access exceptions also need DEAR and ESR saved */
    145 #define ACCESS_EXC_HANDLER(name)\
    146 	.globl	_C_LABEL(name ## trap),_C_LABEL(name ## size) ;	\
    147 _C_LABEL(name ## trap):						\
    148 	ACCESS_PROLOG(CI_TEMPSAVE);				\
    149 	bla	s_trap  ;					\
    150 _C_LABEL(name ## size) = .-_C_LABEL(name ## trap)
    151 
    152 /* Maybe this should call ddb.... */
    153 #define CRITICAL_EXC_HANDLER(name)\
    154 	.globl	_C_LABEL(name ## trap),_C_LABEL(name ## size) ;	\
    155 _C_LABEL(name ## trap):						\
    156 	CRITICAL_PROLOG(CI_TEMPSAVE);				\
    157 	bla	s_trap  ;					\
    158 _C_LABEL(name ## size) = .-_C_LABEL(name ## trap)
    159 
    160 #define	INTR_PROLOG(tempsave)					\
    161 	mtsprg1	%r1;			/* save SP */		\
    162 	GET_CPUINFO(%r1);					\
    163 	stmw	%r28,(tempsave+CPUSAVE_R28)(%r1); /* free r28-r31 */ \
    164 	mflr	%r28;			/* save LR */		\
    165 	mfcr	%r29;			/* save CR */		\
    166 	mfxer	%r30;			/* save XER */		\
    167 	lwz	%r31,CI_IDEPTH(%r1);	/* already running on intstk? */ \
    168 	addic.	%r31,%r31,1;					\
    169 	stw	%r31,CI_IDEPTH(%r1);				\
    170 	lwz	%r1,CI_INTSTK(%r1);	/* get intstk */	\
    171 	beq	1f;						\
    172 	mfsprg1	%r1;			/* yes, get old SP */	\
    173 1:
    174 
    175 /*
    176  * This code gets copied to all the trap vectors
    177  * (except ISI/DSI, ALI, the interrupts, and possibly the debugging
    178  * traps when using IPKDB).
    179  */
    180 	.text
    181 	STANDARD_EXC_HANDLER(default)
    182 	ACCESS_EXC_HANDLER(ali)
    183 	ACCESS_EXC_HANDLER(dsi)
    184 	ACCESS_EXC_HANDLER(isi)
    185 	STANDARD_EXC_HANDLER(debug)
    186 	CRITICAL_EXC_HANDLER(mchk)
    187 
    188 /*
    189  * This one for the external interrupt handler.
    190  */
    191 	.globl	_C_LABEL(extint),_C_LABEL(extsize)
    192 _C_LABEL(extint):
    193 	INTR_PROLOG(CI_TEMPSAVE)
    194 	ba	extintr
    195 _C_LABEL(extsize) = .-_C_LABEL(extint)
    196 
    197 
    198 #if defined(DDB) || defined(KGDB)
    199 /*
    200  * In case of DDB we want a separate trap catcher for it
    201  */
    202 	.lcomm	ddbstk,INTSTK,16	/* ddb stack */
    203 
    204 	.globl	_C_LABEL(ddblow),_C_LABEL(ddbsize)
    205 _C_LABEL(ddblow):
    206 	mtsprg1	%r1			/* save SP */
    207 	GET_CPUINFO(%r1)
    208 	stmw	%r28,CI_DDBSAVE(%r1)	/* free r28-r31 */
    209 	mflr	%r28			/* save LR */
    210 	mfcr	%r29			/* save CR */
    211 	lis	%r1,ddbstk+INTSTK-CALLFRAMELEN@ha	/* get new SP */
    212 	addi	%r1,%r1,ddbstk+INTSTK-CALLFRAMELEN@l
    213 	bla	ddbtrap
    214 _C_LABEL(ddbsize) = .-_C_LABEL(ddblow)
    215 #endif	/* DDB || KGDB */
    216 
    217 #ifdef IPKDB
    218 /*
    219  * In case of IPKDB we want a separate trap catcher for it
    220  */
    221 
    222 	.lcomm	ipkdbstk,INTSTK,16	/* ipkdb stack */
    223 
    224 	.globl	_C_LABEL(ipkdblow),_C_LABEL(ipkdbsize)
    225 _C_LABEL(ipkdblow):
    226 	mtsprg1	%r1			/* save SP */
    227 	GET_CPUINFO(%r1)
    228 	stmw	%r28,CI_IPKDBSAVE(%r1)	/* free r28-r31 */
    229 	mflr	%r28			/* save LR */
    230 	mfcr	%r29			/* save CR */
    231 	lis	%r1,ipkdbstk+INTSTK-CALLFRAMELEN@ha	/* get new SP */
    232 	addi	%r1,%r1,ipkdbstk+INTSTK-CALLFRAMELEN@l
    233 	bla	ipkdbtrap
    234 _C_LABEL(ipkdbsize) = .-_C_LABEL(ipkdblow)
    235 #endif	/* IPKDB */
    236 
    237 #ifdef DEBUG
    238 #define TRAP_IF_ZERO(r)	tweqi	r,0
    239 #else
    240 #define TRAP_IF_ZERO(r)
    241 #endif
    242 
    243 #define	ENABLE_TRANSLATION(pidreg,tmpreg)				\
    244 	mfpid	pidreg;							\
    245 	li	tmpreg, KERNEL_PID;					\
    246 	mtpid	tmpreg;							\
    247 	mfmsr	tmpreg;							\
    248 	ori	tmpreg,tmpreg,(PSL_DR|PSL_IR)@l;			\
    249 	mtmsr	tmpreg;							\
    250 	isync
    251 
    252 /*
    253  * FRAME_SETUP assumes:
    254  *	SPRG1		SP (r1)
    255  *	savearea	r28-r31,DEAR,ESR,SRR0,SRR1 (DEAR & ESR only for DSI traps)
    256  *	%r28		LR
    257  *	%r29		CR
    258  *	%r1		kernel stack
    259  *	LR		trap type
    260  */
    261 #define	FRAME_SETUP(savearea)						\
    262 /* Have to enable translation to allow access of kernel stack: */	\
    263 	ENABLE_TRANSLATION(%r30,%r31);					\
    264 	mfsprg1	%r31;							\
    265 	stwu	%r31,-FRAMELEN(%r1);					\
    266 	stw	%r30,FRAME_PID(%r1);					\
    267 	stw	%r0,FRAME_R0(%r1);					\
    268 	stw	%r31,FRAME_R1(%r1);					\
    269 	stw	%r2,FRAME_R2(%r1);					\
    270 	GET_CPUINFO(%r2);						\
    271 	stw	%r28,FRAME_LR(%r1);					\
    272 	stw	%r29,FRAME_CR(%r1);					\
    273 	lmw	%r28,(savearea+CPUSAVE_R28)(%r2);			\
    274 	stmw	%r3,FRAME_R3(%r1);					\
    275 	lmw	%r28,(savearea+CPUSAVE_DEAR)(%r2);			\
    276 	lwz	%r13,CI_CURLWP(%r2);					\
    277 	mfxer	%r3;							\
    278 	mfctr	%r4;							\
    279 	mflr	%r5;							\
    280 	andi.	%r5,%r5,0xff00;						\
    281 	stw	%r3,FRAME_XER(%r1);					\
    282 	stw	%r4,FRAME_CTR(%r1);					\
    283 	stw	%r5,FRAME_EXC(%r1);					\
    284 	stw	%r28,FRAME_DEAR(%r1);					\
    285 	stw	%r29,FRAME_ESR(%r1);					\
    286 	stw	%r30,FRAME_SRR0(%r1);					\
    287 	stw	%r31,FRAME_SRR1(%r1)
    288 
    289 #define	FRAME_SAVE_CALLEE						\
    290 	stmw	%r13, FRAME_R13(%r1)
    291 
    292 #define	FRAME_RESTORE							\
    293 	lwz	%r6,FRAME_LR(%r1);					\
    294 	lwz	%r7,FRAME_CR(%r1);					\
    295 	lwz	%r8,FRAME_XER(%r1);					\
    296 	lwz	%r9,FRAME_CTR(%r1);					\
    297 	lwz	%r10,FRAME_SRR0(%r1);					\
    298 	lwz	%r11,FRAME_SRR1(%r1);					\
    299 	mtlr	%r6;							\
    300 	mtcr	%r7;							\
    301 	mtxer	%r8;							\
    302 	mtctr	%r9;							\
    303 	mtsrr0	%r10;							\
    304 	mtsrr1	%r11;							\
    305 	lwz	%r13,FRAME_R13(%r1);					\
    306 	lwz	%r12,FRAME_R12(%r1);					\
    307 	lwz	%r11,FRAME_R11(%r1);					\
    308 	lwz	%r10,FRAME_R10(%r1);					\
    309 	lwz	%r9,FRAME_R9(%r1);					\
    310 	lwz	%r8,FRAME_R8(%r1);					\
    311 	lwz	%r7,FRAME_R7(%r1);					\
    312 	lwz	%r6,FRAME_R6(%r1);					\
    313 	lwz	%r5,FRAME_R5(%r1);					\
    314 	lwz	%r4,FRAME_R4(%r1);					\
    315 	lwz	%r3,FRAME_R3(%r1);					\
    316 	lwz	%r2,FRAME_R2(%r1);					\
    317 	lwz	%r0,FRAME_R1(%r1);					\
    318 	mtsprg1	%r0;							\
    319 	lwz	%r0,FRAME_R0(%r1)
    320 
    321 /*
    322  * Now the common trap catching code.
    323  */
    324 s_trap:
    325 	FRAME_SETUP(CI_TEMPSAVE)
    326 	/* R31 = SRR1 */
    327 /* Now we can recover interrupts again: */
    328 trapagain:
    329 	wrtee	%r31			/* reenable interrupts */
    330 /* Call C trap code: */
    331 	addi	%r3,%r1,FRAME_TF
    332 	bl	_C_LABEL(trap)
    333 	.globl	_C_LABEL(trapexit)
    334 _C_LABEL(trapexit):
    335 	/* Disable interrupts: */
    336 	wrteei	0
    337 
    338 	/* Test AST pending: */
    339 	mtcr	%r31
    340 	bf	MSR_PR,trapleave_to_kernel /* branch if MSR[PR] is false */
    341 
    342 	lwz	%r4,L_MD_ASTPENDING(%r13)
    343 	andi.	%r4,%r4,1
    344 	beq	trapleave_to_user
    345 
    346 	li	%r6,EXC_AST
    347 	stw	%r6,FRAME_EXC(%r1)
    348 	b	trapagain
    349 
    350 trapleave_to_kernel:
    351 	lmw	%r14, FRAME_R14(%r1)	/* restore callee registers */
    352 
    353 intrleave_to_kernel:
    354 	FRAME_RESTORE		/* old SP is now in sprg1 */
    355 	/*
    356 	 * Now that we are done with the trapframe, we can load the original SP
    357 	 */
    358 	mfsprg1	%r1
    359 	rfi
    360 	ba	.		/* Protect against prefetch */
    361 
    362 trapleave_to_user:
    363 	lmw	%r13, FRAME_R13(%r1)	/* restore callee registers */
    364 
    365 intrleave_to_user:
    366 /* Now restore regs: */
    367 	lwz	%r3,FRAME_PID(%r1)
    368 	lwz	%r4,FRAME_SRR1(%r1)
    369 	bl	_C_LABEL(ctx_setup)
    370 	TRAP_IF_ZERO(%r3)
    371 	stw	%r3,FRAME_PID(%r1)
    372 
    373 	FRAME_RESTORE		/* old SP is now in sprg1 */
    374 
    375 	/*
    376 	 * We are returning to userspace so we need to switch PIDs.
    377 	 * Since the kernel executes out of what would be userspace,
    378 	 * we need to turn off translation before we set the PID.
    379 	 *
    380 	 * Alterantively, we could map a kernel page at 0xfffff000
    381 	 * that had the mtpid code in it and branch to it and avoid
    382 	 * all this.  (ba foo; foo: mtpid %r31; mfsprg3 %r31; rfi;)
    383 	 */
    384 	mfmsr	%r30
    385 	li	%r31,(PSL_DR|PSL_IR)@l
    386 	andc	%r30,%r30,%r31
    387 	lwz	%r31,FRAME_PID(%r1)
    388 	TRAP_IF_ZERO(%r31)
    389 	/*
    390 	 * Now that we are done with the trapframe, we can load the original SP
    391 	 */
    392 	mfsprg1	%r1
    393 	mtmsr	%r30	/* disable translation */
    394 	isync
    395 	mtpid	%r31
    396 	mfsprg3	%r31
    397 	mfsprg2	%r30
    398 	rfi
    399 	ba	.	/* Protect against prefetch */
    400 
    401 
    402 	.globl	_C_LABEL(sctrap),_C_LABEL(scsize),_C_LABEL(sctrapexit)
    403 _C_LABEL(sctrap):
    404 	STANDARD_PROLOG(CI_TEMPSAVE)
    405 	bla	s_sctrap
    406 _C_LABEL(scsize) = .-_C_LABEL(sctrap)
    407 
    408 s_sctrap:
    409 	FRAME_SETUP(CI_TEMPSAVE)
    410 /* Now we can recover interrupts again: */
    411 	wrteei	1			/* Enable interrupts */
    412 /* Call the appropriate syscall handler: */
    413 	addi	%r3,%r1,FRAME_TF
    414 	lwz	%r4,L_PROC(%r13)
    415 	lwz	%r4,P_MD_SYSCALL(%r4)
    416 	mtctr	%r4
    417 	bctrl
    418 _C_LABEL(sctrapexit):
    419 	b	trapexit
    420 
    421 /*
    422  * External interrupt second level handler
    423  */
    424 
    425 #define	INTR_SAVE(tempsave)						\
    426 /* Save non-volatile registers: */					\
    427 	stwu	%r1,-FRAMELEN(%r1);	/* temporarily */		\
    428 	stw	%r0,FRAME_R0(%r1);					\
    429 	mfsprg1	%r0;			/* get original SP */		\
    430 	stw	%r0,FRAME_R1(%r1);	/* and store it */		\
    431 	stw	%r2,FRAME_R2(%r1);					\
    432 	stw	%r3,FRAME_R3(%r1);					\
    433 	stw	%r4,FRAME_R4(%r1);					\
    434 	stw	%r5,FRAME_R5(%r1);					\
    435 	stw	%r6,FRAME_R6(%r1);					\
    436 	stw	%r7,FRAME_R7(%r1);					\
    437 	stw	%r8,FRAME_R8(%r1);					\
    438 	stw	%r9,FRAME_R9(%r1);					\
    439 	stw	%r10,FRAME_R10(%r1);					\
    440 	stw	%r11,FRAME_R11(%r1);					\
    441 	stw	%r12,FRAME_R12(%r1);					\
    442 	mfctr	%r31;							\
    443 	stmw	%r28,FRAME_LR(%r1);	/* save LR, CR, XER, CTR */	\
    444 	GET_CPUINFO(%r5);						\
    445 	lmw	%r28,(tempsave+CPUSAVE_R28)(%r5); /* restore r28-r31 */	\
    446 	lwz	%r13,CI_CURLWP(%r5);					\
    447 	lwz	%r5,CI_IDEPTH(%r5);					\
    448 	mfsrr0	%r4;							\
    449 	mfsrr1	%r3;							\
    450 	stw	%r5,FRAME_IDEPTH(%r1);					\
    451 	stw	%r4,FRAME_SRR0(%r1);					\
    452 	stw	%r3,FRAME_SRR1(%r1);					\
    453 /* interrupts are recoverable here, and enable translation */		\
    454 	ENABLE_TRANSLATION(%r0,%r5);					\
    455 	stw	%r0,FRAME_PID(%r1);					\
    456 
    457 	.globl	_C_LABEL(extint_call)
    458 extintr:
    459 	INTR_SAVE(CI_TEMPSAVE)
    460 _C_LABEL(extint_call):
    461 	bl	_C_LABEL(extint_call)	/* to be filled in later */
    462 
    463 intr_exit:
    464 /* Disable interrupts */
    465 	wrteei	0
    466 	isync
    467 	GET_CPUINFO(%r5)
    468 	lwz	%r4,CI_IDEPTH(%r5)
    469 	addi	%r4,%r4,-1		/* adjust reentrancy count */
    470 	stw	%r4,CI_IDEPTH(%r5)
    471 
    472 	lwz	%r4,FRAME_SRR1(%r1)
    473 /* Returning to user mode? */
    474 	mtcr	%r4			/* saved SRR1 */
    475 	bf	MSR_PR,intrleave_to_kernel /* branch if MSR[PR] is false */
    476 
    477 	lwz	%r4,L_MD_ASTPENDING(%r13)/* Test AST pending */
    478 	andi.	%r4,%r4,1
    479 	beq	intrleave_to_user
    480 
    481 	FRAME_SAVE_CALLEE		/* save rest of callee registers */
    482 	li	%r6,EXC_AST
    483 	stw	%r6,FRAME_EXC(%r1)
    484 	mr	%r31,%r5		/* move SRR1 to R31 */
    485 	b	trapagain
    486 
    487 /*
    488  * PIT interrupt handler.
    489  */
    490 	.align	5
    491 _C_LABEL(pitint):
    492 	INTR_PROLOG(CI_TEMPSAVE)
    493 	INTR_SAVE(CI_TEMPSAVE)
    494 	addi	%r3,%r1,FRAME_CF	/* intr frame */
    495 	bl	_C_LABEL(decr_intr)
    496 	b	intr_exit
    497 
    498 /*
    499  * FIT interrupt handler.
    500  */
    501 	.align	5
    502 _C_LABEL(fitint):
    503 	INTR_PROLOG(CI_TEMPSAVE)
    504 	INTR_SAVE(CI_TEMPSAVE)
    505 	addi	%r3,%r1,FRAME_TF	/* intr frame */
    506 	bl	_C_LABEL(stat_intr)
    507 	b	intr_exit
    508 
    509 #if defined(DDB) || defined(KGDB)
    510 /*
    511  * Deliberate entry to ddbtrap
    512  */
    513 	.globl	_C_LABEL(ddb_trap)
    514 _C_LABEL(ddb_trap):
    515 	mtsprg1	%r1
    516 	GET_CPUINFO(%r4)
    517 	mfmsr	%r3
    518 	stw	%r3,CI_DDBSAVE+CPUSAVE_SRR1(%r4)
    519 	wrteei	0			/* disable interrupts */
    520 	isync
    521 	stmw	%r28,CI_DDBSAVE(%r1)
    522 	mflr	%r28
    523 	stw	%r28,CI_DDBSAVE+CPUSAVE_SRR0(%r4)
    524 	li	%r29,EXC_BPT
    525 	mtlr	%r29
    526 	mfcr	%r29
    527 
    528 /*
    529  * Now the ddb/kgdb trap catching code.
    530  */
    531 ddbtrap:
    532 	FRAME_SETUP(CI_DDBSAVE)
    533 /* Call C trap code: */
    534 	addi	%r3,%r1,FRAME_TF
    535 	bl	_C_LABEL(ddb_trap_glue)
    536 	or.	%r3,%r3,%r3
    537 	addi	%r3,%r1,FRAME_TF
    538 	beq	trapagain
    539 	b	trapexit
    540 #endif /* DDB || KGDB */
    541 
    542 #ifdef IPKDB
    543 /*
    544  * Deliberate entry to ipkdbtrap
    545  */
    546 	.globl	_C_LABEL(ipkdb_trap)
    547 _C_LABEL(ipkdb_trap):
    548 	mtsprg1	%r1
    549 	GET_CPUINFO(%r4)
    550 	mfmsr	%r3
    551 	stw	%r3,(CI_IPKDBSAVE+CPUSAVE_SRR1)(%r4)
    552 	wrteei	0			/* disable interrupts */
    553 	isync
    554 	stmw	%r28,CI_IPKDBSAVE(%r4)
    555 	mflr	%r28
    556 	stw	%r28,(CI_IPKDBSAVE+CPUSAVE_SRR0)(%r4)
    557 	li	%r29,EXC_BPT
    558 	mtlr	%r29
    559 	mfcr	%r29
    560 
    561 /*
    562  * Now the ipkdb trap catching code.
    563  */
    564 ipkdbtrap:
    565 	FRAME_SETUP(CI_IPKDBSAVE)
    566 /* Call C trap code: */
    567 	addi	%r3,%r1,FRAME_TF
    568 	bl	_C_LABEL(ipkdb_trap_glue)
    569 	or.	%r3,%r3,%r3
    570 	beq	trapagain
    571 	b	trapexit
    572 
    573 ipkdbfault:
    574 	ba	_ipkdbfault
    575 _ipkdbfault:
    576 	mfsrr0	%r3
    577 	addi	%r3,%r3,4
    578 	mtsrr0	%r3
    579 	li	%r3,-1
    580 	rfi
    581 	ba	.	/* Protect against prefetch */
    582 
    583 /*
    584  * int ipkdbfbyte(unsigned char *p)
    585  */
    586 	.globl	_C_LABEL(ipkdbfbyte)
    587 _C_LABEL(ipkdbfbyte):
    588 	li	%r9,EXC_DSI		/* establish new fault routine */
    589 	lwz	%r5,0(%r9)
    590 	lis	%r6,ipkdbfault@ha
    591 	lwz	%r6,ipkdbfault@l(%r6)
    592 	stw	%r6,0(%r9)
    593 #ifdef	IPKDBUSERHACK
    594 #ifndef PPC_IBM4XX
    595 	lis	%r8,_C_LABEL(ipkdbsr)@ha
    596 	lwz	%r8,_C_LABEL(ipkdbsr)@l(%r8)
    597 	mtsr	USER_SR,%r8
    598 	isync
    599 #endif
    600 #endif
    601 	dcbst	%r0,%r9			/* flush data... */
    602 	sync
    603 	icbi	%r0,%r9			/* and instruction caches */
    604 	lbz	%r3,0(%r3)		/* fetch data */
    605 	stw	%r5,0(%r9)		/* restore previous fault handler */
    606 	dcbst	%r0,%r9			/* and flush data... */
    607 	sync
    608 	icbi	%r0,%r9			/* and instruction caches */
    609 	blr
    610 
    611 /*
    612  * int ipkdbsbyte(unsigned char *p, int c)
    613  */
    614 	.globl	_C_LABEL(ipkdbsbyte)
    615 _C_LABEL(ipkdbsbyte):
    616 	li	%r9,EXC_DSI		/* establish new fault routine */
    617 	lwz	%r5,0(%r9)
    618 	lis	%r6,ipkdbfault@ha
    619 	lwz	%r6,ipkdbfault@l(%r6)
    620 	stw	%r6,0(%r9)
    621 #ifdef	IPKDBUSERHACK
    622 #ifndef PPC_IBM4XX
    623 	lis	%r8,_C_LABEL(ipkdbsr)@ha
    624 	lwz	%r8,_C_LABEL(ipkdbsr)@l(%r8)
    625 	mtsr	USER_SR,%r8
    626 	isync
    627 #endif
    628 #endif
    629 	dcbst	%r0,%r9			/* flush data... */
    630 	sync
    631 	icbi	%r0,%r9			/* and instruction caches */
    632 	mr	%r6,%r3
    633 	xor	%r3,%r3,%r3
    634 	stb	%r4,0(%r6)
    635 	dcbst	%r0,%r6			/* Now do appropriate flushes
    636 					   to data... */
    637 	sync
    638 	icbi	%r0,%r6			/* and instruction caches */
    639 	stw	%r5,0(%r9)		/* restore previous fault handler */
    640 	dcbst	%r0,%r9			/* and flush data... */
    641 	sync
    642 	icbi	%r0,%r9			/* and instruction caches */
    643 	blr
    644 #endif	/* IPKDB */
    645