trap_subr.S revision 1.18.6.1
1 /* $NetBSD: trap_subr.S,v 1.18.6.1 2012/02/18 07:32:53 mrg Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 40 * Copyright (C) 1995, 1996 TooLs GmbH. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by TooLs GmbH. 54 * 4. The name of TooLs GmbH may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69 /* 70 * NOTICE: This is not a standalone file. to use it, #include it in 71 * your port's locore.S, like so: 72 * 73 * #include <powerpc/ibm4xx/trap_subr.S> 74 */ 75 76 /* 77 * XXX Interrupt and spill stacks need to be per-CPU. 78 */ 79 80 #define GET_PCB(rX) \ 81 GET_CPUINFO(rX); \ 82 lwz rX,CI_CURPCB(rX) 83 84 #define STANDARD_PROLOG(savearea) \ 85 mtsprg1 %r1; /* save SP */ \ 86 GET_CPUINFO(%r1); \ 87 stmw %r28,(savearea+CPUSAVE_R28)(%r1); /* free r28-r31 */ \ 88 mflr %r28; /* save LR */ \ 89 mfcr %r29; /* save CR */ \ 90 mfsrr0 %r30; \ 91 mfsrr1 %r31; /* Test whether we already had PR set */ \ 92 stmw %r30,(savearea+CPUSAVE_SRR0)(%r1); /* save srr0/srr1 */ \ 93 mfsprg1 %r1; /* restore SP */ \ 94 mtcr %r31; \ 95 bf MSR_PR,1f; /* branch if MSR[PR] is clear */ \ 96 GET_PCB(%r1); \ 97 addi %r1,%r1,USPACE-CALLFRAMELEN; /* stack is top of user struct */ \ 98 1: 99 100 #define ACCESS_PROLOG(savearea) \ 101 mtsprg1 %r1; /* save SP temporalily */ \ 102 GET_CPUINFO(%r1); \ 103 stmw %r28,(savearea+CPUSAVE_R28)(%r1); /* free r28-r31 */ \ 104 mflr %r28; /* save LR */ \ 105 mfcr %r29; /* save CR */ \ 106 mfdear %r30; \ 107 mfesr %r31; \ 108 stmw %r30,(savearea+CPUSAVE_DEAR)(%r1); \ 109 mfsrr0 %r30; \ 110 mfsrr1 %r31; /* Test whether we already had PR set */ \ 111 stmw %r30,(savearea+CPUSAVE_SRR0)(%r1); /* save srr0/srr1 */ \ 112 mfsprg1 %r1; /* restore SP */ \ 113 mtcr %r31; \ 114 bf MSR_PR,1f; /* branch if MSR[PR] is clear */ \ 115 GET_PCB(%r1); \ 116 addi %r1,%r1,USPACE-CALLFRAMELEN; /* stack is top of user struct */ \ 117 1: 118 119 #define CRITICAL_PROLOG(savearea) \ 120 mtsprg1 %r1; /* save SP */ \ 121 GET_CPUINFO(%r1); \ 122 stmw %r28,(savearea+CPUSAVE_R28)(%r1); /* free r28-r31 */ \ 123 mflr %r28; /* save LR */ \ 124 mfcr %r29; /* save CR */ \ 125 mfsrr2 %r30; /* Fake a standard trap */ \ 126 mfsrr3 %r31; /* Test whether we already had PR set */ \ 127 stmw %r30,(savearea+CPUSAVE_SRR0)(%r1); /* save srr0/srr1 */ \ 128 mfsprg1 %r1; /* restore SP */ \ 129 mtcr %r31; \ 130 bf MSR_PR,1f; /* branch if MSR[PR] is clear */ \ 131 GET_PCB(%r1); \ 132 addi %r1,%r1,USPACE-CALLFRAMELEN; /* stack is top of user struct */ \ 133 1: 134 135 136 /* Standard handler saves r1,r28-31,LR,CR, sets up the stack and calls s_trap */ 137 #define STANDARD_EXC_HANDLER(name)\ 138 .globl _C_LABEL(name ## trap),_C_LABEL(name ## size) ; \ 139 _C_LABEL(name ## trap): \ 140 STANDARD_PROLOG(CI_TEMPSAVE); \ 141 bla s_trap; \ 142 _C_LABEL(name ## size) = .-_C_LABEL(name ## trap) 143 144 /* Access exceptions also need DEAR and ESR saved */ 145 #define ACCESS_EXC_HANDLER(name)\ 146 .globl _C_LABEL(name ## trap),_C_LABEL(name ## size) ; \ 147 _C_LABEL(name ## trap): \ 148 ACCESS_PROLOG(CI_TEMPSAVE); \ 149 bla s_trap; \ 150 _C_LABEL(name ## size) = .-_C_LABEL(name ## trap) 151 152 /* Maybe this should call ddb.... */ 153 #define CRITICAL_EXC_HANDLER(name)\ 154 .globl _C_LABEL(name ## trap),_C_LABEL(name ## size) ; \ 155 _C_LABEL(name ## trap): \ 156 CRITICAL_PROLOG(CI_TEMPSAVE); \ 157 bla s_trap; \ 158 _C_LABEL(name ## size) = .-_C_LABEL(name ## trap) 159 160 #define INTR_PROLOG(tempsave) \ 161 mtsprg1 %r1; /* save SP */ \ 162 GET_CPUINFO(%r1); \ 163 stmw %r28,(tempsave+CPUSAVE_R28)(%r1); /* free r28-r31 */ \ 164 mflr %r28; /* save LR */ \ 165 mfcr %r29; /* save CR */ \ 166 mfxer %r30; /* save XER */ \ 167 mfsrr1 %r31; \ 168 mtcr %r31; \ 169 lwz %r1,CI_INTSTK(%r1); /* get intstk */ \ 170 bt MSR_PR,1f; /* branch if PSL_PR is true */ \ 171 mfsprg1 %r1; /* yes, get old SP */ \ 172 1: 173 174 /* 175 * This code gets copied to all the trap vectors 176 * (except ISI/DSI, ALI, the interrupts, and possibly the debugging 177 * traps when using IPKDB). 178 */ 179 .text 180 STANDARD_EXC_HANDLER(default) 181 ACCESS_EXC_HANDLER(ali) 182 ACCESS_EXC_HANDLER(dsi) 183 ACCESS_EXC_HANDLER(isi) 184 STANDARD_EXC_HANDLER(debug) 185 CRITICAL_EXC_HANDLER(mchk) 186 187 /* 188 * This one for the external interrupt handler. 189 */ 190 .globl _C_LABEL(extint),_C_LABEL(extsize) 191 _C_LABEL(extint): 192 INTR_PROLOG(CI_TEMPSAVE) 193 ba extintr 194 _C_LABEL(extsize) = .-_C_LABEL(extint) 195 196 197 #if defined(DDB) || defined(KGDB) 198 /* 199 * In case of DDB we want a separate trap catcher for it 200 */ 201 .lcomm ddbstk,INTSTK,16 /* ddb stack */ 202 203 .globl _C_LABEL(ddblow),_C_LABEL(ddbsize) 204 _C_LABEL(ddblow): 205 mtsprg1 %r1 /* save SP */ 206 GET_CPUINFO(%r1) 207 stmw %r28,CI_DDBSAVE(%r1) /* free r28-r31 */ 208 mflr %r28 /* save LR */ 209 mfcr %r29 /* save CR */ 210 mfsrr0 %r30 211 mfsrr1 %r31 212 stmw %r30,(CI_DDBSAVE+CPUSAVE_SRR0)(%r1) /* save srr0/srr1 */ 213 lis %r1,ddbstk+INTSTK-CALLFRAMELEN@ha /* get new SP */ 214 addi %r1,%r1,ddbstk+INTSTK-CALLFRAMELEN@l 215 bla ddbtrap 216 _C_LABEL(ddbsize) = .-_C_LABEL(ddblow) 217 #endif /* DDB || KGDB */ 218 219 #ifdef IPKDB 220 /* 221 * In case of IPKDB we want a separate trap catcher for it 222 */ 223 224 .lcomm ipkdbstk,INTSTK,16 /* ipkdb stack */ 225 226 .globl _C_LABEL(ipkdblow),_C_LABEL(ipkdbsize) 227 _C_LABEL(ipkdblow): 228 mtsprg1 %r1 /* save SP */ 229 GET_CPUINFO(%r1) 230 stmw %r28,CI_IPKDBSAVE(%r1) /* free r28-r31 */ 231 mflr %r28 /* save LR */ 232 mfcr %r29 /* save CR */ 233 mfsrr0 %r30 234 mfsrr1 %r31 235 stmw %r30,(CI_IPKDBSAVE+CPUSAVE_SRR0)(%r1) /* save srr0/srr1 */ 236 lis %r1,ipkdbstk+INTSTK-CALLFRAMELEN@ha /* get new SP */ 237 addi %r1,%r1,ipkdbstk+INTSTK-CALLFRAMELEN@l 238 bla ipkdbtrap 239 _C_LABEL(ipkdbsize) = .-_C_LABEL(ipkdblow) 240 #endif /* IPKDB */ 241 242 #ifdef DEBUG 243 #define TRAP_IF_ZERO(r) tweqi r,0 244 #else 245 #define TRAP_IF_ZERO(r) 246 #endif 247 248 #define ENABLE_TRANSLATION(pidreg,tmpreg) \ 249 mfpid pidreg; \ 250 li tmpreg,KERNEL_PID; \ 251 mtpid tmpreg; \ 252 mfmsr tmpreg; \ 253 ori tmpreg,tmpreg,(PSL_DR|PSL_IR)@l; \ 254 mtmsr tmpreg; \ 255 isync 256 257 /* 258 * FRAME_SETUP assumes: 259 * SPRG1 SP (r1) 260 * savearea r28-r31,DEAR,ESR,SRR0,SRR1 (DEAR & ESR only for DSI traps) 261 * %r28 LR 262 * %r29 CR 263 * %r1 kernel stack 264 * LR trap type 265 */ 266 #define FRAME_SETUP(savearea) \ 267 /* Have to enable translation to allow access of kernel stack: */ \ 268 ENABLE_TRANSLATION(%r30,%r31); \ 269 mfsprg1 %r31; \ 270 stwu %r31,-FRAMELEN(%r1); \ 271 stw %r30,FRAME_PID(%r1); \ 272 stw %r0,FRAME_R0(%r1); \ 273 stw %r31,FRAME_R1(%r1); \ 274 stw %r2,FRAME_R2(%r1); \ 275 GET_CPUINFO(%r2); \ 276 stw %r28,FRAME_LR(%r1); \ 277 stw %r29,FRAME_CR(%r1); \ 278 lmw %r28,(savearea+CPUSAVE_R28)(%r2); \ 279 stmw %r3,FRAME_R3(%r1); \ 280 lmw %r28,(savearea+CPUSAVE_DEAR)(%r2); \ 281 lwz %r13,CI_CURLWP(%r2); \ 282 mfxer %r3; \ 283 mfctr %r4; \ 284 mflr %r5; \ 285 andi. %r5,%r5,0xff00; \ 286 stw %r3,FRAME_XER(%r1); \ 287 stw %r4,FRAME_CTR(%r1); \ 288 stw %r5,FRAME_EXC(%r1); \ 289 stw %r28,FRAME_DEAR(%r1); \ 290 stw %r29,FRAME_ESR(%r1); \ 291 stw %r30,FRAME_SRR0(%r1); \ 292 stw %r31,FRAME_SRR1(%r1) 293 294 #define FRAME_SAVE_CALLEE \ 295 stmw %r14,FRAME_R14(%r1) 296 297 #define FRAME_RESTORE \ 298 lwz %r6,FRAME_LR(%r1); \ 299 lwz %r7,FRAME_CR(%r1); \ 300 lwz %r8,FRAME_XER(%r1); \ 301 lwz %r9,FRAME_CTR(%r1); \ 302 lwz %r10,FRAME_SRR0(%r1); \ 303 lwz %r11,FRAME_SRR1(%r1); \ 304 mtlr %r6; \ 305 mtcr %r7; \ 306 mtxer %r8; \ 307 mtctr %r9; \ 308 mtsrr0 %r10; \ 309 mtsrr1 %r11; \ 310 lwz %r13,FRAME_R13(%r1); \ 311 lwz %r12,FRAME_R12(%r1); \ 312 lwz %r11,FRAME_R11(%r1); \ 313 lwz %r10,FRAME_R10(%r1); \ 314 lwz %r9,FRAME_R9(%r1); \ 315 lwz %r8,FRAME_R8(%r1); \ 316 lwz %r7,FRAME_R7(%r1); \ 317 lwz %r6,FRAME_R6(%r1); \ 318 lwz %r5,FRAME_R5(%r1); \ 319 lwz %r4,FRAME_R4(%r1); \ 320 lwz %r3,FRAME_R3(%r1); \ 321 lwz %r2,FRAME_R2(%r1); \ 322 lwz %r0,FRAME_R1(%r1); \ 323 mtsprg1 %r0; \ 324 lwz %r0,FRAME_R0(%r1) 325 326 /* 327 * Now the common trap catching code. 328 */ 329 s_trap: 330 FRAME_SETUP(CI_TEMPSAVE) 331 /* R31 = SRR1 */ 332 /* Now we can recover interrupts again: */ 333 trapagain: 334 wrtee %r31 /* reenable interrupts */ 335 /* Call C trap code: */ 336 addi %r3,%r1,FRAME_TF 337 bl _C_LABEL(trap) 338 .globl _C_LABEL(trapexit) 339 _C_LABEL(trapexit): 340 /* Disable interrupts: */ 341 wrteei 0 342 343 /* Test AST pending: */ 344 mtcr %r31 345 bf MSR_PR,trapleave_to_kernel /* branch if MSR[PR] is false */ 346 347 lwz %r4,L_MD_ASTPENDING(%r13) 348 andi. %r4,%r4,1 349 beq trapleave_to_user 350 351 li %r6,EXC_AST 352 stw %r6,FRAME_EXC(%r1) 353 b trapagain 354 355 trapleave_to_kernel: 356 lmw %r14, FRAME_R14(%r1) /* restore callee registers */ 357 358 intrleave_to_kernel: 359 FRAME_RESTORE /* old SP is now in sprg1 */ 360 361 mtsprg2 %r30 362 mtsprg3 %r31 363 mfmsr %r30 364 li %r31,(PSL_DR|PSL_IR)@l 365 andc %r30,%r30,%r31 366 lwz %r31,FRAME_PID(%r1) 367 TRAP_IF_ZERO(%r31) 368 /* 369 * Now that we are done with the trapframe, we can load the original SP 370 */ 371 mfsprg1 %r1 372 mtmsr %r30 /* disable translation */ 373 isync 374 mtpid %r31 375 mfsprg3 %r31 376 mfsprg2 %r30 377 rfi 378 ba . /* Protect against prefetch */ 379 380 trapleave_to_user: 381 lmw %r14, FRAME_R14(%r1) /* restore callee registers */ 382 383 intrleave_to_user: 384 /* Now restore regs: */ 385 lwz %r3,FRAME_PID(%r1) 386 lwz %r4,FRAME_SRR1(%r1) 387 bl _C_LABEL(ctx_setup) 388 TRAP_IF_ZERO(%r3) 389 stw %r3,FRAME_PID(%r1) 390 391 FRAME_RESTORE /* old SP is now in sprg1 */ 392 393 /* 394 * We are returning to userspace so we need to switch PIDs. 395 * Since the kernel executes out of what would be userspace, 396 * we need to turn off translation before we set the PID. 397 * 398 * Alterantively, we could map a kernel page at 0xfffff000 399 * that had the mtpid code in it and branch to it and avoid 400 * all this. (ba foo; foo: mtpid %r31; mfsprg3 %r31; rfi;) 401 */ 402 mtsprg2 %r30 403 mtsprg3 %r31 404 mfmsr %r30 405 li %r31,(PSL_DR|PSL_IR)@l 406 andc %r30,%r30,%r31 407 lwz %r31,FRAME_PID(%r1) 408 TRAP_IF_ZERO(%r31) 409 /* 410 * Now that we are done with the trapframe, we can load the original SP 411 */ 412 mfsprg1 %r1 413 mtmsr %r30 /* disable translation */ 414 isync 415 mtpid %r31 416 mfsprg3 %r31 417 mfsprg2 %r30 418 rfi 419 ba . /* Protect against prefetch */ 420 421 422 .globl _C_LABEL(sctrap),_C_LABEL(scsize),_C_LABEL(sctrapexit) 423 _C_LABEL(sctrap): 424 STANDARD_PROLOG(CI_TEMPSAVE) 425 bla s_sctrap 426 _C_LABEL(scsize) = .-_C_LABEL(sctrap) 427 428 s_sctrap: 429 FRAME_SETUP(CI_TEMPSAVE) 430 /* Now we can recover interrupts again: */ 431 wrteei 1 /* Enable interrupts */ 432 /* Call the appropriate syscall handler: */ 433 addi %r3,%r1,FRAME_TF 434 lwz %r4,L_PROC(%r13) 435 lwz %r4,P_MD_SYSCALL(%r4) 436 mtctr %r4 437 bctrl 438 _C_LABEL(sctrapexit): 439 b trapexit 440 441 /* 442 * External interrupt second level handler 443 */ 444 445 #define INTR_SAVE(tempsave) \ 446 /* Save non-volatile registers: */ \ 447 stwu %r1,-FRAMELEN(%r1); /* temporarily */ \ 448 stw %r0,FRAME_R0(%r1); \ 449 mfsprg1 %r0; /* get original SP */ \ 450 stw %r0,FRAME_R1(%r1); /* and store it */ \ 451 stw %r2,FRAME_R2(%r1); \ 452 stw %r3,FRAME_R3(%r1); \ 453 stw %r4,FRAME_R4(%r1); \ 454 stw %r5,FRAME_R5(%r1); \ 455 stw %r6,FRAME_R6(%r1); \ 456 stw %r7,FRAME_R7(%r1); \ 457 stw %r8,FRAME_R8(%r1); \ 458 stw %r9,FRAME_R9(%r1); \ 459 stw %r10,FRAME_R10(%r1); \ 460 stw %r11,FRAME_R11(%r1); \ 461 stw %r12,FRAME_R12(%r1); \ 462 stw %r13,FRAME_R13(%r1); \ 463 mfctr %r31; \ 464 stmw %r28,FRAME_LR(%r1); /* save LR, CR, XER, CTR */ \ 465 GET_CPUINFO(%r5); \ 466 lmw %r28,(tempsave+CPUSAVE_R28)(%r5); /* restore r28-r31 */ \ 467 lwz %r13,CI_CURLWP(%r5); \ 468 lwz %r5,CI_IDEPTH(%r5); \ 469 mfsrr0 %r4; \ 470 mfsrr1 %r3; \ 471 stw %r5,FRAME_IDEPTH(%r1); \ 472 stw %r4,FRAME_SRR0(%r1); \ 473 stw %r3,FRAME_SRR1(%r1); \ 474 /* interrupts are recoverable here, and enable translation */ \ 475 ENABLE_TRANSLATION(%r0,%r5); \ 476 stw %r0,FRAME_PID(%r1); 477 478 .globl _C_LABEL(extint_call) 479 extintr: 480 INTR_SAVE(CI_TEMPSAVE) 481 _C_LABEL(extint_call): 482 bl _C_LABEL(extint_call) /* to be filled in later */ 483 484 intr_exit: 485 /* Disable interrupts */ 486 wrteei 0 487 isync 488 GET_CPUINFO(%r5) 489 490 lwz %r4,FRAME_SRR1(%r1) 491 /* Returning to user mode? */ 492 mtcr %r4 /* saved SRR1 */ 493 bf MSR_PR,intrleave_to_kernel /* branch if MSR[PR] is false */ 494 495 lwz %r4,L_MD_ASTPENDING(%r13)/* Test AST pending */ 496 andi. %r4,%r4,1 497 beq intrleave_to_user 498 499 FRAME_SAVE_CALLEE /* save rest of callee registers */ 500 li %r6,EXC_AST 501 stw %r6,FRAME_EXC(%r1) 502 mr %r31,%r5 /* move SRR1 to R31 */ 503 b trapagain 504 505 /* 506 * PIT interrupt handler. 507 */ 508 .align 5 509 _C_LABEL(pitint): 510 INTR_PROLOG(CI_TEMPSAVE) 511 INTR_SAVE(CI_TEMPSAVE) 512 addi %r3,%r1,FRAME_CF /* clock frame */ 513 bl _C_LABEL(decr_intr) 514 b intr_exit 515 516 /* 517 * FIT interrupt handler. 518 */ 519 .align 5 520 _C_LABEL(fitint): 521 INTR_PROLOG(CI_TEMPSAVE) 522 INTR_SAVE(CI_TEMPSAVE) 523 addi %r3,%r1,FRAME_CF /* clock frame */ 524 bl _C_LABEL(stat_intr) 525 b intr_exit 526 527 #if defined(DDB) || defined(KGDB) 528 /* 529 * Deliberate entry to ddbtrap 530 */ 531 .globl _C_LABEL(ddb_trap) 532 _C_LABEL(ddb_trap): 533 mtsprg1 %r1 534 GET_CPUINFO(%r4) 535 mfmsr %r3 536 stw %r3,(CI_DDBSAVE+CPUSAVE_SRR1)(%r4) 537 wrteei 0 /* disable interrupts */ 538 isync 539 stmw %r28,CI_DDBSAVE(%r4) 540 mflr %r28 541 stw %r28,(CI_DDBSAVE+CPUSAVE_SRR0)(%r4) 542 li %r29,EXC_BPT 543 mtlr %r29 544 mfcr %r29 545 546 /* 547 * Now the ddb/kgdb trap catching code. 548 */ 549 ddbtrap: 550 FRAME_SETUP(CI_DDBSAVE) 551 /* Call C trap code: */ 552 addi %r3,%r1,FRAME_TF 553 bl _C_LABEL(ddb_trap_glue) 554 or. %r3,%r3,%r3 555 beq trapagain 556 b trapexit 557 #endif /* DDB || KGDB */ 558 559 #ifdef IPKDB 560 /* 561 * Deliberate entry to ipkdbtrap 562 */ 563 .globl _C_LABEL(ipkdb_trap) 564 _C_LABEL(ipkdb_trap): 565 mtsprg1 %r1 566 GET_CPUINFO(%r4) 567 mfmsr %r3 568 stw %r3,(CI_IPKDBSAVE+CPUSAVE_SRR1)(%r4) 569 wrteei 0 /* disable interrupts */ 570 isync 571 stmw %r28,CI_IPKDBSAVE(%r4) 572 mflr %r28 573 stw %r28,(CI_IPKDBSAVE+CPUSAVE_SRR0)(%r4) 574 li %r29,EXC_BPT 575 mtlr %r29 576 mfcr %r29 577 578 /* 579 * Now the ipkdb trap catching code. 580 */ 581 ipkdbtrap: 582 FRAME_SETUP(CI_IPKDBSAVE) 583 /* Call C trap code: */ 584 addi %r3,%r1,FRAME_TF 585 bl _C_LABEL(ipkdb_trap_glue) 586 or. %r3,%r3,%r3 587 beq trapagain 588 b trapexit 589 590 ipkdbfault: 591 ba _ipkdbfault 592 _ipkdbfault: 593 mfsrr0 %r3 594 addi %r3,%r3,4 595 mtsrr0 %r3 596 li %r3,-1 597 rfi 598 ba . /* Protect against prefetch */ 599 600 /* 601 * int ipkdbfbyte(unsigned char *p) 602 */ 603 .globl _C_LABEL(ipkdbfbyte) 604 _C_LABEL(ipkdbfbyte): 605 li %r9,EXC_DSI /* establish new fault routine */ 606 lwz %r5,0(%r9) 607 lis %r6,ipkdbfault@ha 608 lwz %r6,ipkdbfault@l(%r6) 609 stw %r6,0(%r9) 610 #ifdef IPKDBUSERHACK 611 #ifndef PPC_IBM4XX 612 lis %r8,_C_LABEL(ipkdbsr)@ha 613 lwz %r8,_C_LABEL(ipkdbsr)@l(%r8) 614 mtsr USER_SR,%r8 615 isync 616 #endif 617 #endif 618 dcbst %r0,%r9 /* flush data... */ 619 sync 620 icbi %r0,%r9 /* and instruction caches */ 621 lbz %r3,0(%r3) /* fetch data */ 622 stw %r5,0(%r9) /* restore previous fault handler */ 623 dcbst %r0,%r9 /* and flush data... */ 624 sync 625 icbi %r0,%r9 /* and instruction caches */ 626 blr 627 628 /* 629 * int ipkdbsbyte(unsigned char *p, int c) 630 */ 631 .globl _C_LABEL(ipkdbsbyte) 632 _C_LABEL(ipkdbsbyte): 633 li %r9,EXC_DSI /* establish new fault routine */ 634 lwz %r5,0(%r9) 635 lis %r6,ipkdbfault@ha 636 lwz %r6,ipkdbfault@l(%r6) 637 stw %r6,0(%r9) 638 #ifdef IPKDBUSERHACK 639 #ifndef PPC_IBM4XX 640 lis %r8,_C_LABEL(ipkdbsr)@ha 641 lwz %r8,_C_LABEL(ipkdbsr)@l(%r8) 642 mtsr USER_SR,%r8 643 isync 644 #endif 645 #endif 646 dcbst %r0,%r9 /* flush data... */ 647 sync 648 icbi %r0,%r9 /* and instruction caches */ 649 mr %r6,%r3 650 xor %r3,%r3,%r3 651 stb %r4,0(%r6) 652 dcbst %r0,%r6 /* Now do appropriate flushes 653 to data... */ 654 sync 655 icbi %r0,%r6 /* and instruction caches */ 656 stw %r5,0(%r9) /* restore previous fault handler */ 657 dcbst %r0,%r9 /* and flush data... */ 658 sync 659 icbi %r0,%r9 /* and instruction caches */ 660 blr 661 #endif /* IPKDB */ 662
Indexes created Tue Sep 30 20:09:53 GMT 2025