trap_subr.S revision 1.24.18.1
1 /* $NetBSD: trap_subr.S,v 1.24.18.1 2017/01/07 08:56:24 pgoyette Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 40 * Copyright (C) 1995, 1996 TooLs GmbH. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by TooLs GmbH. 54 * 4. The name of TooLs GmbH may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69 /* 70 * NOTICE: This is not a standalone file. to use it, #include it in 71 * your port's locore.S, like so: 72 * 73 * #include <powerpc/ibm4xx/trap_subr.S> 74 */ 75 76 /* 77 * XXX Interrupt and spill stacks need to be per-CPU. 78 */ 79 80 #define GET_PCB(rX) \ 81 GET_CPUINFO(rX); \ 82 lwz rX,CI_CURPCB(rX) 83 84 #define STANDARD_PROLOG(savearea) \ 85 mtsprg1 %r1; /* save SP */ \ 86 GET_CPUINFO(%r1); \ 87 stmw %r28,(savearea+CPUSAVE_R28)(%r1); /* free r28-r31 */ \ 88 mflr %r28; /* save LR */ \ 89 mfcr %r29; /* save CR */ \ 90 mfsrr0 %r30; \ 91 mfsrr1 %r31; /* Test whether we already had PR set */ \ 92 stmw %r30,(savearea+CPUSAVE_SRR0)(%r1); /* save srr0/srr1 */ \ 93 mfsprg1 %r1; /* restore SP */ \ 94 mtcr %r31; \ 95 bf MSR_PR,1f; /* branch if MSR[PR] is clear */ \ 96 GET_PCB(%r1); \ 97 addi %r1,%r1,USPACE-CALLFRAMELEN; /* stack is top of user struct */ \ 98 1: 99 100 #define ACCESS_PROLOG(savearea) \ 101 mtsprg1 %r1; /* save SP temporalily */ \ 102 GET_CPUINFO(%r1); \ 103 stmw %r28,(savearea+CPUSAVE_R28)(%r1); /* free r28-r31 */ \ 104 mflr %r28; /* save LR */ \ 105 mfcr %r29; /* save CR */ \ 106 mfdear %r30; \ 107 mfesr %r31; \ 108 stmw %r30,(savearea+CPUSAVE_DEAR)(%r1); /* save esr/dear */ \ 109 mfsrr0 %r30; \ 110 mfsrr1 %r31; /* Test whether we already had PR set */ \ 111 stmw %r30,(savearea+CPUSAVE_SRR0)(%r1); /* save srr0/srr1 */ \ 112 mfsprg1 %r1; /* restore SP */ \ 113 mtcr %r31; \ 114 bf MSR_PR,1f; /* branch if MSR[PR] is clear */ \ 115 GET_PCB(%r1); \ 116 addi %r1,%r1,USPACE-CALLFRAMELEN; /* stack is top of user struct */ \ 117 1: 118 119 #define CRITICAL_PROLOG(savearea) \ 120 mtsprg1 %r1; /* save SP */ \ 121 GET_CPUINFO(%r1); \ 122 stmw %r28,(savearea+CPUSAVE_R28)(%r1); /* free r28-r31 */ \ 123 mflr %r28; /* save LR */ \ 124 mfcr %r29; /* save CR */ \ 125 mfsrr2 %r30; /* Fake a standard trap */ \ 126 mfsrr3 %r31; /* Test whether we already had PR set */ \ 127 stmw %r30,(savearea+CPUSAVE_SRR0)(%r1); /* save srr0/srr1 */ \ 128 mfsprg1 %r1; /* restore SP */ \ 129 mtcr %r31; \ 130 bf MSR_PR,1f; /* branch if MSR[PR] is clear */ \ 131 GET_PCB(%r1); \ 132 addi %r1,%r1,USPACE-CALLFRAMELEN; /* stack is top of user struct */ \ 133 1: 134 135 136 /* Standard handler saves r1,r28-31,LR,CR, sets up the stack and calls s_trap */ 137 #define STANDARD_EXC_HANDLER(name)\ 138 .globl _C_LABEL(name ## trap),_C_LABEL(name ## size) ; \ 139 _C_LABEL(name ## trap): \ 140 STANDARD_PROLOG(CI_TEMPSAVE); \ 141 bla s_trap; \ 142 _C_LABEL(name ## size) = .-_C_LABEL(name ## trap) 143 144 /* Access exceptions also need DEAR and ESR saved */ 145 #define ACCESS_EXC_HANDLER(name)\ 146 .globl _C_LABEL(name ## trap),_C_LABEL(name ## size) ; \ 147 _C_LABEL(name ## trap): \ 148 ACCESS_PROLOG(CI_TEMPSAVE); \ 149 bla s_trap; \ 150 _C_LABEL(name ## size) = .-_C_LABEL(name ## trap) 151 152 /* Maybe this should call ddb.... */ 153 #define CRITICAL_EXC_HANDLER(name)\ 154 .globl _C_LABEL(name ## trap),_C_LABEL(name ## size) ; \ 155 _C_LABEL(name ## trap): \ 156 CRITICAL_PROLOG(CI_TEMPSAVE); \ 157 bla s_trap; \ 158 _C_LABEL(name ## size) = .-_C_LABEL(name ## trap) 159 160 #define INTR_PROLOG(tempsave) \ 161 mtsprg1 %r1; /* save SP */ \ 162 GET_CPUINFO(%r1); \ 163 stmw %r28,(tempsave+CPUSAVE_R28)(%r1); /* free r28-r31 */ \ 164 mflr %r28; /* save LR */ \ 165 mfcr %r29; /* save CR */ \ 166 mfxer %r30; /* save XER */ \ 167 mfsrr1 %r31; \ 168 mtcr %r31; \ 169 mfsprg1 %r1; /* restore SP */ \ 170 bf MSR_PR,1f; /* branch if PSL_PR is false */ \ 171 GET_PCB(%r1); \ 172 addi %r1,%r1,USPACE-CALLFRAMELEN; /* stack is top of user struct */ \ 173 1: 174 175 .text 176 STANDARD_EXC_HANDLER(default) 177 ACCESS_EXC_HANDLER(access) 178 CRITICAL_EXC_HANDLER(critical) 179 180 /* 181 * This one for the external interrupt handler. 182 */ 183 .globl _C_LABEL(extint),_C_LABEL(extsize) 184 _C_LABEL(extint): 185 INTR_PROLOG(CI_TEMPSAVE) 186 ba extintr 187 _C_LABEL(extsize) = .-_C_LABEL(extint) 188 189 190 #if defined(DDB) || defined(KGDB) 191 /* 192 * In case of DDB we want a separate trap catcher for it 193 */ 194 .globl _C_LABEL(ddblow),_C_LABEL(ddbsize) 195 _C_LABEL(ddblow): 196 ACCESS_PROLOG(CI_DDBSAVE) 197 bla ddbtrap 198 _C_LABEL(ddbsize) = .-_C_LABEL(ddblow) 199 #endif /* DDB || KGDB */ 200 201 #ifdef IPKDB 202 /* 203 * In case of IPKDB we want a separate trap catcher for it 204 */ 205 .globl _C_LABEL(ipkdblow),_C_LABEL(ipkdbsize) 206 _C_LABEL(ipkdblow): 207 ACCESS_PROLOG(CI_IPKDBSAVE) 208 bla ipkdbtrap 209 _C_LABEL(ipkdbsize) = .-_C_LABEL(ipkdblow) 210 #endif /* IPKDB */ 211 212 #ifdef DEBUG 213 #define TRAP_IF_ZERO(r) tweqi r,0 214 #else 215 #define TRAP_IF_ZERO(r) 216 #endif 217 218 #define ENABLE_TRANSLATION(pidreg,tmpreg) \ 219 mfpid pidreg; \ 220 li tmpreg,KERNEL_PID; \ 221 mtpid tmpreg; \ 222 mfmsr tmpreg; \ 223 ori tmpreg,tmpreg,(PSL_DR|PSL_IR)@l; \ 224 mtmsr tmpreg; \ 225 isync 226 227 /* 228 * FRAME_SETUP assumes: 229 * SPRG1 SP (r1) 230 * savearea r28-r31,DEAR,ESR,SRR0,SRR1 231 * (DEAR & ESR only for access traps) 232 * %r28 LR 233 * %r29 CR 234 * %r1 kernel stack 235 * LR trap type 236 */ 237 #define FRAME_SETUP(savearea) \ 238 /* Have to enable translation to allow access of kernel stack: */ \ 239 ENABLE_TRANSLATION(%r30,%r31); \ 240 mfsprg1 %r31; \ 241 stwu %r31,-FRAMELEN(%r1); \ 242 stw %r30,FRAME_PID(%r1); \ 243 stw %r0,FRAME_R0(%r1); \ 244 stw %r31,FRAME_R1(%r1); \ 245 stw %r2,FRAME_R2(%r1); \ 246 GET_CPUINFO(%r2); \ 247 stw %r28,FRAME_LR(%r1); \ 248 stw %r29,FRAME_CR(%r1); \ 249 lmw %r28,(savearea+CPUSAVE_R28)(%r2); \ 250 stmw %r3,FRAME_R3(%r1); \ 251 lmw %r28,(savearea+CPUSAVE_DEAR)(%r2); \ 252 lwz %r13,CI_CURLWP(%r2); \ 253 mfxer %r3; \ 254 mfctr %r4; \ 255 mflr %r5; \ 256 andi. %r5,%r5,0xff00; \ 257 stw %r3,FRAME_XER(%r1); \ 258 stw %r4,FRAME_CTR(%r1); \ 259 stw %r5,FRAME_EXC(%r1); \ 260 stw %r28,FRAME_DEAR(%r1); \ 261 stw %r29,FRAME_ESR(%r1); \ 262 stw %r30,FRAME_SRR0(%r1); \ 263 stw %r31,FRAME_SRR1(%r1) 264 265 #define FRAME_SAVE_CALLEE \ 266 stmw %r14,FRAME_R14(%r1) 267 268 #define FRAME_RESTORE \ 269 lwz %r6,FRAME_LR(%r1); \ 270 lwz %r7,FRAME_CR(%r1); \ 271 lwz %r8,FRAME_XER(%r1); \ 272 lwz %r9,FRAME_CTR(%r1); \ 273 lwz %r10,FRAME_SRR0(%r1); \ 274 lwz %r11,FRAME_SRR1(%r1); \ 275 mtlr %r6; \ 276 mtcr %r7; \ 277 mtxer %r8; \ 278 mtctr %r9; \ 279 mtsrr0 %r10; \ 280 mtsrr1 %r11; \ 281 lwz %r13,FRAME_R13(%r1); \ 282 lwz %r12,FRAME_R12(%r1); \ 283 lwz %r11,FRAME_R11(%r1); \ 284 lwz %r10,FRAME_R10(%r1); \ 285 lwz %r9,FRAME_R9(%r1); \ 286 lwz %r8,FRAME_R8(%r1); \ 287 lwz %r7,FRAME_R7(%r1); \ 288 lwz %r6,FRAME_R6(%r1); \ 289 lwz %r5,FRAME_R5(%r1); \ 290 lwz %r4,FRAME_R4(%r1); \ 291 lwz %r3,FRAME_R3(%r1); \ 292 lwz %r2,FRAME_R2(%r1); \ 293 lwz %r0,FRAME_R1(%r1); \ 294 mtsprg1 %r0; \ 295 lwz %r0,FRAME_R0(%r1) 296 297 /* 298 * Now the common trap catching code. 299 */ 300 s_trap: 301 FRAME_SETUP(CI_TEMPSAVE) 302 /* R31 = SRR1 */ 303 /* Now we can recover interrupts again: */ 304 trapagain: 305 wrtee %r31 /* reenable interrupts */ 306 /* Call C trap code: */ 307 addi %r3,%r1,FRAME_TF 308 bl _C_LABEL(trap) 309 .globl _C_LABEL(trapexit) 310 _C_LABEL(trapexit): 311 /* Disable interrupts: */ 312 wrteei 0 313 314 /* Test AST pending: */ 315 mtcr %r31 316 bf MSR_PR,trapleave_to_kernel /* branch if MSR[PR] is false */ 317 318 lwz %r4,L_MD_ASTPENDING(%r13) 319 andi. %r4,%r4,1 320 beq trapleave_to_user 321 322 li %r6,EXC_AST 323 stw %r6,FRAME_EXC(%r1) 324 b trapagain 325 326 trapleave_to_kernel: 327 lmw %r14, FRAME_R14(%r1) /* restore callee registers */ 328 329 intrleave_to_kernel: 330 FRAME_RESTORE /* old SP is now in sprg1 */ 331 332 mtsprg2 %r30 333 mtsprg3 %r31 334 mfmsr %r30 335 li %r31,(PSL_DR|PSL_IR)@l 336 andc %r30,%r30,%r31 337 lwz %r31,FRAME_PID(%r1) 338 TRAP_IF_ZERO(%r31) 339 /* 340 * Now that we are done with the trapframe, we can load the original SP 341 */ 342 mfsprg1 %r1 343 mtmsr %r30 /* disable translation */ 344 isync 345 mtpid %r31 346 mfsprg3 %r31 347 mfsprg2 %r30 348 rfi 349 ba . /* Protect against prefetch */ 350 351 trapleave_to_user: 352 lmw %r14, FRAME_R14(%r1) /* restore callee registers */ 353 354 intrleave_to_user: 355 /* Now restore regs: */ 356 lwz %r3,FRAME_PID(%r1) 357 lwz %r4,FRAME_SRR1(%r1) 358 bl _C_LABEL(ctx_setup) 359 TRAP_IF_ZERO(%r3) 360 stw %r3,FRAME_PID(%r1) 361 362 FRAME_RESTORE /* old SP is now in sprg1 */ 363 364 /* 365 * We are returning to userspace so we need to switch PIDs. 366 * Since the kernel executes out of what would be userspace, 367 * we need to turn off translation before we set the PID. 368 * 369 * Alterantively, we could map a kernel page at 0xfffff000 370 * that had the mtpid code in it and branch to it and avoid 371 * all this. (ba foo; foo: mtpid %r31; mfsprg3 %r31; rfi;) 372 */ 373 mtsprg2 %r30 374 mtsprg3 %r31 375 mfmsr %r30 376 li %r31,(PSL_DR|PSL_IR)@l 377 andc %r30,%r30,%r31 378 lwz %r31,FRAME_PID(%r1) 379 TRAP_IF_ZERO(%r31) 380 /* 381 * Now that we are done with the trapframe, we can load the original SP 382 */ 383 mfsprg1 %r1 384 mtmsr %r30 /* disable translation */ 385 isync 386 mtpid %r31 387 mfsprg3 %r31 388 mfsprg2 %r30 389 rfi 390 ba . /* Protect against prefetch */ 391 392 393 .globl _C_LABEL(sctrap),_C_LABEL(scsize),_C_LABEL(sctrapexit) 394 _C_LABEL(sctrap): 395 STANDARD_PROLOG(CI_TEMPSAVE) 396 bla s_sctrap 397 _C_LABEL(scsize) = .-_C_LABEL(sctrap) 398 399 s_sctrap: 400 FRAME_SETUP(CI_TEMPSAVE) 401 /* Now we can recover interrupts again: */ 402 wrteei 1 /* Enable interrupts */ 403 /* Call the appropriate syscall handler: */ 404 addi %r3,%r1,FRAME_TF 405 lwz %r4,L_PROC(%r13) 406 lwz %r4,P_MD_SYSCALL(%r4) 407 mtctr %r4 408 bctrl 409 _C_LABEL(sctrapexit): 410 b trapexit 411 412 /* 413 * External interrupt second level handler 414 */ 415 416 #define INTR_SAVE(tempsave) \ 417 /* Save non-volatile registers: */ \ 418 stwu %r1,-FRAMELEN(%r1); /* temporarily */ \ 419 stw %r0,FRAME_R0(%r1); \ 420 mfsprg1 %r0; /* get original SP */ \ 421 stw %r0,FRAME_R1(%r1); /* and store it */ \ 422 stw %r2,FRAME_R2(%r1); \ 423 stw %r3,FRAME_R3(%r1); \ 424 stw %r4,FRAME_R4(%r1); \ 425 stw %r5,FRAME_R5(%r1); \ 426 stw %r6,FRAME_R6(%r1); \ 427 stw %r7,FRAME_R7(%r1); \ 428 stw %r8,FRAME_R8(%r1); \ 429 stw %r9,FRAME_R9(%r1); \ 430 stw %r10,FRAME_R10(%r1); \ 431 stw %r11,FRAME_R11(%r1); \ 432 stw %r12,FRAME_R12(%r1); \ 433 stw %r13,FRAME_R13(%r1); \ 434 mfctr %r31; \ 435 stmw %r28,FRAME_LR(%r1); /* save LR, CR, XER, CTR */ \ 436 GET_CPUINFO(%r5); \ 437 lmw %r28,(tempsave+CPUSAVE_R28)(%r5); /* restore r28-r31 */ \ 438 lwz %r13,CI_CURLWP(%r5); \ 439 lwz %r5,CI_IDEPTH(%r5); \ 440 mfsrr0 %r4; \ 441 mfsrr1 %r3; \ 442 stw %r5,FRAME_IDEPTH(%r1); \ 443 stw %r4,FRAME_SRR0(%r1); \ 444 stw %r3,FRAME_SRR1(%r1); \ 445 /* interrupts are recoverable here, and enable translation */ \ 446 ENABLE_TRANSLATION(%r0,%r5); \ 447 stw %r0,FRAME_PID(%r1); 448 449 .globl _C_LABEL(extint_call) 450 extintr: 451 INTR_SAVE(CI_TEMPSAVE) 452 _C_LABEL(extint_call): 453 bl _C_LABEL(extint_call) /* to be filled in later */ 454 455 intr_exit: 456 /* Disable interrupts */ 457 wrteei 0 458 isync 459 460 lwz %r4,FRAME_SRR1(%r1) 461 /* Returning to user mode? */ 462 mtcr %r4 /* saved SRR1 */ 463 bf MSR_PR,intrleave_to_kernel /* branch if MSR[PR] is false */ 464 465 lwz %r4,L_MD_ASTPENDING(%r13)/* Test AST pending */ 466 andi. %r4,%r4,1 467 beq intrleave_to_user 468 469 FRAME_SAVE_CALLEE /* save rest of callee registers */ 470 li %r6,EXC_AST 471 stw %r6,FRAME_EXC(%r1) 472 lwz %r31,FRAME_SRR1(%r1) /* move SRR1 to R31 */ 473 b trapagain 474 475 /* 476 * PIT interrupt handler. 477 */ 478 .align 5 479 _C_LABEL(pitint): 480 INTR_PROLOG(CI_TEMPSAVE) 481 INTR_SAVE(CI_TEMPSAVE) 482 addi %r3,%r1,FRAME_CF /* clock frame */ 483 bl _C_LABEL(decr_intr) 484 b intr_exit 485 486 /* 487 * FIT interrupt handler. 488 */ 489 .align 5 490 _C_LABEL(fitint): 491 INTR_PROLOG(CI_TEMPSAVE) 492 INTR_SAVE(CI_TEMPSAVE) 493 addi %r3,%r1,FRAME_CF /* clock frame */ 494 bl _C_LABEL(stat_intr) 495 b intr_exit 496 497 #if defined(DDB) || defined(KGDB) 498 /* 499 * Deliberate entry to ddbtrap 500 */ 501 .globl _C_LABEL(ddb_trap) 502 _C_LABEL(ddb_trap): 503 mtsprg1 %r1 504 GET_CPUINFO(%r4) 505 mfmsr %r3 506 stw %r3,(CI_DDBSAVE+CPUSAVE_SRR1)(%r4) 507 wrteei 0 /* disable interrupts */ 508 isync 509 stmw %r28,CI_DDBSAVE(%r4) 510 mflr %r28 511 stw %r28,(CI_DDBSAVE+CPUSAVE_SRR0)(%r4) 512 li %r29,EXC_BPT 513 mtlr %r29 514 mfcr %r29 515 516 /* 517 * Now the ddb/kgdb trap catching code. 518 */ 519 ddbtrap: 520 FRAME_SETUP(CI_DDBSAVE) 521 /* Call C trap code: */ 522 addi %r3,%r1,FRAME_TF 523 bl _C_LABEL(ddb_trap_glue) 524 or. %r3,%r3,%r3 525 beq trapagain 526 b trapexit 527 #endif /* DDB || KGDB */ 528 529 #ifdef IPKDB 530 /* 531 * Deliberate entry to ipkdbtrap 532 */ 533 .globl _C_LABEL(ipkdb_trap) 534 _C_LABEL(ipkdb_trap): 535 mtsprg1 %r1 536 GET_CPUINFO(%r4) 537 mfmsr %r3 538 stw %r3,(CI_IPKDBSAVE+CPUSAVE_SRR1)(%r4) 539 wrteei 0 /* disable interrupts */ 540 isync 541 stmw %r28,CI_IPKDBSAVE(%r4) 542 mflr %r28 543 stw %r28,(CI_IPKDBSAVE+CPUSAVE_SRR0)(%r4) 544 li %r29,EXC_BPT 545 mtlr %r29 546 mfcr %r29 547 548 /* 549 * Now the ipkdb trap catching code. 550 */ 551 ipkdbtrap: 552 FRAME_SETUP(CI_IPKDBSAVE) 553 /* Call C trap code: */ 554 addi %r3,%r1,FRAME_TF 555 bl _C_LABEL(ipkdb_trap_glue) 556 or. %r3,%r3,%r3 557 beq trapagain 558 b trapexit 559 560 ipkdbfault: 561 ba _ipkdbfault 562 _ipkdbfault: 563 mfsrr0 %r3 564 addi %r3,%r3,4 565 mtsrr0 %r3 566 li %r3,-1 567 rfi 568 ba . /* Protect against prefetch */ 569 570 /* 571 * int ipkdbfbyte(unsigned char *p) 572 */ 573 .globl _C_LABEL(ipkdbfbyte) 574 _C_LABEL(ipkdbfbyte): 575 li %r9,EXC_DSI /* establish new fault routine */ 576 lwz %r5,0(%r9) 577 lis %r6,ipkdbfault@ha 578 lwz %r6,ipkdbfault@l(%r6) 579 stw %r6,0(%r9) 580 #ifdef IPKDBUSERHACK 581 #ifndef PPC_IBM4XX 582 lis %r8,_C_LABEL(ipkdbsr)@ha 583 lwz %r8,_C_LABEL(ipkdbsr)@l(%r8) 584 mtsr USER_SR,%r8 585 isync 586 #endif 587 #endif 588 dcbst %r0,%r9 /* flush data... */ 589 sync 590 icbi %r0,%r9 /* and instruction caches */ 591 lbz %r3,0(%r3) /* fetch data */ 592 stw %r5,0(%r9) /* restore previous fault handler */ 593 dcbst %r0,%r9 /* and flush data... */ 594 sync 595 icbi %r0,%r9 /* and instruction caches */ 596 blr 597 598 /* 599 * int ipkdbsbyte(unsigned char *p, int c) 600 */ 601 .globl _C_LABEL(ipkdbsbyte) 602 _C_LABEL(ipkdbsbyte): 603 li %r9,EXC_DSI /* establish new fault routine */ 604 lwz %r5,0(%r9) 605 lis %r6,ipkdbfault@ha 606 lwz %r6,ipkdbfault@l(%r6) 607 stw %r6,0(%r9) 608 #ifdef IPKDBUSERHACK 609 #ifndef PPC_IBM4XX 610 lis %r8,_C_LABEL(ipkdbsr)@ha 611 lwz %r8,_C_LABEL(ipkdbsr)@l(%r8) 612 mtsr USER_SR,%r8 613 isync 614 #endif 615 #endif 616 dcbst %r0,%r9 /* flush data... */ 617 sync 618 icbi %r0,%r9 /* and instruction caches */ 619 mr %r6,%r3 620 xor %r3,%r3,%r3 621 stb %r4,0(%r6) 622 dcbst %r0,%r6 /* Now do appropriate flushes 623 to data... */ 624 sync 625 icbi %r0,%r6 /* and instruction caches */ 626 stw %r5,0(%r9) /* restore previous fault handler */ 627 dcbst %r0,%r9 /* and flush data... */ 628 sync 629 icbi %r0,%r9 /* and instruction caches */ 630 blr 631 #endif /* IPKDB */ 632
Indexes created Tue Sep 30 20:09:53 GMT 2025