cpuvar.h revision 1.5.4.1 1 1.5.4.1 cherry /* $NetBSD: cpuvar.h,v 1.5.4.1 2011/06/23 14:19:31 cherry Exp $ */
2 1.2 matt /*-
3 1.2 matt * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4 1.2 matt * All rights reserved.
5 1.2 matt *
6 1.2 matt * This code is derived from software contributed to The NetBSD Foundation
7 1.2 matt * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
8 1.2 matt * Agency and which was developed by Matt Thomas of 3am Software Foundry.
9 1.2 matt *
10 1.2 matt * This material is based upon work supported by the Defense Advanced Research
11 1.2 matt * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
12 1.2 matt * Contract No. N66001-09-C-2073.
13 1.2 matt * Approved for Public Release, Distribution Unlimited
14 1.2 matt *
15 1.2 matt * Redistribution and use in source and binary forms, with or without
16 1.2 matt * modification, are permitted provided that the following conditions
17 1.2 matt * are met:
18 1.2 matt * 1. Redistributions of source code must retain the above copyright
19 1.2 matt * notice, this list of conditions and the following disclaimer.
20 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
21 1.2 matt * notice, this list of conditions and the following disclaimer in the
22 1.2 matt * documentation and/or other materials provided with the distribution.
23 1.2 matt *
24 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 1.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 1.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 1.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 1.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 1.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 1.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 1.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 1.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 1.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 1.2 matt * POSSIBILITY OF SUCH DAMAGE.
35 1.2 matt */
36 1.2 matt
37 1.2 matt #ifndef _POWERPC_BOOKE_CPUVAR_H_
38 1.2 matt #define _POWERPC_BOOKE_CPUVAR_H_
39 1.2 matt
40 1.5.4.1 cherry #include <sys/bus.h>
41 1.2 matt #include <prop/proplib.h>
42 1.5.4.1 cherry #include <powerpc/psl.h>
43 1.2 matt
44 1.2 matt struct cpunode_softc {
45 1.2 matt device_t sc_dev;
46 1.2 matt u_int sc_children;
47 1.2 matt };
48 1.2 matt
49 1.2 matt struct cpu_softc {
50 1.2 matt struct cpu_info *cpu_ci;
51 1.2 matt struct evcnt *cpu_evcnt_intrs;
52 1.2 matt bus_space_tag_t cpu_bst;
53 1.4 matt bus_space_tag_t cpu_le_bst;
54 1.2 matt bus_space_handle_t cpu_bsh;
55 1.2 matt bus_addr_t cpu_clock_gtbcr;
56 1.2 matt
57 1.4 matt paddr_t cpu_highmem;
58 1.4 matt
59 1.2 matt u_int cpu_pcpls[5];
60 1.2 matt struct evcnt cpu_evcnt_spurious_intr;
61 1.2 matt
62 1.2 matt struct evcnt cpu_ev_late_clock;
63 1.2 matt u_long cpu_ticks_per_clock_intr;
64 1.2 matt struct evcnt cpu_ev_exec_trap_sync;
65 1.2 matt };
66 1.2 matt
67 1.2 matt struct cpunode_locators {
68 1.2 matt const char *cnl_name;
69 1.2 matt bus_addr_t cnl_addr;
70 1.2 matt bus_size_t cnl_size;
71 1.2 matt uint8_t cnl_instance;
72 1.2 matt uint8_t cnl_nintr;
73 1.2 matt uint8_t cnl_intrs[4];
74 1.2 matt uint32_t cnl_flags;
75 1.3 matt uint16_t cnl_ids[6];
76 1.2 matt };
77 1.2 matt
78 1.2 matt struct cpunode_attach_args {
79 1.2 matt const char *cna_busname;
80 1.2 matt bus_space_tag_t cna_memt;
81 1.4 matt bus_space_tag_t cna_le_memt;
82 1.2 matt bus_dma_tag_t cna_dmat;
83 1.2 matt struct cpunode_locators cna_locs;
84 1.2 matt u_int cna_childmask;
85 1.2 matt };
86 1.2 matt
87 1.2 matt struct mainbus_attach_args {
88 1.2 matt const char *ma_name;
89 1.2 matt bus_space_tag_t ma_memt;
90 1.4 matt bus_space_tag_t ma_le_memt;
91 1.2 matt bus_dma_tag_t ma_dmat;
92 1.2 matt int ma_node;
93 1.2 matt };
94 1.2 matt
95 1.2 matt struct generic_attach_args {
96 1.2 matt const char *ga_name;
97 1.2 matt bus_space_tag_t ga_bst;
98 1.2 matt bus_dma_tag_t ga_dmat;
99 1.2 matt bus_addr_t ga_addr;
100 1.2 matt bus_size_t ga_size;
101 1.2 matt int ga_cs;
102 1.2 matt int ga_irq;
103 1.2 matt };
104 1.2 matt
105 1.2 matt struct tlbmask;
106 1.2 matt
107 1.2 matt struct tlb_md_ops {
108 1.2 matt /*
109 1.2 matt * We need mapiodev to be first so we can easily override it in
110 1.2 matt * early boot by doing cpu_md_ops.tlb_md_ops = (const struct
111 1.2 matt * tlb_md_ops *) &<variable containing mapiodev pointer>.
112 1.2 matt */
113 1.2 matt void *(*md_tlb_mapiodev)(paddr_t, psize_t);
114 1.2 matt void (*md_tlb_unmapiodev)(vaddr_t, vsize_t);
115 1.2 matt void (*md_tlb_set_asid)(uint32_t);
116 1.2 matt uint32_t (*md_tlb_get_asid)(void);
117 1.2 matt void (*md_tlb_invalidate_all)(void);
118 1.2 matt void (*md_tlb_invalidate_globals)(void);
119 1.2 matt void (*md_tlb_invalidate_asids)(uint32_t, uint32_t);
120 1.2 matt void (*md_tlb_invalidate_addr)(vaddr_t, uint32_t);
121 1.2 matt bool (*md_tlb_update_addr)(vaddr_t, uint32_t, uint32_t, bool);
122 1.2 matt void (*md_tlb_read_entry)(size_t, struct tlbmask *);
123 1.2 matt u_int (*md_tlb_record_asids)(u_long *, uint32_t);
124 1.2 matt int (*md_tlb_ioreserve)(vaddr_t, vsize_t, uint32_t);
125 1.2 matt int (*md_tlb_iorelease)(vaddr_t);
126 1.2 matt void (*md_tlb_dump)(void (*)(const char *, ...));
127 1.2 matt void (*md_tlb_walk)(void *, bool (*)(void *, vaddr_t, uint32_t,
128 1.2 matt uint32_t));
129 1.2 matt };
130 1.2 matt
131 1.2 matt struct cpu_md_ops {
132 1.2 matt const struct cpunode_locators *md_cpunode_locs;
133 1.2 matt void (*md_cpu_attach)(device_t, u_int);
134 1.2 matt
135 1.2 matt void (*md_device_register)(device_t, void *);
136 1.2 matt void (*md_cpu_startup)(void);
137 1.2 matt void (*md_cpu_reset)(void);
138 1.2 matt void (*md_cpunode_attach)(device_t, device_t, void *);
139 1.2 matt
140 1.2 matt const struct tlb_md_ops *md_tlb_ops;
141 1.2 matt };
142 1.2 matt
143 1.2 matt
144 1.2 matt #ifdef _KERNEL
145 1.2 matt
146 1.2 matt static inline register_t
147 1.2 matt wrtee(register_t msr)
148 1.2 matt {
149 1.2 matt register_t old_msr;
150 1.2 matt __asm("mfmsr\t%0" : "=r"(old_msr));
151 1.2 matt
152 1.2 matt if (__builtin_constant_p(msr)) {
153 1.2 matt __asm __volatile("wrteei\t%0" :: "n"((msr & PSL_EE) ? 1 : 0));
154 1.2 matt } else {
155 1.2 matt __asm __volatile("wrtee\t%0" :: "r"(msr));
156 1.2 matt }
157 1.2 matt return old_msr;
158 1.2 matt }
159 1.2 matt
160 1.5 matt uint32_t ufetch_32(const void *);
161 1.5 matt
162 1.5 matt struct trapframe;
163 1.5 matt void booke_sstep(struct trapframe *);
164 1.5 matt
165 1.2 matt void booke_cpu_startup(const char *); /* model name */
166 1.2 matt struct powerpc_bus_dma_tag booke_bus_dma_tag;
167 1.2 matt
168 1.5.4.1 cherry extern struct cpu_info cpu_info[];
169 1.5.4.1 cherry
170 1.2 matt void cpu_evcnt_attach(struct cpu_info *);
171 1.2 matt uint32_t cpu_read_4(bus_size_t);
172 1.2 matt uint8_t cpu_read_1(bus_size_t);
173 1.2 matt void cpu_write_4(bus_size_t, uint32_t);
174 1.2 matt void cpu_write_1(bus_size_t, uint8_t);
175 1.2 matt
176 1.2 matt void calc_delayconst(void);
177 1.2 matt
178 1.2 matt struct intrsw;
179 1.2 matt void exception_init(const struct intrsw *);
180 1.2 matt
181 1.2 matt uint32_t tlb_get_asid(void);
182 1.2 matt void tlb_set_asid(uint32_t);
183 1.2 matt void tlb_invalidate_all(void);
184 1.2 matt void tlb_invalidate_globals(void);
185 1.2 matt void tlb_invalidate_asids(uint32_t, uint32_t);
186 1.2 matt void tlb_invalidate_addr(vaddr_t, uint32_t);
187 1.2 matt bool tlb_update_addr(vaddr_t, uint32_t, uint32_t, bool);
188 1.2 matt u_int tlb_record_asids(u_long *, uint32_t);
189 1.2 matt void tlb_enter_addr(size_t, const struct tlbmask *);
190 1.2 matt void tlb_read_entry(size_t, struct tlbmask *);
191 1.2 matt void *tlb_mapiodev(paddr_t, psize_t);
192 1.2 matt void tlb_unmapiodev(vaddr_t, vsize_t);
193 1.2 matt int tlb_ioreserve(vaddr_t, vsize_t, uint32_t);
194 1.2 matt int tlb_iorelease(vaddr_t);
195 1.2 matt void tlb_dump(void (*)(const char *, ...));
196 1.2 matt void tlb_walk(void *, bool (*)(void *, vaddr_t, uint32_t, uint32_t));
197 1.2 matt
198 1.2 matt extern struct cpu_md_ops cpu_md_ops;
199 1.2 matt
200 1.2 matt void board_info_init(void);
201 1.2 matt void board_info_add_number(const char *, uint64_t);
202 1.2 matt void board_info_add_data(const char *, const void *, size_t);
203 1.2 matt void board_info_add_string(const char *, const char *);
204 1.2 matt void board_info_add_bool(const char *);
205 1.2 matt void board_info_add_object(const char *, void *);
206 1.2 matt uint64_t board_info_get_number(const char *);
207 1.2 matt bool board_info_get_bool(const char *);
208 1.2 matt void *board_info_get_object(const char *);
209 1.2 matt const void *
210 1.2 matt board_info_get_data(const char *, size_t *);
211 1.2 matt
212 1.2 matt extern paddr_t msgbuf_paddr;
213 1.2 matt extern prop_dictionary_t board_properties;
214 1.2 matt extern psize_t pmemsize;
215 1.2 matt #endif
216 1.2 matt
217 1.2 matt #endif /* !_POWERPC_BOOKE_CPUVAR_H_ */
218