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cpuvar.h revision 1.13
      1 /*	$NetBSD: cpuvar.h,v 1.13 2012/07/27 22:24:13 matt Exp $	*/
      2 /*-
      3  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
      4  * All rights reserved.
      5  *
      6  * This code is derived from software contributed to The NetBSD Foundation
      7  * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
      8  * Agency and which was developed by Matt Thomas of 3am Software Foundry.
      9  *
     10  * This material is based upon work supported by the Defense Advanced Research
     11  * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
     12  * Contract No. N66001-09-C-2073.
     13  * Approved for Public Release, Distribution Unlimited
     14  *
     15  * Redistribution and use in source and binary forms, with or without
     16  * modification, are permitted provided that the following conditions
     17  * are met:
     18  * 1. Redistributions of source code must retain the above copyright
     19  *    notice, this list of conditions and the following disclaimer.
     20  * 2. Redistributions in binary form must reproduce the above copyright
     21  *    notice, this list of conditions and the following disclaimer in the
     22  *    documentation and/or other materials provided with the distribution.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     26  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     27  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     34  * POSSIBILITY OF SUCH DAMAGE.
     35  */
     36 
     37 #ifndef _POWERPC_BOOKE_CPUVAR_H_
     38 #define _POWERPC_BOOKE_CPUVAR_H_
     39 
     40 #include <sys/bus.h>
     41 #include <prop/proplib.h>
     42 #include <powerpc/psl.h>
     43 
     44 struct cpunode_softc {
     45 	device_t sc_dev;
     46 	u_int sc_children;
     47 };
     48 
     49 struct cpu_softc {
     50 	struct cpu_info *cpu_ci;
     51 	struct evcnt *cpu_evcnt_intrs;
     52 	bus_space_tag_t cpu_bst;
     53 	bus_space_tag_t cpu_le_bst;
     54 	bus_space_handle_t cpu_bsh;
     55 	bus_addr_t cpu_clock_gtbcr;
     56 
     57 	paddr_t cpu_highmem;
     58 
     59 	u_int cpu_pcpls[5];
     60 	struct evcnt cpu_evcnt_spurious_intr;
     61 
     62 	struct evcnt cpu_ev_late_clock;
     63 	u_long cpu_ticks_per_clock_intr;
     64 	struct evcnt cpu_ev_exec_trap_sync;
     65 };
     66 
     67 struct cpunode_locators {
     68 	const char *cnl_name;
     69 	bus_addr_t cnl_addr;
     70 	bus_size_t cnl_size;
     71 	uint8_t cnl_instance;
     72 	uint8_t cnl_nintr;
     73 	uint8_t cnl_intrs[4];
     74 	uint32_t cnl_flags;
     75 	uint16_t cnl_ids[6];
     76 };
     77 
     78 struct cpunode_attach_args {
     79 	const char *cna_busname;
     80 	bus_space_tag_t cna_memt;
     81 	bus_space_tag_t cna_le_memt;
     82 	bus_dma_tag_t cna_dmat;
     83 	struct cpunode_locators cna_locs;
     84 	u_int cna_childmask;
     85 };
     86 
     87 struct mainbus_attach_args {
     88 	const char *ma_name;
     89 	bus_space_tag_t ma_memt;
     90 	bus_space_tag_t ma_le_memt;
     91 	bus_dma_tag_t ma_dmat;
     92 	int ma_node;
     93 };
     94 
     95 struct generic_attach_args {
     96 	const char *ga_name;
     97 	bus_space_tag_t ga_bst;
     98 	bus_dma_tag_t ga_dmat;
     99 	bus_addr_t ga_addr;
    100 	bus_size_t ga_size;
    101 	int ga_cs;
    102 	int ga_irq;
    103 };
    104 
    105 #ifndef __BSD_PT_ENTRY_T
    106 #define __BSD_PT_ENTRY_T	__uint32_t
    107 typedef __BSD_PT_ENTRY_T	pt_entry_t;
    108 #endif
    109 
    110 #include <common/pmap/tlb/tlb.h>
    111 
    112 struct tlb_md_io_ops {
    113 	/*
    114 	 * We need mapiodev to be first so we can easily override it in
    115 	 * early boot by doing cpu_md_ops.tlb_md_ops = (const struct
    116 	 * tlb_md_ops *) &<variable containing mapiodev pointer>.
    117 	 */
    118 	void *(*md_tlb_mapiodev)(paddr_t, psize_t, bool);
    119 	void (*md_tlb_unmapiodev)(vaddr_t, vsize_t);
    120 	int (*md_tlb_ioreserve)(vaddr_t, vsize_t, uint32_t);
    121 	int (*md_tlb_iorelease)(vaddr_t);
    122 };
    123 
    124 struct cpu_md_ops {
    125 	const struct cpunode_locators *md_cpunode_locs;
    126 	void (*md_cpu_attach)(device_t, u_int);
    127 
    128 	void (*md_device_register)(device_t, void *);
    129 	void (*md_cpu_startup)(void);
    130 	void (*md_cpu_reset)(void);
    131 	void (*md_cpunode_attach)(device_t, device_t, void *);
    132 
    133 	const struct tlb_md_ops *md_tlb_ops;
    134 	const struct tlb_md_io_ops *md_tlb_io_ops;
    135 };
    136 
    137 
    138 #ifdef _KERNEL
    139 
    140 static inline register_t
    141 wrtee(register_t msr)
    142 {
    143 	register_t old_msr;
    144 	__asm("mfmsr\t%0" : "=r"(old_msr));
    145 
    146 	if (__builtin_constant_p(msr)) {
    147 		__asm __volatile("wrteei\t%0" :: "n"((msr & PSL_EE) ? 1 : 0));
    148 	} else {
    149 		__asm __volatile("wrtee\t%0" :: "r"(msr));
    150 	}
    151 	return old_msr;
    152 }
    153 
    154 uint32_t ufetch_32(const void *);
    155 
    156 struct trapframe;
    157 void	booke_sstep(struct trapframe *);
    158 
    159 void	booke_cpu_startup(const char *);	/* model name */
    160 extern struct powerpc_bus_dma_tag booke_bus_dma_tag;
    161 
    162 extern struct cpu_info cpu_info[];
    163 #ifdef MULTIPROCESSOR
    164 extern volatile struct cpu_hatch_data cpu_hatch_data;
    165 #endif
    166 
    167 void	cpu_evcnt_attach(struct cpu_info *);
    168 uint32_t cpu_read_4(bus_size_t);
    169 uint8_t	cpu_read_1(bus_size_t);
    170 void	cpu_write_4(bus_size_t, uint32_t);
    171 void	cpu_write_1(bus_size_t, uint8_t);
    172 
    173 void	calc_delayconst(void);
    174 
    175 struct intrsw;
    176 void	exception_init(const struct intrsw *);
    177 
    178 void	*tlb_mapiodev(paddr_t, psize_t, bool);
    179 void	tlb_unmapiodev(vaddr_t, vsize_t);
    180 int	tlb_ioreserve(vaddr_t, vsize_t, pt_entry_t);
    181 int	tlb_iorelease(vaddr_t);
    182 
    183 extern struct cpu_md_ops cpu_md_ops;
    184 
    185 void	board_info_init(void);
    186 void	board_info_add_number(const char *, uint64_t);
    187 void	board_info_add_data(const char *, const void *, size_t);
    188 void	board_info_add_string(const char *, const char *);
    189 void	board_info_add_bool(const char *);
    190 void	board_info_add_object(const char *, void *);
    191 uint64_t board_info_get_number(const char *);
    192 bool	board_info_get_bool(const char *);
    193 void	*board_info_get_object(const char *);
    194 const void *
    195 	board_info_get_data(const char *, size_t *);
    196 
    197 extern paddr_t msgbuf_paddr;
    198 extern prop_dictionary_t board_properties;
    199 extern psize_t pmemsize;
    200 #endif
    201 
    202 #endif /* !_POWERPC_BOOKE_CPUVAR_H_ */
    203