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cpuvar.h revision 1.18
      1 /*	$NetBSD: cpuvar.h,v 1.18 2015/06/16 06:51:16 matt Exp $	*/
      2 /*-
      3  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
      4  * All rights reserved.
      5  *
      6  * This code is derived from software contributed to The NetBSD Foundation
      7  * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
      8  * Agency and which was developed by Matt Thomas of 3am Software Foundry.
      9  *
     10  * This material is based upon work supported by the Defense Advanced Research
     11  * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
     12  * Contract No. N66001-09-C-2073.
     13  * Approved for Public Release, Distribution Unlimited
     14  *
     15  * Redistribution and use in source and binary forms, with or without
     16  * modification, are permitted provided that the following conditions
     17  * are met:
     18  * 1. Redistributions of source code must retain the above copyright
     19  *    notice, this list of conditions and the following disclaimer.
     20  * 2. Redistributions in binary form must reproduce the above copyright
     21  *    notice, this list of conditions and the following disclaimer in the
     22  *    documentation and/or other materials provided with the distribution.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     26  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     27  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     34  * POSSIBILITY OF SUCH DAMAGE.
     35  */
     36 
     37 #ifndef _POWERPC_BOOKE_CPUVAR_H_
     38 #define _POWERPC_BOOKE_CPUVAR_H_
     39 
     40 #include <sys/bus.h>
     41 #include <prop/proplib.h>
     42 #include <powerpc/psl.h>
     43 
     44 struct cpunode_softc {
     45 	device_t sc_dev;
     46 	u_int sc_children;
     47 };
     48 
     49 struct cpu_softc {
     50 	struct cpu_info *cpu_ci;
     51 	struct evcnt *cpu_evcnt_intrs;
     52 	bus_space_tag_t cpu_bst;
     53 	bus_space_tag_t cpu_le_bst;
     54 	bus_space_handle_t cpu_bsh;
     55 	bus_addr_t cpu_clock_gtbcr;
     56 
     57 	paddr_t cpu_highmem;
     58 
     59 	u_int cpu_pcpls[5];
     60 	struct evcnt cpu_evcnt_spurious_intr;
     61 
     62 	struct evcnt cpu_ev_late_clock;
     63 	u_long cpu_ticks_per_clock_intr;
     64 	struct evcnt cpu_ev_exec_trap_sync;
     65 
     66 	uint64_t cpu_spl_tb[NIPL][NIPL];
     67 };
     68 
     69 struct cpunode_locators {
     70 	const char *cnl_name;
     71 	bus_addr_t cnl_addr;
     72 	bus_size_t cnl_size;
     73 	uint8_t cnl_instance;
     74 	uint8_t cnl_nintr;
     75 	uint8_t cnl_intrs[4];
     76 	uint32_t cnl_flags;
     77 	uint16_t cnl_ids[6];
     78 };
     79 
     80 struct cpunode_attach_args {
     81 	const char *cna_busname;
     82 	bus_space_tag_t cna_memt;
     83 	bus_space_tag_t cna_le_memt;
     84 	bus_dma_tag_t cna_dmat;
     85 	struct cpunode_locators cna_locs;
     86 	u_int cna_childmask;
     87 };
     88 
     89 struct mainbus_attach_args {
     90 	const char *ma_name;
     91 	bus_space_tag_t ma_memt;
     92 	bus_space_tag_t ma_le_memt;
     93 	bus_dma_tag_t ma_dmat;
     94 	int ma_node;
     95 };
     96 
     97 struct generic_attach_args {
     98 	const char *ga_name;
     99 	bus_space_tag_t ga_bst;
    100 	bus_dma_tag_t ga_dmat;
    101 	bus_addr_t ga_addr;
    102 	bus_size_t ga_size;
    103 	int ga_cs;
    104 	int ga_irq;
    105 };
    106 
    107 #ifndef __BSD_PT_ENTRY_T
    108 #define __BSD_PT_ENTRY_T	__uint32_t
    109 typedef __BSD_PT_ENTRY_T	pt_entry_t;
    110 #define PRIxPTE			PRIx32
    111 #endif
    112 
    113 #include <uvm/pmap/tlb.h>
    114 
    115 struct tlb_md_io_ops {
    116 	/*
    117 	 * We need mapiodev to be first so we can easily override it in
    118 	 * early boot by doing cpu_md_ops.tlb_md_ops = (const struct
    119 	 * tlb_md_ops *) &<variable containing mapiodev pointer>.
    120 	 */
    121 	void *(*md_tlb_mapiodev)(paddr_t, psize_t, bool);
    122 	void (*md_tlb_unmapiodev)(vaddr_t, vsize_t);
    123 	int (*md_tlb_ioreserve)(vaddr_t, vsize_t, uint32_t);
    124 	int (*md_tlb_iorelease)(vaddr_t);
    125 };
    126 
    127 struct cpu_md_ops {
    128 	const struct cpunode_locators *md_cpunode_locs;
    129 	void (*md_cpu_attach)(device_t, u_int);
    130 
    131 	void (*md_device_register)(device_t, void *);
    132 	void (*md_cpu_startup)(void);
    133 	void (*md_cpu_reset)(void);
    134 	void (*md_cpunode_attach)(device_t, device_t, void *);
    135 
    136 	const struct tlb_md_ops *md_tlb_ops;
    137 	const struct tlb_md_io_ops *md_tlb_io_ops;
    138 };
    139 
    140 
    141 #ifdef _KERNEL
    142 
    143 static inline register_t
    144 wrtee(register_t msr)
    145 {
    146 	register_t old_msr;
    147 	__asm("mfmsr\t%0" : "=r"(old_msr));
    148 
    149 	if (__builtin_constant_p(msr)) {
    150 		__asm __volatile("wrteei\t%0" :: "n"((msr & PSL_EE) ? 1 : 0));
    151 	} else {
    152 		__asm __volatile("wrtee\t%0" :: "r"(msr));
    153 	}
    154 	return old_msr;
    155 }
    156 
    157 uint32_t ufetch_32(const void *);
    158 
    159 struct trapframe;
    160 void	booke_sstep(struct trapframe *);
    161 
    162 void	booke_cpu_startup(const char *);	/* model name */
    163 extern struct powerpc_bus_dma_tag booke_bus_dma_tag;
    164 
    165 extern struct cpu_info cpu_info[];
    166 #ifdef MULTIPROCESSOR
    167 extern volatile struct cpu_hatch_data cpu_hatch_data;
    168 #endif
    169 
    170 void	cpu_evcnt_attach(struct cpu_info *);
    171 uint32_t cpu_read_4(bus_size_t);
    172 uint8_t	cpu_read_1(bus_size_t);
    173 void	cpu_write_4(bus_size_t, uint32_t);
    174 void	cpu_write_1(bus_size_t, uint8_t);
    175 
    176 void	dump_splhist(struct cpu_info *, void (*)(const char *, ...));
    177 void	calc_delayconst(void);
    178 
    179 struct intrsw;
    180 void	exception_init(const struct intrsw *);
    181 
    182 void	*tlb_mapiodev(paddr_t, psize_t, bool);
    183 void	tlb_unmapiodev(vaddr_t, vsize_t);
    184 int	tlb_ioreserve(vaddr_t, vsize_t, pt_entry_t);
    185 int	tlb_iorelease(vaddr_t);
    186 
    187 extern struct cpu_md_ops cpu_md_ops;
    188 
    189 void	board_info_init(void);
    190 void	board_info_add_number(const char *, uint64_t);
    191 void	board_info_add_data(const char *, const void *, size_t);
    192 void	board_info_add_string(const char *, const char *);
    193 void	board_info_add_bool(const char *);
    194 void	board_info_add_object(const char *, void *);
    195 uint64_t board_info_get_number(const char *);
    196 bool	board_info_get_bool(const char *);
    197 void	*board_info_get_object(const char *);
    198 const void *
    199 	board_info_get_data(const char *, size_t *);
    200 
    201 /* trap.c */
    202 void	dump_trapframe(const struct trapframe *, void (*)(const char *, ...));
    203 
    204 extern char root_string[];
    205 extern paddr_t msgbuf_paddr;
    206 extern prop_dictionary_t board_properties;
    207 extern psize_t pmemsize;
    208 #endif
    209 
    210 #endif /* !_POWERPC_BOOKE_CPUVAR_H_ */
    211