bus_defs.h revision 1.1 1 /* $NetBSD: bus_defs.h,v 1.1 2011/07/01 17:10:00 dyoung Exp $ */
2 /* $OpenBSD: bus.h,v 1.1 1997/10/13 10:53:42 pefo Exp $ */
3
4 /*-
5 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10 * NASA Ames Research Center.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /*
35 * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
36 * Copyright (c) 1996 Jason R. Thorpe. All rights reserved.
37 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 * 1. Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in the
46 * documentation and/or other materials provided with the distribution.
47 * 3. All advertising materials mentioning features or use of this software
48 * must display the following acknowledgement:
49 * This product includes software developed by Christopher G. Demetriou
50 * for the NetBSD Project.
51 * 4. The name of the author may not be used to endorse or promote products
52 * derived from this software without specific prior written permission
53 *
54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
57 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
58 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
59 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
63 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 */
65
66 /*
67 * Copyright (c) 1997 Per Fogelstrom. All rights reserved.
68 * Copyright (c) 1996 Niklas Hallqvist. All rights reserved.
69 *
70 * Redistribution and use in source and binary forms, with or without
71 * modification, are permitted provided that the following conditions
72 * are met:
73 * 1. Redistributions of source code must retain the above copyright
74 * notice, this list of conditions and the following disclaimer.
75 * 2. Redistributions in binary form must reproduce the above copyright
76 * notice, this list of conditions and the following disclaimer in the
77 * documentation and/or other materials provided with the distribution.
78 * 3. All advertising materials mentioning features or use of this software
79 * must display the following acknowledgement:
80 * This product includes software developed by Christopher G. Demetriou
81 * for the NetBSD Project.
82 * 4. The name of the author may not be used to endorse or promote products
83 * derived from this software without specific prior written permission
84 *
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
86 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
87 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
88 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
89 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
90 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
91 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
92 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
93 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
94 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
95 */
96
97 #ifndef _POWERPC_BUS_DEFS_H_
98 #define _POWERPC_BUS_DEFS_H_
99
100 #if defined(_KERNEL_OPT) && !defined(BUS_DMA_DONTCACHE)
101 #include "opt_ppcarch.h"
102 #if defined(PPC_IBM4XX) || defined(PPC_BOOKE)
103 #define BUS_DMA_DONTCACHE (BUS_DMA_COHERENT|BUS_DMA_NOCACHE)
104 #endif /* PPC_IBM4XX */
105 #endif /* _KERNEL_OPT && !BUS_DMA_DONTCACHE */
106
107 /*
108 * Bus access types.
109 */
110 typedef uint32_t bus_addr_t;
111 typedef uint32_t bus_size_t;
112
113 #ifndef __HAVE_LOCAL_BUS_SPACE
114 typedef uint32_t bus_space_handle_t;
115 typedef const struct powerpc_bus_space *bus_space_tag_t;
116
117 struct extent;
118
119 struct powerpc_bus_space_scalar {
120 uint8_t (*pbss_read_1)(bus_space_tag_t, bus_space_handle_t,
121 bus_size_t);
122 uint16_t (*pbss_read_2)(bus_space_tag_t, bus_space_handle_t,
123 bus_size_t);
124 uint32_t (*pbss_read_4)(bus_space_tag_t, bus_space_handle_t,
125 bus_size_t);
126 uint64_t (*pbss_read_8)(bus_space_tag_t, bus_space_handle_t,
127 bus_size_t);
128
129 void (*pbss_write_1)(bus_space_tag_t, bus_space_handle_t, bus_size_t,
130 uint8_t);
131 void (*pbss_write_2)(bus_space_tag_t, bus_space_handle_t, bus_size_t,
132 uint16_t);
133 void (*pbss_write_4)(bus_space_tag_t, bus_space_handle_t, bus_size_t,
134 uint32_t);
135 void (*pbss_write_8)(bus_space_tag_t, bus_space_handle_t, bus_size_t,
136 uint64_t);
137 };
138
139 struct powerpc_bus_space_group {
140 void (*pbsg_read_1)(bus_space_tag_t, bus_space_handle_t,
141 bus_size_t, uint8_t *, size_t);
142 void (*pbsg_read_2)(bus_space_tag_t, bus_space_handle_t,
143 bus_size_t, uint16_t *, size_t);
144 void (*pbsg_read_4)(bus_space_tag_t, bus_space_handle_t,
145 bus_size_t, uint32_t *, size_t);
146 void (*pbsg_read_8)(bus_space_tag_t, bus_space_handle_t,
147 bus_size_t, uint64_t *, size_t);
148
149 void (*pbsg_write_1)(bus_space_tag_t, bus_space_handle_t,
150 bus_size_t, const uint8_t *, size_t);
151 void (*pbsg_write_2)(bus_space_tag_t, bus_space_handle_t,
152 bus_size_t, const uint16_t *, size_t);
153 void (*pbsg_write_4)(bus_space_tag_t, bus_space_handle_t,
154 bus_size_t, const uint32_t *, size_t);
155 void (*pbsg_write_8)(bus_space_tag_t, bus_space_handle_t,
156 bus_size_t, const uint64_t *, size_t);
157 };
158
159 struct powerpc_bus_space_set {
160 void (*pbss_set_1)(bus_space_tag_t, bus_space_handle_t,
161 bus_size_t, uint8_t, size_t);
162 void (*pbss_set_2)(bus_space_tag_t, bus_space_handle_t,
163 bus_size_t, uint16_t, size_t);
164 void (*pbss_set_4)(bus_space_tag_t, bus_space_handle_t,
165 bus_size_t, uint32_t, size_t);
166 void (*pbss_set_8)(bus_space_tag_t, bus_space_handle_t,
167 bus_size_t, uint64_t, size_t);
168 };
169
170 struct powerpc_bus_space_copy {
171 void (*pbsc_copy_1)(bus_space_tag_t, bus_space_handle_t,
172 bus_size_t, bus_space_handle_t, bus_size_t, size_t);
173 void (*pbsc_copy_2)(bus_space_tag_t, bus_space_handle_t,
174 bus_size_t, bus_space_handle_t, bus_size_t, size_t);
175 void (*pbsc_copy_4)(bus_space_tag_t, bus_space_handle_t,
176 bus_size_t, bus_space_handle_t, bus_size_t, size_t);
177 void (*pbsc_copy_8)(bus_space_tag_t, bus_space_handle_t,
178 bus_size_t, bus_space_handle_t, bus_size_t, size_t);
179 };
180
181 struct powerpc_bus_space {
182 int pbs_flags;
183 #define _BUS_SPACE_BIG_ENDIAN 0x00000100
184 #define _BUS_SPACE_LITTLE_ENDIAN 0x00000000
185 #define _BUS_SPACE_IO_TYPE 0x00000200
186 #define _BUS_SPACE_MEM_TYPE 0x00000000
187 #define _BUS_SPACE_STRIDE_MASK 0x0000001f
188 bus_addr_t pbs_offset; /* offset to real start */
189 bus_addr_t pbs_base; /* extent base */
190 bus_addr_t pbs_limit; /* extent limit */
191 struct extent *pbs_extent;
192
193 paddr_t (*pbs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int);
194 int (*pbs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int,
195 bus_space_handle_t *);
196 void (*pbs_unmap)(bus_space_tag_t, bus_space_handle_t, bus_size_t);
197 int (*pbs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t, bus_size_t,
198 bus_size_t align, bus_size_t, int, bus_addr_t *,
199 bus_space_handle_t *);
200 void (*pbs_free)(bus_space_tag_t, bus_space_handle_t, bus_size_t);
201 int (*pbs_subregion)(bus_space_tag_t, bus_space_handle_t, bus_size_t,
202 bus_size_t, bus_space_handle_t *);
203
204 struct powerpc_bus_space_scalar pbs_scalar;
205 struct powerpc_bus_space_scalar pbs_scalar_stream;
206 const struct powerpc_bus_space_group *pbs_multi;
207 const struct powerpc_bus_space_group *pbs_multi_stream;
208 const struct powerpc_bus_space_group *pbs_region;
209 const struct powerpc_bus_space_group *pbs_region_stream;
210 const struct powerpc_bus_space_set *pbs_set;
211 const struct powerpc_bus_space_set *pbs_set_stream;
212 const struct powerpc_bus_space_copy *pbs_copy;
213 };
214
215 #define _BUS_SPACE_STRIDE(t, o) \
216 ((o) << ((t)->pbs_flags & _BUS_SPACE_STRIDE_MASK))
217 #define _BUS_SPACE_UNSTRIDE(t, o) \
218 ((o) >> ((t)->pbs_flags & _BUS_SPACE_STRIDE_MASK))
219
220 #define BUS_SPACE_MAP_CACHEABLE 0x01
221 #define BUS_SPACE_MAP_LINEAR 0x02
222 #define BUS_SPACE_MAP_PREFETCHABLE 0x04
223
224 int bus_space_init(struct powerpc_bus_space *, const char *, void *, size_t);
225 void bus_space_mallocok(void);
226
227 /*
228 * Access methods for bus resources
229 */
230
231 #define __BUS_SPACE_HAS_STREAM_METHODS
232
233 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
234 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
235
236 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
237
238 #endif /* !__HAVE_LOCAL_BUS_SPACE */
239
240 /*
241 * Bus DMA methods.
242 */
243
244 /*
245 * Flags used in various bus DMA methods.
246 */
247 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
248 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
249 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
250 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
251 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
252 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
253 #define BUS_DMA_BUS2 0x020
254 #define BUS_DMA_BUS3 0x040
255 #define BUS_DMA_BUS4 0x080
256 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
257 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
258 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
259
260 #ifndef BUS_DMA_DONTCACHE
261 #define BUS_DMA_DONTCACHE BUS_DMA_NOCACHE
262 #endif
263
264 /* Forwards needed by prototypes below. */
265 struct proc;
266 struct mbuf;
267 struct uio;
268
269 /*
270 * Operations performed by bus_dmamap_sync().
271 */
272 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
273 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
274 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
275 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
276
277 typedef struct powerpc_bus_dma_tag *bus_dma_tag_t;
278 typedef struct powerpc_bus_dmamap *bus_dmamap_t;
279
280 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
281
282 /*
283 * bus_dma_segment_t
284 *
285 * Describes a single contiguous DMA transaction. Values
286 * are suitable for programming into DMA registers.
287 */
288 struct powerpc_bus_dma_segment {
289 bus_addr_t ds_addr; /* DMA address */
290 bus_size_t ds_len; /* length of transfer */
291 };
292 typedef struct powerpc_bus_dma_segment bus_dma_segment_t;
293
294 /*
295 * bus_dma_tag_t
296 *
297 * A machine-dependent opaque type describing the implementation of
298 * DMA for a given bus.
299 */
300
301 struct powerpc_bus_dma_tag {
302 /*
303 * The `bounce threshold' is checked while we are loading
304 * the DMA map. If the physical address of the segment
305 * exceeds the threshold, an error will be returned. The
306 * caller can then take whatever action is necessary to
307 * bounce the transfer. If this value is 0, it will be
308 * ignored.
309 */
310 bus_addr_t _bounce_thresh;
311
312 /*
313 * DMA mapping methods.
314 */
315 int (*_dmamap_create) (bus_dma_tag_t, bus_size_t, int,
316 bus_size_t, bus_size_t, int, bus_dmamap_t *);
317 void (*_dmamap_destroy) (bus_dma_tag_t, bus_dmamap_t);
318 int (*_dmamap_load) (bus_dma_tag_t, bus_dmamap_t, void *,
319 bus_size_t, struct proc *, int);
320 int (*_dmamap_load_mbuf) (bus_dma_tag_t, bus_dmamap_t,
321 struct mbuf *, int);
322 int (*_dmamap_load_uio) (bus_dma_tag_t, bus_dmamap_t,
323 struct uio *, int);
324 int (*_dmamap_load_raw) (bus_dma_tag_t, bus_dmamap_t,
325 bus_dma_segment_t *, int, bus_size_t, int);
326 void (*_dmamap_unload) (bus_dma_tag_t, bus_dmamap_t);
327 void (*_dmamap_sync) (bus_dma_tag_t, bus_dmamap_t,
328 bus_addr_t, bus_size_t, int);
329
330 /*
331 * DMA memory utility functions.
332 */
333 int (*_dmamem_alloc) (bus_dma_tag_t, bus_size_t, bus_size_t,
334 bus_size_t, bus_dma_segment_t *, int, int *, int);
335 void (*_dmamem_free) (bus_dma_tag_t,
336 bus_dma_segment_t *, int);
337 int (*_dmamem_map) (bus_dma_tag_t, bus_dma_segment_t *,
338 int, size_t, void **, int);
339 void (*_dmamem_unmap) (bus_dma_tag_t, void *, size_t);
340 paddr_t (*_dmamem_mmap) (bus_dma_tag_t, bus_dma_segment_t *,
341 int, off_t, int, int);
342
343 #ifndef PHYS_TO_BUS_MEM
344 bus_addr_t (*_dma_phys_to_bus_mem)(bus_dma_tag_t, bus_addr_t);
345 #define PHYS_TO_BUS_MEM(t, addr) (*(t)->_dma_phys_to_bus_mem)((t), (addr))
346 #endif
347 #ifndef BUS_MEM_TO_PHYS
348 bus_addr_t (*_dma_bus_mem_to_phys)(bus_dma_tag_t, bus_addr_t);
349 #define BUS_MEM_TO_PHYS(t, addr) (*(t)->_dma_bus_mem_to_phys)((t), (addr))
350 #endif
351 };
352
353 /*
354 * bus_dmamap_t
355 *
356 * Describes a DMA mapping.
357 */
358 struct powerpc_bus_dmamap {
359 /*
360 * PRIVATE MEMBERS: not for use my machine-independent code.
361 */
362 bus_size_t _dm_size; /* largest DMA transfer mappable */
363 int _dm_segcnt; /* number of segs this map can map */
364 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
365 bus_size_t _dm_boundary; /* don't cross this */
366 bus_addr_t _dm_bounce_thresh; /* bounce threshold; see tag */
367 int _dm_flags; /* misc. flags */
368
369 void *_dm_cookie; /* cookie for bus-specific functions */
370
371 /*
372 * PUBLIC MEMBERS: these are used by machine-independent code.
373 */
374 bus_size_t dm_maxsegsz; /* largest possible segment */
375 bus_size_t dm_mapsize; /* size of the mapping */
376 int dm_nsegs; /* # valid segments in mapping */
377 bus_dma_segment_t dm_segs[1]; /* segments; variable length */
378 };
379
380 #endif /* _POWERPC_BUS_DEFS_H_ */
381