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cpu.h revision 1.13.82.1
      1  1.13.82.1     matt /*	$NetBSD: cpu.h,v 1.13.82.1 2011/01/17 07:46:00 matt Exp $	*/
      2        1.1      eeh 
      3        1.1      eeh /*
      4        1.1      eeh  * Copyright 2002 Wasabi Systems, Inc.
      5        1.1      eeh  * All rights reserved.
      6        1.1      eeh  *
      7        1.1      eeh  * Written by Eduardo Horvath for Wasabi Systems, Inc.
      8        1.1      eeh  *
      9        1.1      eeh  * Redistribution and use in source and binary forms, with or without
     10        1.1      eeh  * modification, are permitted provided that the following conditions
     11        1.1      eeh  * are met:
     12        1.1      eeh  * 1. Redistributions of source code must retain the above copyright
     13        1.1      eeh  *    notice, this list of conditions and the following disclaimer.
     14        1.1      eeh  * 2. Redistributions in binary form must reproduce the above copyright
     15        1.1      eeh  *    notice, this list of conditions and the following disclaimer in the
     16        1.1      eeh  *    documentation and/or other materials provided with the distribution.
     17        1.1      eeh  * 3. All advertising materials mentioning features or use of this software
     18        1.1      eeh  *    must display the following acknowledgement:
     19        1.1      eeh  *      This product includes software developed for the NetBSD Project by
     20        1.1      eeh  *      Wasabi Systems, Inc.
     21        1.1      eeh  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22        1.1      eeh  *    or promote products derived from this software without specific prior
     23        1.1      eeh  *    written permission.
     24        1.1      eeh  *
     25        1.1      eeh  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26        1.1      eeh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27        1.1      eeh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28        1.1      eeh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29        1.1      eeh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30        1.1      eeh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31        1.1      eeh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32        1.1      eeh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33        1.1      eeh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34        1.1      eeh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35        1.1      eeh  * POSSIBILITY OF SUCH DAMAGE.
     36        1.1      eeh  */
     37        1.1      eeh 
     38        1.1      eeh #ifndef	_IBM4XX_CPU_H_
     39        1.1      eeh #define	_IBM4XX_CPU_H_
     40        1.1      eeh 
     41        1.1      eeh /* PVRs for different IBM CPUs */
     42        1.1      eeh #define	PVR_401A1		0x00210000
     43        1.1      eeh #define	PVR_401B2		0x00220000
     44        1.1      eeh #define	PVR_401C2		0x00230000
     45        1.1      eeh #define	PVR_401D2		0x00240000
     46        1.1      eeh #define	PVR_401E2		0x00250000
     47        1.1      eeh #define	PVR_401F2		0x00260000
     48        1.1      eeh #define	PVR_401G2		0x00270000
     49        1.1      eeh 
     50        1.1      eeh #define	PVR_403			0x00200000
     51        1.1      eeh 
     52        1.1      eeh #define PVR_405GP      		0x40110000
     53        1.4   simonb #define PVR_405GP_PASS1 	0x40110000	/* RevA */
     54        1.4   simonb #define PVR_405GP_PASS2 	0x40110040	/* RevB */
     55        1.4   simonb #define PVR_405GP_PASS2_1 	0x40110082	/* RevC */
     56        1.4   simonb #define PVR_405GP_PASS3 	0x401100c4	/* RevD */
     57        1.5  msaitoh #define PVR_405GPR     		0x50910000
     58        1.5  msaitoh #define PVR_405GPR_REVB		0x50910951
     59        1.1      eeh 
     60       1.13    freza #define	PVR_405D5X1 		0x20010000 	/* Virtex II Pro */
     61       1.13    freza #define	PVR_405D5X2 		0x20011000 	/* Virtex 4 FX */
     62       1.13    freza 
     63        1.1      eeh #if defined(_KERNEL)
     64        1.1      eeh extern char bootpath[];
     65        1.1      eeh 
     66        1.7    shige #include <sys/param.h>
     67        1.7    shige #include <sys/device.h>
     68       1.12  thorpej #include <prop/proplib.h>
     69        1.7    shige 
     70        1.7    shige /* export from ibm4xx/autoconf.c */
     71        1.7    shige extern void (*md_device_register) __P((struct device *dev, void *aux));
     72        1.7    shige 
     73        1.9    shige /* export from ibm4xx/machdep.c */
     74       1.10    shige extern void (*md_consinit) __P((void));
     75        1.9    shige extern void (*md_cpu_startup) __P((void));
     76        1.9    shige 
     77        1.9    shige /* export from ibm4xx/ibm40x_machdep.c */
     78        1.9    shige extern void ibm40x_memsize_init(u_int, u_int);
     79        1.9    shige 
     80        1.9    shige /* export from ibm4xx/ibm4xx_machdep.c */
     81        1.9    shige extern void ibm4xx_init(void (*)(void));
     82        1.9    shige extern void ibm4xx_cpu_startup(const char *);
     83        1.9    shige extern void ibm4xx_dumpsys(void);
     84        1.9    shige extern void ibm4xx_install_extint(void (*)(void));
     85        1.9    shige 
     86        1.7    shige /* export from ibm4xx/ibm4xx_autoconf.c */
     87        1.7    shige extern void ibm4xx_device_register(struct device *dev, void *aux);
     88        1.7    shige 
     89       1.10    shige /* export from ibm4xx/clock.c */
     90        1.9    shige extern void calc_delayconst(void);
     91       1.10    shige 
     92       1.10    shige /* export from ibm4xx/4xx_locore.S */
     93        1.9    shige extern void ppc4xx_reset(void) __attribute__((__noreturn__));
     94        1.9    shige 
     95  1.13.82.1     matt /*
     96  1.13.82.1     matt  * DCR (Device Control Register) access. These have to be
     97  1.13.82.1     matt  * macros because register address is encoded as immediate
     98  1.13.82.1     matt  * operand.
     99  1.13.82.1     matt  */
    100  1.13.82.1     matt static inline void
    101  1.13.82.1     matt mtdcr(int reg, uint32_t val)
    102  1.13.82.1     matt {
    103  1.13.82.1     matt 	__asm volatile("mtdcr %0,%1" : : "K"(reg), "r"(val));
    104  1.13.82.1     matt }
    105  1.13.82.1     matt 
    106  1.13.82.1     matt static inline uint32_t
    107  1.13.82.1     matt mfdcr(int reg)
    108  1.13.82.1     matt {
    109  1.13.82.1     matt 	uint32_t val;
    110  1.13.82.1     matt 
    111  1.13.82.1     matt 	__asm volatile("mfdcr %0,%1" : "=r"(val) : "K"(reg));
    112  1.13.82.1     matt 	return val;
    113  1.13.82.1     matt }
    114        1.1      eeh #endif /* _KERNEL */
    115        1.1      eeh 
    116        1.1      eeh #include <powerpc/cpu.h>
    117        1.1      eeh 
    118       1.12  thorpej /* Board info dictionary */
    119       1.12  thorpej extern prop_dictionary_t board_properties;
    120        1.8    shige extern void board_info_init(void);
    121        1.8    shige 
    122        1.8    shige /*****************************************************************************/
    123        1.8    shige /* THIS CODE IS OBSOLETE. WILL BE REMOVED */
    124        1.1      eeh /*
    125        1.1      eeh  * Board configuration structure from the OpenBIOS.
    126        1.1      eeh  */
    127        1.1      eeh struct board_cfg_data {
    128        1.1      eeh 	unsigned char	usr_config_ver[4];
    129        1.1      eeh 	unsigned char	rom_sw_ver[30];
    130        1.1      eeh 	unsigned int	mem_size;
    131        1.1      eeh 	unsigned char	mac_address_local[6];
    132        1.1      eeh 	unsigned char	mac_address_pci[6];
    133        1.1      eeh 	unsigned int	processor_speed;
    134        1.1      eeh 	unsigned int	plb_speed;
    135        1.1      eeh 	unsigned int	pci_speed;
    136        1.3     matt };
    137        1.1      eeh 
    138        1.1      eeh extern struct board_cfg_data board_data;
    139        1.8    shige /*****************************************************************************/
    140        1.1      eeh 
    141        1.1      eeh #endif	/* _IBM4XX_CPU_H_ */
    142