1 1.7 rin /* $NetBSD: tlb.h,v 1.7 2021/03/30 03:15:53 rin Exp $ */ 2 1.1 simonb 3 1.1 simonb /* 4 1.1 simonb * Copyright 2001 Wasabi Systems, Inc. 5 1.1 simonb * All rights reserved. 6 1.1 simonb * 7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 1.1 simonb * 9 1.1 simonb * Redistribution and use in source and binary forms, with or without 10 1.1 simonb * modification, are permitted provided that the following conditions 11 1.1 simonb * are met: 12 1.1 simonb * 1. Redistributions of source code must retain the above copyright 13 1.1 simonb * notice, this list of conditions and the following disclaimer. 14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 simonb * notice, this list of conditions and the following disclaimer in the 16 1.1 simonb * documentation and/or other materials provided with the distribution. 17 1.1 simonb * 3. All advertising materials mentioning features or use of this software 18 1.1 simonb * must display the following acknowledgement: 19 1.1 simonb * This product includes software developed for the NetBSD Project by 20 1.1 simonb * Wasabi Systems, Inc. 21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 1.1 simonb * or promote products derived from this software without specific prior 23 1.1 simonb * written permission. 24 1.1 simonb * 25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE. 36 1.1 simonb */ 37 1.1 simonb 38 1.1 simonb #ifndef _IBM4XX_TLB_H_ 39 1.1 simonb #define _IBM4XX_TLB_H_ 40 1.1 simonb 41 1.1 simonb #define NTLB 64 42 1.1 simonb 43 1.1 simonb /* TLBHI entries */ 44 1.1 simonb #define TLB_EPN_MASK 0xfffff000 /* It's 0xfffffc00, but as we use 4K pages we don't need two lower bits */ 45 1.1 simonb #define TLB_EPN_SHFT 12 46 1.1 simonb #define TLB_SIZE_MASK 0x00000380 47 1.1 simonb #define TLB_SIZE_SHFT 7 48 1.1 simonb #define TLB_VALID 0x00000040 49 1.1 simonb #define TLB_ENDIAN 0x00000020 50 1.1 simonb #define TLB_U0 0x00000010 51 1.1 simonb 52 1.1 simonb #define TLB_SIZE_1K 0 53 1.1 simonb #define TLB_SIZE_4K 1 54 1.1 simonb #define TLB_SIZE_16K 2 55 1.1 simonb #define TLB_SIZE_64K 3 56 1.1 simonb #define TLB_SIZE_256K 4 57 1.1 simonb #define TLB_SIZE_1M 5 58 1.1 simonb #define TLB_SIZE_4M 6 59 1.1 simonb #define TLB_SIZE_16M 7 60 1.1 simonb 61 1.3 freza #define TLB_PG_1K (TLB_SIZE_1K << TLB_SIZE_SHFT) 62 1.3 freza #define TLB_PG_4K (TLB_SIZE_4K << TLB_SIZE_SHFT) 63 1.3 freza #define TLB_PG_16K (TLB_SIZE_16K << TLB_SIZE_SHFT) 64 1.3 freza #define TLB_PG_64K (TLB_SIZE_64K << TLB_SIZE_SHFT) 65 1.3 freza #define TLB_PG_256K (TLB_SIZE_256K << TLB_SIZE_SHFT) 66 1.3 freza #define TLB_PG_1M (TLB_SIZE_1M << TLB_SIZE_SHFT) 67 1.3 freza #define TLB_PG_4M (TLB_SIZE_4M << TLB_SIZE_SHFT) 68 1.3 freza #define TLB_PG_16M (TLB_SIZE_16M << TLB_SIZE_SHFT) 69 1.1 simonb 70 1.1 simonb /* TLBLO entries */ 71 1.1 simonb #define TLB_RPN_MASK 0xfffffc00 /* Real Page Number mask */ 72 1.1 simonb #define TLB_EX 0x00000200 /* EXecute enable */ 73 1.1 simonb #define TLB_WR 0x00000100 /* WRite enable */ 74 1.1 simonb #define TLB_ZSEL_MASK 0x000000f0 /* Zone SELect mask */ 75 1.1 simonb #define TLB_ZSEL_SHFT 4 76 1.1 simonb #define TLB_W 0x00000008 /* Write-through */ 77 1.1 simonb #define TLB_I 0x00000004 /* Inhibit caching */ 78 1.1 simonb #define TLB_M 0x00000002 /* Memory coherent */ 79 1.1 simonb #define TLB_G 0x00000001 /* Guarded */ 80 1.1 simonb 81 1.1 simonb #define TLB_ZONE(z) (((z) << TLB_ZSEL_SHFT) & TLB_ZSEL_MASK) 82 1.1 simonb 83 1.1 simonb /* We only need two zones for kernel and user-level processes */ 84 1.1 simonb #define TLB_SU_ZONE 0 /* Kernel-only access controlled permission bits in TLB */ 85 1.1 simonb #define TLB_U_ZONE 1 /* Access always controlled by permission bits in TLB entry */ 86 1.1 simonb 87 1.1 simonb #define TLB_HI(epn,size,flags) (((epn)&TLB_EPN_MASK)|(((size)<<TLB_SIZE_SHFT)&TLB_SIZE_MASK)|(flags)) 88 1.1 simonb #define TLB_LO(rpn,zone,flags) (((rpn)&TLB_RPN_MASK)|(((zone)<<TLB_ZSEL_SHFT)&TLB_ZSEL_MASK)|(flags)) 89 1.1 simonb 90 1.1 simonb #ifndef _LOCORE 91 1.1 simonb 92 1.1 simonb typedef struct tlb_s { 93 1.1 simonb u_int tlb_hi; 94 1.1 simonb u_int tlb_lo; 95 1.1 simonb } tlb_t; 96 1.1 simonb 97 1.1 simonb struct pmap; 98 1.1 simonb 99 1.1 simonb void ppc4xx_tlb_enter(int, vaddr_t, u_int); 100 1.1 simonb void ppc4xx_tlb_flush(vaddr_t, int); 101 1.1 simonb void ppc4xx_tlb_flush_all(void); 102 1.1 simonb void ppc4xx_tlb_init(void); 103 1.1 simonb int ppc4xx_tlb_new_pid(struct pmap *); 104 1.3 freza void ppc4xx_tlb_reserve(paddr_t, vaddr_t, size_t, int); 105 1.3 freza void *ppc4xx_tlb_mapiodev(paddr_t, psize_t); 106 1.1 simonb 107 1.7 rin #ifndef ppc4xx_tlbflags 108 1.7 rin #define ppc4xx_tlbflags(va, pa) (0) 109 1.1 simonb #endif 110 1.1 simonb 111 1.7 rin #endif /* !_LOCORE */ 112 1.7 rin 113 1.1 simonb #define TLB_PID_INVALID 0xFFFF 114 1.1 simonb 115 1.1 simonb #endif /* _IBM4XX_TLB_H_ */ 116