intr.h revision 1.9 1 /* $NetBSD: intr.h,v 1.9 2011/06/20 20:24:28 matt Exp $ */
2
3 /*-
4 * Copyright (c) 2007 Michael Lorenz
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef _LOCORE
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: intr.h,v 1.9 2011/06/20 20:24:28 matt Exp $");
32 #endif
33
34 #ifndef POWERPC_INTR_MACHDEP_H
35 #define POWERPC_INTR_MACHDEP_H
36
37 #define __HAVE_FAST_SOFTINTS 1
38
39
40 /* Interrupt priority `levels'. */
41 #define IPL_NONE 0 /* nothing */
42 #define IPL_SOFTCLOCK 1 /* timeouts */
43 #define IPL_SOFTBIO 2 /* block I/O */
44 #define IPL_SOFTNET 3 /* protocol stacks */
45 #define IPL_SOFTSERIAL 4 /* serial */
46 #define IPL_VM 5 /* memory allocation */
47 #define IPL_SCHED 6
48 #define IPL_HIGH 7 /* everything */
49 #define NIPL 8
50
51 /* Interrupt sharing types. */
52 #define IST_NONE 0 /* none */
53 #define IST_PULSE 1 /* pulsed */
54 #define IST_EDGE 2 /* edge-triggered */
55 #define IST_LEVEL 3 /* level-triggered */
56
57 #if !defined(_LOCORE)
58 void * intr_establish(int, int, int, int (*)(void *), void *);
59 void intr_disestablish(void *);
60 const char *
61 intr_typename(int);
62
63 int splraise(int);
64 int spllower(int);
65 void splx(int);
66
67 #if !defined(_MODULE)
68
69 void genppc_cpu_configure(void);
70
71 /*
72 * Interrupt handler chains. intr_establish() inserts a handler into
73 * the list. The handler is called with its (single) argument.
74 */
75 struct intrhand {
76 int (*ih_fun)(void *);
77 void *ih_arg;
78 struct intrhand *ih_next;
79 int ih_ipl;
80 int ih_virq;
81 };
82
83 void softint_fast_dispatch(struct lwp *, int);
84
85 #define softint_init_md powerpc_softint_init_md
86 #define softint_trigger powerpc_softint_trigger
87
88 #ifdef __IMASK_T
89 typedef __IMASK_T imask_t;
90 #else
91 typedef uint32_t imask_t;
92 #endif
93
94 extern imask_t imask[];
95
96 #define NVIRQ (sizeof(imask_t)*8) /* 32 virtual IRQs */
97 #ifndef NIRQ
98 #define NIRQ 128 /* up to 128 HW IRQs */
99 #endif
100
101 #define HWIRQ_MAX (NVIRQ - 1)
102 #define HWIRQ_MASK (~(imask_t)0 >> 1)
103
104 #define PIC_VIRQ_TO_MASK(v) __BIT(HWIRQ_MAX - (v))
105 #define PIC_VIRQ_MS_PENDING(p) __builtin_clz(p)
106
107 #endif /* !_MODULE */
108
109 #define spl0() spllower(0)
110
111 typedef int ipl_t;
112 typedef struct {
113 ipl_t _ipl;
114 } ipl_cookie_t;
115
116 static inline ipl_cookie_t
117 makeiplcookie(ipl_t ipl)
118 {
119
120 return (ipl_cookie_t){._ipl = ipl};
121 }
122
123 static inline int
124 splraiseipl(ipl_cookie_t icookie)
125 {
126
127 return splraise(icookie._ipl);
128 }
129
130 #include <sys/spl.h>
131
132 #endif /* _LOCORE */
133
134 #endif /* POWERPC_INTR_MACHDEP_H */
135