mcontext.h revision 1.6 1 /* $NetBSD: mcontext.h,v 1.6 2003/10/08 22:43:01 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Klaus Klein.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _POWERPC_MCONTEXT_H_
40 #define _POWERPC_MCONTEXT_H_
41
42 /*
43 * Layout of mcontext_t based on the System V Application Binary Interface,
44 * Edition 4.1, PowerPC Processor ABI Supplement - September 1995, and
45 * extended for the AltiVec Register File. Note that due to the increased
46 * alignment requirements of the latter, the offset of mcontext_t within
47 * an ucontext_t is different from System V.
48 */
49
50 #define _NGREG 39 /* GR0-31, CR, LR, SRR0, SRR1, CTR, XER, MQ */
51
52 typedef long __greg_t;
53 typedef __greg_t __gregset_t[_NGREG];
54
55 #define _REG_R0 0
56 #define _REG_R1 1
57 #define _REG_R2 2
58 #define _REG_R3 3
59 #define _REG_R4 4
60 #define _REG_R5 5
61 #define _REG_R6 6
62 #define _REG_R7 7
63 #define _REG_R8 8
64 #define _REG_R9 9
65 #define _REG_R10 10
66 #define _REG_R11 11
67 #define _REG_R12 12
68 #define _REG_R13 13
69 #define _REG_R14 14
70 #define _REG_R15 15
71 #define _REG_R16 16
72 #define _REG_R17 17
73 #define _REG_R18 18
74 #define _REG_R19 19
75 #define _REG_R20 20
76 #define _REG_R21 21
77 #define _REG_R22 22
78 #define _REG_R23 23
79 #define _REG_R24 24
80 #define _REG_R25 25
81 #define _REG_R26 26
82 #define _REG_R27 27
83 #define _REG_R28 28
84 #define _REG_R29 29
85 #define _REG_R30 30
86 #define _REG_R31 31
87 #define _REG_CR 32 /* Condition Register */
88 #define _REG_LR 33 /* Link Register */
89 #define _REG_PC 34 /* PC (copy of SRR0) */
90 #define _REG_MSR 35 /* MSR (copy of SRR1) */
91 #define _REG_CTR 36 /* Count Register */
92 #define _REG_XER 37 /* Integet Exception Reigster */
93 #define _REG_MQ 38 /* MQ Register (POWER only) */
94
95 typedef struct {
96 double __fpu_regs[32]; /* FP0-31 */
97 unsigned int __fpu_fpscr; /* FP Status and Control Register */
98 unsigned int __fpu_valid; /* Set together with _UC_FPU */
99 } __fpregset_t;
100
101 #define _NVR 32 /* Number of Vector registers */
102
103 typedef struct {
104 union __vr {
105 unsigned char __vr8[16];
106 unsigned short __vr16[8];
107 unsigned int __vr32[4];
108 } __vrs[_NVR] __attribute__((__aligned__(16)));
109 unsigned int __vscr; /* VSCR */
110 unsigned int __vrsave; /* VRSAVE */
111 } __vrf_t;
112
113 typedef struct {
114 __gregset_t __gregs; /* General Purpose Register set */
115 __fpregset_t __fpregs; /* Floating Point Register set */
116 __vrf_t __vrf; /* Vector Register File */
117 } mcontext_t;
118
119 /* Machine-dependent uc_flags */
120 #define _UC_POWERPC_VEC 0x00010000 /* Vector Register File valid */
121
122 #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_R1])
123 #define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
124 #define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_R3])
125
126 #define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc)
127
128 #endif /* !_POWERPC_MCONTEXT_H_ */
129