hid_601.h revision 1.1 1 /* $NetBSD: hid_601.h,v 1.1 2003/02/03 17:10:05 matt Exp $ */
2
3 /*-
4 * Copyright (c) 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _POWERPC_OEA_HID_601_H_
40 #define _POWERPC_OEA_HID_601_H_
41 /*
42 * Hardware Implementation Dependent registers for the PowerPC 601.
43 */
44
45 /*
46 * HID0 (SPR 1008) -- Checkstop Enable/Disable and Status register
47 */
48 /* v- feature bits -v */
49 #define HID0_601_EHP 0x00000001 /* enable HP_SNP_REQ# */
50 #define HID0_601_EMC 0x00000002 /* main cache error */
51 #define HID0_601_PAR 0x00000004 /* precharge of ARTRY#/SHD# disabled */
52 #define HID0_601_LM 0x00000008 /* little endian mode */
53 #define HID0_601_DRL 0x00000010 /* alt sec rld of load/store miss */
54 #define HID0_601_DRF 0x00000020 /* alt sec rld of insn fetch miss */
55 /* v- checkstop enable/disable bits -v */
56 #define HID0_601_EPP 0x00000040 /* i/o protocol checkstop */
57 #define HID0_601_EIU 0x00000080 /* invalid uCode checkstop */
58 #define HID0_601_ECP 0x00000100 /* cache parity checkstop */
59 #define HID0_601_EBD 0x00000200 /* data bus parity checkstop */
60 #define HID0_601_EBA 0x00000400 /* address bus parity checkstop */
61 #define HID0_601_EDT 0x00000800 /* dispatch timeout checkstop */
62 #define HID0_601_ESH 0x00001000 /* sequencer timeout checkstop */
63 #define HID0_601_ECD 0x00002000 /* cache checkstop */
64 #define HID0_601_ETD 0x00004000 /* TLB checkstop */
65 #define HID0_601_EM 0x00008000 /* machine checkstop */
66 #define HID0_601_ES 0x00010000 /* uCode checkstop */
67 /* 0x00020000 reserved */
68 /* 0x00040000 reserved */
69 /* 0x00080000 reserved */
70 /* v- status bits -- correspond to enable bits above -v */
71 #define HID0_601_PP 0x00100000
72 #define HID0_601_IU 0x00200000
73 #define HID0_601_CP 0x00400000
74 #define HID0_601_BD 0x00800000
75 #define HID0_601_BA 0x01000000
76 #define HID0_601_DT 0x02000000
77 #define HID0_601_SH 0x04000000
78 #define HID0_601_CD 0x08000000
79 #define HID0_601_TD 0x10000000
80 #define HID0_601_M 0x20000000
81 #define HID0_601_S 0x40000000
82
83 #define HID0_601_CE 0x80000000 /* master checkstop enable */
84
85 #define HID0_601_BITMASK "\020" \
86 "\040CE\037S\036M\035TD\034CD\033SH\032DT\031BA" \
87 "\030BD\027CP\026IU\025PP\021ES" \
88 "\020EM\017ETC\016ECD\015ESH\014EDT\013EBA\012EBD\011ECP" \
89 "\010EIU\007EPP\006DRF\005DRL\004LM\003PAR\002EMC\001EHP"
90
91
92 /*
93 * HID1 (SPR 1009) -- Debug Modes register
94 */
95 /* XXX */
96
97
98 /*
99 * HID2 (SPR 1010) -- Instruction Address Breakpoint Register
100 */
101
102
103 /*
104 * HID5 (SPR 1013) -- Data Address Breakpoint Register
105 */
106
107
108 /*
109 * HID15 (SPR 1023) -- Processor ID Register
110 */
111 #define HID15_601_PID 0x0000000f /* processor ID mask */
112
113 #endif /* _POWERPC_OEA_HID_601_H_ */
114