1 1.31 rin /* $NetBSD: userret.h,v 1.31 2020/07/06 09:34:17 rin Exp $ */ 2 1.1 chs 3 1.1 chs /* 4 1.1 chs * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5 1.1 chs * Copyright (C) 1995, 1996 TooLs GmbH. 6 1.1 chs * All rights reserved. 7 1.1 chs * 8 1.1 chs * Redistribution and use in source and binary forms, with or without 9 1.1 chs * modification, are permitted provided that the following conditions 10 1.1 chs * are met: 11 1.1 chs * 1. Redistributions of source code must retain the above copyright 12 1.1 chs * notice, this list of conditions and the following disclaimer. 13 1.1 chs * 2. Redistributions in binary form must reproduce the above copyright 14 1.1 chs * notice, this list of conditions and the following disclaimer in the 15 1.1 chs * documentation and/or other materials provided with the distribution. 16 1.1 chs * 3. All advertising materials mentioning features or use of this software 17 1.1 chs * must display the following acknowledgement: 18 1.1 chs * This product includes software developed by TooLs GmbH. 19 1.1 chs * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 1.1 chs * derived from this software without specific prior written permission. 21 1.1 chs * 22 1.1 chs * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 1.1 chs * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 1.1 chs * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 1.1 chs * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 1.1 chs * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 1.1 chs * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 1.1 chs * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 1.1 chs * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 1.1 chs * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 1.1 chs * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 1.1 chs */ 33 1.1 chs 34 1.31 rin #ifdef _KERNEL_OPT 35 1.31 rin #include "opt_altivec.h" 36 1.18 matt #include "opt_ppcarch.h" 37 1.31 rin #endif 38 1.3 chs 39 1.5 cl #include <sys/userret.h> 40 1.24 matt #include <sys/ras.h> 41 1.5 cl 42 1.3 chs #include <powerpc/fpu.h> 43 1.21 matt #include <powerpc/psl.h> 44 1.3 chs 45 1.18 matt #ifdef PPC_BOOKE 46 1.18 matt #include <powerpc/spr.h> 47 1.18 matt #include <powerpc/booke/spr.h> 48 1.18 matt #endif 49 1.18 matt 50 1.1 chs /* 51 1.1 chs * Define the code needed before returning to user mode, for 52 1.1 chs * trap and syscall. 53 1.1 chs */ 54 1.13 perry static __inline void 55 1.17 matt userret(struct lwp *l, struct trapframe *tf) 56 1.1 chs { 57 1.17 matt KASSERTMSG((tf == trapframe(curlwp)), 58 1.22 jym "tf=%p, trapframe(curlwp)=%p\n", tf, trapframe(curlwp)); 59 1.1 chs 60 1.5 cl /* Invoke MI userret code */ 61 1.5 cl mi_userret(l); 62 1.4 thorpej 63 1.23 matt KASSERTMSG((tf->tf_srr1 & PSL_PR) != 0, 64 1.23 matt "tf=%p: srr1 (%#lx): PSL_PR isn't set!", 65 1.23 matt tf, tf->tf_srr1); 66 1.29 matt KASSERTMSG((tf->tf_srr1 & PSL_FP) == 0 67 1.29 matt || l->l_cpu->ci_data.cpu_pcu_curlwp[PCU_FPU] == l, 68 1.29 matt "tf=%p: srr1 (%#lx): PSL_FP set but FPU curlwp %p is not curlwp %p!", 69 1.29 matt tf, tf->tf_srr1, l->l_cpu->ci_data.cpu_pcu_curlwp[PCU_FPU], l); 70 1.23 matt 71 1.30 matt /* clear SRR1 status bits */ 72 1.30 matt tf->tf_srr1 &= (PSL_USERSRR1|PSL_FP|PSL_VEC); 73 1.1 chs 74 1.1 chs #ifdef ALTIVEC 75 1.9 matt /* 76 1.9 matt * We need to manually restore PSL_VEC each time we return 77 1.20 matt * to user mode since PSL_VEC isn't always preserved in SRR1. 78 1.20 matt * We keep a copy of it in md_flags to make restoring easier. 79 1.9 matt */ 80 1.20 matt tf->tf_srr1 |= l->l_md.md_flags & PSL_VEC; 81 1.1 chs #endif 82 1.18 matt #ifdef PPC_BOOKE 83 1.18 matt /* 84 1.25 matt * BookE doesn't have PSL_SE but it does have a debug instruction 85 1.26 matt * completion exception but it needs PSL_DE to fire. Instead we 86 1.26 matt * use IAC1/IAC2 to match the next PC. 87 1.18 matt */ 88 1.27 matt if (__predict_false(tf->tf_srr1 & PSL_SE)) { 89 1.28 matt tf->tf_srr1 &= ~PSL_SE; 90 1.18 matt extern void booke_sstep(struct trapframe *); /* ugly */ 91 1.18 matt booke_sstep(tf); 92 1.18 matt } 93 1.18 matt #endif 94 1.24 matt 95 1.24 matt #ifdef __HAVE_RAS 96 1.24 matt /* 97 1.24 matt * Check to see if a RAS was interrupted and restart it if it was. 98 1.24 matt */ 99 1.24 matt struct proc * const p = l->l_proc; 100 1.24 matt if (__predict_false(p->p_raslist != NULL)) { 101 1.24 matt void * const ras_pc = ras_lookup(p, (void *) tf->tf_srr0); 102 1.24 matt if (ras_pc != (void *) -1) 103 1.24 matt tf->tf_srr0 = (vaddr_t) ras_pc; 104 1.24 matt } 105 1.24 matt #endif 106 1.1 chs } 107