userret.h revision 1.8 1 1.8 matt /* $NetBSD: userret.h,v 1.8 2004/04/06 02:25:22 matt Exp $ */
2 1.1 chs
3 1.1 chs /*
4 1.1 chs * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5 1.1 chs * Copyright (C) 1995, 1996 TooLs GmbH.
6 1.1 chs * All rights reserved.
7 1.1 chs *
8 1.1 chs * Redistribution and use in source and binary forms, with or without
9 1.1 chs * modification, are permitted provided that the following conditions
10 1.1 chs * are met:
11 1.1 chs * 1. Redistributions of source code must retain the above copyright
12 1.1 chs * notice, this list of conditions and the following disclaimer.
13 1.1 chs * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 chs * notice, this list of conditions and the following disclaimer in the
15 1.1 chs * documentation and/or other materials provided with the distribution.
16 1.1 chs * 3. All advertising materials mentioning features or use of this software
17 1.1 chs * must display the following acknowledgement:
18 1.1 chs * This product includes software developed by TooLs GmbH.
19 1.1 chs * 4. The name of TooLs GmbH may not be used to endorse or promote products
20 1.1 chs * derived from this software without specific prior written permission.
21 1.1 chs *
22 1.1 chs * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23 1.1 chs * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 chs * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 chs * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 1.1 chs * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 1.1 chs * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28 1.1 chs * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 1.1 chs * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 1.1 chs * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 1.1 chs * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 chs */
33 1.1 chs
34 1.3 chs #include "opt_altivec.h"
35 1.3 chs
36 1.5 cl #include <sys/userret.h>
37 1.5 cl
38 1.3 chs #include <powerpc/fpu.h>
39 1.3 chs
40 1.1 chs /*
41 1.1 chs * Define the code needed before returning to user mode, for
42 1.1 chs * trap and syscall.
43 1.1 chs */
44 1.1 chs static __inline void
45 1.4 thorpej userret(struct lwp *l, struct trapframe *frame)
46 1.1 chs {
47 1.1 chs struct cpu_info *ci = curcpu();
48 1.1 chs struct pcb *pcb;
49 1.1 chs
50 1.5 cl /* Invoke MI userret code */
51 1.5 cl mi_userret(l);
52 1.4 thorpej
53 1.4 thorpej pcb = &l->l_addr->u_pcb;
54 1.1 chs
55 1.1 chs /*
56 1.1 chs * If someone stole the fp or vector unit while we were away,
57 1.8 matt * disable it. Note that if the PSL FP/VEC bits aren't set, then
58 1.8 matt * we don't own it.
59 1.1 chs */
60 1.3 chs #ifdef PPC_HAVE_FPU
61 1.8 matt if ((frame->srr1 & PSL_FP) &&
62 1.4 thorpej (l != ci->ci_fpulwp || pcb->pcb_fpcpu != ci)) {
63 1.7 matt frame->srr1 &= ~(PSL_FP|PSL_FE0|PSL_FE1);
64 1.1 chs }
65 1.1 chs #endif
66 1.1 chs #ifdef ALTIVEC
67 1.8 matt if ((frame->srr1 & PSL_VEC) &&
68 1.4 thorpej (l != ci->ci_veclwp || pcb->pcb_veccpu != ci)) {
69 1.1 chs frame->srr1 &= ~PSL_VEC;
70 1.1 chs }
71 1.1 chs
72 1.1 chs /*
73 1.1 chs * If the new process isn't the current AltiVec process on this
74 1.6 wiz * CPU, we need to stop any data streams that are active (since
75 1.1 chs * it will be a different address space).
76 1.1 chs */
77 1.4 thorpej if (ci->ci_veclwp != NULL && ci->ci_veclwp != l) {
78 1.1 chs __asm __volatile("dssall;sync");
79 1.1 chs }
80 1.1 chs #endif
81 1.1 chs
82 1.4 thorpej ci->ci_schedstate.spc_curpriority = l->l_priority = l->l_usrpri;
83 1.1 chs }
84