isadma_machdep.c revision 1.7 1 1.7 dyoung /* $NetBSD: isadma_machdep.c,v 1.7 2011/07/01 18:59:19 dyoung Exp $ */
2 1.1 matt
3 1.1 matt /*-
4 1.1 matt * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
8 1.1 matt * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 matt * NASA Ames Research Center.
10 1.1 matt *
11 1.1 matt * Redistribution and use in source and binary forms, with or without
12 1.1 matt * modification, are permitted provided that the following conditions
13 1.1 matt * are met:
14 1.1 matt * 1. Redistributions of source code must retain the above copyright
15 1.1 matt * notice, this list of conditions and the following disclaimer.
16 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 matt * notice, this list of conditions and the following disclaimer in the
18 1.1 matt * documentation and/or other materials provided with the distribution.
19 1.1 matt *
20 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
31 1.1 matt */
32 1.1 matt
33 1.1 matt #include <sys/cdefs.h>
34 1.7 dyoung __KERNEL_RCSID(0, "$NetBSD: isadma_machdep.c,v 1.7 2011/07/01 18:59:19 dyoung Exp $");
35 1.1 matt
36 1.1 matt #define ISA_DMA_STATS
37 1.1 matt
38 1.1 matt #include <sys/param.h>
39 1.1 matt #include <sys/systm.h>
40 1.1 matt #include <sys/syslog.h>
41 1.1 matt #include <sys/device.h>
42 1.1 matt #include <sys/malloc.h>
43 1.1 matt #include <sys/proc.h>
44 1.1 matt #include <sys/mbuf.h>
45 1.1 matt
46 1.1 matt #define _POWERPC_BUS_DMA_PRIVATE
47 1.7 dyoung #include <sys/bus.h>
48 1.1 matt
49 1.1 matt #include <machine/pio.h>
50 1.1 matt
51 1.1 matt #include <dev/isa/isareg.h>
52 1.1 matt #include <dev/isa/isavar.h>
53 1.1 matt
54 1.1 matt #include <uvm/uvm.h>
55 1.1 matt
56 1.1 matt /*
57 1.1 matt * Cookie used by ISA dma. A pointer to one of these it stashed in
58 1.1 matt * the DMA map.
59 1.1 matt */
60 1.1 matt struct powerpc_isa_dma_cookie {
61 1.1 matt int id_flags; /* flags; see below */
62 1.1 matt
63 1.1 matt /*
64 1.1 matt * Information about the original buffer used during
65 1.1 matt * DMA map syncs. Note that origbuflen is only used
66 1.1 matt * for ID_BUFTYPE_LINEAR.
67 1.1 matt */
68 1.1 matt void *id_origbuf; /* pointer to orig buffer if
69 1.1 matt bouncing */
70 1.1 matt bus_size_t id_origbuflen; /* ...and size */
71 1.1 matt int id_buftype; /* type of buffer */
72 1.1 matt
73 1.1 matt void *id_bouncebuf; /* pointer to the bounce buffer */
74 1.1 matt bus_size_t id_bouncebuflen; /* ...and size */
75 1.1 matt int id_nbouncesegs; /* number of valid bounce segs */
76 1.1 matt bus_dma_segment_t id_bouncesegs[0]; /* array of bounce buffer
77 1.1 matt physical memory segments */
78 1.1 matt };
79 1.1 matt
80 1.1 matt /* id_flags */
81 1.1 matt #define ID_MIGHT_NEED_BOUNCE 0x01 /* map could need bounce buffers */
82 1.1 matt #define ID_HAS_BOUNCE 0x02 /* map currently has bounce buffers */
83 1.1 matt #define ID_IS_BOUNCING 0x04 /* map is bouncing current xfer */
84 1.1 matt
85 1.1 matt /* id_buftype */
86 1.1 matt #define ID_BUFTYPE_INVALID 0
87 1.1 matt #define ID_BUFTYPE_LINEAR 1
88 1.1 matt #define ID_BUFTYPE_MBUF 2
89 1.1 matt #define ID_BUFTYPE_UIO 3
90 1.1 matt #define ID_BUFTYPE_RAW 4
91 1.1 matt
92 1.1 matt static int _isa_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int,
93 1.1 matt bus_size_t, bus_size_t, int, bus_dmamap_t *);
94 1.1 matt static void _isa_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
95 1.1 matt static int _isa_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
96 1.1 matt bus_size_t, struct proc *, int);
97 1.1 matt static int _isa_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
98 1.1 matt struct mbuf *, int);
99 1.1 matt static int _isa_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
100 1.1 matt struct uio *, int);
101 1.1 matt static int _isa_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
102 1.1 matt bus_dma_segment_t *, int, bus_size_t, int);
103 1.1 matt static void _isa_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
104 1.1 matt static void _isa_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t,
105 1.1 matt bus_addr_t, bus_size_t, int);
106 1.1 matt
107 1.1 matt static int _isa_bus_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
108 1.1 matt bus_size_t, bus_dma_segment_t *, int, int *, int);
109 1.1 matt
110 1.1 matt static int _isa_dma_alloc_bouncebuf(bus_dma_tag_t, bus_dmamap_t,
111 1.1 matt bus_size_t, int);
112 1.1 matt static void _isa_dma_free_bouncebuf(bus_dma_tag_t, bus_dmamap_t);
113 1.1 matt
114 1.1 matt /*
115 1.1 matt * Entry points for ISA DMA. These are mostly wrappers around
116 1.1 matt * the generic functions that understand how to deal with bounce
117 1.1 matt * buffers, if necessary.
118 1.1 matt */
119 1.1 matt struct powerpc_bus_dma_tag isa_bus_dma_tag = {
120 1.1 matt ISA_DMA_BOUNCE_THRESHOLD,
121 1.1 matt _isa_bus_dmamap_create,
122 1.1 matt _isa_bus_dmamap_destroy,
123 1.1 matt _isa_bus_dmamap_load,
124 1.1 matt _isa_bus_dmamap_load_mbuf,
125 1.1 matt _isa_bus_dmamap_load_uio,
126 1.1 matt _isa_bus_dmamap_load_raw,
127 1.1 matt _isa_bus_dmamap_unload,
128 1.1 matt _isa_bus_dmamap_sync,
129 1.1 matt _isa_bus_dmamem_alloc,
130 1.1 matt _bus_dmamem_free,
131 1.1 matt _bus_dmamem_map,
132 1.1 matt _bus_dmamem_unmap,
133 1.1 matt _bus_dmamem_mmap,
134 1.1 matt };
135 1.1 matt
136 1.1 matt /**********************************************************************
137 1.1 matt * bus.h dma interface entry points
138 1.1 matt **********************************************************************/
139 1.1 matt
140 1.1 matt #ifdef ISA_DMA_STATS
141 1.1 matt #define STAT_INCR(v) (v)++
142 1.1 matt #define STAT_DECR(v) do { \
143 1.1 matt if ((v) == 0) \
144 1.1 matt printf("%s:%d -- Already 0!\n", __FILE__, __LINE__); \
145 1.1 matt else \
146 1.1 matt (v)--; \
147 1.1 matt } while (0)
148 1.1 matt u_long isa_dma_stats_loads;
149 1.1 matt u_long isa_dma_stats_bounces;
150 1.1 matt u_long isa_dma_stats_nbouncebufs;
151 1.1 matt #else
152 1.1 matt #define STAT_INCR(v)
153 1.1 matt #define STAT_DECR(v)
154 1.1 matt #endif
155 1.1 matt
156 1.1 matt /*
157 1.1 matt * Create an ISA DMA map.
158 1.1 matt */
159 1.1 matt int
160 1.1 matt _isa_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
161 1.1 matt bus_size_t maxsegsz, bus_size_t boundary, int flags,
162 1.1 matt bus_dmamap_t *dmamp)
163 1.1 matt {
164 1.1 matt struct powerpc_isa_dma_cookie *cookie;
165 1.1 matt bus_dmamap_t map;
166 1.1 matt int error, cookieflags, bank;
167 1.1 matt void *cookiestore;
168 1.1 matt size_t cookiesize;
169 1.1 matt paddr_t avail_end = 0;
170 1.1 matt
171 1.1 matt for (bank = 0; bank < vm_nphysseg; bank++) {
172 1.6 uebayasi if (avail_end < VM_PHYSMEM_PTR(bank)->avail_end << PGSHIFT)
173 1.6 uebayasi avail_end = VM_PHYSMEM_PTR(bank)->avail_end << PGSHIFT;
174 1.1 matt }
175 1.1 matt
176 1.1 matt /* Call common function to create the basic map. */
177 1.1 matt error = _bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
178 1.1 matt flags, dmamp);
179 1.1 matt if (error)
180 1.1 matt return (error);
181 1.1 matt
182 1.1 matt map = *dmamp;
183 1.1 matt map->_dm_cookie = NULL;
184 1.1 matt
185 1.1 matt cookiesize = sizeof(struct powerpc_isa_dma_cookie);
186 1.1 matt
187 1.1 matt /*
188 1.1 matt * ISA only has 24-bits of address space. This means
189 1.1 matt * we can't DMA to pages over 16M. In order to DMA to
190 1.1 matt * arbitrary buffers, we use "bounce buffers" - pages
191 1.1 matt * in memory below the 16M boundary. On DMA reads,
192 1.1 matt * DMA happens to the bounce buffers, and is copied into
193 1.1 matt * the caller's buffer. On writes, data is copied into
194 1.1 matt * but bounce buffer, and the DMA happens from those
195 1.1 matt * pages. To software using the DMA mapping interface,
196 1.1 matt * this looks simply like a data cache.
197 1.1 matt *
198 1.1 matt * If we have more than 16M of RAM in the system, we may
199 1.1 matt * need bounce buffers. We check and remember that here.
200 1.1 matt *
201 1.1 matt * There are exceptions, however. VLB devices can do
202 1.1 matt * 32-bit DMA, and indicate that here.
203 1.1 matt *
204 1.1 matt * ...or, there is an opposite case. The most segments
205 1.1 matt * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If
206 1.1 matt * the caller can't handle that many segments (e.g. the
207 1.1 matt * ISA DMA controller), we may have to bounce it as well.
208 1.1 matt */
209 1.1 matt if (avail_end <= t->_bounce_thresh ||
210 1.1 matt (flags & ISABUS_DMA_32BIT) != 0) {
211 1.1 matt /* Bouncing not necessary due to memory size. */
212 1.1 matt map->_dm_bounce_thresh = 0;
213 1.1 matt }
214 1.1 matt cookieflags = 0;
215 1.1 matt if (map->_dm_bounce_thresh != 0 ||
216 1.1 matt ((map->_dm_size / PAGE_SIZE) + 1) > map->_dm_segcnt) {
217 1.1 matt cookieflags |= ID_MIGHT_NEED_BOUNCE;
218 1.1 matt cookiesize += (sizeof(bus_dma_segment_t) * map->_dm_segcnt);
219 1.1 matt }
220 1.1 matt
221 1.1 matt /*
222 1.1 matt * Allocate our cookie.
223 1.1 matt */
224 1.1 matt if ((cookiestore = malloc(cookiesize, M_DMAMAP,
225 1.1 matt (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
226 1.1 matt error = ENOMEM;
227 1.1 matt goto out;
228 1.1 matt }
229 1.1 matt memset(cookiestore, 0, cookiesize);
230 1.1 matt cookie = (struct powerpc_isa_dma_cookie *)cookiestore;
231 1.1 matt cookie->id_flags = cookieflags;
232 1.1 matt map->_dm_cookie = cookie;
233 1.1 matt
234 1.1 matt if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
235 1.1 matt /*
236 1.1 matt * Allocate the bounce pages now if the caller
237 1.1 matt * wishes us to do so.
238 1.1 matt */
239 1.1 matt if ((flags & BUS_DMA_ALLOCNOW) == 0)
240 1.1 matt goto out;
241 1.1 matt
242 1.1 matt error = _isa_dma_alloc_bouncebuf(t, map, size, flags);
243 1.1 matt }
244 1.1 matt
245 1.1 matt out:
246 1.1 matt if (error) {
247 1.1 matt if (map->_dm_cookie != NULL)
248 1.1 matt free(map->_dm_cookie, M_DMAMAP);
249 1.1 matt _bus_dmamap_destroy(t, map);
250 1.1 matt }
251 1.1 matt return (error);
252 1.1 matt }
253 1.1 matt
254 1.1 matt /*
255 1.1 matt * Destroy an ISA DMA map.
256 1.1 matt */
257 1.1 matt void
258 1.1 matt _isa_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
259 1.1 matt {
260 1.1 matt struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
261 1.1 matt
262 1.1 matt /*
263 1.1 matt * Free any bounce pages this map might hold.
264 1.1 matt */
265 1.1 matt if (cookie->id_flags & ID_HAS_BOUNCE)
266 1.1 matt _isa_dma_free_bouncebuf(t, map);
267 1.1 matt
268 1.1 matt free(cookie, M_DMAMAP);
269 1.1 matt _bus_dmamap_destroy(t, map);
270 1.1 matt }
271 1.1 matt
272 1.1 matt /*
273 1.1 matt * Load an ISA DMA map with a linear buffer.
274 1.1 matt */
275 1.1 matt int
276 1.1 matt _isa_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
277 1.1 matt bus_size_t buflen, struct proc *p, int flags)
278 1.1 matt {
279 1.1 matt struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
280 1.1 matt int error;
281 1.1 matt
282 1.1 matt STAT_INCR(isa_dma_stats_loads);
283 1.1 matt
284 1.1 matt /*
285 1.1 matt * Make sure that on error condition we return "no valid mappings."
286 1.1 matt */
287 1.1 matt map->dm_mapsize = 0;
288 1.1 matt map->dm_nsegs = 0;
289 1.1 matt
290 1.1 matt /*
291 1.1 matt * Try to load the map the normal way. If this errors out,
292 1.1 matt * and we can bounce, we will.
293 1.1 matt */
294 1.1 matt error = _bus_dmamap_load(t, map, buf, buflen, p, flags);
295 1.1 matt if (error == 0 ||
296 1.1 matt (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
297 1.1 matt return (error);
298 1.1 matt
299 1.1 matt /*
300 1.1 matt * First attempt failed; bounce it.
301 1.1 matt */
302 1.1 matt
303 1.1 matt STAT_INCR(isa_dma_stats_bounces);
304 1.1 matt
305 1.1 matt /*
306 1.1 matt * Allocate bounce pages, if necessary.
307 1.1 matt */
308 1.1 matt if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
309 1.1 matt error = _isa_dma_alloc_bouncebuf(t, map, buflen, flags);
310 1.1 matt if (error)
311 1.1 matt return (error);
312 1.1 matt }
313 1.1 matt
314 1.1 matt /*
315 1.1 matt * Cache a pointer to the caller's buffer and load the DMA map
316 1.1 matt * with the bounce buffer.
317 1.1 matt */
318 1.1 matt cookie->id_origbuf = buf;
319 1.1 matt cookie->id_origbuflen = buflen;
320 1.1 matt cookie->id_buftype = ID_BUFTYPE_LINEAR;
321 1.1 matt error = _bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
322 1.1 matt p, flags);
323 1.1 matt if (error) {
324 1.1 matt /*
325 1.1 matt * Free the bounce pages, unless our resources
326 1.1 matt * are reserved for our exclusive use.
327 1.1 matt */
328 1.1 matt if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
329 1.1 matt _isa_dma_free_bouncebuf(t, map);
330 1.1 matt return (error);
331 1.1 matt }
332 1.1 matt
333 1.1 matt /* ...so _isa_bus_dmamap_sync() knows we're bouncing */
334 1.1 matt cookie->id_flags |= ID_IS_BOUNCING;
335 1.1 matt return (0);
336 1.1 matt }
337 1.1 matt
338 1.1 matt /*
339 1.1 matt * Like _isa_bus_dmamap_load(), but for mbufs.
340 1.1 matt */
341 1.1 matt int
342 1.1 matt _isa_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
343 1.1 matt int flags)
344 1.1 matt {
345 1.1 matt struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
346 1.1 matt int error;
347 1.1 matt
348 1.1 matt /*
349 1.1 matt * Make sure that on error condition we return "no valid mappings."
350 1.1 matt */
351 1.1 matt map->dm_mapsize = 0;
352 1.1 matt map->dm_nsegs = 0;
353 1.1 matt
354 1.1 matt #ifdef DIAGNOSTIC
355 1.1 matt if ((m0->m_flags & M_PKTHDR) == 0)
356 1.1 matt panic("_isa_bus_dmamap_load_mbuf: no packet header");
357 1.1 matt #endif
358 1.1 matt
359 1.1 matt if (m0->m_pkthdr.len > map->_dm_size)
360 1.1 matt return (EINVAL);
361 1.1 matt
362 1.1 matt /*
363 1.1 matt * Try to load the map the normal way. If this errors out,
364 1.1 matt * and we can bounce, we will.
365 1.1 matt */
366 1.1 matt error = _bus_dmamap_load_mbuf(t, map, m0, flags);
367 1.1 matt if (error == 0 ||
368 1.1 matt (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
369 1.1 matt return (error);
370 1.1 matt
371 1.1 matt /*
372 1.1 matt * First attempt failed; bounce it.
373 1.1 matt */
374 1.1 matt
375 1.1 matt STAT_INCR(isa_dma_stats_bounces);
376 1.1 matt
377 1.1 matt /*
378 1.1 matt * Allocate bounce pages, if necessary.
379 1.1 matt */
380 1.1 matt if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
381 1.1 matt error = _isa_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
382 1.1 matt flags);
383 1.1 matt if (error)
384 1.1 matt return (error);
385 1.1 matt }
386 1.1 matt
387 1.1 matt /*
388 1.1 matt * Cache a pointer to the caller's buffer and load the DMA map
389 1.1 matt * with the bounce buffer.
390 1.1 matt */
391 1.1 matt cookie->id_origbuf = m0;
392 1.1 matt cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
393 1.1 matt cookie->id_buftype = ID_BUFTYPE_MBUF;
394 1.1 matt error = _bus_dmamap_load(t, map, cookie->id_bouncebuf,
395 1.1 matt m0->m_pkthdr.len, NULL, flags);
396 1.1 matt if (error) {
397 1.1 matt /*
398 1.1 matt * Free the bounce pages, unless our resources
399 1.1 matt * are reserved for our exclusive use.
400 1.1 matt */
401 1.1 matt if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
402 1.1 matt _isa_dma_free_bouncebuf(t, map);
403 1.1 matt return (error);
404 1.1 matt }
405 1.1 matt
406 1.1 matt /* ...so _isa_bus_dmamap_sync() knows we're bouncing */
407 1.1 matt cookie->id_flags |= ID_IS_BOUNCING;
408 1.1 matt return (0);
409 1.1 matt }
410 1.1 matt
411 1.1 matt /*
412 1.1 matt * Like _isa_bus_dmamap_load(), but for uios.
413 1.1 matt */
414 1.1 matt int
415 1.1 matt _isa_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map,
416 1.1 matt struct uio *uio, int flags)
417 1.1 matt {
418 1.1 matt
419 1.1 matt panic("_isa_bus_dmamap_load_uio: not implemented");
420 1.1 matt }
421 1.1 matt
422 1.1 matt /*
423 1.1 matt * Like _isa_bus_dmamap_load(), but for raw memory allocated with
424 1.1 matt * bus_dmamem_alloc().
425 1.1 matt */
426 1.1 matt int
427 1.1 matt _isa_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
428 1.1 matt bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
429 1.1 matt {
430 1.1 matt
431 1.1 matt panic("_isa_bus_dmamap_load_raw: not implemented");
432 1.1 matt }
433 1.1 matt
434 1.1 matt /*
435 1.1 matt * Unload an ISA DMA map.
436 1.1 matt */
437 1.1 matt void
438 1.1 matt _isa_bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
439 1.1 matt {
440 1.1 matt struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
441 1.1 matt
442 1.1 matt /*
443 1.1 matt * If we have bounce pages, free them, unless they're
444 1.1 matt * reserved for our exclusive use.
445 1.1 matt */
446 1.1 matt if ((cookie->id_flags & ID_HAS_BOUNCE) &&
447 1.1 matt (map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
448 1.1 matt _isa_dma_free_bouncebuf(t, map);
449 1.1 matt
450 1.1 matt cookie->id_flags &= ~ID_IS_BOUNCING;
451 1.1 matt cookie->id_buftype = ID_BUFTYPE_INVALID;
452 1.1 matt
453 1.1 matt /*
454 1.1 matt * Do the generic bits of the unload.
455 1.1 matt */
456 1.1 matt _bus_dmamap_unload(t, map);
457 1.1 matt }
458 1.1 matt
459 1.1 matt /*
460 1.1 matt * Synchronize an ISA DMA map.
461 1.1 matt */
462 1.1 matt void
463 1.1 matt _isa_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
464 1.1 matt bus_size_t len, int ops)
465 1.1 matt {
466 1.1 matt struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
467 1.1 matt
468 1.1 matt /*
469 1.1 matt * Mixing PRE and POST operations is not allowed.
470 1.1 matt */
471 1.1 matt if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
472 1.1 matt (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
473 1.1 matt panic("_isa_bus_dmamap_sync: mix PRE and POST");
474 1.1 matt
475 1.1 matt #ifdef DIAGNOSTIC
476 1.1 matt if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
477 1.1 matt if (offset >= map->dm_mapsize)
478 1.1 matt panic("_isa_bus_dmamap_sync: bad offset");
479 1.1 matt if (len == 0 || (offset + len) > map->dm_mapsize)
480 1.1 matt panic("_isa_bus_dmamap_sync: bad length");
481 1.1 matt }
482 1.1 matt #endif
483 1.1 matt
484 1.1 matt /*
485 1.1 matt * If we're not bouncing, just return; nothing to do.
486 1.1 matt */
487 1.1 matt if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
488 1.1 matt return;
489 1.1 matt
490 1.1 matt switch (cookie->id_buftype) {
491 1.1 matt case ID_BUFTYPE_LINEAR:
492 1.1 matt /*
493 1.1 matt * Nothing to do for pre-read.
494 1.1 matt */
495 1.1 matt
496 1.1 matt if (ops & BUS_DMASYNC_PREWRITE) {
497 1.1 matt /*
498 1.1 matt * Copy the caller's buffer to the bounce buffer.
499 1.1 matt */
500 1.1 matt memcpy((char *)cookie->id_bouncebuf + offset,
501 1.1 matt (char *)cookie->id_origbuf + offset, len);
502 1.1 matt }
503 1.1 matt
504 1.1 matt if (ops & BUS_DMASYNC_POSTREAD) {
505 1.1 matt /*
506 1.1 matt * Copy the bounce buffer to the caller's buffer.
507 1.1 matt */
508 1.1 matt memcpy((char *)cookie->id_origbuf + offset,
509 1.1 matt (char *)cookie->id_bouncebuf + offset, len);
510 1.1 matt }
511 1.1 matt
512 1.1 matt /*
513 1.1 matt * Nothing to do for post-write.
514 1.1 matt */
515 1.1 matt break;
516 1.1 matt
517 1.1 matt case ID_BUFTYPE_MBUF:
518 1.1 matt {
519 1.1 matt struct mbuf *m, *m0 = cookie->id_origbuf;
520 1.1 matt bus_size_t minlen, moff;
521 1.1 matt
522 1.1 matt /*
523 1.1 matt * Nothing to do for pre-read.
524 1.1 matt */
525 1.1 matt
526 1.1 matt if (ops & BUS_DMASYNC_PREWRITE) {
527 1.1 matt /*
528 1.1 matt * Copy the caller's buffer to the bounce buffer.
529 1.1 matt */
530 1.1 matt m_copydata(m0, offset, len,
531 1.1 matt (char *)cookie->id_bouncebuf + offset);
532 1.1 matt }
533 1.1 matt
534 1.1 matt if (ops & BUS_DMASYNC_POSTREAD) {
535 1.1 matt /*
536 1.1 matt * Copy the bounce buffer to the caller's buffer.
537 1.1 matt */
538 1.1 matt for (moff = offset, m = m0; m != NULL && len != 0;
539 1.1 matt m = m->m_next) {
540 1.1 matt /* Find the beginning mbuf. */
541 1.1 matt if (moff >= m->m_len) {
542 1.1 matt moff -= m->m_len;
543 1.1 matt continue;
544 1.1 matt }
545 1.1 matt
546 1.1 matt /*
547 1.1 matt * Now at the first mbuf to sync; nail
548 1.1 matt * each one until we have exhausted the
549 1.1 matt * length.
550 1.1 matt */
551 1.1 matt minlen = len < m->m_len - moff ?
552 1.1 matt len : m->m_len - moff;
553 1.1 matt
554 1.4 he memcpy(mtod(m, char *) + moff,
555 1.1 matt (char *)cookie->id_bouncebuf + offset,
556 1.1 matt minlen);
557 1.1 matt
558 1.1 matt moff = 0;
559 1.1 matt len -= minlen;
560 1.1 matt offset += minlen;
561 1.1 matt }
562 1.1 matt }
563 1.1 matt
564 1.1 matt /*
565 1.1 matt * Nothing to do for post-write.
566 1.1 matt */
567 1.1 matt break;
568 1.1 matt }
569 1.1 matt
570 1.1 matt case ID_BUFTYPE_UIO:
571 1.1 matt panic("_isa_bus_dmamap_sync: ID_BUFTYPE_UIO");
572 1.1 matt break;
573 1.1 matt
574 1.1 matt case ID_BUFTYPE_RAW:
575 1.1 matt panic("_isa_bus_dmamap_sync: ID_BUFTYPE_RAW");
576 1.1 matt break;
577 1.1 matt
578 1.1 matt case ID_BUFTYPE_INVALID:
579 1.1 matt panic("_isa_bus_dmamap_sync: ID_BUFTYPE_INVALID");
580 1.1 matt break;
581 1.1 matt
582 1.1 matt default:
583 1.1 matt printf("unknown buffer type %d\n", cookie->id_buftype);
584 1.1 matt panic("_isa_bus_dmamap_sync");
585 1.1 matt }
586 1.1 matt }
587 1.1 matt
588 1.1 matt /*
589 1.1 matt * Allocate memory safe for ISA DMA.
590 1.1 matt */
591 1.1 matt int
592 1.1 matt _isa_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
593 1.1 matt bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
594 1.1 matt int flags)
595 1.1 matt {
596 1.1 matt paddr_t high, avail_end = 0;
597 1.1 matt int bank;
598 1.1 matt
599 1.1 matt for (bank = 0; bank < vm_nphysseg; bank++) {
600 1.6 uebayasi if (avail_end < VM_PHYSMEM_PTR(bank)->avail_end << PGSHIFT)
601 1.6 uebayasi avail_end = VM_PHYSMEM_PTR(bank)->avail_end << PGSHIFT;
602 1.1 matt }
603 1.1 matt
604 1.1 matt if (avail_end > ISA_DMA_BOUNCE_THRESHOLD)
605 1.1 matt high = trunc_page(ISA_DMA_BOUNCE_THRESHOLD);
606 1.1 matt else
607 1.1 matt high = trunc_page(avail_end);
608 1.1 matt return (_bus_dmamem_alloc_range(t, size, alignment, boundary,
609 1.1 matt segs, nsegs, rsegs, flags, 0, high));
610 1.1 matt }
611 1.1 matt
612 1.1 matt /**********************************************************************
613 1.1 matt * ISA DMA utility functions
614 1.1 matt **********************************************************************/
615 1.1 matt
616 1.1 matt int
617 1.1 matt _isa_dma_alloc_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map, bus_size_t size,
618 1.1 matt int flags)
619 1.1 matt {
620 1.1 matt struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
621 1.1 matt int error = 0;
622 1.1 matt
623 1.1 matt cookie->id_bouncebuflen = round_page(size);
624 1.1 matt error = _isa_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
625 1.1 matt PAGE_SIZE, map->_dm_boundary, cookie->id_bouncesegs,
626 1.1 matt map->_dm_segcnt, &cookie->id_nbouncesegs, flags);
627 1.1 matt if (error)
628 1.1 matt goto out;
629 1.1 matt error = _bus_dmamem_map(t, cookie->id_bouncesegs,
630 1.1 matt cookie->id_nbouncesegs, cookie->id_bouncebuflen,
631 1.3 christos (void **)&cookie->id_bouncebuf, flags);
632 1.1 matt
633 1.1 matt out:
634 1.1 matt if (error) {
635 1.1 matt _bus_dmamem_free(t, cookie->id_bouncesegs,
636 1.1 matt cookie->id_nbouncesegs);
637 1.1 matt cookie->id_bouncebuflen = 0;
638 1.1 matt cookie->id_nbouncesegs = 0;
639 1.1 matt } else {
640 1.1 matt cookie->id_flags |= ID_HAS_BOUNCE;
641 1.1 matt STAT_INCR(isa_dma_stats_nbouncebufs);
642 1.1 matt }
643 1.1 matt
644 1.1 matt return (error);
645 1.1 matt }
646 1.1 matt
647 1.1 matt void
648 1.1 matt _isa_dma_free_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map)
649 1.1 matt {
650 1.1 matt struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
651 1.1 matt
652 1.1 matt STAT_DECR(isa_dma_stats_nbouncebufs);
653 1.1 matt
654 1.1 matt _bus_dmamem_unmap(t, cookie->id_bouncebuf,
655 1.1 matt cookie->id_bouncebuflen);
656 1.1 matt _bus_dmamem_free(t, cookie->id_bouncesegs,
657 1.1 matt cookie->id_nbouncesegs);
658 1.1 matt cookie->id_bouncebuflen = 0;
659 1.1 matt cookie->id_nbouncesegs = 0;
660 1.1 matt cookie->id_flags &= ~ID_HAS_BOUNCE;
661 1.1 matt }
662