isadma_machdep.c revision 1.6 1 /* $NetBSD: isadma_machdep.c,v 1.6 2010/11/10 09:27:23 uebayasi Exp $ */
2
3 /*-
4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: isadma_machdep.c,v 1.6 2010/11/10 09:27:23 uebayasi Exp $");
35
36 #define ISA_DMA_STATS
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/syslog.h>
41 #include <sys/device.h>
42 #include <sys/malloc.h>
43 #include <sys/proc.h>
44 #include <sys/mbuf.h>
45
46 #define _POWERPC_BUS_DMA_PRIVATE
47 #include <machine/bus.h>
48
49 #include <machine/pio.h>
50
51 #include <dev/isa/isareg.h>
52 #include <dev/isa/isavar.h>
53
54 #include <uvm/uvm.h>
55
56 /*
57 * Cookie used by ISA dma. A pointer to one of these it stashed in
58 * the DMA map.
59 */
60 struct powerpc_isa_dma_cookie {
61 int id_flags; /* flags; see below */
62
63 /*
64 * Information about the original buffer used during
65 * DMA map syncs. Note that origbuflen is only used
66 * for ID_BUFTYPE_LINEAR.
67 */
68 void *id_origbuf; /* pointer to orig buffer if
69 bouncing */
70 bus_size_t id_origbuflen; /* ...and size */
71 int id_buftype; /* type of buffer */
72
73 void *id_bouncebuf; /* pointer to the bounce buffer */
74 bus_size_t id_bouncebuflen; /* ...and size */
75 int id_nbouncesegs; /* number of valid bounce segs */
76 bus_dma_segment_t id_bouncesegs[0]; /* array of bounce buffer
77 physical memory segments */
78 };
79
80 /* id_flags */
81 #define ID_MIGHT_NEED_BOUNCE 0x01 /* map could need bounce buffers */
82 #define ID_HAS_BOUNCE 0x02 /* map currently has bounce buffers */
83 #define ID_IS_BOUNCING 0x04 /* map is bouncing current xfer */
84
85 /* id_buftype */
86 #define ID_BUFTYPE_INVALID 0
87 #define ID_BUFTYPE_LINEAR 1
88 #define ID_BUFTYPE_MBUF 2
89 #define ID_BUFTYPE_UIO 3
90 #define ID_BUFTYPE_RAW 4
91
92 static int _isa_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int,
93 bus_size_t, bus_size_t, int, bus_dmamap_t *);
94 static void _isa_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
95 static int _isa_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
96 bus_size_t, struct proc *, int);
97 static int _isa_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
98 struct mbuf *, int);
99 static int _isa_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
100 struct uio *, int);
101 static int _isa_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
102 bus_dma_segment_t *, int, bus_size_t, int);
103 static void _isa_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
104 static void _isa_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t,
105 bus_addr_t, bus_size_t, int);
106
107 static int _isa_bus_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
108 bus_size_t, bus_dma_segment_t *, int, int *, int);
109
110 static int _isa_dma_alloc_bouncebuf(bus_dma_tag_t, bus_dmamap_t,
111 bus_size_t, int);
112 static void _isa_dma_free_bouncebuf(bus_dma_tag_t, bus_dmamap_t);
113
114 /*
115 * Entry points for ISA DMA. These are mostly wrappers around
116 * the generic functions that understand how to deal with bounce
117 * buffers, if necessary.
118 */
119 struct powerpc_bus_dma_tag isa_bus_dma_tag = {
120 ISA_DMA_BOUNCE_THRESHOLD,
121 _isa_bus_dmamap_create,
122 _isa_bus_dmamap_destroy,
123 _isa_bus_dmamap_load,
124 _isa_bus_dmamap_load_mbuf,
125 _isa_bus_dmamap_load_uio,
126 _isa_bus_dmamap_load_raw,
127 _isa_bus_dmamap_unload,
128 _isa_bus_dmamap_sync,
129 _isa_bus_dmamem_alloc,
130 _bus_dmamem_free,
131 _bus_dmamem_map,
132 _bus_dmamem_unmap,
133 _bus_dmamem_mmap,
134 };
135
136 /**********************************************************************
137 * bus.h dma interface entry points
138 **********************************************************************/
139
140 #ifdef ISA_DMA_STATS
141 #define STAT_INCR(v) (v)++
142 #define STAT_DECR(v) do { \
143 if ((v) == 0) \
144 printf("%s:%d -- Already 0!\n", __FILE__, __LINE__); \
145 else \
146 (v)--; \
147 } while (0)
148 u_long isa_dma_stats_loads;
149 u_long isa_dma_stats_bounces;
150 u_long isa_dma_stats_nbouncebufs;
151 #else
152 #define STAT_INCR(v)
153 #define STAT_DECR(v)
154 #endif
155
156 /*
157 * Create an ISA DMA map.
158 */
159 int
160 _isa_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
161 bus_size_t maxsegsz, bus_size_t boundary, int flags,
162 bus_dmamap_t *dmamp)
163 {
164 struct powerpc_isa_dma_cookie *cookie;
165 bus_dmamap_t map;
166 int error, cookieflags, bank;
167 void *cookiestore;
168 size_t cookiesize;
169 paddr_t avail_end = 0;
170
171 for (bank = 0; bank < vm_nphysseg; bank++) {
172 if (avail_end < VM_PHYSMEM_PTR(bank)->avail_end << PGSHIFT)
173 avail_end = VM_PHYSMEM_PTR(bank)->avail_end << PGSHIFT;
174 }
175
176 /* Call common function to create the basic map. */
177 error = _bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
178 flags, dmamp);
179 if (error)
180 return (error);
181
182 map = *dmamp;
183 map->_dm_cookie = NULL;
184
185 cookiesize = sizeof(struct powerpc_isa_dma_cookie);
186
187 /*
188 * ISA only has 24-bits of address space. This means
189 * we can't DMA to pages over 16M. In order to DMA to
190 * arbitrary buffers, we use "bounce buffers" - pages
191 * in memory below the 16M boundary. On DMA reads,
192 * DMA happens to the bounce buffers, and is copied into
193 * the caller's buffer. On writes, data is copied into
194 * but bounce buffer, and the DMA happens from those
195 * pages. To software using the DMA mapping interface,
196 * this looks simply like a data cache.
197 *
198 * If we have more than 16M of RAM in the system, we may
199 * need bounce buffers. We check and remember that here.
200 *
201 * There are exceptions, however. VLB devices can do
202 * 32-bit DMA, and indicate that here.
203 *
204 * ...or, there is an opposite case. The most segments
205 * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If
206 * the caller can't handle that many segments (e.g. the
207 * ISA DMA controller), we may have to bounce it as well.
208 */
209 if (avail_end <= t->_bounce_thresh ||
210 (flags & ISABUS_DMA_32BIT) != 0) {
211 /* Bouncing not necessary due to memory size. */
212 map->_dm_bounce_thresh = 0;
213 }
214 cookieflags = 0;
215 if (map->_dm_bounce_thresh != 0 ||
216 ((map->_dm_size / PAGE_SIZE) + 1) > map->_dm_segcnt) {
217 cookieflags |= ID_MIGHT_NEED_BOUNCE;
218 cookiesize += (sizeof(bus_dma_segment_t) * map->_dm_segcnt);
219 }
220
221 /*
222 * Allocate our cookie.
223 */
224 if ((cookiestore = malloc(cookiesize, M_DMAMAP,
225 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
226 error = ENOMEM;
227 goto out;
228 }
229 memset(cookiestore, 0, cookiesize);
230 cookie = (struct powerpc_isa_dma_cookie *)cookiestore;
231 cookie->id_flags = cookieflags;
232 map->_dm_cookie = cookie;
233
234 if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
235 /*
236 * Allocate the bounce pages now if the caller
237 * wishes us to do so.
238 */
239 if ((flags & BUS_DMA_ALLOCNOW) == 0)
240 goto out;
241
242 error = _isa_dma_alloc_bouncebuf(t, map, size, flags);
243 }
244
245 out:
246 if (error) {
247 if (map->_dm_cookie != NULL)
248 free(map->_dm_cookie, M_DMAMAP);
249 _bus_dmamap_destroy(t, map);
250 }
251 return (error);
252 }
253
254 /*
255 * Destroy an ISA DMA map.
256 */
257 void
258 _isa_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
259 {
260 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
261
262 /*
263 * Free any bounce pages this map might hold.
264 */
265 if (cookie->id_flags & ID_HAS_BOUNCE)
266 _isa_dma_free_bouncebuf(t, map);
267
268 free(cookie, M_DMAMAP);
269 _bus_dmamap_destroy(t, map);
270 }
271
272 /*
273 * Load an ISA DMA map with a linear buffer.
274 */
275 int
276 _isa_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
277 bus_size_t buflen, struct proc *p, int flags)
278 {
279 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
280 int error;
281
282 STAT_INCR(isa_dma_stats_loads);
283
284 /*
285 * Make sure that on error condition we return "no valid mappings."
286 */
287 map->dm_mapsize = 0;
288 map->dm_nsegs = 0;
289
290 /*
291 * Try to load the map the normal way. If this errors out,
292 * and we can bounce, we will.
293 */
294 error = _bus_dmamap_load(t, map, buf, buflen, p, flags);
295 if (error == 0 ||
296 (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
297 return (error);
298
299 /*
300 * First attempt failed; bounce it.
301 */
302
303 STAT_INCR(isa_dma_stats_bounces);
304
305 /*
306 * Allocate bounce pages, if necessary.
307 */
308 if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
309 error = _isa_dma_alloc_bouncebuf(t, map, buflen, flags);
310 if (error)
311 return (error);
312 }
313
314 /*
315 * Cache a pointer to the caller's buffer and load the DMA map
316 * with the bounce buffer.
317 */
318 cookie->id_origbuf = buf;
319 cookie->id_origbuflen = buflen;
320 cookie->id_buftype = ID_BUFTYPE_LINEAR;
321 error = _bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
322 p, flags);
323 if (error) {
324 /*
325 * Free the bounce pages, unless our resources
326 * are reserved for our exclusive use.
327 */
328 if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
329 _isa_dma_free_bouncebuf(t, map);
330 return (error);
331 }
332
333 /* ...so _isa_bus_dmamap_sync() knows we're bouncing */
334 cookie->id_flags |= ID_IS_BOUNCING;
335 return (0);
336 }
337
338 /*
339 * Like _isa_bus_dmamap_load(), but for mbufs.
340 */
341 int
342 _isa_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
343 int flags)
344 {
345 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
346 int error;
347
348 /*
349 * Make sure that on error condition we return "no valid mappings."
350 */
351 map->dm_mapsize = 0;
352 map->dm_nsegs = 0;
353
354 #ifdef DIAGNOSTIC
355 if ((m0->m_flags & M_PKTHDR) == 0)
356 panic("_isa_bus_dmamap_load_mbuf: no packet header");
357 #endif
358
359 if (m0->m_pkthdr.len > map->_dm_size)
360 return (EINVAL);
361
362 /*
363 * Try to load the map the normal way. If this errors out,
364 * and we can bounce, we will.
365 */
366 error = _bus_dmamap_load_mbuf(t, map, m0, flags);
367 if (error == 0 ||
368 (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
369 return (error);
370
371 /*
372 * First attempt failed; bounce it.
373 */
374
375 STAT_INCR(isa_dma_stats_bounces);
376
377 /*
378 * Allocate bounce pages, if necessary.
379 */
380 if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
381 error = _isa_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
382 flags);
383 if (error)
384 return (error);
385 }
386
387 /*
388 * Cache a pointer to the caller's buffer and load the DMA map
389 * with the bounce buffer.
390 */
391 cookie->id_origbuf = m0;
392 cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
393 cookie->id_buftype = ID_BUFTYPE_MBUF;
394 error = _bus_dmamap_load(t, map, cookie->id_bouncebuf,
395 m0->m_pkthdr.len, NULL, flags);
396 if (error) {
397 /*
398 * Free the bounce pages, unless our resources
399 * are reserved for our exclusive use.
400 */
401 if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
402 _isa_dma_free_bouncebuf(t, map);
403 return (error);
404 }
405
406 /* ...so _isa_bus_dmamap_sync() knows we're bouncing */
407 cookie->id_flags |= ID_IS_BOUNCING;
408 return (0);
409 }
410
411 /*
412 * Like _isa_bus_dmamap_load(), but for uios.
413 */
414 int
415 _isa_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map,
416 struct uio *uio, int flags)
417 {
418
419 panic("_isa_bus_dmamap_load_uio: not implemented");
420 }
421
422 /*
423 * Like _isa_bus_dmamap_load(), but for raw memory allocated with
424 * bus_dmamem_alloc().
425 */
426 int
427 _isa_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
428 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
429 {
430
431 panic("_isa_bus_dmamap_load_raw: not implemented");
432 }
433
434 /*
435 * Unload an ISA DMA map.
436 */
437 void
438 _isa_bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
439 {
440 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
441
442 /*
443 * If we have bounce pages, free them, unless they're
444 * reserved for our exclusive use.
445 */
446 if ((cookie->id_flags & ID_HAS_BOUNCE) &&
447 (map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
448 _isa_dma_free_bouncebuf(t, map);
449
450 cookie->id_flags &= ~ID_IS_BOUNCING;
451 cookie->id_buftype = ID_BUFTYPE_INVALID;
452
453 /*
454 * Do the generic bits of the unload.
455 */
456 _bus_dmamap_unload(t, map);
457 }
458
459 /*
460 * Synchronize an ISA DMA map.
461 */
462 void
463 _isa_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
464 bus_size_t len, int ops)
465 {
466 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
467
468 /*
469 * Mixing PRE and POST operations is not allowed.
470 */
471 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
472 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
473 panic("_isa_bus_dmamap_sync: mix PRE and POST");
474
475 #ifdef DIAGNOSTIC
476 if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
477 if (offset >= map->dm_mapsize)
478 panic("_isa_bus_dmamap_sync: bad offset");
479 if (len == 0 || (offset + len) > map->dm_mapsize)
480 panic("_isa_bus_dmamap_sync: bad length");
481 }
482 #endif
483
484 /*
485 * If we're not bouncing, just return; nothing to do.
486 */
487 if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
488 return;
489
490 switch (cookie->id_buftype) {
491 case ID_BUFTYPE_LINEAR:
492 /*
493 * Nothing to do for pre-read.
494 */
495
496 if (ops & BUS_DMASYNC_PREWRITE) {
497 /*
498 * Copy the caller's buffer to the bounce buffer.
499 */
500 memcpy((char *)cookie->id_bouncebuf + offset,
501 (char *)cookie->id_origbuf + offset, len);
502 }
503
504 if (ops & BUS_DMASYNC_POSTREAD) {
505 /*
506 * Copy the bounce buffer to the caller's buffer.
507 */
508 memcpy((char *)cookie->id_origbuf + offset,
509 (char *)cookie->id_bouncebuf + offset, len);
510 }
511
512 /*
513 * Nothing to do for post-write.
514 */
515 break;
516
517 case ID_BUFTYPE_MBUF:
518 {
519 struct mbuf *m, *m0 = cookie->id_origbuf;
520 bus_size_t minlen, moff;
521
522 /*
523 * Nothing to do for pre-read.
524 */
525
526 if (ops & BUS_DMASYNC_PREWRITE) {
527 /*
528 * Copy the caller's buffer to the bounce buffer.
529 */
530 m_copydata(m0, offset, len,
531 (char *)cookie->id_bouncebuf + offset);
532 }
533
534 if (ops & BUS_DMASYNC_POSTREAD) {
535 /*
536 * Copy the bounce buffer to the caller's buffer.
537 */
538 for (moff = offset, m = m0; m != NULL && len != 0;
539 m = m->m_next) {
540 /* Find the beginning mbuf. */
541 if (moff >= m->m_len) {
542 moff -= m->m_len;
543 continue;
544 }
545
546 /*
547 * Now at the first mbuf to sync; nail
548 * each one until we have exhausted the
549 * length.
550 */
551 minlen = len < m->m_len - moff ?
552 len : m->m_len - moff;
553
554 memcpy(mtod(m, char *) + moff,
555 (char *)cookie->id_bouncebuf + offset,
556 minlen);
557
558 moff = 0;
559 len -= minlen;
560 offset += minlen;
561 }
562 }
563
564 /*
565 * Nothing to do for post-write.
566 */
567 break;
568 }
569
570 case ID_BUFTYPE_UIO:
571 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_UIO");
572 break;
573
574 case ID_BUFTYPE_RAW:
575 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_RAW");
576 break;
577
578 case ID_BUFTYPE_INVALID:
579 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_INVALID");
580 break;
581
582 default:
583 printf("unknown buffer type %d\n", cookie->id_buftype);
584 panic("_isa_bus_dmamap_sync");
585 }
586 }
587
588 /*
589 * Allocate memory safe for ISA DMA.
590 */
591 int
592 _isa_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
593 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
594 int flags)
595 {
596 paddr_t high, avail_end = 0;
597 int bank;
598
599 for (bank = 0; bank < vm_nphysseg; bank++) {
600 if (avail_end < VM_PHYSMEM_PTR(bank)->avail_end << PGSHIFT)
601 avail_end = VM_PHYSMEM_PTR(bank)->avail_end << PGSHIFT;
602 }
603
604 if (avail_end > ISA_DMA_BOUNCE_THRESHOLD)
605 high = trunc_page(ISA_DMA_BOUNCE_THRESHOLD);
606 else
607 high = trunc_page(avail_end);
608 return (_bus_dmamem_alloc_range(t, size, alignment, boundary,
609 segs, nsegs, rsegs, flags, 0, high));
610 }
611
612 /**********************************************************************
613 * ISA DMA utility functions
614 **********************************************************************/
615
616 int
617 _isa_dma_alloc_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map, bus_size_t size,
618 int flags)
619 {
620 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
621 int error = 0;
622
623 cookie->id_bouncebuflen = round_page(size);
624 error = _isa_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
625 PAGE_SIZE, map->_dm_boundary, cookie->id_bouncesegs,
626 map->_dm_segcnt, &cookie->id_nbouncesegs, flags);
627 if (error)
628 goto out;
629 error = _bus_dmamem_map(t, cookie->id_bouncesegs,
630 cookie->id_nbouncesegs, cookie->id_bouncebuflen,
631 (void **)&cookie->id_bouncebuf, flags);
632
633 out:
634 if (error) {
635 _bus_dmamem_free(t, cookie->id_bouncesegs,
636 cookie->id_nbouncesegs);
637 cookie->id_bouncebuflen = 0;
638 cookie->id_nbouncesegs = 0;
639 } else {
640 cookie->id_flags |= ID_HAS_BOUNCE;
641 STAT_INCR(isa_dma_stats_nbouncebufs);
642 }
643
644 return (error);
645 }
646
647 void
648 _isa_dma_free_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map)
649 {
650 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
651
652 STAT_DECR(isa_dma_stats_nbouncebufs);
653
654 _bus_dmamem_unmap(t, cookie->id_bouncebuf,
655 cookie->id_bouncebuflen);
656 _bus_dmamem_free(t, cookie->id_bouncesegs,
657 cookie->id_nbouncesegs);
658 cookie->id_bouncebuflen = 0;
659 cookie->id_nbouncesegs = 0;
660 cookie->id_flags &= ~ID_HAS_BOUNCE;
661 }
662