oea_machdep.c revision 1.2 1 1.2 matt /* $NetBSD: oea_machdep.c,v 1.2 2003/02/05 07:05:20 matt Exp $ */
2 1.1 matt
3 1.1 matt /*
4 1.1 matt * Copyright (C) 2002 Matt Thomas
5 1.1 matt * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6 1.1 matt * Copyright (C) 1995, 1996 TooLs GmbH.
7 1.1 matt * All rights reserved.
8 1.1 matt *
9 1.1 matt * Redistribution and use in source and binary forms, with or without
10 1.1 matt * modification, are permitted provided that the following conditions
11 1.1 matt * are met:
12 1.1 matt * 1. Redistributions of source code must retain the above copyright
13 1.1 matt * notice, this list of conditions and the following disclaimer.
14 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 matt * notice, this list of conditions and the following disclaimer in the
16 1.1 matt * documentation and/or other materials provided with the distribution.
17 1.1 matt * 3. All advertising materials mentioning features or use of this software
18 1.1 matt * must display the following acknowledgement:
19 1.1 matt * This product includes software developed by TooLs GmbH.
20 1.1 matt * 4. The name of TooLs GmbH may not be used to endorse or promote products
21 1.1 matt * derived from this software without specific prior written permission.
22 1.1 matt *
23 1.1 matt * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24 1.1 matt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 1.1 matt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 1.1 matt * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 1.1 matt * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28 1.1 matt * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29 1.1 matt * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 1.1 matt * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31 1.1 matt * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32 1.1 matt * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.1 matt */
34 1.1 matt
35 1.1 matt #include "opt_compat_netbsd.h"
36 1.1 matt #include "opt_ddb.h"
37 1.1 matt #include "opt_kgdb.h"
38 1.1 matt #include "opt_ipkdb.h"
39 1.1 matt #include "opt_multiprocessor.h"
40 1.1 matt #include "opt_altivec.h"
41 1.1 matt
42 1.1 matt #include <sys/param.h>
43 1.1 matt #include <sys/buf.h>
44 1.1 matt #include <sys/exec.h>
45 1.1 matt #include <sys/malloc.h>
46 1.1 matt #include <sys/mbuf.h>
47 1.1 matt #include <sys/mount.h>
48 1.1 matt #include <sys/msgbuf.h>
49 1.1 matt #include <sys/proc.h>
50 1.1 matt #include <sys/reboot.h>
51 1.1 matt #include <sys/sa.h>
52 1.1 matt #include <sys/syscallargs.h>
53 1.1 matt #include <sys/syslog.h>
54 1.1 matt #include <sys/systm.h>
55 1.1 matt #include <sys/kernel.h>
56 1.1 matt #include <sys/user.h>
57 1.1 matt #include <sys/boot_flag.h>
58 1.1 matt
59 1.1 matt #include <uvm/uvm_extern.h>
60 1.1 matt
61 1.1 matt #include <net/netisr.h>
62 1.1 matt
63 1.1 matt #ifdef DDB
64 1.1 matt #include <machine/db_machdep.h>
65 1.1 matt #include <ddb/db_extern.h>
66 1.1 matt #endif
67 1.1 matt
68 1.1 matt #ifdef KGDB
69 1.1 matt #include <sys/kgdb.h>
70 1.1 matt #endif
71 1.1 matt
72 1.1 matt #ifdef IPKDB
73 1.1 matt #include <ipkdb/ipkdb.h>
74 1.1 matt #endif
75 1.1 matt
76 1.1 matt #include <powerpc/oea/bat.h>
77 1.1 matt #include <powerpc/oea/sr_601.h>
78 1.1 matt #include <powerpc/trap.h>
79 1.1 matt #include <powerpc/stdarg.h>
80 1.1 matt #include <powerpc/spr.h>
81 1.1 matt #include <powerpc/pte.h>
82 1.1 matt #include <powerpc/altivec.h>
83 1.1 matt #include <machine/powerpc.h>
84 1.1 matt
85 1.1 matt char machine[] = MACHINE; /* from <machine/param.h> */
86 1.1 matt char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */
87 1.1 matt
88 1.1 matt struct vm_map *exec_map = NULL;
89 1.1 matt struct vm_map *mb_map = NULL;
90 1.1 matt struct vm_map *phys_map = NULL;
91 1.1 matt
92 1.1 matt /*
93 1.1 matt * Global variables used here and there
94 1.1 matt */
95 1.1 matt extern struct user *proc0paddr;
96 1.1 matt
97 1.1 matt struct bat battable[512];
98 1.2 matt register_t iosrtable[16]; /* I/O segments, for kernel_pmap setup */
99 1.1 matt paddr_t msgbuf_paddr;
100 1.1 matt
101 1.1 matt void
102 1.1 matt oea_init(void (*handler)(void))
103 1.1 matt {
104 1.1 matt extern int trapstart[], trapend[];
105 1.1 matt extern int trapcode, trapsize;
106 1.1 matt extern int sctrap, scsize;
107 1.1 matt extern int alitrap, alisize;
108 1.1 matt extern int dsitrap, dsisize;
109 1.1 matt extern int dsi601trap, dsi601size;
110 1.1 matt extern int decrint, decrsize;
111 1.1 matt extern int tlbimiss, tlbimsize;
112 1.1 matt extern int tlbdlmiss, tlbdlmsize;
113 1.1 matt extern int tlbdsmiss, tlbdsmsize;
114 1.1 matt #if defined(DDB) || defined(KGDB)
115 1.1 matt extern int ddblow, ddbsize;
116 1.1 matt #endif
117 1.1 matt #ifdef IPKDB
118 1.1 matt extern int ipkdblow, ipkdbsize;
119 1.1 matt #endif
120 1.1 matt #ifdef ALTIVEC
121 1.1 matt register_t msr;
122 1.1 matt #endif
123 1.1 matt uintptr_t exc;
124 1.1 matt register_t scratch;
125 1.1 matt unsigned int cpuvers;
126 1.1 matt size_t size;
127 1.1 matt struct cpu_info * const ci = &cpu_info[0];
128 1.1 matt
129 1.1 matt mtspr(SPR_SPRG0, ci);
130 1.1 matt cpuvers = mfpvr() >> 16;
131 1.1 matt
132 1.1 matt
133 1.1 matt /*
134 1.1 matt * Initialize proc0 and current pcb and pmap pointers.
135 1.1 matt */
136 1.1 matt KASSERT(ci != NULL);
137 1.1 matt KASSERT(curcpu() == ci);
138 1.1 matt lwp0.l_cpu = ci;
139 1.1 matt KASSERT(lwp0.l_cpu != NULL);
140 1.1 matt lwp0.l_addr = proc0paddr;
141 1.1 matt memset(lwp0.l_addr, 0, sizeof *lwp0.l_addr);
142 1.1 matt
143 1.1 matt curpcb = &proc0paddr->u_pcb;
144 1.1 matt curpm = curpcb->pcb_pmreal = curpcb->pcb_pm = pmap_kernel();
145 1.1 matt
146 1.1 matt /*
147 1.1 matt * Cause a PGM trap if we branch to 0.
148 1.1 matt */
149 1.1 matt memset(0, 0, 0x100);
150 1.1 matt
151 1.1 matt /*
152 1.1 matt * Set up trap vectors. Don't assume vectors are on 0x100.
153 1.1 matt */
154 1.1 matt for (exc = EXC_RST; exc <= EXC_LAST; exc += 0x100) {
155 1.1 matt switch (exc) {
156 1.1 matt default:
157 1.1 matt size = (size_t)&trapsize;
158 1.1 matt memcpy((void *)exc, &trapcode, size);
159 1.1 matt break;
160 1.1 matt #if 0
161 1.1 matt case EXC_EXI:
162 1.1 matt /*
163 1.1 matt * This one is (potentially) installed during autoconf
164 1.1 matt */
165 1.1 matt break;
166 1.1 matt #endif
167 1.1 matt case EXC_SC:
168 1.1 matt size = (size_t)&scsize;
169 1.1 matt memcpy((void *)EXC_SC, &sctrap, size);
170 1.1 matt break;
171 1.1 matt case EXC_ALI:
172 1.1 matt size = (size_t)&alisize;
173 1.1 matt memcpy((void *)EXC_ALI, &alitrap, size);
174 1.1 matt break;
175 1.1 matt case EXC_DSI:
176 1.1 matt if (cpuvers == MPC601) {
177 1.1 matt size = (size_t)&dsi601size;
178 1.1 matt memcpy((void *)EXC_DSI, &dsi601trap, size);
179 1.1 matt } else {
180 1.1 matt size = (size_t)&dsisize;
181 1.1 matt memcpy((void *)EXC_DSI, &dsitrap, size);
182 1.1 matt }
183 1.1 matt break;
184 1.1 matt case EXC_DECR:
185 1.1 matt size = (size_t)&decrsize;
186 1.1 matt memcpy((void *)EXC_DECR, &decrint, size);
187 1.1 matt break;
188 1.1 matt case EXC_IMISS:
189 1.1 matt size = (size_t)&tlbimsize;
190 1.1 matt memcpy((void *)EXC_IMISS, &tlbimiss, size);
191 1.1 matt break;
192 1.1 matt case EXC_DLMISS:
193 1.1 matt size = (size_t)&tlbdlmsize;
194 1.1 matt memcpy((void *)EXC_DLMISS, &tlbdlmiss, size);
195 1.1 matt break;
196 1.1 matt case EXC_DSMISS:
197 1.1 matt size = (size_t)&tlbdsmsize;
198 1.1 matt memcpy((void *)EXC_DSMISS, &tlbdsmiss, size);
199 1.1 matt break;
200 1.1 matt case EXC_PERF:
201 1.1 matt size = (size_t)&trapsize;
202 1.1 matt memcpy((void *)EXC_PERF, &trapcode, size);
203 1.1 matt memcpy((void *)EXC_VEC, &trapcode, size);
204 1.1 matt break;
205 1.1 matt #if defined(DDB) || defined(IPKDB) || defined(KGDB)
206 1.1 matt case EXC_RUNMODETRC:
207 1.1 matt if (cpuvers != MPC601) {
208 1.1 matt size = (size_t)&trapsize;
209 1.1 matt memcpy((void *)EXC_RUNMODETRC, &trapcode, size);
210 1.1 matt break;
211 1.1 matt }
212 1.1 matt /* FALLTHROUGH */
213 1.1 matt case EXC_PGM:
214 1.1 matt case EXC_TRC:
215 1.1 matt case EXC_BPT:
216 1.1 matt #if defined(DDB) || defined(KGDB)
217 1.1 matt size = (size_t)&ddbsize;
218 1.1 matt memcpy((void *)exc, &ddblow, size);
219 1.1 matt #if defined(IPKDB)
220 1.1 matt #error "cannot enable IPKDB with DDB or KGDB"
221 1.1 matt #endif
222 1.1 matt #else
223 1.1 matt size = (size_t)&ipkdbsize;
224 1.1 matt memcpy((void *)exc, &ipkdblow, size);
225 1.1 matt #endif
226 1.1 matt break;
227 1.1 matt #endif /* DDB || IPKDB || KGDB */
228 1.1 matt }
229 1.1 matt #if 0
230 1.1 matt exc += roundup(size, 32);
231 1.1 matt #endif
232 1.1 matt }
233 1.1 matt
234 1.1 matt /*
235 1.1 matt * Get the cache sizes because install_extint calls __syncicache.
236 1.1 matt */
237 1.1 matt cpu_probe_cache();
238 1.1 matt
239 1.1 matt #define MxSPR_MASK 0x7c1fffff
240 1.1 matt #define MFSPR_MQ 0x7c0002a6
241 1.1 matt #define MTSPR_MQ 0x7c0003a6
242 1.1 matt #define NOP 0x60000000
243 1.1 matt
244 1.1 matt #ifdef ALTIVEC
245 1.1 matt #define MFSPR_VRSAVE 0x7c0042a6
246 1.1 matt #define MTSPR_VRSAVE 0x7c0043a6
247 1.1 matt
248 1.1 matt /*
249 1.1 matt * Try to set the VEC bit in the MSR. If it doesn't get set, we are
250 1.1 matt * not on a AltiVec capable processor.
251 1.1 matt */
252 1.1 matt __asm __volatile (
253 1.1 matt "mfmsr %0; oris %1,%0,%2@h; mtmsr %1; isync; "
254 1.1 matt "mfmsr %1; mtmsr %0; isync"
255 1.1 matt : "=r"(msr), "=r"(scratch)
256 1.1 matt : "J"(PSL_VEC));
257 1.1 matt
258 1.1 matt /*
259 1.1 matt * If we aren't on an AltiVec capable processor, we to need zap any of
260 1.1 matt * sequences we save/restore the VRSAVE SPR into NOPs.
261 1.1 matt */
262 1.1 matt if (scratch & PSL_VEC) {
263 1.1 matt cpu_altivec = 1;
264 1.1 matt } else {
265 1.1 matt int *ip = trapstart;
266 1.1 matt
267 1.1 matt for (; ip < trapend; ip++) {
268 1.1 matt if ((ip[0] & MxSPR_MASK) == MFSPR_VRSAVE) {
269 1.1 matt ip[0] = NOP; /* mfspr */
270 1.1 matt ip[1] = NOP; /* stw */
271 1.1 matt } else if ((ip[0] & MxSPR_MASK) == MTSPR_VRSAVE) {
272 1.1 matt ip[-1] = NOP; /* lwz */
273 1.1 matt ip[0] = NOP; /* mtspr */
274 1.1 matt }
275 1.1 matt }
276 1.1 matt }
277 1.1 matt #endif
278 1.1 matt
279 1.1 matt /*
280 1.1 matt * If we aren't on a MPC601 processor, we to need zap any of
281 1.1 matt * sequences we save/restore the MQ SPR into NOPs.
282 1.1 matt */
283 1.1 matt if (cpuvers != MPC601) {
284 1.1 matt int *ip = trapstart;
285 1.1 matt
286 1.1 matt for (; ip < trapend; ip++) {
287 1.1 matt if ((ip[0] & MxSPR_MASK) == MFSPR_MQ) {
288 1.1 matt ip[0] = NOP; /* mfspr */
289 1.1 matt ip[1] = NOP; /* stw */
290 1.1 matt } else if ((ip[0] & MxSPR_MASK) == MTSPR_MQ) {
291 1.1 matt ip[-1] = NOP; /* lwz */
292 1.1 matt ip[0] = NOP; /* mtspr */
293 1.1 matt }
294 1.1 matt }
295 1.1 matt }
296 1.1 matt
297 1.1 matt if (!cpu_altivec || cpuvers != MPC601) {
298 1.1 matt /*
299 1.1 matt * Sync the changed instructions.
300 1.1 matt */
301 1.1 matt __syncicache((void *) trapstart,
302 1.1 matt (uintptr_t) trapend - (uintptr_t) trapstart);
303 1.1 matt }
304 1.1 matt
305 1.1 matt /*
306 1.1 matt * external interrupt handler install
307 1.1 matt */
308 1.1 matt if (handler)
309 1.1 matt oea_install_extint(handler);
310 1.1 matt
311 1.1 matt __syncicache(0, EXC_LAST + 0x100);
312 1.1 matt
313 1.1 matt /*
314 1.1 matt * Now enable translation (and machine checks/recoverable interrupts).
315 1.1 matt */
316 1.1 matt __asm __volatile ("sync; mfmsr %0; ori %0,%0,%1; mtmsr %0; isync"
317 1.1 matt : "=r"(scratch)
318 1.1 matt : "K"(PSL_IR|PSL_DR|PSL_ME|PSL_RI));
319 1.1 matt
320 1.1 matt KASSERT(curcpu() == ci);
321 1.1 matt }
322 1.1 matt
323 1.1 matt void
324 1.1 matt mpc601_ioseg_add(paddr_t pa, register_t len)
325 1.1 matt {
326 1.1 matt const u_int i = pa >> ADDR_SR_SHFT;
327 1.1 matt
328 1.1 matt if (len != BAT_BL_256M)
329 1.1 matt panic("mpc601_ioseg_add: len != 256M");
330 1.1 matt
331 1.1 matt /*
332 1.1 matt * Translate into an I/O segment, load it, and stash away for use
333 1.1 matt * in pmap_bootstrap().
334 1.1 matt */
335 1.1 matt iosrtable[i] = SR601(SR601_Ks, SR601_BUID_MEMFORCED, 0, i);
336 1.1 matt __asm __volatile ("mtsrin %0,%1"
337 1.1 matt :: "r"(iosrtable[i]),
338 1.1 matt "r"(pa));
339 1.1 matt }
340 1.1 matt
341 1.1 matt void
342 1.1 matt oea_iobat_add(paddr_t pa, register_t len)
343 1.1 matt {
344 1.1 matt static int n = 1;
345 1.1 matt const u_int i = pa >> 28;
346 1.1 matt battable[i].batl = BATL(pa, BAT_I|BAT_G, BAT_PP_RW);
347 1.1 matt battable[i].batu = BATU(pa, len, BAT_Vs);
348 1.1 matt
349 1.1 matt /*
350 1.1 matt * Let's start loading the BAT registers.
351 1.1 matt */
352 1.1 matt switch (n) {
353 1.1 matt case 1:
354 1.1 matt __asm __volatile ("mtdbatl 1,%0; mtdbatu 1,%1;"
355 1.1 matt :: "r"(battable[i].batl),
356 1.1 matt "r"(battable[i].batu));
357 1.1 matt n = 2;
358 1.1 matt break;
359 1.1 matt case 2:
360 1.1 matt __asm __volatile ("mtdbatl 2,%0; mtdbatu 2,%1;"
361 1.1 matt :: "r"(battable[i].batl),
362 1.1 matt "r"(battable[i].batu));
363 1.1 matt n = 3;
364 1.1 matt break;
365 1.1 matt case 3:
366 1.1 matt __asm __volatile ("mtdbatl 3,%0; mtdbatu 3,%1;"
367 1.1 matt :: "r"(battable[i].batl),
368 1.1 matt "r"(battable[i].batu));
369 1.1 matt n = 4;
370 1.1 matt break;
371 1.1 matt default:
372 1.1 matt break;
373 1.1 matt }
374 1.1 matt }
375 1.1 matt
376 1.1 matt void
377 1.1 matt oea_batinit(paddr_t pa, ...)
378 1.1 matt {
379 1.1 matt struct mem_region *allmem, *availmem, *mp;
380 1.1 matt int i;
381 1.1 matt unsigned int cpuvers;
382 1.1 matt va_list ap;
383 1.1 matt
384 1.1 matt cpuvers = mfpvr() >> 16;
385 1.1 matt
386 1.1 matt /*
387 1.1 matt * Initialize BAT registers to unmapped to not generate
388 1.1 matt * overlapping mappings below.
389 1.1 matt *
390 1.1 matt * The 601's implementation differs in the Valid bit being situated
391 1.1 matt * in the lower BAT register, and in being a unified BAT only whose
392 1.1 matt * four entries are accessed through the IBAT[0-3] SPRs.
393 1.1 matt *
394 1.1 matt * Also, while the 601 does distinguish between supervisor/user
395 1.1 matt * protection keys, it does _not_ distinguish distinguish between
396 1.1 matt * validity in supervisor/user mode.
397 1.1 matt */
398 1.1 matt if (cpuvers == MPC601) {
399 1.1 matt __asm __volatile ("mtibatl 0,%0" :: "r"(0));
400 1.1 matt __asm __volatile ("mtibatl 1,%0" :: "r"(0));
401 1.1 matt __asm __volatile ("mtibatl 2,%0" :: "r"(0));
402 1.1 matt __asm __volatile ("mtibatl 3,%0" :: "r"(0));
403 1.1 matt } else {
404 1.1 matt __asm __volatile ("mtibatu 0,%0" :: "r"(0));
405 1.1 matt __asm __volatile ("mtibatu 1,%0" :: "r"(0));
406 1.1 matt __asm __volatile ("mtibatu 2,%0" :: "r"(0));
407 1.1 matt __asm __volatile ("mtibatu 3,%0" :: "r"(0));
408 1.1 matt __asm __volatile ("mtdbatu 0,%0" :: "r"(0));
409 1.1 matt __asm __volatile ("mtdbatu 1,%0" :: "r"(0));
410 1.1 matt __asm __volatile ("mtdbatu 2,%0" :: "r"(0));
411 1.1 matt __asm __volatile ("mtdbatu 3,%0" :: "r"(0));
412 1.1 matt }
413 1.1 matt
414 1.1 matt /*
415 1.1 matt * Set up BAT to map physical memory
416 1.1 matt */
417 1.1 matt if (cpuvers == MPC601) {
418 1.1 matt /*
419 1.1 matt * Set up battable to map the lowest 256 MB area.
420 1.1 matt * Map the lowest 32 MB area via BAT[0-3];
421 1.1 matt * BAT[01] are fixed, BAT[23] are floating.
422 1.1 matt */
423 1.1 matt for (i = 0; i < 32; i++) {
424 1.1 matt battable[i].batl = BATL601(i << 23,
425 1.1 matt BAT601_BSM_8M, BAT601_V);
426 1.1 matt battable[i].batu = BATU601(i << 23,
427 1.1 matt BAT601_M, BAT601_Ku, BAT601_PP_NONE);
428 1.1 matt }
429 1.1 matt __asm __volatile ("mtibatu 0,%1; mtibatl 0,%0"
430 1.1 matt :: "r"(battable[0x00000000 >> 23].batl),
431 1.1 matt "r"(battable[0x00000000 >> 23].batu));
432 1.1 matt __asm __volatile ("mtibatu 1,%1; mtibatl 1,%0"
433 1.1 matt :: "r"(battable[0x00800000 >> 23].batl),
434 1.1 matt "r"(battable[0x00800000 >> 23].batu));
435 1.1 matt __asm __volatile ("mtibatu 2,%1; mtibatl 2,%0"
436 1.1 matt :: "r"(battable[0x01000000 >> 23].batl),
437 1.1 matt "r"(battable[0x01000000 >> 23].batu));
438 1.1 matt __asm __volatile ("mtibatu 3,%1; mtibatl 3,%0"
439 1.1 matt :: "r"(battable[0x01800000 >> 23].batl),
440 1.1 matt "r"(battable[0x01800000 >> 23].batu));
441 1.1 matt } else {
442 1.1 matt /*
443 1.1 matt * Set up BAT0 to only map the lowest 256 MB area
444 1.1 matt */
445 1.1 matt battable[0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW);
446 1.1 matt battable[0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs);
447 1.1 matt
448 1.1 matt __asm __volatile ("mtibatl 0,%0; mtibatu 0,%1;"
449 1.1 matt "mtdbatl 0,%0; mtdbatu 0,%1;"
450 1.1 matt :: "r"(battable[0].batl), "r"(battable[0].batu));
451 1.1 matt }
452 1.1 matt
453 1.1 matt /*
454 1.1 matt * Now setup other fixed bat registers
455 1.1 matt *
456 1.1 matt * Note that we still run in real mode, and the BAT
457 1.1 matt * registers were cleared above.
458 1.1 matt */
459 1.1 matt
460 1.1 matt va_start(ap, pa);
461 1.1 matt
462 1.1 matt /*
463 1.1 matt * Add any I/O BATs specificed;
464 1.1 matt * use I/O segments on the BAT-starved 601.
465 1.1 matt */
466 1.1 matt if (cpuvers == MPC601) {
467 1.1 matt while (pa != 0) {
468 1.1 matt register_t len = va_arg(ap, register_t);
469 1.1 matt mpc601_ioseg_add(pa, len);
470 1.1 matt pa = va_arg(ap, paddr_t);
471 1.1 matt }
472 1.1 matt } else {
473 1.1 matt while (pa != 0) {
474 1.1 matt register_t len = va_arg(ap, register_t);
475 1.1 matt oea_iobat_add(pa, len);
476 1.1 matt pa = va_arg(ap, paddr_t);
477 1.1 matt }
478 1.1 matt }
479 1.1 matt
480 1.1 matt va_end(ap);
481 1.1 matt
482 1.1 matt /*
483 1.1 matt * Set up battable to map all RAM regions.
484 1.1 matt * This is here because mem_regions() call needs bat0 set up.
485 1.1 matt */
486 1.1 matt mem_regions(&allmem, &availmem);
487 1.1 matt if (cpuvers == MPC601) {
488 1.1 matt for (mp = allmem; mp->size; mp++) {
489 1.1 matt paddr_t pa = mp->start & 0xff800000;
490 1.1 matt paddr_t end = mp->start + mp->size;
491 1.1 matt
492 1.1 matt do {
493 1.1 matt u_int i = pa >> 23;
494 1.1 matt
495 1.1 matt battable[i].batl =
496 1.1 matt BATL601(pa, BAT601_BSM_8M, BAT601_V);
497 1.1 matt battable[i].batu =
498 1.1 matt BATU601(pa, BAT601_M, BAT601_Ku, BAT601_PP_NONE);
499 1.1 matt pa += (1 << 23);
500 1.1 matt } while (pa < end);
501 1.1 matt }
502 1.1 matt } else {
503 1.1 matt for (mp = allmem; mp->size; mp++) {
504 1.1 matt paddr_t pa = mp->start & 0xf0000000;
505 1.1 matt paddr_t end = mp->start + mp->size;
506 1.1 matt
507 1.1 matt do {
508 1.1 matt u_int i = pa >> 28;
509 1.1 matt
510 1.1 matt battable[i].batl =
511 1.1 matt BATL(pa, BAT_M, BAT_PP_RW);
512 1.1 matt battable[i].batu =
513 1.1 matt BATU(pa, BAT_BL_256M, BAT_Vs);
514 1.1 matt pa += SEGMENT_LENGTH;
515 1.1 matt } while (pa < end);
516 1.1 matt }
517 1.1 matt }
518 1.1 matt }
519 1.1 matt
520 1.1 matt void
521 1.1 matt oea_install_extint(void (*handler)(void))
522 1.1 matt {
523 1.1 matt extern int extint, extsize;
524 1.1 matt extern int extint_call;
525 1.1 matt uintptr_t offset = (uintptr_t)handler - (uintptr_t)&extint_call;
526 1.1 matt int omsr, msr;
527 1.1 matt
528 1.1 matt #ifdef DIAGNOSTIC
529 1.1 matt if (offset > 0x1ffffff)
530 1.1 matt panic("install_extint: %p too far away (%#lx)", handler,
531 1.1 matt (unsigned long) offset);
532 1.1 matt #endif
533 1.1 matt __asm __volatile ("mfmsr %0; andi. %1,%0,%2; mtmsr %1"
534 1.1 matt : "=r" (omsr), "=r" (msr)
535 1.1 matt : "K" ((u_short)~PSL_EE));
536 1.1 matt extint_call = (extint_call & 0xfc000003) | offset;
537 1.1 matt memcpy((void *)EXC_EXI, &extint, (size_t)&extsize);
538 1.1 matt __syncicache((void *)&extint_call, sizeof extint_call);
539 1.1 matt __syncicache((void *)EXC_EXI, (int)&extsize);
540 1.1 matt __asm __volatile ("mtmsr %0" :: "r"(omsr));
541 1.1 matt }
542 1.1 matt
543 1.1 matt /*
544 1.1 matt * Machine dependent startup code.
545 1.1 matt */
546 1.1 matt void
547 1.1 matt oea_startup(const char *model)
548 1.1 matt {
549 1.1 matt uintptr_t sz;
550 1.1 matt u_int i;
551 1.1 matt u_long base, residual;
552 1.1 matt int error;
553 1.1 matt caddr_t v;
554 1.1 matt vaddr_t minaddr, maxaddr;
555 1.1 matt char pbuf[9];
556 1.1 matt
557 1.1 matt KASSERT(curcpu() != NULL);
558 1.1 matt KASSERT(lwp0.l_cpu != NULL);
559 1.1 matt
560 1.1 matt /*
561 1.1 matt * If the msgbuf is not in segment 0, allocate KVA for it and access
562 1.1 matt * it via mapped pages. [This prevents unneeded BAT switches.]
563 1.1 matt */
564 1.1 matt sz = round_page(MSGBUFSIZE);
565 1.1 matt v = (caddr_t) msgbuf_paddr;
566 1.1 matt if (msgbuf_paddr + sz > SEGMENT_LENGTH) {
567 1.1 matt minaddr = 0;
568 1.1 matt if (uvm_map(kernel_map, &minaddr, sz,
569 1.1 matt NULL, UVM_UNKNOWN_OFFSET, 0,
570 1.1 matt UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE,
571 1.1 matt UVM_INH_NONE, UVM_ADV_NORMAL, 0)) != 0)
572 1.1 matt panic("startup: cannot allocate VM for msgbuf");
573 1.1 matt v = (caddr_t)minaddr;
574 1.1 matt for (i = 0; i < sz; i += NBPG) {
575 1.1 matt pmap_kenter_pa(minaddr + i, msgbuf_paddr + i,
576 1.1 matt VM_PROT_READ|VM_PROT_WRITE);
577 1.1 matt }
578 1.1 matt pmap_update(pmap_kernel());
579 1.1 matt }
580 1.1 matt initmsgbuf(v, sz);
581 1.1 matt
582 1.1 matt printf("%s", version);
583 1.1 matt if (model != NULL)
584 1.1 matt printf("Model: %s\n", model);
585 1.1 matt cpu_identify(NULL, 0);
586 1.1 matt
587 1.1 matt format_bytes(pbuf, sizeof(pbuf), ctob((u_int)physmem));
588 1.1 matt printf("total memory = %s\n", pbuf);
589 1.1 matt
590 1.1 matt /*
591 1.1 matt * Find out how much space we need, allocate it,
592 1.1 matt * and then give everything true virtual addresses.
593 1.1 matt */
594 1.1 matt sz = (uintptr_t)allocsys(NULL, NULL);
595 1.1 matt if ((v = (caddr_t)uvm_km_zalloc(kernel_map, round_page(sz))) == 0)
596 1.1 matt panic("startup: no room for tables");
597 1.1 matt if (allocsys(v, NULL) - v != sz)
598 1.1 matt panic("startup: table size inconsistency");
599 1.1 matt
600 1.1 matt /*
601 1.1 matt * Now allocate buffers proper. They are different than the above
602 1.1 matt * in that they usually occupy more virtual memory than physical.
603 1.1 matt * Allocate the buffer starting at the top of the kernel VM space.
604 1.1 matt */
605 1.1 matt sz = MAXBSIZE * nbuf;
606 1.1 matt minaddr = VM_MAX_KERNEL_ADDRESS - round_page(sz);
607 1.1 matt if (uvm_map(kernel_map, &minaddr, round_page(sz),
608 1.1 matt NULL, UVM_UNKNOWN_OFFSET, 0,
609 1.1 matt UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
610 1.1 matt UVM_ADV_NORMAL, 0)) != 0)
611 1.1 matt panic("startup: cannot allocate VM for buffers");
612 1.1 matt buffers = (char *)minaddr;
613 1.1 matt base = bufpages / nbuf;
614 1.1 matt residual = bufpages % nbuf;
615 1.1 matt if (base >= MAXBSIZE) {
616 1.1 matt /* Don't want to alloc more physical mem than ever needed */
617 1.1 matt base = MAXBSIZE;
618 1.1 matt residual = 0;
619 1.1 matt }
620 1.1 matt for (i = 0; i < nbuf; i++) {
621 1.1 matt vsize_t curbufsize;
622 1.1 matt vaddr_t curbuf;
623 1.1 matt struct vm_page *pg;
624 1.1 matt
625 1.1 matt curbuf = (vaddr_t)buffers + i * MAXBSIZE;
626 1.1 matt curbufsize = NBPG * (i < residual ? base + 1 : base);
627 1.1 matt
628 1.1 matt while (curbufsize) {
629 1.1 matt pg = uvm_pagealloc(NULL, 0, NULL, 0);
630 1.1 matt if (pg == NULL)
631 1.1 matt panic("cpu_startup: not enough memory for "
632 1.1 matt "buffer cache");
633 1.1 matt pmap_kenter_pa(curbuf, VM_PAGE_TO_PHYS(pg),
634 1.1 matt VM_PROT_READ|VM_PROT_WRITE);
635 1.1 matt curbuf += PAGE_SIZE;
636 1.1 matt curbufsize -= PAGE_SIZE;
637 1.1 matt }
638 1.1 matt }
639 1.1 matt pmap_update(pmap_kernel());
640 1.1 matt
641 1.1 matt /*
642 1.1 matt * Allocate away the pages that map to 0xDEA[CDE]xxxx. Do this after
643 1.1 matt * the bufpages are allocated in case they overlap since it's not
644 1.1 matt * fatal if we can't allocate these.
645 1.1 matt */
646 1.1 matt minaddr = 0xDEAC0000;
647 1.1 matt error = uvm_map(kernel_map, &minaddr, 0x30000,
648 1.1 matt NULL, UVM_UNKNOWN_OFFSET, 0,
649 1.1 matt UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
650 1.1 matt UVM_ADV_NORMAL, UVM_FLAG_FIXED));
651 1.1 matt if (error != 0 || minaddr != 0xDEAC0000) {
652 1.1 matt printf("oea_startup: failed to allocate DEAD "
653 1.1 matt "ZONE: error=%d\n", error);
654 1.1 matt minaddr = 0;
655 1.1 matt }
656 1.1 matt
657 1.1 matt /*
658 1.1 matt * Allocate a submap for exec arguments. This map effectively
659 1.1 matt * limits the number of processes exec'ing at any time. These
660 1.1 matt * submaps will be allocated after the dead zone.
661 1.1 matt */
662 1.1 matt exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
663 1.1 matt 16*NCARGS, VM_MAP_PAGEABLE, FALSE, NULL);
664 1.1 matt
665 1.1 matt /*
666 1.1 matt * Allocate a submap for physio
667 1.1 matt */
668 1.1 matt phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
669 1.1 matt VM_PHYS_SIZE, 0, FALSE, NULL);
670 1.1 matt
671 1.1 matt #ifndef PMAP_MAP_POOLPAGE
672 1.1 matt /*
673 1.1 matt * No need to allocate an mbuf cluster submap. Mbuf clusters
674 1.1 matt * are allocated via the pool allocator, and we use direct-mapped
675 1.1 matt * pool pages.
676 1.1 matt */
677 1.1 matt mb_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
678 1.1 matt mclbytes*nmbclusters, VM_MAP_INTRSAFE, FALSE, NULL);
679 1.1 matt #endif
680 1.1 matt
681 1.1 matt format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
682 1.1 matt printf("avail memory = %s\n", pbuf);
683 1.1 matt format_bytes(pbuf, sizeof(pbuf), bufpages * NBPG);
684 1.1 matt printf("using %u buffers containing %s of memory\n", nbuf, pbuf);
685 1.1 matt
686 1.1 matt /*
687 1.1 matt * Set up the buffers.
688 1.1 matt */
689 1.1 matt bufinit();
690 1.1 matt
691 1.1 matt #ifdef ALTIVEC
692 1.1 matt if (cpu_altivec)
693 1.1 matt init_vec();
694 1.1 matt #endif
695 1.1 matt }
696 1.1 matt
697 1.1 matt /*
698 1.1 matt * Crash dump handling.
699 1.1 matt */
700 1.1 matt
701 1.1 matt void
702 1.1 matt oea_dumpsys(void)
703 1.1 matt {
704 1.1 matt printf("dumpsys: TBD\n");
705 1.1 matt }
706 1.1 matt
707 1.1 matt /*
708 1.1 matt * Soft networking interrupts.
709 1.1 matt */
710 1.1 matt void
711 1.1 matt softnet(int pendisr)
712 1.1 matt {
713 1.1 matt #define DONETISR(bit, fn) do { \
714 1.1 matt if (pendisr & (1 << bit)) \
715 1.1 matt (*fn)(); \
716 1.1 matt } while (0)
717 1.1 matt
718 1.1 matt #include <net/netisr_dispatch.h>
719 1.1 matt
720 1.1 matt #undef DONETISR
721 1.1 matt
722 1.1 matt }
723 1.1 matt
724 1.1 matt /*
725 1.1 matt * Convert kernel VA to physical address
726 1.1 matt */
727 1.1 matt paddr_t
728 1.1 matt kvtop(caddr_t addr)
729 1.1 matt {
730 1.1 matt vaddr_t va;
731 1.1 matt paddr_t pa;
732 1.1 matt uintptr_t off;
733 1.1 matt extern char end[];
734 1.1 matt
735 1.1 matt if (addr < end)
736 1.1 matt return (paddr_t)addr;
737 1.1 matt
738 1.1 matt va = trunc_page((vaddr_t)addr);
739 1.1 matt off = (uintptr_t)addr - va;
740 1.1 matt
741 1.1 matt if (pmap_extract(pmap_kernel(), va, &pa) == FALSE) {
742 1.1 matt /*printf("kvtop: zero page frame (va=0x%x)\n", addr);*/
743 1.1 matt return (paddr_t)addr;
744 1.1 matt }
745 1.1 matt
746 1.1 matt return(pa + off);
747 1.1 matt }
748 1.1 matt
749 1.1 matt /*
750 1.1 matt * Allocate vm space and mapin the I/O address
751 1.1 matt */
752 1.1 matt void *
753 1.1 matt mapiodev(paddr_t pa, psize_t len)
754 1.1 matt {
755 1.1 matt paddr_t faddr;
756 1.1 matt vaddr_t taddr, va;
757 1.1 matt int off;
758 1.1 matt
759 1.1 matt faddr = trunc_page(pa);
760 1.1 matt off = pa - faddr;
761 1.1 matt len = round_page(off + len);
762 1.1 matt va = taddr = uvm_km_valloc(kernel_map, len);
763 1.1 matt
764 1.1 matt if (va == 0)
765 1.1 matt return NULL;
766 1.1 matt
767 1.1 matt for (; len > 0; len -= NBPG) {
768 1.1 matt pmap_kenter_pa(taddr, faddr, VM_PROT_READ | VM_PROT_WRITE);
769 1.1 matt faddr += NBPG;
770 1.1 matt taddr += NBPG;
771 1.1 matt }
772 1.1 matt pmap_update(pmap_kernel());
773 1.1 matt return (void *)(va + off);
774 1.1 matt }
775