oea_machdep.c revision 1.1
1 /* $NetBSD: oea_machdep.c,v 1.1 2003/02/03 17:10:10 matt Exp $ */ 2 3 /* 4 * Copyright (C) 2002 Matt Thomas 5 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 6 * Copyright (C) 1995, 1996 TooLs GmbH. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by TooLs GmbH. 20 * 4. The name of TooLs GmbH may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 31 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 32 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include "opt_compat_netbsd.h" 36 #include "opt_ddb.h" 37 #include "opt_kgdb.h" 38 #include "opt_ipkdb.h" 39 #include "opt_multiprocessor.h" 40 #include "opt_altivec.h" 41 42 #include <sys/param.h> 43 #include <sys/buf.h> 44 #include <sys/exec.h> 45 #include <sys/malloc.h> 46 #include <sys/mbuf.h> 47 #include <sys/mount.h> 48 #include <sys/msgbuf.h> 49 #include <sys/proc.h> 50 #include <sys/reboot.h> 51 #include <sys/sa.h> 52 #include <sys/syscallargs.h> 53 #include <sys/syslog.h> 54 #include <sys/systm.h> 55 #include <sys/kernel.h> 56 #include <sys/user.h> 57 #include <sys/boot_flag.h> 58 59 #include <uvm/uvm_extern.h> 60 61 #include <net/netisr.h> 62 63 #ifdef DDB 64 #include <machine/db_machdep.h> 65 #include <ddb/db_extern.h> 66 #endif 67 68 #ifdef KGDB 69 #include <sys/kgdb.h> 70 #endif 71 72 #ifdef IPKDB 73 #include <ipkdb/ipkdb.h> 74 #endif 75 76 #include <powerpc/oea/bat.h> 77 #include <powerpc/oea/sr_601.h> 78 #include <powerpc/trap.h> 79 #include <powerpc/stdarg.h> 80 #include <powerpc/spr.h> 81 #include <powerpc/pte.h> 82 #include <powerpc/altivec.h> 83 #include <machine/powerpc.h> 84 85 char machine[] = MACHINE; /* from <machine/param.h> */ 86 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */ 87 88 struct vm_map *exec_map = NULL; 89 struct vm_map *mb_map = NULL; 90 struct vm_map *phys_map = NULL; 91 92 /* 93 * Global variables used here and there 94 */ 95 extern struct user *proc0paddr; 96 97 struct bat battable[512]; 98 sr_t iosrtable[16]; /* I/O segments, for kernel_pmap setup */ 99 paddr_t msgbuf_paddr; 100 101 void 102 oea_init(void (*handler)(void)) 103 { 104 extern int trapstart[], trapend[]; 105 extern int trapcode, trapsize; 106 extern int sctrap, scsize; 107 extern int alitrap, alisize; 108 extern int dsitrap, dsisize; 109 extern int dsi601trap, dsi601size; 110 extern int decrint, decrsize; 111 extern int tlbimiss, tlbimsize; 112 extern int tlbdlmiss, tlbdlmsize; 113 extern int tlbdsmiss, tlbdsmsize; 114 #if defined(DDB) || defined(KGDB) 115 extern int ddblow, ddbsize; 116 #endif 117 #ifdef IPKDB 118 extern int ipkdblow, ipkdbsize; 119 #endif 120 #ifdef ALTIVEC 121 register_t msr; 122 #endif 123 uintptr_t exc; 124 register_t scratch; 125 unsigned int cpuvers; 126 size_t size; 127 struct cpu_info * const ci = &cpu_info[0]; 128 129 mtspr(SPR_SPRG0, ci); 130 cpuvers = mfpvr() >> 16; 131 132 133 /* 134 * Initialize proc0 and current pcb and pmap pointers. 135 */ 136 KASSERT(ci != NULL); 137 KASSERT(curcpu() == ci); 138 lwp0.l_cpu = ci; 139 KASSERT(lwp0.l_cpu != NULL); 140 lwp0.l_addr = proc0paddr; 141 memset(lwp0.l_addr, 0, sizeof *lwp0.l_addr); 142 143 curpcb = &proc0paddr->u_pcb; 144 curpm = curpcb->pcb_pmreal = curpcb->pcb_pm = pmap_kernel(); 145 146 /* 147 * Cause a PGM trap if we branch to 0. 148 */ 149 memset(0, 0, 0x100); 150 151 /* 152 * Set up trap vectors. Don't assume vectors are on 0x100. 153 */ 154 for (exc = EXC_RST; exc <= EXC_LAST; exc += 0x100) { 155 switch (exc) { 156 default: 157 size = (size_t)&trapsize; 158 memcpy((void *)exc, &trapcode, size); 159 break; 160 #if 0 161 case EXC_EXI: 162 /* 163 * This one is (potentially) installed during autoconf 164 */ 165 break; 166 #endif 167 case EXC_SC: 168 size = (size_t)&scsize; 169 memcpy((void *)EXC_SC, &sctrap, size); 170 break; 171 case EXC_ALI: 172 size = (size_t)&alisize; 173 memcpy((void *)EXC_ALI, &alitrap, size); 174 break; 175 case EXC_DSI: 176 if (cpuvers == MPC601) { 177 size = (size_t)&dsi601size; 178 memcpy((void *)EXC_DSI, &dsi601trap, size); 179 } else { 180 size = (size_t)&dsisize; 181 memcpy((void *)EXC_DSI, &dsitrap, size); 182 } 183 break; 184 case EXC_DECR: 185 size = (size_t)&decrsize; 186 memcpy((void *)EXC_DECR, &decrint, size); 187 break; 188 case EXC_IMISS: 189 size = (size_t)&tlbimsize; 190 memcpy((void *)EXC_IMISS, &tlbimiss, size); 191 break; 192 case EXC_DLMISS: 193 size = (size_t)&tlbdlmsize; 194 memcpy((void *)EXC_DLMISS, &tlbdlmiss, size); 195 break; 196 case EXC_DSMISS: 197 size = (size_t)&tlbdsmsize; 198 memcpy((void *)EXC_DSMISS, &tlbdsmiss, size); 199 break; 200 case EXC_PERF: 201 size = (size_t)&trapsize; 202 memcpy((void *)EXC_PERF, &trapcode, size); 203 memcpy((void *)EXC_VEC, &trapcode, size); 204 break; 205 #if defined(DDB) || defined(IPKDB) || defined(KGDB) 206 case EXC_RUNMODETRC: 207 if (cpuvers != MPC601) { 208 size = (size_t)&trapsize; 209 memcpy((void *)EXC_RUNMODETRC, &trapcode, size); 210 break; 211 } 212 /* FALLTHROUGH */ 213 case EXC_PGM: 214 case EXC_TRC: 215 case EXC_BPT: 216 #if defined(DDB) || defined(KGDB) 217 size = (size_t)&ddbsize; 218 memcpy((void *)exc, &ddblow, size); 219 #if defined(IPKDB) 220 #error "cannot enable IPKDB with DDB or KGDB" 221 #endif 222 #else 223 size = (size_t)&ipkdbsize; 224 memcpy((void *)exc, &ipkdblow, size); 225 #endif 226 break; 227 #endif /* DDB || IPKDB || KGDB */ 228 } 229 #if 0 230 exc += roundup(size, 32); 231 #endif 232 } 233 234 /* 235 * Get the cache sizes because install_extint calls __syncicache. 236 */ 237 cpu_probe_cache(); 238 239 #define MxSPR_MASK 0x7c1fffff 240 #define MFSPR_MQ 0x7c0002a6 241 #define MTSPR_MQ 0x7c0003a6 242 #define NOP 0x60000000 243 244 #ifdef ALTIVEC 245 #define MFSPR_VRSAVE 0x7c0042a6 246 #define MTSPR_VRSAVE 0x7c0043a6 247 248 /* 249 * Try to set the VEC bit in the MSR. If it doesn't get set, we are 250 * not on a AltiVec capable processor. 251 */ 252 __asm __volatile ( 253 "mfmsr %0; oris %1,%0,%2@h; mtmsr %1; isync; " 254 "mfmsr %1; mtmsr %0; isync" 255 : "=r"(msr), "=r"(scratch) 256 : "J"(PSL_VEC)); 257 258 /* 259 * If we aren't on an AltiVec capable processor, we to need zap any of 260 * sequences we save/restore the VRSAVE SPR into NOPs. 261 */ 262 if (scratch & PSL_VEC) { 263 cpu_altivec = 1; 264 } else { 265 int *ip = trapstart; 266 267 for (; ip < trapend; ip++) { 268 if ((ip[0] & MxSPR_MASK) == MFSPR_VRSAVE) { 269 ip[0] = NOP; /* mfspr */ 270 ip[1] = NOP; /* stw */ 271 } else if ((ip[0] & MxSPR_MASK) == MTSPR_VRSAVE) { 272 ip[-1] = NOP; /* lwz */ 273 ip[0] = NOP; /* mtspr */ 274 } 275 } 276 } 277 #endif 278 279 /* 280 * If we aren't on a MPC601 processor, we to need zap any of 281 * sequences we save/restore the MQ SPR into NOPs. 282 */ 283 if (cpuvers != MPC601) { 284 int *ip = trapstart; 285 286 for (; ip < trapend; ip++) { 287 if ((ip[0] & MxSPR_MASK) == MFSPR_MQ) { 288 ip[0] = NOP; /* mfspr */ 289 ip[1] = NOP; /* stw */ 290 } else if ((ip[0] & MxSPR_MASK) == MTSPR_MQ) { 291 ip[-1] = NOP; /* lwz */ 292 ip[0] = NOP; /* mtspr */ 293 } 294 } 295 } 296 297 if (!cpu_altivec || cpuvers != MPC601) { 298 /* 299 * Sync the changed instructions. 300 */ 301 __syncicache((void *) trapstart, 302 (uintptr_t) trapend - (uintptr_t) trapstart); 303 } 304 305 /* 306 * external interrupt handler install 307 */ 308 if (handler) 309 oea_install_extint(handler); 310 311 __syncicache(0, EXC_LAST + 0x100); 312 313 /* 314 * Now enable translation (and machine checks/recoverable interrupts). 315 */ 316 __asm __volatile ("sync; mfmsr %0; ori %0,%0,%1; mtmsr %0; isync" 317 : "=r"(scratch) 318 : "K"(PSL_IR|PSL_DR|PSL_ME|PSL_RI)); 319 320 KASSERT(curcpu() == ci); 321 } 322 323 void 324 mpc601_ioseg_add(paddr_t pa, register_t len) 325 { 326 const u_int i = pa >> ADDR_SR_SHFT; 327 328 if (len != BAT_BL_256M) 329 panic("mpc601_ioseg_add: len != 256M"); 330 331 /* 332 * Translate into an I/O segment, load it, and stash away for use 333 * in pmap_bootstrap(). 334 */ 335 iosrtable[i] = SR601(SR601_Ks, SR601_BUID_MEMFORCED, 0, i); 336 __asm __volatile ("mtsrin %0,%1" 337 :: "r"(iosrtable[i]), 338 "r"(pa)); 339 } 340 341 void 342 oea_iobat_add(paddr_t pa, register_t len) 343 { 344 static int n = 1; 345 const u_int i = pa >> 28; 346 battable[i].batl = BATL(pa, BAT_I|BAT_G, BAT_PP_RW); 347 battable[i].batu = BATU(pa, len, BAT_Vs); 348 349 /* 350 * Let's start loading the BAT registers. 351 */ 352 switch (n) { 353 case 1: 354 __asm __volatile ("mtdbatl 1,%0; mtdbatu 1,%1;" 355 :: "r"(battable[i].batl), 356 "r"(battable[i].batu)); 357 n = 2; 358 break; 359 case 2: 360 __asm __volatile ("mtdbatl 2,%0; mtdbatu 2,%1;" 361 :: "r"(battable[i].batl), 362 "r"(battable[i].batu)); 363 n = 3; 364 break; 365 case 3: 366 __asm __volatile ("mtdbatl 3,%0; mtdbatu 3,%1;" 367 :: "r"(battable[i].batl), 368 "r"(battable[i].batu)); 369 n = 4; 370 break; 371 default: 372 break; 373 } 374 } 375 376 void 377 oea_batinit(paddr_t pa, ...) 378 { 379 struct mem_region *allmem, *availmem, *mp; 380 int i; 381 unsigned int cpuvers; 382 va_list ap; 383 384 cpuvers = mfpvr() >> 16; 385 386 /* 387 * Initialize BAT registers to unmapped to not generate 388 * overlapping mappings below. 389 * 390 * The 601's implementation differs in the Valid bit being situated 391 * in the lower BAT register, and in being a unified BAT only whose 392 * four entries are accessed through the IBAT[0-3] SPRs. 393 * 394 * Also, while the 601 does distinguish between supervisor/user 395 * protection keys, it does _not_ distinguish distinguish between 396 * validity in supervisor/user mode. 397 */ 398 if (cpuvers == MPC601) { 399 __asm __volatile ("mtibatl 0,%0" :: "r"(0)); 400 __asm __volatile ("mtibatl 1,%0" :: "r"(0)); 401 __asm __volatile ("mtibatl 2,%0" :: "r"(0)); 402 __asm __volatile ("mtibatl 3,%0" :: "r"(0)); 403 } else { 404 __asm __volatile ("mtibatu 0,%0" :: "r"(0)); 405 __asm __volatile ("mtibatu 1,%0" :: "r"(0)); 406 __asm __volatile ("mtibatu 2,%0" :: "r"(0)); 407 __asm __volatile ("mtibatu 3,%0" :: "r"(0)); 408 __asm __volatile ("mtdbatu 0,%0" :: "r"(0)); 409 __asm __volatile ("mtdbatu 1,%0" :: "r"(0)); 410 __asm __volatile ("mtdbatu 2,%0" :: "r"(0)); 411 __asm __volatile ("mtdbatu 3,%0" :: "r"(0)); 412 } 413 414 /* 415 * Set up BAT to map physical memory 416 */ 417 if (cpuvers == MPC601) { 418 /* 419 * Set up battable to map the lowest 256 MB area. 420 * Map the lowest 32 MB area via BAT[0-3]; 421 * BAT[01] are fixed, BAT[23] are floating. 422 */ 423 for (i = 0; i < 32; i++) { 424 battable[i].batl = BATL601(i << 23, 425 BAT601_BSM_8M, BAT601_V); 426 battable[i].batu = BATU601(i << 23, 427 BAT601_M, BAT601_Ku, BAT601_PP_NONE); 428 } 429 __asm __volatile ("mtibatu 0,%1; mtibatl 0,%0" 430 :: "r"(battable[0x00000000 >> 23].batl), 431 "r"(battable[0x00000000 >> 23].batu)); 432 __asm __volatile ("mtibatu 1,%1; mtibatl 1,%0" 433 :: "r"(battable[0x00800000 >> 23].batl), 434 "r"(battable[0x00800000 >> 23].batu)); 435 __asm __volatile ("mtibatu 2,%1; mtibatl 2,%0" 436 :: "r"(battable[0x01000000 >> 23].batl), 437 "r"(battable[0x01000000 >> 23].batu)); 438 __asm __volatile ("mtibatu 3,%1; mtibatl 3,%0" 439 :: "r"(battable[0x01800000 >> 23].batl), 440 "r"(battable[0x01800000 >> 23].batu)); 441 } else { 442 /* 443 * Set up BAT0 to only map the lowest 256 MB area 444 */ 445 battable[0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 446 battable[0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 447 448 __asm __volatile ("mtibatl 0,%0; mtibatu 0,%1;" 449 "mtdbatl 0,%0; mtdbatu 0,%1;" 450 :: "r"(battable[0].batl), "r"(battable[0].batu)); 451 } 452 453 /* 454 * Now setup other fixed bat registers 455 * 456 * Note that we still run in real mode, and the BAT 457 * registers were cleared above. 458 */ 459 460 va_start(ap, pa); 461 462 /* 463 * Add any I/O BATs specificed; 464 * use I/O segments on the BAT-starved 601. 465 */ 466 if (cpuvers == MPC601) { 467 while (pa != 0) { 468 register_t len = va_arg(ap, register_t); 469 mpc601_ioseg_add(pa, len); 470 pa = va_arg(ap, paddr_t); 471 } 472 } else { 473 while (pa != 0) { 474 register_t len = va_arg(ap, register_t); 475 oea_iobat_add(pa, len); 476 pa = va_arg(ap, paddr_t); 477 } 478 } 479 480 va_end(ap); 481 482 /* 483 * Set up battable to map all RAM regions. 484 * This is here because mem_regions() call needs bat0 set up. 485 */ 486 mem_regions(&allmem, &availmem); 487 if (cpuvers == MPC601) { 488 for (mp = allmem; mp->size; mp++) { 489 paddr_t pa = mp->start & 0xff800000; 490 paddr_t end = mp->start + mp->size; 491 492 do { 493 u_int i = pa >> 23; 494 495 battable[i].batl = 496 BATL601(pa, BAT601_BSM_8M, BAT601_V); 497 battable[i].batu = 498 BATU601(pa, BAT601_M, BAT601_Ku, BAT601_PP_NONE); 499 pa += (1 << 23); 500 } while (pa < end); 501 } 502 } else { 503 for (mp = allmem; mp->size; mp++) { 504 paddr_t pa = mp->start & 0xf0000000; 505 paddr_t end = mp->start + mp->size; 506 507 do { 508 u_int i = pa >> 28; 509 510 battable[i].batl = 511 BATL(pa, BAT_M, BAT_PP_RW); 512 battable[i].batu = 513 BATU(pa, BAT_BL_256M, BAT_Vs); 514 pa += SEGMENT_LENGTH; 515 } while (pa < end); 516 } 517 } 518 } 519 520 void 521 oea_install_extint(void (*handler)(void)) 522 { 523 extern int extint, extsize; 524 extern int extint_call; 525 uintptr_t offset = (uintptr_t)handler - (uintptr_t)&extint_call; 526 int omsr, msr; 527 528 #ifdef DIAGNOSTIC 529 if (offset > 0x1ffffff) 530 panic("install_extint: %p too far away (%#lx)", handler, 531 (unsigned long) offset); 532 #endif 533 __asm __volatile ("mfmsr %0; andi. %1,%0,%2; mtmsr %1" 534 : "=r" (omsr), "=r" (msr) 535 : "K" ((u_short)~PSL_EE)); 536 extint_call = (extint_call & 0xfc000003) | offset; 537 memcpy((void *)EXC_EXI, &extint, (size_t)&extsize); 538 __syncicache((void *)&extint_call, sizeof extint_call); 539 __syncicache((void *)EXC_EXI, (int)&extsize); 540 __asm __volatile ("mtmsr %0" :: "r"(omsr)); 541 } 542 543 /* 544 * Machine dependent startup code. 545 */ 546 void 547 oea_startup(const char *model) 548 { 549 uintptr_t sz; 550 u_int i; 551 u_long base, residual; 552 int error; 553 caddr_t v; 554 vaddr_t minaddr, maxaddr; 555 char pbuf[9]; 556 557 KASSERT(curcpu() != NULL); 558 KASSERT(lwp0.l_cpu != NULL); 559 560 /* 561 * If the msgbuf is not in segment 0, allocate KVA for it and access 562 * it via mapped pages. [This prevents unneeded BAT switches.] 563 */ 564 sz = round_page(MSGBUFSIZE); 565 v = (caddr_t) msgbuf_paddr; 566 if (msgbuf_paddr + sz > SEGMENT_LENGTH) { 567 minaddr = 0; 568 if (uvm_map(kernel_map, &minaddr, sz, 569 NULL, UVM_UNKNOWN_OFFSET, 0, 570 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, 571 UVM_INH_NONE, UVM_ADV_NORMAL, 0)) != 0) 572 panic("startup: cannot allocate VM for msgbuf"); 573 v = (caddr_t)minaddr; 574 for (i = 0; i < sz; i += NBPG) { 575 pmap_kenter_pa(minaddr + i, msgbuf_paddr + i, 576 VM_PROT_READ|VM_PROT_WRITE); 577 } 578 pmap_update(pmap_kernel()); 579 } 580 initmsgbuf(v, sz); 581 582 printf("%s", version); 583 if (model != NULL) 584 printf("Model: %s\n", model); 585 cpu_identify(NULL, 0); 586 587 format_bytes(pbuf, sizeof(pbuf), ctob((u_int)physmem)); 588 printf("total memory = %s\n", pbuf); 589 590 /* 591 * Find out how much space we need, allocate it, 592 * and then give everything true virtual addresses. 593 */ 594 sz = (uintptr_t)allocsys(NULL, NULL); 595 if ((v = (caddr_t)uvm_km_zalloc(kernel_map, round_page(sz))) == 0) 596 panic("startup: no room for tables"); 597 if (allocsys(v, NULL) - v != sz) 598 panic("startup: table size inconsistency"); 599 600 /* 601 * Now allocate buffers proper. They are different than the above 602 * in that they usually occupy more virtual memory than physical. 603 * Allocate the buffer starting at the top of the kernel VM space. 604 */ 605 sz = MAXBSIZE * nbuf; 606 minaddr = VM_MAX_KERNEL_ADDRESS - round_page(sz); 607 if (uvm_map(kernel_map, &minaddr, round_page(sz), 608 NULL, UVM_UNKNOWN_OFFSET, 0, 609 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE, 610 UVM_ADV_NORMAL, 0)) != 0) 611 panic("startup: cannot allocate VM for buffers"); 612 buffers = (char *)minaddr; 613 base = bufpages / nbuf; 614 residual = bufpages % nbuf; 615 if (base >= MAXBSIZE) { 616 /* Don't want to alloc more physical mem than ever needed */ 617 base = MAXBSIZE; 618 residual = 0; 619 } 620 for (i = 0; i < nbuf; i++) { 621 vsize_t curbufsize; 622 vaddr_t curbuf; 623 struct vm_page *pg; 624 625 curbuf = (vaddr_t)buffers + i * MAXBSIZE; 626 curbufsize = NBPG * (i < residual ? base + 1 : base); 627 628 while (curbufsize) { 629 pg = uvm_pagealloc(NULL, 0, NULL, 0); 630 if (pg == NULL) 631 panic("cpu_startup: not enough memory for " 632 "buffer cache"); 633 pmap_kenter_pa(curbuf, VM_PAGE_TO_PHYS(pg), 634 VM_PROT_READ|VM_PROT_WRITE); 635 curbuf += PAGE_SIZE; 636 curbufsize -= PAGE_SIZE; 637 } 638 } 639 pmap_update(pmap_kernel()); 640 641 /* 642 * Allocate away the pages that map to 0xDEA[CDE]xxxx. Do this after 643 * the bufpages are allocated in case they overlap since it's not 644 * fatal if we can't allocate these. 645 */ 646 minaddr = 0xDEAC0000; 647 error = uvm_map(kernel_map, &minaddr, 0x30000, 648 NULL, UVM_UNKNOWN_OFFSET, 0, 649 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE, 650 UVM_ADV_NORMAL, UVM_FLAG_FIXED)); 651 if (error != 0 || minaddr != 0xDEAC0000) { 652 printf("oea_startup: failed to allocate DEAD " 653 "ZONE: error=%d\n", error); 654 minaddr = 0; 655 } 656 657 /* 658 * Allocate a submap for exec arguments. This map effectively 659 * limits the number of processes exec'ing at any time. These 660 * submaps will be allocated after the dead zone. 661 */ 662 exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 663 16*NCARGS, VM_MAP_PAGEABLE, FALSE, NULL); 664 665 /* 666 * Allocate a submap for physio 667 */ 668 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 669 VM_PHYS_SIZE, 0, FALSE, NULL); 670 671 #ifndef PMAP_MAP_POOLPAGE 672 /* 673 * No need to allocate an mbuf cluster submap. Mbuf clusters 674 * are allocated via the pool allocator, and we use direct-mapped 675 * pool pages. 676 */ 677 mb_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 678 mclbytes*nmbclusters, VM_MAP_INTRSAFE, FALSE, NULL); 679 #endif 680 681 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 682 printf("avail memory = %s\n", pbuf); 683 format_bytes(pbuf, sizeof(pbuf), bufpages * NBPG); 684 printf("using %u buffers containing %s of memory\n", nbuf, pbuf); 685 686 /* 687 * Set up the buffers. 688 */ 689 bufinit(); 690 691 #ifdef ALTIVEC 692 if (cpu_altivec) 693 init_vec(); 694 #endif 695 } 696 697 /* 698 * Crash dump handling. 699 */ 700 701 void 702 oea_dumpsys(void) 703 { 704 printf("dumpsys: TBD\n"); 705 } 706 707 /* 708 * Soft networking interrupts. 709 */ 710 void 711 softnet(int pendisr) 712 { 713 #define DONETISR(bit, fn) do { \ 714 if (pendisr & (1 << bit)) \ 715 (*fn)(); \ 716 } while (0) 717 718 #include <net/netisr_dispatch.h> 719 720 #undef DONETISR 721 722 } 723 724 /* 725 * Convert kernel VA to physical address 726 */ 727 paddr_t 728 kvtop(caddr_t addr) 729 { 730 vaddr_t va; 731 paddr_t pa; 732 uintptr_t off; 733 extern char end[]; 734 735 if (addr < end) 736 return (paddr_t)addr; 737 738 va = trunc_page((vaddr_t)addr); 739 off = (uintptr_t)addr - va; 740 741 if (pmap_extract(pmap_kernel(), va, &pa) == FALSE) { 742 /*printf("kvtop: zero page frame (va=0x%x)\n", addr);*/ 743 return (paddr_t)addr; 744 } 745 746 return(pa + off); 747 } 748 749 /* 750 * Allocate vm space and mapin the I/O address 751 */ 752 void * 753 mapiodev(paddr_t pa, psize_t len) 754 { 755 paddr_t faddr; 756 vaddr_t taddr, va; 757 int off; 758 759 faddr = trunc_page(pa); 760 off = pa - faddr; 761 len = round_page(off + len); 762 va = taddr = uvm_km_valloc(kernel_map, len); 763 764 if (va == 0) 765 return NULL; 766 767 for (; len > 0; len -= NBPG) { 768 pmap_kenter_pa(taddr, faddr, VM_PROT_READ | VM_PROT_WRITE); 769 faddr += NBPG; 770 taddr += NBPG; 771 } 772 pmap_update(pmap_kernel()); 773 return (void *)(va + off); 774 } 775
Indexes created Tue Sep 30 10:09:55 GMT 2025