oea_machdep.c revision 1.17
1 /* $NetBSD: oea_machdep.c,v 1.17 2004/06/09 23:24:51 kleink Exp $ */ 2 3 /* 4 * Copyright (C) 2002 Matt Thomas 5 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 6 * Copyright (C) 1995, 1996 TooLs GmbH. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by TooLs GmbH. 20 * 4. The name of TooLs GmbH may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 31 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 32 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.17 2004/06/09 23:24:51 kleink Exp $"); 37 38 #include "opt_compat_netbsd.h" 39 #include "opt_ddb.h" 40 #include "opt_kgdb.h" 41 #include "opt_ipkdb.h" 42 #include "opt_multiprocessor.h" 43 #include "opt_altivec.h" 44 45 #include <sys/param.h> 46 #include <sys/buf.h> 47 #include <sys/exec.h> 48 #include <sys/malloc.h> 49 #include <sys/mbuf.h> 50 #include <sys/mount.h> 51 #include <sys/msgbuf.h> 52 #include <sys/proc.h> 53 #include <sys/reboot.h> 54 #include <sys/sa.h> 55 #include <sys/syscallargs.h> 56 #include <sys/syslog.h> 57 #include <sys/systm.h> 58 #include <sys/kernel.h> 59 #include <sys/user.h> 60 #include <sys/boot_flag.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <net/netisr.h> 65 66 #ifdef DDB 67 #include <machine/db_machdep.h> 68 #include <ddb/db_extern.h> 69 #endif 70 71 #ifdef KGDB 72 #include <sys/kgdb.h> 73 #endif 74 75 #ifdef IPKDB 76 #include <ipkdb/ipkdb.h> 77 #endif 78 79 #include <powerpc/oea/bat.h> 80 #include <powerpc/oea/sr_601.h> 81 #include <powerpc/trap.h> 82 #include <powerpc/stdarg.h> 83 #include <powerpc/spr.h> 84 #include <powerpc/pte.h> 85 #include <powerpc/altivec.h> 86 #include <machine/powerpc.h> 87 88 char machine[] = MACHINE; /* from <machine/param.h> */ 89 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */ 90 91 struct vm_map *exec_map = NULL; 92 struct vm_map *mb_map = NULL; 93 struct vm_map *phys_map = NULL; 94 95 /* 96 * Global variables used here and there 97 */ 98 extern struct user *proc0paddr; 99 100 struct bat battable[512]; 101 register_t iosrtable[16]; /* I/O segments, for kernel_pmap setup */ 102 paddr_t msgbuf_paddr; 103 104 void 105 oea_init(void (*handler)(void)) 106 { 107 extern int trapstart[], trapend[]; 108 extern int trapcode[], trapsize[]; 109 extern int sctrap[], scsize[]; 110 extern int alitrap[], alisize[]; 111 extern int dsitrap[], dsisize[]; 112 extern int dsi601trap[], dsi601size[]; 113 extern int decrint[], decrsize[]; 114 extern int tlbimiss[], tlbimsize[]; 115 extern int tlbdlmiss[], tlbdlmsize[]; 116 extern int tlbdsmiss[], tlbdsmsize[]; 117 #if defined(DDB) || defined(KGDB) 118 extern int ddblow[], ddbsize[]; 119 #endif 120 #ifdef IPKDB 121 extern int ipkdblow[], ipkdbsize[]; 122 #endif 123 #ifdef ALTIVEC 124 register_t msr; 125 #endif 126 uintptr_t exc; 127 register_t scratch; 128 unsigned int cpuvers; 129 size_t size; 130 struct cpu_info * const ci = &cpu_info[0]; 131 132 mtspr(SPR_SPRG0, ci); 133 cpuvers = mfpvr() >> 16; 134 135 136 /* 137 * Initialize proc0 and current pcb and pmap pointers. 138 */ 139 KASSERT(ci != NULL); 140 KASSERT(curcpu() == ci); 141 lwp0.l_cpu = ci; 142 lwp0.l_addr = proc0paddr; 143 memset(lwp0.l_addr, 0, sizeof *lwp0.l_addr); 144 KASSERT(lwp0.l_cpu != NULL); 145 146 curpcb = &proc0paddr->u_pcb; 147 memset(curpcb, 0, sizeof(*curpcb)); 148 #ifdef ALTIVEC 149 /* 150 * Initialize the vectors with NaNs 151 */ 152 for (scratch = 0; scratch < 32; scratch++) { 153 curpcb->pcb_vr.vreg[scratch][0] = 0x7FFFDEAD; 154 curpcb->pcb_vr.vreg[scratch][1] = 0x7FFFDEAD; 155 curpcb->pcb_vr.vreg[scratch][2] = 0x7FFFDEAD; 156 curpcb->pcb_vr.vreg[scratch][3] = 0x7FFFDEAD; 157 } 158 curpcb->pcb_vr.vscr = 0; 159 curpcb->pcb_vr.vrsave = 0; 160 #endif 161 curpm = curpcb->pcb_pm = pmap_kernel(); 162 163 /* 164 * Cause a PGM trap if we branch to 0. 165 */ 166 memset(0, 0, 0x100); 167 168 /* 169 * Set up trap vectors. Don't assume vectors are on 0x100. 170 */ 171 for (exc = 0; exc <= EXC_LAST; exc += 0x100) { 172 switch (exc) { 173 default: 174 size = (size_t)trapsize; 175 memcpy((void *)exc, trapcode, size); 176 break; 177 #if 0 178 case EXC_EXI: 179 /* 180 * This one is (potentially) installed during autoconf 181 */ 182 break; 183 #endif 184 case EXC_SC: 185 size = (size_t)scsize; 186 memcpy((void *)EXC_SC, sctrap, size); 187 break; 188 case EXC_ALI: 189 size = (size_t)alisize; 190 memcpy((void *)EXC_ALI, alitrap, size); 191 break; 192 case EXC_DSI: 193 if (cpuvers == MPC601) { 194 size = (size_t)dsi601size; 195 memcpy((void *)EXC_DSI, dsi601trap, size); 196 } else { 197 size = (size_t)dsisize; 198 memcpy((void *)EXC_DSI, dsitrap, size); 199 } 200 break; 201 case EXC_DECR: 202 size = (size_t)decrsize; 203 memcpy((void *)EXC_DECR, decrint, size); 204 break; 205 case EXC_IMISS: 206 size = (size_t)tlbimsize; 207 memcpy((void *)EXC_IMISS, tlbimiss, size); 208 break; 209 case EXC_DLMISS: 210 size = (size_t)tlbdlmsize; 211 memcpy((void *)EXC_DLMISS, tlbdlmiss, size); 212 break; 213 case EXC_DSMISS: 214 size = (size_t)tlbdsmsize; 215 memcpy((void *)EXC_DSMISS, tlbdsmiss, size); 216 break; 217 case EXC_PERF: 218 size = (size_t)trapsize; 219 memcpy((void *)EXC_PERF, trapcode, size); 220 memcpy((void *)EXC_VEC, trapcode, size); 221 break; 222 #if defined(DDB) || defined(IPKDB) || defined(KGDB) 223 case EXC_RUNMODETRC: 224 if (cpuvers != MPC601) { 225 size = (size_t)trapsize; 226 memcpy((void *)EXC_RUNMODETRC, trapcode, size); 227 break; 228 } 229 /* FALLTHROUGH */ 230 case EXC_PGM: 231 case EXC_TRC: 232 case EXC_BPT: 233 #if defined(DDB) || defined(KGDB) 234 size = (size_t)ddbsize; 235 memcpy((void *)exc, ddblow, size); 236 #if defined(IPKDB) 237 #error "cannot enable IPKDB with DDB or KGDB" 238 #endif 239 #else 240 size = (size_t)ipkdbsize; 241 memcpy((void *)exc, ipkdblow, size); 242 #endif 243 break; 244 #endif /* DDB || IPKDB || KGDB */ 245 } 246 #if 0 247 exc += roundup(size, 32); 248 #endif 249 } 250 251 /* 252 * Get the cache sizes because install_extint calls __syncicache. 253 */ 254 cpu_probe_cache(); 255 256 #define MxSPR_MASK 0x7c1fffff 257 #define MFSPR_MQ 0x7c0002a6 258 #define MTSPR_MQ 0x7c0003a6 259 #define MTSPR_IBAT0L 0x7c1183a6 260 #define MTSPR_IBAT1L 0x7c1383a6 261 #define NOP 0x60000000 262 #define B 0x48000000 263 264 #ifdef ALTIVEC 265 #define MFSPR_VRSAVE 0x7c0042a6 266 #define MTSPR_VRSAVE 0x7c0043a6 267 268 /* 269 * Try to set the VEC bit in the MSR. If it doesn't get set, we are 270 * not on a AltiVec capable processor. 271 */ 272 __asm __volatile ( 273 "mfmsr %0; oris %1,%0,%2@h; mtmsr %1; isync; " 274 "mfmsr %1; mtmsr %0; isync" 275 : "=r"(msr), "=r"(scratch) 276 : "J"(PSL_VEC)); 277 278 /* 279 * If we aren't on an AltiVec capable processor, we need to zap any of 280 * the sequences we save/restore the VRSAVE SPR into NOPs. 281 */ 282 if (scratch & PSL_VEC) { 283 cpu_altivec = 1; 284 } else { 285 int *ip = trapstart; 286 287 for (; ip < trapend; ip++) { 288 if ((ip[0] & MxSPR_MASK) == MFSPR_VRSAVE) { 289 ip[0] = NOP; /* mfspr */ 290 ip[1] = NOP; /* stw */ 291 } else if ((ip[0] & MxSPR_MASK) == MTSPR_VRSAVE) { 292 ip[-1] = NOP; /* lwz */ 293 ip[0] = NOP; /* mtspr */ 294 } 295 } 296 } 297 #endif 298 299 /* 300 * If we aren't on a MPC601 processor, we need to zap any of the 301 * sequences we save/restore the MQ SPR into NOPs, and skip over the 302 * sequences where we zap/restore BAT registers on kernel exit/entry. 303 */ 304 if (cpuvers != MPC601) { 305 int *ip = trapstart; 306 307 for (; ip < trapend; ip++) { 308 if ((ip[0] & MxSPR_MASK) == MFSPR_MQ) { 309 ip[0] = NOP; /* mfspr */ 310 ip[1] = NOP; /* stw */ 311 } else if ((ip[0] & MxSPR_MASK) == MTSPR_MQ) { 312 ip[-1] = NOP; /* lwz */ 313 ip[0] = NOP; /* mtspr */ 314 } else if ((ip[0] & MxSPR_MASK) == MTSPR_IBAT0L) { 315 if ((ip[1] & MxSPR_MASK) == MTSPR_IBAT1L) 316 ip[-1] = B | 0x14; /* li */ 317 else 318 ip[-4] = B | 0x24; /* lis */ 319 } 320 } 321 } 322 323 /* 324 * Sync the changed instructions. 325 */ 326 __syncicache((void *) trapstart, 327 (uintptr_t) trapend - (uintptr_t) trapstart); 328 329 /* 330 * external interrupt handler install 331 */ 332 if (handler) 333 oea_install_extint(handler); 334 335 __syncicache(0, EXC_LAST + 0x100); 336 337 /* 338 * Now enable translation (and machine checks/recoverable interrupts). 339 */ 340 __asm __volatile ("sync; mfmsr %0; ori %0,%0,%1; mtmsr %0; isync" 341 : "=r"(scratch) 342 : "K"(PSL_IR|PSL_DR|PSL_ME|PSL_RI)); 343 344 KASSERT(curcpu() == ci); 345 } 346 347 void 348 mpc601_ioseg_add(paddr_t pa, register_t len) 349 { 350 const u_int i = pa >> ADDR_SR_SHFT; 351 352 if (len != BAT_BL_256M) 353 panic("mpc601_ioseg_add: len != 256M"); 354 355 /* 356 * Translate into an I/O segment, load it, and stash away for use 357 * in pmap_bootstrap(). 358 */ 359 iosrtable[i] = SR601(SR601_Ks, SR601_BUID_MEMFORCED, 0, i); 360 __asm __volatile ("mtsrin %0,%1" 361 :: "r"(iosrtable[i]), 362 "r"(pa)); 363 } 364 365 void 366 oea_iobat_add(paddr_t pa, register_t len) 367 { 368 static int n = 1; 369 const u_int i = pa >> 28; 370 battable[i].batl = BATL(pa, BAT_I|BAT_G, BAT_PP_RW); 371 battable[i].batu = BATU(pa, len, BAT_Vs); 372 373 /* 374 * Let's start loading the BAT registers. 375 */ 376 switch (n) { 377 case 1: 378 __asm __volatile ("mtdbatl 1,%0; mtdbatu 1,%1;" 379 :: "r"(battable[i].batl), 380 "r"(battable[i].batu)); 381 n = 2; 382 break; 383 case 2: 384 __asm __volatile ("mtdbatl 2,%0; mtdbatu 2,%1;" 385 :: "r"(battable[i].batl), 386 "r"(battable[i].batu)); 387 n = 3; 388 break; 389 case 3: 390 __asm __volatile ("mtdbatl 3,%0; mtdbatu 3,%1;" 391 :: "r"(battable[i].batl), 392 "r"(battable[i].batu)); 393 n = 4; 394 break; 395 default: 396 break; 397 } 398 } 399 400 void 401 oea_iobat_remove(paddr_t pa) 402 { 403 register_t batu; 404 int i, n; 405 406 n = pa >> ADDR_SR_SHFT; 407 if (!BAT_VA_MATCH_P(battable[n].batu, pa) || 408 !BAT_VALID_P(battable[n].batu, PSL_PR)) 409 return; 410 battable[n].batl = 0; 411 battable[n].batu = 0; 412 #define BAT_RESET(n) \ 413 __asm __volatile("mtdbatu %0,%1; mtdbatl %0,%1" :: "n"(n), "r"(0)) 414 #define BATU_GET(n, r) __asm __volatile("mfdbatu %0,%1" : "=r"(r) : "n"(n)) 415 416 for (i=1 ; i<4 ; i++) { 417 switch (i) { 418 case 1: 419 BATU_GET(1, batu); 420 if (BAT_VA_MATCH_P(batu, pa) && 421 BAT_VALID_P(batu, PSL_PR)) 422 BAT_RESET(1); 423 break; 424 case 2: 425 BATU_GET(2, batu); 426 if (BAT_VA_MATCH_P(batu, pa) && 427 BAT_VALID_P(batu, PSL_PR)) 428 BAT_RESET(2); 429 break; 430 case 3: 431 BATU_GET(3, batu); 432 if (BAT_VA_MATCH_P(batu, pa) && 433 BAT_VALID_P(batu, PSL_PR)) 434 BAT_RESET(3); 435 break; 436 default: 437 break; 438 } 439 } 440 } 441 442 void 443 oea_batinit(paddr_t pa, ...) 444 { 445 struct mem_region *allmem, *availmem, *mp; 446 int i; 447 unsigned int cpuvers; 448 register_t msr = mfmsr(); 449 va_list ap; 450 451 cpuvers = mfpvr() >> 16; 452 453 /* 454 * Initialize BAT registers to unmapped to not generate 455 * overlapping mappings below. 456 * 457 * The 601's implementation differs in the Valid bit being situated 458 * in the lower BAT register, and in being a unified BAT only whose 459 * four entries are accessed through the IBAT[0-3] SPRs. 460 * 461 * Also, while the 601 does distinguish between supervisor/user 462 * protection keys, it does _not_ distinguish between validity in 463 * supervisor/user mode. 464 */ 465 if ((msr & (PSL_IR|PSL_DR)) == 0) { 466 if (cpuvers == MPC601) { 467 __asm __volatile ("mtibatl 0,%0" :: "r"(0)); 468 __asm __volatile ("mtibatl 1,%0" :: "r"(0)); 469 __asm __volatile ("mtibatl 2,%0" :: "r"(0)); 470 __asm __volatile ("mtibatl 3,%0" :: "r"(0)); 471 } else { 472 __asm __volatile ("mtibatu 0,%0" :: "r"(0)); 473 __asm __volatile ("mtibatu 1,%0" :: "r"(0)); 474 __asm __volatile ("mtibatu 2,%0" :: "r"(0)); 475 __asm __volatile ("mtibatu 3,%0" :: "r"(0)); 476 __asm __volatile ("mtdbatu 0,%0" :: "r"(0)); 477 __asm __volatile ("mtdbatu 1,%0" :: "r"(0)); 478 __asm __volatile ("mtdbatu 2,%0" :: "r"(0)); 479 __asm __volatile ("mtdbatu 3,%0" :: "r"(0)); 480 } 481 } 482 483 /* 484 * Set up BAT to map physical memory 485 */ 486 if (cpuvers == MPC601) { 487 /* 488 * Set up battable to map the lowest 256 MB area. 489 * Map the lowest 32 MB area via BAT[0-3]; 490 * BAT[01] are fixed, BAT[23] are floating. 491 */ 492 for (i = 0; i < 32; i++) { 493 battable[i].batl = BATL601(i << 23, 494 BAT601_BSM_8M, BAT601_V); 495 battable[i].batu = BATU601(i << 23, 496 BAT601_M, BAT601_Ku, BAT601_PP_NONE); 497 } 498 __asm __volatile ("mtibatu 0,%1; mtibatl 0,%0" 499 :: "r"(battable[0x00000000 >> 23].batl), 500 "r"(battable[0x00000000 >> 23].batu)); 501 __asm __volatile ("mtibatu 1,%1; mtibatl 1,%0" 502 :: "r"(battable[0x00800000 >> 23].batl), 503 "r"(battable[0x00800000 >> 23].batu)); 504 __asm __volatile ("mtibatu 2,%1; mtibatl 2,%0" 505 :: "r"(battable[0x01000000 >> 23].batl), 506 "r"(battable[0x01000000 >> 23].batu)); 507 __asm __volatile ("mtibatu 3,%1; mtibatl 3,%0" 508 :: "r"(battable[0x01800000 >> 23].batl), 509 "r"(battable[0x01800000 >> 23].batu)); 510 } else { 511 /* 512 * Set up BAT0 to only map the lowest 256 MB area 513 */ 514 battable[0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 515 battable[0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 516 517 __asm __volatile ("mtibatl 0,%0; mtibatu 0,%1;" 518 "mtdbatl 0,%0; mtdbatu 0,%1;" 519 :: "r"(battable[0].batl), "r"(battable[0].batu)); 520 } 521 522 /* 523 * Now setup other fixed bat registers 524 * 525 * Note that we still run in real mode, and the BAT 526 * registers were cleared above. 527 */ 528 529 va_start(ap, pa); 530 531 /* 532 * Add any I/O BATs specificed; 533 * use I/O segments on the BAT-starved 601. 534 */ 535 if (cpuvers == MPC601) { 536 while (pa != 0) { 537 register_t len = va_arg(ap, register_t); 538 mpc601_ioseg_add(pa, len); 539 pa = va_arg(ap, paddr_t); 540 } 541 } else { 542 while (pa != 0) { 543 register_t len = va_arg(ap, register_t); 544 oea_iobat_add(pa, len); 545 pa = va_arg(ap, paddr_t); 546 } 547 } 548 549 va_end(ap); 550 551 /* 552 * Set up battable to map all RAM regions. 553 * This is here because mem_regions() call needs bat0 set up. 554 */ 555 mem_regions(&allmem, &availmem); 556 if (cpuvers == MPC601) { 557 for (mp = allmem; mp->size; mp++) { 558 paddr_t pa = mp->start & 0xff800000; 559 paddr_t end = mp->start + mp->size; 560 561 do { 562 u_int i = pa >> 23; 563 564 battable[i].batl = 565 BATL601(pa, BAT601_BSM_8M, BAT601_V); 566 battable[i].batu = 567 BATU601(pa, BAT601_M, BAT601_Ku, BAT601_PP_NONE); 568 pa += (1 << 23); 569 } while (pa < end); 570 } 571 } else { 572 for (mp = allmem; mp->size; mp++) { 573 paddr_t pa = mp->start & 0xf0000000; 574 paddr_t end = mp->start + mp->size; 575 576 do { 577 u_int i = pa >> 28; 578 579 battable[i].batl = 580 BATL(pa, BAT_M, BAT_PP_RW); 581 battable[i].batu = 582 BATU(pa, BAT_BL_256M, BAT_Vs); 583 pa += SEGMENT_LENGTH; 584 } while (pa < end); 585 } 586 } 587 } 588 589 void 590 oea_install_extint(void (*handler)(void)) 591 { 592 extern int extint[], extsize[]; 593 extern int extint_call[]; 594 uintptr_t offset = (uintptr_t)handler - (uintptr_t)extint_call; 595 int omsr, msr; 596 597 #ifdef DIAGNOSTIC 598 if (offset > 0x1ffffff) 599 panic("install_extint: %p too far away (%#lx)", handler, 600 (unsigned long) offset); 601 #endif 602 __asm __volatile ("mfmsr %0; andi. %1,%0,%2; mtmsr %1" 603 : "=r" (omsr), "=r" (msr) 604 : "K" ((u_short)~PSL_EE)); 605 extint_call[0] = (extint_call[0] & 0xfc000003) | offset; 606 memcpy((void *)EXC_EXI, extint, (size_t)extsize); 607 __syncicache((void *)extint_call, sizeof extint_call[0]); 608 __syncicache((void *)EXC_EXI, (int)extsize); 609 __asm __volatile ("mtmsr %0" :: "r"(omsr)); 610 } 611 612 /* 613 * Machine dependent startup code. 614 */ 615 void 616 oea_startup(const char *model) 617 { 618 uintptr_t sz; 619 caddr_t v; 620 vaddr_t minaddr, maxaddr; 621 char pbuf[9]; 622 u_int i; 623 624 KASSERT(curcpu() != NULL); 625 KASSERT(lwp0.l_cpu != NULL); 626 KASSERT(curcpu()->ci_intstk != 0); 627 KASSERT(curcpu()->ci_intrdepth == -1); 628 629 /* 630 * If the msgbuf is not in segment 0, allocate KVA for it and access 631 * it via mapped pages. [This prevents unneeded BAT switches.] 632 */ 633 sz = round_page(MSGBUFSIZE); 634 v = (caddr_t) msgbuf_paddr; 635 if (msgbuf_paddr + sz > SEGMENT_LENGTH) { 636 minaddr = 0; 637 if (uvm_map(kernel_map, &minaddr, sz, 638 NULL, UVM_UNKNOWN_OFFSET, 0, 639 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, 640 UVM_INH_NONE, UVM_ADV_NORMAL, 0)) != 0) 641 panic("startup: cannot allocate VM for msgbuf"); 642 v = (caddr_t)minaddr; 643 for (i = 0; i < sz; i += PAGE_SIZE) { 644 pmap_kenter_pa(minaddr + i, msgbuf_paddr + i, 645 VM_PROT_READ|VM_PROT_WRITE); 646 } 647 pmap_update(pmap_kernel()); 648 } 649 initmsgbuf(v, sz); 650 651 printf("%s", version); 652 if (model != NULL) 653 printf("Model: %s\n", model); 654 cpu_identify(NULL, 0); 655 656 format_bytes(pbuf, sizeof(pbuf), ctob((u_int)physmem)); 657 printf("total memory = %s\n", pbuf); 658 659 /* 660 * Allocate away the pages that map to 0xDEA[CDE]xxxx. Do this after 661 * the bufpages are allocated in case they overlap since it's not 662 * fatal if we can't allocate these. 663 */ 664 if (KERNEL_SR == 13 || KERNEL2_SR == 14) { 665 int error; 666 minaddr = 0xDEAC0000; 667 error = uvm_map(kernel_map, &minaddr, 0x30000, 668 NULL, UVM_UNKNOWN_OFFSET, 0, 669 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE, 670 UVM_ADV_NORMAL, UVM_FLAG_FIXED)); 671 if (error != 0 || minaddr != 0xDEAC0000) 672 printf("oea_startup: failed to allocate DEAD " 673 "ZONE: error=%d\n", error); 674 } 675 676 minaddr = 0; 677 /* 678 * Allocate a submap for exec arguments. This map effectively 679 * limits the number of processes exec'ing at any time. These 680 * submaps will be allocated after the dead zone. 681 */ 682 exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 683 16*NCARGS, VM_MAP_PAGEABLE, FALSE, NULL); 684 685 /* 686 * Allocate a submap for physio 687 */ 688 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 689 VM_PHYS_SIZE, 0, FALSE, NULL); 690 691 #ifndef PMAP_MAP_POOLPAGE 692 /* 693 * No need to allocate an mbuf cluster submap. Mbuf clusters 694 * are allocated via the pool allocator, and we use direct-mapped 695 * pool pages. 696 */ 697 mb_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 698 mclbytes*nmbclusters, VM_MAP_INTRSAFE, FALSE, NULL); 699 #endif 700 701 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 702 printf("avail memory = %s\n", pbuf); 703 } 704 705 /* 706 * Crash dump handling. 707 */ 708 709 void 710 oea_dumpsys(void) 711 { 712 printf("dumpsys: TBD\n"); 713 } 714 715 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 716 /* 717 * Soft networking interrupts. 718 */ 719 void 720 softnet(int pendisr) 721 { 722 #define DONETISR(bit, fn) do { \ 723 if (pendisr & (1 << bit)) \ 724 (*fn)(); \ 725 } while (0) 726 727 #include <net/netisr_dispatch.h> 728 729 #undef DONETISR 730 } 731 #endif 732 733 /* 734 * Convert kernel VA to physical address 735 */ 736 paddr_t 737 kvtop(caddr_t addr) 738 { 739 vaddr_t va; 740 paddr_t pa; 741 uintptr_t off; 742 extern char end[]; 743 744 if (addr < end) 745 return (paddr_t)addr; 746 747 va = trunc_page((vaddr_t)addr); 748 off = (uintptr_t)addr - va; 749 750 if (pmap_extract(pmap_kernel(), va, &pa) == FALSE) { 751 /*printf("kvtop: zero page frame (va=0x%x)\n", addr);*/ 752 return (paddr_t)addr; 753 } 754 755 return(pa + off); 756 } 757 758 /* 759 * Allocate vm space and mapin the I/O address 760 */ 761 void * 762 mapiodev(paddr_t pa, psize_t len) 763 { 764 paddr_t faddr; 765 vaddr_t taddr, va; 766 int off; 767 768 faddr = trunc_page(pa); 769 off = pa - faddr; 770 len = round_page(off + len); 771 va = taddr = uvm_km_valloc(kernel_map, len); 772 773 if (va == 0) 774 return NULL; 775 776 for (; len > 0; len -= PAGE_SIZE) { 777 pmap_kenter_pa(taddr, faddr, VM_PROT_READ | VM_PROT_WRITE); 778 faddr += PAGE_SIZE; 779 taddr += PAGE_SIZE; 780 } 781 pmap_update(pmap_kernel()); 782 return (void *)(va + off); 783 } 784
Indexes created Tue Sep 30 20:09:53 GMT 2025