oea_machdep.c revision 1.3 1 /* $NetBSD: oea_machdep.c,v 1.3 2003/02/06 23:02:34 matt Exp $ */
2
3 /*
4 * Copyright (C) 2002 Matt Thomas
5 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6 * Copyright (C) 1995, 1996 TooLs GmbH.
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by TooLs GmbH.
20 * 4. The name of TooLs GmbH may not be used to endorse or promote products
21 * derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 #include "opt_compat_netbsd.h"
36 #include "opt_ddb.h"
37 #include "opt_kgdb.h"
38 #include "opt_ipkdb.h"
39 #include "opt_multiprocessor.h"
40 #include "opt_altivec.h"
41
42 #include <sys/param.h>
43 #include <sys/buf.h>
44 #include <sys/exec.h>
45 #include <sys/malloc.h>
46 #include <sys/mbuf.h>
47 #include <sys/mount.h>
48 #include <sys/msgbuf.h>
49 #include <sys/proc.h>
50 #include <sys/reboot.h>
51 #include <sys/sa.h>
52 #include <sys/syscallargs.h>
53 #include <sys/syslog.h>
54 #include <sys/systm.h>
55 #include <sys/kernel.h>
56 #include <sys/user.h>
57 #include <sys/boot_flag.h>
58
59 #include <uvm/uvm_extern.h>
60
61 #include <net/netisr.h>
62
63 #ifdef DDB
64 #include <machine/db_machdep.h>
65 #include <ddb/db_extern.h>
66 #endif
67
68 #ifdef KGDB
69 #include <sys/kgdb.h>
70 #endif
71
72 #ifdef IPKDB
73 #include <ipkdb/ipkdb.h>
74 #endif
75
76 #include <powerpc/oea/bat.h>
77 #include <powerpc/oea/sr_601.h>
78 #include <powerpc/trap.h>
79 #include <powerpc/stdarg.h>
80 #include <powerpc/spr.h>
81 #include <powerpc/pte.h>
82 #include <powerpc/altivec.h>
83 #include <machine/powerpc.h>
84
85 char machine[] = MACHINE; /* from <machine/param.h> */
86 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */
87
88 struct vm_map *exec_map = NULL;
89 struct vm_map *mb_map = NULL;
90 struct vm_map *phys_map = NULL;
91
92 /*
93 * Global variables used here and there
94 */
95 extern struct user *proc0paddr;
96
97 struct bat battable[512];
98 register_t iosrtable[16]; /* I/O segments, for kernel_pmap setup */
99 paddr_t msgbuf_paddr;
100
101 void
102 oea_init(void (*handler)(void))
103 {
104 extern int trapstart[], trapend[];
105 extern int trapcode, trapsize;
106 extern int sctrap, scsize;
107 extern int alitrap, alisize;
108 extern int dsitrap, dsisize;
109 extern int dsi601trap, dsi601size;
110 extern int decrint, decrsize;
111 extern int tlbimiss, tlbimsize;
112 extern int tlbdlmiss, tlbdlmsize;
113 extern int tlbdsmiss, tlbdsmsize;
114 #if defined(DDB) || defined(KGDB)
115 extern int ddblow, ddbsize;
116 #endif
117 #ifdef IPKDB
118 extern int ipkdblow, ipkdbsize;
119 #endif
120 #ifdef ALTIVEC
121 register_t msr;
122 #endif
123 uintptr_t exc;
124 register_t scratch;
125 unsigned int cpuvers;
126 size_t size;
127 struct cpu_info * const ci = &cpu_info[0];
128
129 mtspr(SPR_SPRG0, ci);
130 cpuvers = mfpvr() >> 16;
131
132
133 /*
134 * Initialize proc0 and current pcb and pmap pointers.
135 */
136 KASSERT(ci != NULL);
137 KASSERT(curcpu() == ci);
138 lwp0.l_cpu = ci;
139 KASSERT(lwp0.l_cpu != NULL);
140 lwp0.l_addr = proc0paddr;
141 memset(lwp0.l_addr, 0, sizeof *lwp0.l_addr);
142
143 curpcb = &proc0paddr->u_pcb;
144 curpm = curpcb->pcb_pmreal = curpcb->pcb_pm = pmap_kernel();
145
146 /*
147 * Cause a PGM trap if we branch to 0.
148 */
149 memset(0, 0, 0x100);
150
151 /*
152 * Set up trap vectors. Don't assume vectors are on 0x100.
153 */
154 for (exc = 0; exc <= EXC_LAST; exc += 0x100) {
155 switch (exc) {
156 default:
157 size = (size_t)&trapsize;
158 memcpy((void *)exc, &trapcode, size);
159 break;
160 #if 0
161 case EXC_EXI:
162 /*
163 * This one is (potentially) installed during autoconf
164 */
165 break;
166 #endif
167 case EXC_SC:
168 size = (size_t)&scsize;
169 memcpy((void *)EXC_SC, &sctrap, size);
170 break;
171 case EXC_ALI:
172 size = (size_t)&alisize;
173 memcpy((void *)EXC_ALI, &alitrap, size);
174 break;
175 case EXC_DSI:
176 if (cpuvers == MPC601) {
177 size = (size_t)&dsi601size;
178 memcpy((void *)EXC_DSI, &dsi601trap, size);
179 } else {
180 size = (size_t)&dsisize;
181 memcpy((void *)EXC_DSI, &dsitrap, size);
182 }
183 break;
184 case EXC_DECR:
185 size = (size_t)&decrsize;
186 memcpy((void *)EXC_DECR, &decrint, size);
187 break;
188 case EXC_IMISS:
189 size = (size_t)&tlbimsize;
190 memcpy((void *)EXC_IMISS, &tlbimiss, size);
191 break;
192 case EXC_DLMISS:
193 size = (size_t)&tlbdlmsize;
194 memcpy((void *)EXC_DLMISS, &tlbdlmiss, size);
195 break;
196 case EXC_DSMISS:
197 size = (size_t)&tlbdsmsize;
198 memcpy((void *)EXC_DSMISS, &tlbdsmiss, size);
199 break;
200 case EXC_PERF:
201 size = (size_t)&trapsize;
202 memcpy((void *)EXC_PERF, &trapcode, size);
203 memcpy((void *)EXC_VEC, &trapcode, size);
204 break;
205 #if defined(DDB) || defined(IPKDB) || defined(KGDB)
206 case EXC_RUNMODETRC:
207 if (cpuvers != MPC601) {
208 size = (size_t)&trapsize;
209 memcpy((void *)EXC_RUNMODETRC, &trapcode, size);
210 break;
211 }
212 /* FALLTHROUGH */
213 case EXC_PGM:
214 case EXC_TRC:
215 case EXC_BPT:
216 #if defined(DDB) || defined(KGDB)
217 size = (size_t)&ddbsize;
218 memcpy((void *)exc, &ddblow, size);
219 #if defined(IPKDB)
220 #error "cannot enable IPKDB with DDB or KGDB"
221 #endif
222 #else
223 size = (size_t)&ipkdbsize;
224 memcpy((void *)exc, &ipkdblow, size);
225 #endif
226 break;
227 #endif /* DDB || IPKDB || KGDB */
228 }
229 #if 0
230 exc += roundup(size, 32);
231 #endif
232 }
233
234 /*
235 * Get the cache sizes because install_extint calls __syncicache.
236 */
237 cpu_probe_cache();
238
239 #define MxSPR_MASK 0x7c1fffff
240 #define MFSPR_MQ 0x7c0002a6
241 #define MTSPR_MQ 0x7c0003a6
242 #define NOP 0x60000000
243
244 #ifdef ALTIVEC
245 #define MFSPR_VRSAVE 0x7c0042a6
246 #define MTSPR_VRSAVE 0x7c0043a6
247
248 /*
249 * Try to set the VEC bit in the MSR. If it doesn't get set, we are
250 * not on a AltiVec capable processor.
251 */
252 __asm __volatile (
253 "mfmsr %0; oris %1,%0,%2@h; mtmsr %1; isync; "
254 "mfmsr %1; mtmsr %0; isync"
255 : "=r"(msr), "=r"(scratch)
256 : "J"(PSL_VEC));
257
258 /*
259 * If we aren't on an AltiVec capable processor, we to need zap any of
260 * sequences we save/restore the VRSAVE SPR into NOPs.
261 */
262 if (scratch & PSL_VEC) {
263 cpu_altivec = 1;
264 } else {
265 int *ip = trapstart;
266
267 for (; ip < trapend; ip++) {
268 if ((ip[0] & MxSPR_MASK) == MFSPR_VRSAVE) {
269 ip[0] = NOP; /* mfspr */
270 ip[1] = NOP; /* stw */
271 } else if ((ip[0] & MxSPR_MASK) == MTSPR_VRSAVE) {
272 ip[-1] = NOP; /* lwz */
273 ip[0] = NOP; /* mtspr */
274 }
275 }
276 }
277 #endif
278
279 /*
280 * If we aren't on a MPC601 processor, we to need zap any of
281 * sequences we save/restore the MQ SPR into NOPs.
282 */
283 if (cpuvers != MPC601) {
284 int *ip = trapstart;
285
286 for (; ip < trapend; ip++) {
287 if ((ip[0] & MxSPR_MASK) == MFSPR_MQ) {
288 ip[0] = NOP; /* mfspr */
289 ip[1] = NOP; /* stw */
290 } else if ((ip[0] & MxSPR_MASK) == MTSPR_MQ) {
291 ip[-1] = NOP; /* lwz */
292 ip[0] = NOP; /* mtspr */
293 }
294 }
295 }
296
297 if (!cpu_altivec || cpuvers != MPC601) {
298 /*
299 * Sync the changed instructions.
300 */
301 __syncicache((void *) trapstart,
302 (uintptr_t) trapend - (uintptr_t) trapstart);
303 }
304
305 /*
306 * external interrupt handler install
307 */
308 if (handler)
309 oea_install_extint(handler);
310
311 __syncicache(0, EXC_LAST + 0x100);
312
313 /*
314 * Now enable translation (and machine checks/recoverable interrupts).
315 */
316 __asm __volatile ("sync; mfmsr %0; ori %0,%0,%1; mtmsr %0; isync"
317 : "=r"(scratch)
318 : "K"(PSL_IR|PSL_DR|PSL_ME|PSL_RI));
319
320 KASSERT(curcpu() == ci);
321 }
322
323 void
324 mpc601_ioseg_add(paddr_t pa, register_t len)
325 {
326 const u_int i = pa >> ADDR_SR_SHFT;
327
328 if (len != BAT_BL_256M)
329 panic("mpc601_ioseg_add: len != 256M");
330
331 /*
332 * Translate into an I/O segment, load it, and stash away for use
333 * in pmap_bootstrap().
334 */
335 iosrtable[i] = SR601(SR601_Ks, SR601_BUID_MEMFORCED, 0, i);
336 __asm __volatile ("mtsrin %0,%1"
337 :: "r"(iosrtable[i]),
338 "r"(pa));
339 }
340
341 void
342 oea_iobat_add(paddr_t pa, register_t len)
343 {
344 static int n = 1;
345 const u_int i = pa >> 28;
346 battable[i].batl = BATL(pa, BAT_I|BAT_G, BAT_PP_RW);
347 battable[i].batu = BATU(pa, len, BAT_Vs);
348
349 /*
350 * Let's start loading the BAT registers.
351 */
352 switch (n) {
353 case 1:
354 __asm __volatile ("mtdbatl 1,%0; mtdbatu 1,%1;"
355 :: "r"(battable[i].batl),
356 "r"(battable[i].batu));
357 n = 2;
358 break;
359 case 2:
360 __asm __volatile ("mtdbatl 2,%0; mtdbatu 2,%1;"
361 :: "r"(battable[i].batl),
362 "r"(battable[i].batu));
363 n = 3;
364 break;
365 case 3:
366 __asm __volatile ("mtdbatl 3,%0; mtdbatu 3,%1;"
367 :: "r"(battable[i].batl),
368 "r"(battable[i].batu));
369 n = 4;
370 break;
371 default:
372 break;
373 }
374 }
375
376 void
377 oea_iobat_remove(paddr_t pa)
378 {
379 register_t batu;
380 int i, n;
381
382 n = pa >> ADDR_SR_SHFT;
383 if (!BAT_VA_MATCH_P(battable[n].batu, pa) ||
384 !BAT_VALID_P(battable[n].batu, PSL_PR))
385 return;
386 battable[n].batl = 0;
387 battable[n].batu = 0;
388 #define BAT_RESET(n) \
389 __asm __volatile("mtdbatu %0,%1; mtdbatl %0,%1" :: "n"(n), "r"(0))
390 #define BATU_GET(n, r) __asm __volatile("mfdbatu %0,%1" : "=r"(r) : "n"(n))
391
392 for (i=1 ; i<4 ; i++) {
393 switch (i) {
394 case 1:
395 BATU_GET(1, batu);
396 if (BAT_VA_MATCH_P(batu, pa) &&
397 BAT_VALID_P(batu, PSL_PR))
398 BAT_RESET(1);
399 break;
400 case 2:
401 BATU_GET(2, batu);
402 if (BAT_VA_MATCH_P(batu, pa) &&
403 BAT_VALID_P(batu, PSL_PR))
404 BAT_RESET(2);
405 break;
406 case 3:
407 BATU_GET(3, batu);
408 if (BAT_VA_MATCH_P(batu, pa) &&
409 BAT_VALID_P(batu, PSL_PR))
410 BAT_RESET(3);
411 break;
412 default:
413 break;
414 }
415 }
416 }
417
418 void
419 oea_batinit(paddr_t pa, ...)
420 {
421 struct mem_region *allmem, *availmem, *mp;
422 int i;
423 unsigned int cpuvers;
424 va_list ap;
425
426 cpuvers = mfpvr() >> 16;
427
428 /*
429 * Initialize BAT registers to unmapped to not generate
430 * overlapping mappings below.
431 *
432 * The 601's implementation differs in the Valid bit being situated
433 * in the lower BAT register, and in being a unified BAT only whose
434 * four entries are accessed through the IBAT[0-3] SPRs.
435 *
436 * Also, while the 601 does distinguish between supervisor/user
437 * protection keys, it does _not_ distinguish distinguish between
438 * validity in supervisor/user mode.
439 */
440 if (cpuvers == MPC601) {
441 __asm __volatile ("mtibatl 0,%0" :: "r"(0));
442 __asm __volatile ("mtibatl 1,%0" :: "r"(0));
443 __asm __volatile ("mtibatl 2,%0" :: "r"(0));
444 __asm __volatile ("mtibatl 3,%0" :: "r"(0));
445 } else {
446 __asm __volatile ("mtibatu 0,%0" :: "r"(0));
447 __asm __volatile ("mtibatu 1,%0" :: "r"(0));
448 __asm __volatile ("mtibatu 2,%0" :: "r"(0));
449 __asm __volatile ("mtibatu 3,%0" :: "r"(0));
450 __asm __volatile ("mtdbatu 0,%0" :: "r"(0));
451 __asm __volatile ("mtdbatu 1,%0" :: "r"(0));
452 __asm __volatile ("mtdbatu 2,%0" :: "r"(0));
453 __asm __volatile ("mtdbatu 3,%0" :: "r"(0));
454 }
455
456 /*
457 * Set up BAT to map physical memory
458 */
459 if (cpuvers == MPC601) {
460 /*
461 * Set up battable to map the lowest 256 MB area.
462 * Map the lowest 32 MB area via BAT[0-3];
463 * BAT[01] are fixed, BAT[23] are floating.
464 */
465 for (i = 0; i < 32; i++) {
466 battable[i].batl = BATL601(i << 23,
467 BAT601_BSM_8M, BAT601_V);
468 battable[i].batu = BATU601(i << 23,
469 BAT601_M, BAT601_Ku, BAT601_PP_NONE);
470 }
471 __asm __volatile ("mtibatu 0,%1; mtibatl 0,%0"
472 :: "r"(battable[0x00000000 >> 23].batl),
473 "r"(battable[0x00000000 >> 23].batu));
474 __asm __volatile ("mtibatu 1,%1; mtibatl 1,%0"
475 :: "r"(battable[0x00800000 >> 23].batl),
476 "r"(battable[0x00800000 >> 23].batu));
477 __asm __volatile ("mtibatu 2,%1; mtibatl 2,%0"
478 :: "r"(battable[0x01000000 >> 23].batl),
479 "r"(battable[0x01000000 >> 23].batu));
480 __asm __volatile ("mtibatu 3,%1; mtibatl 3,%0"
481 :: "r"(battable[0x01800000 >> 23].batl),
482 "r"(battable[0x01800000 >> 23].batu));
483 } else {
484 /*
485 * Set up BAT0 to only map the lowest 256 MB area
486 */
487 battable[0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW);
488 battable[0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs);
489
490 __asm __volatile ("mtibatl 0,%0; mtibatu 0,%1;"
491 "mtdbatl 0,%0; mtdbatu 0,%1;"
492 :: "r"(battable[0].batl), "r"(battable[0].batu));
493 }
494
495 /*
496 * Now setup other fixed bat registers
497 *
498 * Note that we still run in real mode, and the BAT
499 * registers were cleared above.
500 */
501
502 va_start(ap, pa);
503
504 /*
505 * Add any I/O BATs specificed;
506 * use I/O segments on the BAT-starved 601.
507 */
508 if (cpuvers == MPC601) {
509 while (pa != 0) {
510 register_t len = va_arg(ap, register_t);
511 mpc601_ioseg_add(pa, len);
512 pa = va_arg(ap, paddr_t);
513 }
514 } else {
515 while (pa != 0) {
516 register_t len = va_arg(ap, register_t);
517 oea_iobat_add(pa, len);
518 pa = va_arg(ap, paddr_t);
519 }
520 }
521
522 va_end(ap);
523
524 /*
525 * Set up battable to map all RAM regions.
526 * This is here because mem_regions() call needs bat0 set up.
527 */
528 mem_regions(&allmem, &availmem);
529 if (cpuvers == MPC601) {
530 for (mp = allmem; mp->size; mp++) {
531 paddr_t pa = mp->start & 0xff800000;
532 paddr_t end = mp->start + mp->size;
533
534 do {
535 u_int i = pa >> 23;
536
537 battable[i].batl =
538 BATL601(pa, BAT601_BSM_8M, BAT601_V);
539 battable[i].batu =
540 BATU601(pa, BAT601_M, BAT601_Ku, BAT601_PP_NONE);
541 pa += (1 << 23);
542 } while (pa < end);
543 }
544 } else {
545 for (mp = allmem; mp->size; mp++) {
546 paddr_t pa = mp->start & 0xf0000000;
547 paddr_t end = mp->start + mp->size;
548
549 do {
550 u_int i = pa >> 28;
551
552 battable[i].batl =
553 BATL(pa, BAT_M, BAT_PP_RW);
554 battable[i].batu =
555 BATU(pa, BAT_BL_256M, BAT_Vs);
556 pa += SEGMENT_LENGTH;
557 } while (pa < end);
558 }
559 }
560 }
561
562 void
563 oea_install_extint(void (*handler)(void))
564 {
565 extern int extint, extsize;
566 extern int extint_call;
567 uintptr_t offset = (uintptr_t)handler - (uintptr_t)&extint_call;
568 int omsr, msr;
569
570 #ifdef DIAGNOSTIC
571 if (offset > 0x1ffffff)
572 panic("install_extint: %p too far away (%#lx)", handler,
573 (unsigned long) offset);
574 #endif
575 __asm __volatile ("mfmsr %0; andi. %1,%0,%2; mtmsr %1"
576 : "=r" (omsr), "=r" (msr)
577 : "K" ((u_short)~PSL_EE));
578 extint_call = (extint_call & 0xfc000003) | offset;
579 memcpy((void *)EXC_EXI, &extint, (size_t)&extsize);
580 __syncicache((void *)&extint_call, sizeof extint_call);
581 __syncicache((void *)EXC_EXI, (int)&extsize);
582 __asm __volatile ("mtmsr %0" :: "r"(omsr));
583 }
584
585 /*
586 * Machine dependent startup code.
587 */
588 void
589 oea_startup(const char *model)
590 {
591 uintptr_t sz;
592 u_int i;
593 u_long base, residual;
594 int error;
595 caddr_t v;
596 vaddr_t minaddr, maxaddr;
597 char pbuf[9];
598
599 KASSERT(curcpu() != NULL);
600 KASSERT(lwp0.l_cpu != NULL);
601
602 /*
603 * If the msgbuf is not in segment 0, allocate KVA for it and access
604 * it via mapped pages. [This prevents unneeded BAT switches.]
605 */
606 sz = round_page(MSGBUFSIZE);
607 v = (caddr_t) msgbuf_paddr;
608 if (msgbuf_paddr + sz > SEGMENT_LENGTH) {
609 minaddr = 0;
610 if (uvm_map(kernel_map, &minaddr, sz,
611 NULL, UVM_UNKNOWN_OFFSET, 0,
612 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE,
613 UVM_INH_NONE, UVM_ADV_NORMAL, 0)) != 0)
614 panic("startup: cannot allocate VM for msgbuf");
615 v = (caddr_t)minaddr;
616 for (i = 0; i < sz; i += NBPG) {
617 pmap_kenter_pa(minaddr + i, msgbuf_paddr + i,
618 VM_PROT_READ|VM_PROT_WRITE);
619 }
620 pmap_update(pmap_kernel());
621 }
622 initmsgbuf(v, sz);
623
624 printf("%s", version);
625 if (model != NULL)
626 printf("Model: %s\n", model);
627 cpu_identify(NULL, 0);
628
629 format_bytes(pbuf, sizeof(pbuf), ctob((u_int)physmem));
630 printf("total memory = %s\n", pbuf);
631
632 /*
633 * Find out how much space we need, allocate it,
634 * and then give everything true virtual addresses.
635 */
636 sz = (uintptr_t)allocsys(NULL, NULL);
637 if ((v = (caddr_t)uvm_km_zalloc(kernel_map, round_page(sz))) == 0)
638 panic("startup: no room for tables");
639 if (allocsys(v, NULL) - v != sz)
640 panic("startup: table size inconsistency");
641
642 /*
643 * Now allocate buffers proper. They are different than the above
644 * in that they usually occupy more virtual memory than physical.
645 * Allocate the buffer starting at the top of the kernel VM space.
646 */
647 sz = MAXBSIZE * nbuf;
648 minaddr = VM_MAX_KERNEL_ADDRESS - round_page(sz);
649 if (uvm_map(kernel_map, &minaddr, round_page(sz),
650 NULL, UVM_UNKNOWN_OFFSET, 0,
651 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
652 UVM_ADV_NORMAL, 0)) != 0)
653 panic("startup: cannot allocate VM for buffers");
654 buffers = (char *)minaddr;
655 base = bufpages / nbuf;
656 residual = bufpages % nbuf;
657 if (base >= MAXBSIZE) {
658 /* Don't want to alloc more physical mem than ever needed */
659 base = MAXBSIZE;
660 residual = 0;
661 }
662 for (i = 0; i < nbuf; i++) {
663 vsize_t curbufsize;
664 vaddr_t curbuf;
665 struct vm_page *pg;
666
667 curbuf = (vaddr_t)buffers + i * MAXBSIZE;
668 curbufsize = NBPG * (i < residual ? base + 1 : base);
669
670 while (curbufsize) {
671 pg = uvm_pagealloc(NULL, 0, NULL, 0);
672 if (pg == NULL)
673 panic("cpu_startup: not enough memory for "
674 "buffer cache");
675 pmap_kenter_pa(curbuf, VM_PAGE_TO_PHYS(pg),
676 VM_PROT_READ|VM_PROT_WRITE);
677 curbuf += PAGE_SIZE;
678 curbufsize -= PAGE_SIZE;
679 }
680 }
681 pmap_update(pmap_kernel());
682
683 /*
684 * Allocate away the pages that map to 0xDEA[CDE]xxxx. Do this after
685 * the bufpages are allocated in case they overlap since it's not
686 * fatal if we can't allocate these.
687 */
688 minaddr = 0xDEAC0000;
689 error = uvm_map(kernel_map, &minaddr, 0x30000,
690 NULL, UVM_UNKNOWN_OFFSET, 0,
691 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
692 UVM_ADV_NORMAL, UVM_FLAG_FIXED));
693 if (error != 0 || minaddr != 0xDEAC0000) {
694 printf("oea_startup: failed to allocate DEAD "
695 "ZONE: error=%d\n", error);
696 minaddr = 0;
697 }
698
699 /*
700 * Allocate a submap for exec arguments. This map effectively
701 * limits the number of processes exec'ing at any time. These
702 * submaps will be allocated after the dead zone.
703 */
704 exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
705 16*NCARGS, VM_MAP_PAGEABLE, FALSE, NULL);
706
707 /*
708 * Allocate a submap for physio
709 */
710 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
711 VM_PHYS_SIZE, 0, FALSE, NULL);
712
713 #ifndef PMAP_MAP_POOLPAGE
714 /*
715 * No need to allocate an mbuf cluster submap. Mbuf clusters
716 * are allocated via the pool allocator, and we use direct-mapped
717 * pool pages.
718 */
719 mb_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
720 mclbytes*nmbclusters, VM_MAP_INTRSAFE, FALSE, NULL);
721 #endif
722
723 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
724 printf("avail memory = %s\n", pbuf);
725 format_bytes(pbuf, sizeof(pbuf), bufpages * NBPG);
726 printf("using %u buffers containing %s of memory\n", nbuf, pbuf);
727
728 /*
729 * Set up the buffers.
730 */
731 bufinit();
732
733 #ifdef ALTIVEC
734 if (cpu_altivec)
735 init_vec();
736 #endif
737 }
738
739 /*
740 * Crash dump handling.
741 */
742
743 void
744 oea_dumpsys(void)
745 {
746 printf("dumpsys: TBD\n");
747 }
748
749 /*
750 * Soft networking interrupts.
751 */
752 void
753 softnet(int pendisr)
754 {
755 #define DONETISR(bit, fn) do { \
756 if (pendisr & (1 << bit)) \
757 (*fn)(); \
758 } while (0)
759
760 #include <net/netisr_dispatch.h>
761
762 #undef DONETISR
763
764 }
765
766 /*
767 * Convert kernel VA to physical address
768 */
769 paddr_t
770 kvtop(caddr_t addr)
771 {
772 vaddr_t va;
773 paddr_t pa;
774 uintptr_t off;
775 extern char end[];
776
777 if (addr < end)
778 return (paddr_t)addr;
779
780 va = trunc_page((vaddr_t)addr);
781 off = (uintptr_t)addr - va;
782
783 if (pmap_extract(pmap_kernel(), va, &pa) == FALSE) {
784 /*printf("kvtop: zero page frame (va=0x%x)\n", addr);*/
785 return (paddr_t)addr;
786 }
787
788 return(pa + off);
789 }
790
791 /*
792 * Allocate vm space and mapin the I/O address
793 */
794 void *
795 mapiodev(paddr_t pa, psize_t len)
796 {
797 paddr_t faddr;
798 vaddr_t taddr, va;
799 int off;
800
801 faddr = trunc_page(pa);
802 off = pa - faddr;
803 len = round_page(off + len);
804 va = taddr = uvm_km_valloc(kernel_map, len);
805
806 if (va == 0)
807 return NULL;
808
809 for (; len > 0; len -= NBPG) {
810 pmap_kenter_pa(taddr, faddr, VM_PROT_READ | VM_PROT_WRITE);
811 faddr += NBPG;
812 taddr += NBPG;
813 }
814 pmap_update(pmap_kernel());
815 return (void *)(va + off);
816 }
817