oea_machdep.c revision 1.7
1 /* $NetBSD: oea_machdep.c,v 1.7 2003/03/29 18:09:59 matt Exp $ */ 2 3 /* 4 * Copyright (C) 2002 Matt Thomas 5 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 6 * Copyright (C) 1995, 1996 TooLs GmbH. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by TooLs GmbH. 20 * 4. The name of TooLs GmbH may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 31 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 32 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include "opt_compat_netbsd.h" 36 #include "opt_ddb.h" 37 #include "opt_kgdb.h" 38 #include "opt_ipkdb.h" 39 #include "opt_multiprocessor.h" 40 #include "opt_altivec.h" 41 42 #include <sys/param.h> 43 #include <sys/buf.h> 44 #include <sys/exec.h> 45 #include <sys/malloc.h> 46 #include <sys/mbuf.h> 47 #include <sys/mount.h> 48 #include <sys/msgbuf.h> 49 #include <sys/proc.h> 50 #include <sys/reboot.h> 51 #include <sys/sa.h> 52 #include <sys/syscallargs.h> 53 #include <sys/syslog.h> 54 #include <sys/systm.h> 55 #include <sys/kernel.h> 56 #include <sys/user.h> 57 #include <sys/boot_flag.h> 58 59 #include <uvm/uvm_extern.h> 60 61 #include <net/netisr.h> 62 63 #ifdef DDB 64 #include <machine/db_machdep.h> 65 #include <ddb/db_extern.h> 66 #endif 67 68 #ifdef KGDB 69 #include <sys/kgdb.h> 70 #endif 71 72 #ifdef IPKDB 73 #include <ipkdb/ipkdb.h> 74 #endif 75 76 #include <powerpc/oea/bat.h> 77 #include <powerpc/oea/sr_601.h> 78 #include <powerpc/trap.h> 79 #include <powerpc/stdarg.h> 80 #include <powerpc/spr.h> 81 #include <powerpc/pte.h> 82 #include <powerpc/altivec.h> 83 #include <machine/powerpc.h> 84 85 char machine[] = MACHINE; /* from <machine/param.h> */ 86 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */ 87 88 struct vm_map *exec_map = NULL; 89 struct vm_map *mb_map = NULL; 90 struct vm_map *phys_map = NULL; 91 92 /* 93 * Global variables used here and there 94 */ 95 extern struct user *proc0paddr; 96 97 struct bat battable[512]; 98 register_t iosrtable[16]; /* I/O segments, for kernel_pmap setup */ 99 paddr_t msgbuf_paddr; 100 101 void 102 oea_init(void (*handler)(void)) 103 { 104 extern int trapstart[], trapend[]; 105 extern int trapcode[], trapsize[]; 106 extern int sctrap[], scsize[]; 107 extern int alitrap[], alisize[]; 108 extern int dsitrap[], dsisize[]; 109 extern int dsi601trap[], dsi601size[]; 110 extern int decrint[], decrsize[]; 111 extern int tlbimiss[], tlbimsize[]; 112 extern int tlbdlmiss[], tlbdlmsize[]; 113 extern int tlbdsmiss[], tlbdsmsize[]; 114 #if defined(DDB) || defined(KGDB) 115 extern int ddblow[], ddbsize[]; 116 #endif 117 #ifdef IPKDB 118 extern int ipkdblow[], ipkdbsize[]; 119 #endif 120 #ifdef ALTIVEC 121 register_t msr; 122 #endif 123 uintptr_t exc; 124 register_t scratch; 125 unsigned int cpuvers; 126 size_t size; 127 struct cpu_info * const ci = &cpu_info[0]; 128 129 mtspr(SPR_SPRG0, ci); 130 cpuvers = mfpvr() >> 16; 131 132 133 /* 134 * Initialize proc0 and current pcb and pmap pointers. 135 */ 136 KASSERT(ci != NULL); 137 KASSERT(curcpu() == ci); 138 lwp0.l_cpu = ci; 139 lwp0.l_addr = proc0paddr; 140 memset(lwp0.l_addr, 0, sizeof *lwp0.l_addr); 141 KASSERT(lwp0.l_cpu != NULL); 142 143 curpcb = &proc0paddr->u_pcb; 144 memset(curpcb, 0, sizeof(*curpcb)); 145 #ifdef ALTIVEC 146 /* 147 * Initialize the vectors with NaNs 148 */ 149 for (scratch = 0; scratch < 32; scratch++) { 150 curpcb->pcb_vr.vreg[scratch][0] = 0x7FFFDEAD; 151 curpcb->pcb_vr.vreg[scratch][1] = 0x7FFFDEAD; 152 curpcb->pcb_vr.vreg[scratch][2] = 0x7FFFDEAD; 153 curpcb->pcb_vr.vreg[scratch][3] = 0x7FFFDEAD; 154 } 155 curpcb->pcb_vr.vscr = 0; 156 curpcb->pcb_vr.vrsave = 0; 157 #endif 158 curpm = curpcb->pcb_pmreal = curpcb->pcb_pm = pmap_kernel(); 159 160 /* 161 * Cause a PGM trap if we branch to 0. 162 */ 163 memset(0, 0, 0x100); 164 165 /* 166 * Set up trap vectors. Don't assume vectors are on 0x100. 167 */ 168 for (exc = 0; exc <= EXC_LAST; exc += 0x100) { 169 switch (exc) { 170 default: 171 size = (size_t)trapsize; 172 memcpy((void *)exc, trapcode, size); 173 break; 174 #if 0 175 case EXC_EXI: 176 /* 177 * This one is (potentially) installed during autoconf 178 */ 179 break; 180 #endif 181 case EXC_SC: 182 size = (size_t)scsize; 183 memcpy((void *)EXC_SC, sctrap, size); 184 break; 185 case EXC_ALI: 186 size = (size_t)alisize; 187 memcpy((void *)EXC_ALI, alitrap, size); 188 break; 189 case EXC_DSI: 190 if (cpuvers == MPC601) { 191 size = (size_t)dsi601size; 192 memcpy((void *)EXC_DSI, dsi601trap, size); 193 } else { 194 size = (size_t)dsisize; 195 memcpy((void *)EXC_DSI, dsitrap, size); 196 } 197 break; 198 case EXC_DECR: 199 size = (size_t)decrsize; 200 memcpy((void *)EXC_DECR, decrint, size); 201 break; 202 case EXC_IMISS: 203 size = (size_t)tlbimsize; 204 memcpy((void *)EXC_IMISS, tlbimiss, size); 205 break; 206 case EXC_DLMISS: 207 size = (size_t)tlbdlmsize; 208 memcpy((void *)EXC_DLMISS, tlbdlmiss, size); 209 break; 210 case EXC_DSMISS: 211 size = (size_t)tlbdsmsize; 212 memcpy((void *)EXC_DSMISS, tlbdsmiss, size); 213 break; 214 case EXC_PERF: 215 size = (size_t)trapsize; 216 memcpy((void *)EXC_PERF, trapcode, size); 217 memcpy((void *)EXC_VEC, trapcode, size); 218 break; 219 #if defined(DDB) || defined(IPKDB) || defined(KGDB) 220 case EXC_RUNMODETRC: 221 if (cpuvers != MPC601) { 222 size = (size_t)trapsize; 223 memcpy((void *)EXC_RUNMODETRC, trapcode, size); 224 break; 225 } 226 /* FALLTHROUGH */ 227 case EXC_PGM: 228 case EXC_TRC: 229 case EXC_BPT: 230 #if defined(DDB) || defined(KGDB) 231 size = (size_t)ddbsize; 232 memcpy((void *)exc, ddblow, size); 233 #if defined(IPKDB) 234 #error "cannot enable IPKDB with DDB or KGDB" 235 #endif 236 #else 237 size = (size_t)ipkdbsize; 238 memcpy((void *)exc, ipkdblow, size); 239 #endif 240 break; 241 #endif /* DDB || IPKDB || KGDB */ 242 } 243 #if 0 244 exc += roundup(size, 32); 245 #endif 246 } 247 248 /* 249 * Get the cache sizes because install_extint calls __syncicache. 250 */ 251 cpu_probe_cache(); 252 253 #define MxSPR_MASK 0x7c1fffff 254 #define MFSPR_MQ 0x7c0002a6 255 #define MTSPR_MQ 0x7c0003a6 256 #define NOP 0x60000000 257 258 #ifdef ALTIVEC 259 #define MFSPR_VRSAVE 0x7c0042a6 260 #define MTSPR_VRSAVE 0x7c0043a6 261 262 /* 263 * Try to set the VEC bit in the MSR. If it doesn't get set, we are 264 * not on a AltiVec capable processor. 265 */ 266 __asm __volatile ( 267 "mfmsr %0; oris %1,%0,%2@h; mtmsr %1; isync; " 268 "mfmsr %1; mtmsr %0; isync" 269 : "=r"(msr), "=r"(scratch) 270 : "J"(PSL_VEC)); 271 272 /* 273 * If we aren't on an AltiVec capable processor, we to need zap any of 274 * sequences we save/restore the VRSAVE SPR into NOPs. 275 */ 276 if (scratch & PSL_VEC) { 277 cpu_altivec = 1; 278 } else { 279 int *ip = trapstart; 280 281 for (; ip < trapend; ip++) { 282 if ((ip[0] & MxSPR_MASK) == MFSPR_VRSAVE) { 283 ip[0] = NOP; /* mfspr */ 284 ip[1] = NOP; /* stw */ 285 } else if ((ip[0] & MxSPR_MASK) == MTSPR_VRSAVE) { 286 ip[-1] = NOP; /* lwz */ 287 ip[0] = NOP; /* mtspr */ 288 } 289 } 290 } 291 #endif 292 293 /* 294 * If we aren't on a MPC601 processor, we to need zap any of 295 * sequences we save/restore the MQ SPR into NOPs. 296 */ 297 if (cpuvers != MPC601) { 298 int *ip = trapstart; 299 300 for (; ip < trapend; ip++) { 301 if ((ip[0] & MxSPR_MASK) == MFSPR_MQ) { 302 ip[0] = NOP; /* mfspr */ 303 ip[1] = NOP; /* stw */ 304 } else if ((ip[0] & MxSPR_MASK) == MTSPR_MQ) { 305 ip[-1] = NOP; /* lwz */ 306 ip[0] = NOP; /* mtspr */ 307 } 308 } 309 } 310 311 if (!cpu_altivec || cpuvers != MPC601) { 312 /* 313 * Sync the changed instructions. 314 */ 315 __syncicache((void *) trapstart, 316 (uintptr_t) trapend - (uintptr_t) trapstart); 317 } 318 319 /* 320 * external interrupt handler install 321 */ 322 if (handler) 323 oea_install_extint(handler); 324 325 __syncicache(0, EXC_LAST + 0x100); 326 327 /* 328 * Now enable translation (and machine checks/recoverable interrupts). 329 */ 330 __asm __volatile ("sync; mfmsr %0; ori %0,%0,%1; mtmsr %0; isync" 331 : "=r"(scratch) 332 : "K"(PSL_IR|PSL_DR|PSL_ME|PSL_RI)); 333 334 KASSERT(curcpu() == ci); 335 } 336 337 void 338 mpc601_ioseg_add(paddr_t pa, register_t len) 339 { 340 const u_int i = pa >> ADDR_SR_SHFT; 341 342 if (len != BAT_BL_256M) 343 panic("mpc601_ioseg_add: len != 256M"); 344 345 /* 346 * Translate into an I/O segment, load it, and stash away for use 347 * in pmap_bootstrap(). 348 */ 349 iosrtable[i] = SR601(SR601_Ks, SR601_BUID_MEMFORCED, 0, i); 350 __asm __volatile ("mtsrin %0,%1" 351 :: "r"(iosrtable[i]), 352 "r"(pa)); 353 } 354 355 void 356 oea_iobat_add(paddr_t pa, register_t len) 357 { 358 static int n = 1; 359 const u_int i = pa >> 28; 360 battable[i].batl = BATL(pa, BAT_I|BAT_G, BAT_PP_RW); 361 battable[i].batu = BATU(pa, len, BAT_Vs); 362 363 /* 364 * Let's start loading the BAT registers. 365 */ 366 switch (n) { 367 case 1: 368 __asm __volatile ("mtdbatl 1,%0; mtdbatu 1,%1;" 369 :: "r"(battable[i].batl), 370 "r"(battable[i].batu)); 371 n = 2; 372 break; 373 case 2: 374 __asm __volatile ("mtdbatl 2,%0; mtdbatu 2,%1;" 375 :: "r"(battable[i].batl), 376 "r"(battable[i].batu)); 377 n = 3; 378 break; 379 case 3: 380 __asm __volatile ("mtdbatl 3,%0; mtdbatu 3,%1;" 381 :: "r"(battable[i].batl), 382 "r"(battable[i].batu)); 383 n = 4; 384 break; 385 default: 386 break; 387 } 388 } 389 390 void 391 oea_iobat_remove(paddr_t pa) 392 { 393 register_t batu; 394 int i, n; 395 396 n = pa >> ADDR_SR_SHFT; 397 if (!BAT_VA_MATCH_P(battable[n].batu, pa) || 398 !BAT_VALID_P(battable[n].batu, PSL_PR)) 399 return; 400 battable[n].batl = 0; 401 battable[n].batu = 0; 402 #define BAT_RESET(n) \ 403 __asm __volatile("mtdbatu %0,%1; mtdbatl %0,%1" :: "n"(n), "r"(0)) 404 #define BATU_GET(n, r) __asm __volatile("mfdbatu %0,%1" : "=r"(r) : "n"(n)) 405 406 for (i=1 ; i<4 ; i++) { 407 switch (i) { 408 case 1: 409 BATU_GET(1, batu); 410 if (BAT_VA_MATCH_P(batu, pa) && 411 BAT_VALID_P(batu, PSL_PR)) 412 BAT_RESET(1); 413 break; 414 case 2: 415 BATU_GET(2, batu); 416 if (BAT_VA_MATCH_P(batu, pa) && 417 BAT_VALID_P(batu, PSL_PR)) 418 BAT_RESET(2); 419 break; 420 case 3: 421 BATU_GET(3, batu); 422 if (BAT_VA_MATCH_P(batu, pa) && 423 BAT_VALID_P(batu, PSL_PR)) 424 BAT_RESET(3); 425 break; 426 default: 427 break; 428 } 429 } 430 } 431 432 void 433 oea_batinit(paddr_t pa, ...) 434 { 435 struct mem_region *allmem, *availmem, *mp; 436 int i; 437 unsigned int cpuvers; 438 register_t msr = mfmsr(); 439 va_list ap; 440 441 cpuvers = mfpvr() >> 16; 442 443 /* 444 * Initialize BAT registers to unmapped to not generate 445 * overlapping mappings below. 446 * 447 * The 601's implementation differs in the Valid bit being situated 448 * in the lower BAT register, and in being a unified BAT only whose 449 * four entries are accessed through the IBAT[0-3] SPRs. 450 * 451 * Also, while the 601 does distinguish between supervisor/user 452 * protection keys, it does _not_ distinguish distinguish between 453 * validity in supervisor/user mode. 454 */ 455 if ((msr & (PSL_IR|PSL_DR)) == 0) { 456 if (cpuvers == MPC601) { 457 __asm __volatile ("mtibatl 0,%0" :: "r"(0)); 458 __asm __volatile ("mtibatl 1,%0" :: "r"(0)); 459 __asm __volatile ("mtibatl 2,%0" :: "r"(0)); 460 __asm __volatile ("mtibatl 3,%0" :: "r"(0)); 461 } else { 462 __asm __volatile ("mtibatu 0,%0" :: "r"(0)); 463 __asm __volatile ("mtibatu 1,%0" :: "r"(0)); 464 __asm __volatile ("mtibatu 2,%0" :: "r"(0)); 465 __asm __volatile ("mtibatu 3,%0" :: "r"(0)); 466 __asm __volatile ("mtdbatu 0,%0" :: "r"(0)); 467 __asm __volatile ("mtdbatu 1,%0" :: "r"(0)); 468 __asm __volatile ("mtdbatu 2,%0" :: "r"(0)); 469 __asm __volatile ("mtdbatu 3,%0" :: "r"(0)); 470 } 471 } 472 473 /* 474 * Set up BAT to map physical memory 475 */ 476 if (cpuvers == MPC601) { 477 /* 478 * Set up battable to map the lowest 256 MB area. 479 * Map the lowest 32 MB area via BAT[0-3]; 480 * BAT[01] are fixed, BAT[23] are floating. 481 */ 482 for (i = 0; i < 32; i++) { 483 battable[i].batl = BATL601(i << 23, 484 BAT601_BSM_8M, BAT601_V); 485 battable[i].batu = BATU601(i << 23, 486 BAT601_M, BAT601_Ku, BAT601_PP_NONE); 487 } 488 __asm __volatile ("mtibatu 0,%1; mtibatl 0,%0" 489 :: "r"(battable[0x00000000 >> 23].batl), 490 "r"(battable[0x00000000 >> 23].batu)); 491 __asm __volatile ("mtibatu 1,%1; mtibatl 1,%0" 492 :: "r"(battable[0x00800000 >> 23].batl), 493 "r"(battable[0x00800000 >> 23].batu)); 494 __asm __volatile ("mtibatu 2,%1; mtibatl 2,%0" 495 :: "r"(battable[0x01000000 >> 23].batl), 496 "r"(battable[0x01000000 >> 23].batu)); 497 __asm __volatile ("mtibatu 3,%1; mtibatl 3,%0" 498 :: "r"(battable[0x01800000 >> 23].batl), 499 "r"(battable[0x01800000 >> 23].batu)); 500 } else { 501 /* 502 * Set up BAT0 to only map the lowest 256 MB area 503 */ 504 battable[0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 505 battable[0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 506 507 __asm __volatile ("mtibatl 0,%0; mtibatu 0,%1;" 508 "mtdbatl 0,%0; mtdbatu 0,%1;" 509 :: "r"(battable[0].batl), "r"(battable[0].batu)); 510 } 511 512 /* 513 * Now setup other fixed bat registers 514 * 515 * Note that we still run in real mode, and the BAT 516 * registers were cleared above. 517 */ 518 519 va_start(ap, pa); 520 521 /* 522 * Add any I/O BATs specificed; 523 * use I/O segments on the BAT-starved 601. 524 */ 525 if (cpuvers == MPC601) { 526 while (pa != 0) { 527 register_t len = va_arg(ap, register_t); 528 mpc601_ioseg_add(pa, len); 529 pa = va_arg(ap, paddr_t); 530 } 531 } else { 532 while (pa != 0) { 533 register_t len = va_arg(ap, register_t); 534 oea_iobat_add(pa, len); 535 pa = va_arg(ap, paddr_t); 536 } 537 } 538 539 va_end(ap); 540 541 /* 542 * Set up battable to map all RAM regions. 543 * This is here because mem_regions() call needs bat0 set up. 544 */ 545 mem_regions(&allmem, &availmem); 546 if (cpuvers == MPC601) { 547 for (mp = allmem; mp->size; mp++) { 548 paddr_t pa = mp->start & 0xff800000; 549 paddr_t end = mp->start + mp->size; 550 551 do { 552 u_int i = pa >> 23; 553 554 battable[i].batl = 555 BATL601(pa, BAT601_BSM_8M, BAT601_V); 556 battable[i].batu = 557 BATU601(pa, BAT601_M, BAT601_Ku, BAT601_PP_NONE); 558 pa += (1 << 23); 559 } while (pa < end); 560 } 561 } else { 562 for (mp = allmem; mp->size; mp++) { 563 paddr_t pa = mp->start & 0xf0000000; 564 paddr_t end = mp->start + mp->size; 565 566 do { 567 u_int i = pa >> 28; 568 569 battable[i].batl = 570 BATL(pa, BAT_M, BAT_PP_RW); 571 battable[i].batu = 572 BATU(pa, BAT_BL_256M, BAT_Vs); 573 pa += SEGMENT_LENGTH; 574 } while (pa < end); 575 } 576 } 577 } 578 579 void 580 oea_install_extint(void (*handler)(void)) 581 { 582 extern int extint[], extsize[]; 583 extern int extint_call[]; 584 uintptr_t offset = (uintptr_t)handler - (uintptr_t)extint_call; 585 int omsr, msr; 586 587 #ifdef DIAGNOSTIC 588 if (offset > 0x1ffffff) 589 panic("install_extint: %p too far away (%#lx)", handler, 590 (unsigned long) offset); 591 #endif 592 __asm __volatile ("mfmsr %0; andi. %1,%0,%2; mtmsr %1" 593 : "=r" (omsr), "=r" (msr) 594 : "K" ((u_short)~PSL_EE)); 595 extint_call[0] = (extint_call[0] & 0xfc000003) | offset; 596 memcpy((void *)EXC_EXI, extint, (size_t)extsize); 597 __syncicache((void *)extint_call, sizeof extint_call[0]); 598 __syncicache((void *)EXC_EXI, (int)extsize); 599 __asm __volatile ("mtmsr %0" :: "r"(omsr)); 600 } 601 602 /* 603 * Machine dependent startup code. 604 */ 605 void 606 oea_startup(const char *model) 607 { 608 uintptr_t sz; 609 u_int i; 610 u_long base, residual; 611 caddr_t v; 612 vaddr_t minaddr, maxaddr; 613 char pbuf[9]; 614 615 KASSERT(curcpu() != NULL); 616 KASSERT(lwp0.l_cpu != NULL); 617 KASSERT(curcpu()->ci_intstk != 0); 618 KASSERT(curcpu()->ci_spillstk != 0); 619 KASSERT(curcpu()->ci_intrdepth == -1); 620 621 /* 622 * If the msgbuf is not in segment 0, allocate KVA for it and access 623 * it via mapped pages. [This prevents unneeded BAT switches.] 624 */ 625 sz = round_page(MSGBUFSIZE); 626 v = (caddr_t) msgbuf_paddr; 627 if (msgbuf_paddr + sz > SEGMENT_LENGTH) { 628 minaddr = 0; 629 if (uvm_map(kernel_map, &minaddr, sz, 630 NULL, UVM_UNKNOWN_OFFSET, 0, 631 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, 632 UVM_INH_NONE, UVM_ADV_NORMAL, 0)) != 0) 633 panic("startup: cannot allocate VM for msgbuf"); 634 v = (caddr_t)minaddr; 635 for (i = 0; i < sz; i += NBPG) { 636 pmap_kenter_pa(minaddr + i, msgbuf_paddr + i, 637 VM_PROT_READ|VM_PROT_WRITE); 638 } 639 pmap_update(pmap_kernel()); 640 } 641 initmsgbuf(v, sz); 642 643 printf("%s", version); 644 if (model != NULL) 645 printf("Model: %s\n", model); 646 cpu_identify(NULL, 0); 647 648 format_bytes(pbuf, sizeof(pbuf), ctob((u_int)physmem)); 649 printf("total memory = %s\n", pbuf); 650 651 /* 652 * Find out how much space we need, allocate it, 653 * and then give everything true virtual addresses. 654 */ 655 sz = (uintptr_t)allocsys(NULL, NULL); 656 if ((v = (caddr_t)uvm_km_zalloc(kernel_map, round_page(sz))) == 0) 657 panic("startup: no room for tables"); 658 if (allocsys(v, NULL) - v != sz) 659 panic("startup: table size inconsistency"); 660 661 /* 662 * Now allocate buffers proper. They are different than the above 663 * in that they usually occupy more virtual memory than physical. 664 * Allocate the buffer starting at the top of the kernel VM space. 665 */ 666 sz = MAXBSIZE * nbuf; 667 minaddr = VM_MAX_KERNEL_ADDRESS - round_page(sz); 668 if (uvm_map(kernel_map, &minaddr, round_page(sz), 669 NULL, UVM_UNKNOWN_OFFSET, 0, 670 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE, 671 UVM_ADV_NORMAL, 0)) != 0) 672 panic("startup: cannot allocate VM for buffers"); 673 buffers = (char *)minaddr; 674 base = bufpages / nbuf; 675 residual = bufpages % nbuf; 676 if (base >= MAXBSIZE) { 677 /* Don't want to alloc more physical mem than ever needed */ 678 base = MAXBSIZE; 679 residual = 0; 680 } 681 for (i = 0; i < nbuf; i++) { 682 vsize_t curbufsize; 683 vaddr_t curbuf; 684 struct vm_page *pg; 685 686 curbuf = (vaddr_t)buffers + i * MAXBSIZE; 687 curbufsize = NBPG * (i < residual ? base + 1 : base); 688 689 while (curbufsize) { 690 pg = uvm_pagealloc(NULL, 0, NULL, 0); 691 if (pg == NULL) 692 panic("cpu_startup: not enough memory for " 693 "buffer cache"); 694 pmap_kenter_pa(curbuf, VM_PAGE_TO_PHYS(pg), 695 VM_PROT_READ|VM_PROT_WRITE); 696 curbuf += PAGE_SIZE; 697 curbufsize -= PAGE_SIZE; 698 } 699 } 700 pmap_update(pmap_kernel()); 701 702 /* 703 * Allocate away the pages that map to 0xDEA[CDE]xxxx. Do this after 704 * the bufpages are allocated in case they overlap since it's not 705 * fatal if we can't allocate these. 706 */ 707 if (KERNEL_SR == 13 || KERNEL2_SR == 14) { 708 int error; 709 minaddr = 0xDEAC0000; 710 error = uvm_map(kernel_map, &minaddr, 0x30000, 711 NULL, UVM_UNKNOWN_OFFSET, 0, 712 UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE, 713 UVM_ADV_NORMAL, UVM_FLAG_FIXED)); 714 if (error != 0 || minaddr != 0xDEAC0000) 715 printf("oea_startup: failed to allocate DEAD " 716 "ZONE: error=%d\n", error); 717 } 718 minaddr = 0; 719 720 /* 721 * Allocate a submap for exec arguments. This map effectively 722 * limits the number of processes exec'ing at any time. These 723 * submaps will be allocated after the dead zone. 724 */ 725 exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 726 16*NCARGS, VM_MAP_PAGEABLE, FALSE, NULL); 727 728 /* 729 * Allocate a submap for physio 730 */ 731 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 732 VM_PHYS_SIZE, 0, FALSE, NULL); 733 734 #ifndef PMAP_MAP_POOLPAGE 735 /* 736 * No need to allocate an mbuf cluster submap. Mbuf clusters 737 * are allocated via the pool allocator, and we use direct-mapped 738 * pool pages. 739 */ 740 mb_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 741 mclbytes*nmbclusters, VM_MAP_INTRSAFE, FALSE, NULL); 742 #endif 743 744 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 745 printf("avail memory = %s\n", pbuf); 746 format_bytes(pbuf, sizeof(pbuf), bufpages * NBPG); 747 printf("using %u buffers containing %s of memory\n", nbuf, pbuf); 748 749 /* 750 * Set up the buffers. 751 */ 752 bufinit(); 753 } 754 755 /* 756 * Crash dump handling. 757 */ 758 759 void 760 oea_dumpsys(void) 761 { 762 printf("dumpsys: TBD\n"); 763 } 764 765 /* 766 * Soft networking interrupts. 767 */ 768 void 769 softnet(int pendisr) 770 { 771 #define DONETISR(bit, fn) do { \ 772 if (pendisr & (1 << bit)) \ 773 (*fn)(); \ 774 } while (0) 775 776 #include <net/netisr_dispatch.h> 777 778 #undef DONETISR 779 780 } 781 782 /* 783 * Convert kernel VA to physical address 784 */ 785 paddr_t 786 kvtop(caddr_t addr) 787 { 788 vaddr_t va; 789 paddr_t pa; 790 uintptr_t off; 791 extern char end[]; 792 793 if (addr < end) 794 return (paddr_t)addr; 795 796 va = trunc_page((vaddr_t)addr); 797 off = (uintptr_t)addr - va; 798 799 if (pmap_extract(pmap_kernel(), va, &pa) == FALSE) { 800 /*printf("kvtop: zero page frame (va=0x%x)\n", addr);*/ 801 return (paddr_t)addr; 802 } 803 804 return(pa + off); 805 } 806 807 /* 808 * Allocate vm space and mapin the I/O address 809 */ 810 void * 811 mapiodev(paddr_t pa, psize_t len) 812 { 813 paddr_t faddr; 814 vaddr_t taddr, va; 815 int off; 816 817 faddr = trunc_page(pa); 818 off = pa - faddr; 819 len = round_page(off + len); 820 va = taddr = uvm_km_valloc(kernel_map, len); 821 822 if (va == 0) 823 return NULL; 824 825 for (; len > 0; len -= NBPG) { 826 pmap_kenter_pa(taddr, faddr, VM_PROT_READ | VM_PROT_WRITE); 827 faddr += NBPG; 828 taddr += NBPG; 829 } 830 pmap_update(pmap_kernel()); 831 return (void *)(va + off); 832 } 833
Indexes created Mon Sep 29 21:09:56 GMT 2025