pmap.c revision 1.105 1 /* $NetBSD: pmap.c,v 1.105 2021/03/12 18:10:00 thorpej Exp $ */
2 /*-
3 * Copyright (c) 2001 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc.
8 *
9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com>
10 * of Kyma Systems LLC.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /*
35 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
36 * Copyright (C) 1995, 1996 TooLs GmbH.
37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 * 1. Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in the
46 * documentation and/or other materials provided with the distribution.
47 * 3. All advertising materials mentioning features or use of this software
48 * must display the following acknowledgement:
49 * This product includes software developed by TooLs GmbH.
50 * 4. The name of TooLs GmbH may not be used to endorse or promote products
51 * derived from this software without specific prior written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
56 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
58 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
59 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
60 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
61 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
62 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 */
64
65 #include <sys/cdefs.h>
66 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.105 2021/03/12 18:10:00 thorpej Exp $");
67
68 #define PMAP_NOOPNAMES
69
70 #ifdef _KERNEL_OPT
71 #include "opt_altivec.h"
72 #include "opt_multiprocessor.h"
73 #include "opt_pmap.h"
74 #include "opt_ppcarch.h"
75 #endif
76
77 #include <sys/param.h>
78 #include <sys/proc.h>
79 #include <sys/pool.h>
80 #include <sys/queue.h>
81 #include <sys/device.h> /* for evcnt */
82 #include <sys/systm.h>
83 #include <sys/atomic.h>
84
85 #include <uvm/uvm.h>
86 #include <uvm/uvm_physseg.h>
87
88 #include <machine/powerpc.h>
89 #include <powerpc/bat.h>
90 #include <powerpc/pcb.h>
91 #include <powerpc/psl.h>
92 #include <powerpc/spr.h>
93 #include <powerpc/oea/spr.h>
94 #include <powerpc/oea/sr_601.h>
95
96 #ifdef ALTIVEC
97 extern int pmap_use_altivec;
98 #endif
99
100 #ifdef PMAP_MEMLIMIT
101 static paddr_t pmap_memlimit = PMAP_MEMLIMIT;
102 #else
103 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */
104 #endif
105
106 extern struct pmap kernel_pmap_;
107 static unsigned int pmap_pages_stolen;
108 static u_long pmap_pte_valid;
109 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
110 static u_long pmap_pvo_enter_depth;
111 static u_long pmap_pvo_remove_depth;
112 #endif
113
114 #ifndef MSGBUFADDR
115 extern paddr_t msgbuf_paddr;
116 #endif
117
118 static struct mem_region *mem, *avail;
119 static u_int mem_cnt, avail_cnt;
120
121 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE)
122 # define PMAP_OEA 1
123 #endif
124
125 #if defined(PMAP_OEA)
126 #define _PRIxpte "lx"
127 #else
128 #define _PRIxpte PRIx64
129 #endif
130 #define _PRIxpa "lx"
131 #define _PRIxva "lx"
132 #define _PRIsr "lx"
133
134 #ifdef PMAP_NEEDS_FIXUP
135 #if defined(PMAP_OEA)
136 #define PMAPNAME(name) pmap32_##name
137 #elif defined(PMAP_OEA64)
138 #define PMAPNAME(name) pmap64_##name
139 #elif defined(PMAP_OEA64_BRIDGE)
140 #define PMAPNAME(name) pmap64bridge_##name
141 #else
142 #error unknown variant for pmap
143 #endif
144 #endif /* PMAP_NEEDS_FIXUP */
145
146 #ifdef PMAPNAME
147 #define STATIC static
148 #define pmap_pte_spill PMAPNAME(pte_spill)
149 #define pmap_real_memory PMAPNAME(real_memory)
150 #define pmap_init PMAPNAME(init)
151 #define pmap_virtual_space PMAPNAME(virtual_space)
152 #define pmap_create PMAPNAME(create)
153 #define pmap_reference PMAPNAME(reference)
154 #define pmap_destroy PMAPNAME(destroy)
155 #define pmap_copy PMAPNAME(copy)
156 #define pmap_update PMAPNAME(update)
157 #define pmap_enter PMAPNAME(enter)
158 #define pmap_remove PMAPNAME(remove)
159 #define pmap_kenter_pa PMAPNAME(kenter_pa)
160 #define pmap_kremove PMAPNAME(kremove)
161 #define pmap_extract PMAPNAME(extract)
162 #define pmap_protect PMAPNAME(protect)
163 #define pmap_unwire PMAPNAME(unwire)
164 #define pmap_page_protect PMAPNAME(page_protect)
165 #define pmap_query_bit PMAPNAME(query_bit)
166 #define pmap_clear_bit PMAPNAME(clear_bit)
167
168 #define pmap_activate PMAPNAME(activate)
169 #define pmap_deactivate PMAPNAME(deactivate)
170
171 #define pmap_pinit PMAPNAME(pinit)
172 #define pmap_procwr PMAPNAME(procwr)
173
174 #define pmap_pool PMAPNAME(pool)
175 #define pmap_upvo_pool PMAPNAME(upvo_pool)
176 #define pmap_mpvo_pool PMAPNAME(mpvo_pool)
177 #define pmap_pvo_table PMAPNAME(pvo_table)
178 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB)
179 #define pmap_pte_print PMAPNAME(pte_print)
180 #define pmap_pteg_check PMAPNAME(pteg_check)
181 #define pmap_print_mmruregs PMAPNAME(print_mmuregs)
182 #define pmap_print_pte PMAPNAME(print_pte)
183 #define pmap_pteg_dist PMAPNAME(pteg_dist)
184 #endif
185 #if defined(DEBUG) || defined(PMAPCHECK)
186 #define pmap_pvo_verify PMAPNAME(pvo_verify)
187 #define pmapcheck PMAPNAME(check)
188 #endif
189 #if defined(DEBUG) || defined(PMAPDEBUG)
190 #define pmapdebug PMAPNAME(debug)
191 #endif
192 #define pmap_steal_memory PMAPNAME(steal_memory)
193 #define pmap_bootstrap PMAPNAME(bootstrap)
194 #define pmap_bootstrap1 PMAPNAME(bootstrap1)
195 #define pmap_bootstrap2 PMAPNAME(bootstrap2)
196 #else
197 #define STATIC /* nothing */
198 #endif /* PMAPNAME */
199
200 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool);
201 STATIC void pmap_real_memory(paddr_t *, psize_t *);
202 STATIC void pmap_init(void);
203 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *);
204 STATIC pmap_t pmap_create(void);
205 STATIC void pmap_reference(pmap_t);
206 STATIC void pmap_destroy(pmap_t);
207 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t);
208 STATIC void pmap_update(pmap_t);
209 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int);
210 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t);
211 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t, u_int);
212 STATIC void pmap_kremove(vaddr_t, vsize_t);
213 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *);
214
215 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t);
216 STATIC void pmap_unwire(pmap_t, vaddr_t);
217 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t);
218 STATIC bool pmap_query_bit(struct vm_page *, int);
219 STATIC bool pmap_clear_bit(struct vm_page *, int);
220
221 STATIC void pmap_activate(struct lwp *);
222 STATIC void pmap_deactivate(struct lwp *);
223
224 STATIC void pmap_pinit(pmap_t pm);
225 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t);
226
227 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB)
228 STATIC void pmap_pte_print(volatile struct pte *);
229 STATIC void pmap_pteg_check(void);
230 STATIC void pmap_print_mmuregs(void);
231 STATIC void pmap_print_pte(pmap_t, vaddr_t);
232 STATIC void pmap_pteg_dist(void);
233 #endif
234 #if defined(DEBUG) || defined(PMAPCHECK)
235 STATIC void pmap_pvo_verify(void);
236 #endif
237 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *);
238 STATIC void pmap_bootstrap(paddr_t, paddr_t);
239 STATIC void pmap_bootstrap1(paddr_t, paddr_t);
240 STATIC void pmap_bootstrap2(void);
241
242 #ifdef PMAPNAME
243 const struct pmap_ops PMAPNAME(ops) = {
244 .pmapop_pte_spill = pmap_pte_spill,
245 .pmapop_real_memory = pmap_real_memory,
246 .pmapop_init = pmap_init,
247 .pmapop_virtual_space = pmap_virtual_space,
248 .pmapop_create = pmap_create,
249 .pmapop_reference = pmap_reference,
250 .pmapop_destroy = pmap_destroy,
251 .pmapop_copy = pmap_copy,
252 .pmapop_update = pmap_update,
253 .pmapop_enter = pmap_enter,
254 .pmapop_remove = pmap_remove,
255 .pmapop_kenter_pa = pmap_kenter_pa,
256 .pmapop_kremove = pmap_kremove,
257 .pmapop_extract = pmap_extract,
258 .pmapop_protect = pmap_protect,
259 .pmapop_unwire = pmap_unwire,
260 .pmapop_page_protect = pmap_page_protect,
261 .pmapop_query_bit = pmap_query_bit,
262 .pmapop_clear_bit = pmap_clear_bit,
263 .pmapop_activate = pmap_activate,
264 .pmapop_deactivate = pmap_deactivate,
265 .pmapop_pinit = pmap_pinit,
266 .pmapop_procwr = pmap_procwr,
267 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB)
268 .pmapop_pte_print = pmap_pte_print,
269 .pmapop_pteg_check = pmap_pteg_check,
270 .pmapop_print_mmuregs = pmap_print_mmuregs,
271 .pmapop_print_pte = pmap_print_pte,
272 .pmapop_pteg_dist = pmap_pteg_dist,
273 #else
274 .pmapop_pte_print = NULL,
275 .pmapop_pteg_check = NULL,
276 .pmapop_print_mmuregs = NULL,
277 .pmapop_print_pte = NULL,
278 .pmapop_pteg_dist = NULL,
279 #endif
280 #if defined(DEBUG) || defined(PMAPCHECK)
281 .pmapop_pvo_verify = pmap_pvo_verify,
282 #else
283 .pmapop_pvo_verify = NULL,
284 #endif
285 .pmapop_steal_memory = pmap_steal_memory,
286 .pmapop_bootstrap = pmap_bootstrap,
287 .pmapop_bootstrap1 = pmap_bootstrap1,
288 .pmapop_bootstrap2 = pmap_bootstrap2,
289 };
290 #endif /* !PMAPNAME */
291
292 /*
293 * The following structure is aligned to 32 bytes
294 */
295 struct pvo_entry {
296 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */
297 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */
298 struct pte pvo_pte; /* Prebuilt PTE */
299 pmap_t pvo_pmap; /* ptr to owning pmap */
300 vaddr_t pvo_vaddr; /* VA of entry */
301 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */
302 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */
303 #define PVO_WIRED 0x0010 /* PVO entry is wired */
304 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */
305 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */
306 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED)
307 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED)
308 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE)
309 #define PVO_ENTER_INSERT 0 /* PVO has been removed */
310 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */
311 #define PVO_SPILL_SET 2 /* PVO has been spilled */
312 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */
313 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */
314 #define PVO_PMAP_PROTECT 5 /* PVO has changed */
315 #define PVO_REMOVE 6 /* PVO has been removed */
316 #define PVO_WHERE_MASK 15
317 #define PVO_WHERE_SHFT 8
318 } __attribute__ ((aligned (32)));
319 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF)
320 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK)
321 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID)
322 #define PVO_PTEGIDX_CLR(pvo) \
323 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK)))
324 #define PVO_PTEGIDX_SET(pvo,i) \
325 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID))
326 #define PVO_WHERE(pvo,w) \
327 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \
328 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT))
329
330 TAILQ_HEAD(pvo_tqhead, pvo_entry);
331 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */
332 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */
333 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */
334
335 struct pool pmap_pool; /* pool for pmap structures */
336 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */
337 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */
338
339 /*
340 * We keep a cache of unmanaged pages to be used for pvo entries for
341 * unmanaged pages.
342 */
343 struct pvo_page {
344 SIMPLEQ_ENTRY(pvo_page) pvop_link;
345 };
346 SIMPLEQ_HEAD(pvop_head, pvo_page);
347 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head);
348 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head);
349 static u_long pmap_upvop_free;
350 static u_long pmap_upvop_maxfree;
351 static u_long pmap_mpvop_free;
352 static u_long pmap_mpvop_maxfree;
353
354 static void *pmap_pool_ualloc(struct pool *, int);
355 static void *pmap_pool_malloc(struct pool *, int);
356
357 static void pmap_pool_ufree(struct pool *, void *);
358 static void pmap_pool_mfree(struct pool *, void *);
359
360 static struct pool_allocator pmap_pool_mallocator = {
361 .pa_alloc = pmap_pool_malloc,
362 .pa_free = pmap_pool_mfree,
363 .pa_pagesz = 0,
364 };
365
366 static struct pool_allocator pmap_pool_uallocator = {
367 .pa_alloc = pmap_pool_ualloc,
368 .pa_free = pmap_pool_ufree,
369 .pa_pagesz = 0,
370 };
371
372 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB)
373 void pmap_pte_print(volatile struct pte *);
374 void pmap_pteg_check(void);
375 void pmap_pteg_dist(void);
376 void pmap_print_pte(pmap_t, vaddr_t);
377 void pmap_print_mmuregs(void);
378 #endif
379
380 #if defined(DEBUG) || defined(PMAPCHECK)
381 #ifdef PMAPCHECK
382 int pmapcheck = 1;
383 #else
384 int pmapcheck = 0;
385 #endif
386 void pmap_pvo_verify(void);
387 static void pmap_pvo_check(const struct pvo_entry *);
388 #define PMAP_PVO_CHECK(pvo) \
389 do { \
390 if (pmapcheck) \
391 pmap_pvo_check(pvo); \
392 } while (0)
393 #else
394 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0)
395 #endif
396 static int pmap_pte_insert(int, struct pte *);
397 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *,
398 vaddr_t, paddr_t, register_t, int);
399 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *);
400 static void pmap_pvo_free(struct pvo_entry *);
401 static void pmap_pvo_free_list(struct pvo_head *);
402 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *);
403 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int);
404 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *);
405 static void pvo_set_exec(struct pvo_entry *);
406 static void pvo_clear_exec(struct pvo_entry *);
407
408 static void tlbia(void);
409
410 static void pmap_release(pmap_t);
411 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int);
412
413 static uint32_t pmap_pvo_reclaim_nextidx;
414 #ifdef DEBUG
415 static int pmap_pvo_reclaim_debugctr;
416 #endif
417
418 #define VSID_NBPW (sizeof(uint32_t) * 8)
419 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW];
420
421 static int pmap_initialized;
422
423 #if defined(DEBUG) || defined(PMAPDEBUG)
424 #define PMAPDEBUG_BOOT 0x0001
425 #define PMAPDEBUG_PTE 0x0002
426 #define PMAPDEBUG_EXEC 0x0008
427 #define PMAPDEBUG_PVOENTER 0x0010
428 #define PMAPDEBUG_PVOREMOVE 0x0020
429 #define PMAPDEBUG_ACTIVATE 0x0100
430 #define PMAPDEBUG_CREATE 0x0200
431 #define PMAPDEBUG_ENTER 0x1000
432 #define PMAPDEBUG_KENTER 0x2000
433 #define PMAPDEBUG_KREMOVE 0x4000
434 #define PMAPDEBUG_REMOVE 0x8000
435
436 unsigned int pmapdebug = 0;
437
438 # define DPRINTF(x, ...) printf(x, __VA_ARGS__)
439 # define DPRINTFN(n, x, ...) do if (pmapdebug & PMAPDEBUG_ ## n) printf(x, __VA_ARGS__); while (0)
440 #else
441 # define DPRINTF(x, ...) do { } while (0)
442 # define DPRINTFN(n, x, ...) do { } while (0)
443 #endif
444
445
446 #ifdef PMAPCOUNTERS
447 /*
448 * From pmap_subr.c
449 */
450 extern struct evcnt pmap_evcnt_mappings;
451 extern struct evcnt pmap_evcnt_unmappings;
452
453 extern struct evcnt pmap_evcnt_kernel_mappings;
454 extern struct evcnt pmap_evcnt_kernel_unmappings;
455
456 extern struct evcnt pmap_evcnt_mappings_replaced;
457
458 extern struct evcnt pmap_evcnt_exec_mappings;
459 extern struct evcnt pmap_evcnt_exec_cached;
460
461 extern struct evcnt pmap_evcnt_exec_synced;
462 extern struct evcnt pmap_evcnt_exec_synced_clear_modify;
463 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove;
464
465 extern struct evcnt pmap_evcnt_exec_uncached_page_protect;
466 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify;
467 extern struct evcnt pmap_evcnt_exec_uncached_zero_page;
468 extern struct evcnt pmap_evcnt_exec_uncached_copy_page;
469 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove;
470
471 extern struct evcnt pmap_evcnt_updates;
472 extern struct evcnt pmap_evcnt_collects;
473 extern struct evcnt pmap_evcnt_copies;
474
475 extern struct evcnt pmap_evcnt_ptes_spilled;
476 extern struct evcnt pmap_evcnt_ptes_unspilled;
477 extern struct evcnt pmap_evcnt_ptes_evicted;
478
479 extern struct evcnt pmap_evcnt_ptes_primary[8];
480 extern struct evcnt pmap_evcnt_ptes_secondary[8];
481 extern struct evcnt pmap_evcnt_ptes_removed;
482 extern struct evcnt pmap_evcnt_ptes_changed;
483 extern struct evcnt pmap_evcnt_pvos_reclaimed;
484 extern struct evcnt pmap_evcnt_pvos_failed;
485
486 extern struct evcnt pmap_evcnt_zeroed_pages;
487 extern struct evcnt pmap_evcnt_copied_pages;
488 extern struct evcnt pmap_evcnt_idlezeroed_pages;
489
490 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++)
491 #define PMAPCOUNT2(ev) ((ev).ev_count++)
492 #else
493 #define PMAPCOUNT(ev) ((void) 0)
494 #define PMAPCOUNT2(ev) ((void) 0)
495 #endif
496
497 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va))
498
499 /* XXXSL: this needs to be moved to assembler */
500 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va))
501
502 #ifdef MD_TLBSYNC
503 #define TLBSYNC() MD_TLBSYNC()
504 #else
505 #define TLBSYNC() __asm volatile("tlbsync")
506 #endif
507 #define SYNC() __asm volatile("sync")
508 #define EIEIO() __asm volatile("eieio")
509 #define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va))
510 #define MFMSR() mfmsr()
511 #define MTMSR(psl) mtmsr(psl)
512 #define MFPVR() mfpvr()
513 #define MFSRIN(va) mfsrin(va)
514 #define MFTB() mfrtcltbl()
515
516 #if defined(DDB) && !defined(PMAP_OEA64)
517 static inline register_t
518 mfsrin(vaddr_t va)
519 {
520 register_t sr;
521 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va));
522 return sr;
523 }
524 #endif /* DDB && !PMAP_OEA64 */
525
526 #if defined (PMAP_OEA64_BRIDGE)
527 extern void mfmsr64 (register64_t *result);
528 #endif /* PMAP_OEA64_BRIDGE */
529
530 #define PMAP_LOCK() KERNEL_LOCK(1, NULL)
531 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL)
532
533 static inline register_t
534 pmap_interrupts_off(void)
535 {
536 register_t msr = MFMSR();
537 if (msr & PSL_EE)
538 MTMSR(msr & ~PSL_EE);
539 return msr;
540 }
541
542 static void
543 pmap_interrupts_restore(register_t msr)
544 {
545 if (msr & PSL_EE)
546 MTMSR(msr);
547 }
548
549 static inline u_int32_t
550 mfrtcltbl(void)
551 {
552 #ifdef PPC_OEA601
553 if ((MFPVR() >> 16) == MPC601)
554 return (mfrtcl() >> 7);
555 else
556 #endif
557 return (mftbl());
558 }
559
560 /*
561 * These small routines may have to be replaced,
562 * if/when we support processors other that the 604.
563 */
564
565 void
566 tlbia(void)
567 {
568 char *i;
569
570 SYNC();
571 #if defined(PMAP_OEA)
572 /*
573 * Why not use "tlbia"? Because not all processors implement it.
574 *
575 * This needs to be a per-CPU callback to do the appropriate thing
576 * for the CPU. XXX
577 */
578 for (i = 0; i < (char *)0x00040000; i += 0x00001000) {
579 TLBIE(i);
580 EIEIO();
581 SYNC();
582 }
583 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE)
584 /* This is specifically for the 970, 970UM v1.6 pp. 140. */
585 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) {
586 TLBIEL(i);
587 EIEIO();
588 SYNC();
589 }
590 #endif
591 TLBSYNC();
592 SYNC();
593 }
594
595 static inline register_t
596 va_to_vsid(const struct pmap *pm, vaddr_t addr)
597 {
598 /*
599 * Rather than searching the STE groups for the VSID or extracting
600 * it from the SR, we know how we generate that from the ESID and
601 * so do that.
602 *
603 * This makes the code the same for OEA and OEA64, and also allows
604 * us to generate a correct-for-that-address-space VSID even if the
605 * pmap contains a different SR value at any given moment (e.g.
606 * kernel pmap on a 601 that is using I/O segments).
607 */
608 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT;
609 }
610
611 static inline register_t
612 va_to_pteg(const struct pmap *pm, vaddr_t addr)
613 {
614 register_t hash;
615
616 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT);
617 return hash & pmap_pteg_mask;
618 }
619
620 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB)
621 /*
622 * Given a PTE in the page table, calculate the VADDR that hashes to it.
623 * The only bit of magic is that the top 4 bits of the address doesn't
624 * technically exist in the PTE. But we know we reserved 4 bits of the
625 * VSID for it so that's how we get it.
626 */
627 static vaddr_t
628 pmap_pte_to_va(volatile const struct pte *pt)
629 {
630 vaddr_t va;
631 uintptr_t ptaddr = (uintptr_t) pt;
632
633 if (pt->pte_hi & PTE_HID)
634 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg));
635
636 /* PPC Bits 10-19 PPC64 Bits 42-51 */
637 #if defined(PMAP_OEA)
638 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff;
639 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE)
640 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff;
641 #endif
642 va <<= ADDR_PIDX_SHFT;
643
644 /* PPC Bits 4-9 PPC64 Bits 36-41 */
645 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT;
646
647 #if defined(PMAP_OEA64)
648 /* PPC63 Bits 0-35 */
649 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */
650 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE)
651 /* PPC Bits 0-3 */
652 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT;
653 #endif
654
655 return va;
656 }
657 #endif
658
659 static inline struct pvo_head *
660 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p)
661 {
662 struct vm_page *pg;
663 struct vm_page_md *md;
664
665 pg = PHYS_TO_VM_PAGE(pa);
666 if (pg_p != NULL)
667 *pg_p = pg;
668 if (pg == NULL)
669 return &pmap_pvo_unmanaged;
670 md = VM_PAGE_TO_MD(pg);
671 return &md->mdpg_pvoh;
672 }
673
674 static inline struct pvo_head *
675 vm_page_to_pvoh(struct vm_page *pg)
676 {
677 struct vm_page_md * const md = VM_PAGE_TO_MD(pg);
678
679 return &md->mdpg_pvoh;
680 }
681
682
683 static inline void
684 pmap_attr_clear(struct vm_page *pg, int ptebit)
685 {
686 struct vm_page_md * const md = VM_PAGE_TO_MD(pg);
687
688 md->mdpg_attrs &= ~ptebit;
689 }
690
691 static inline int
692 pmap_attr_fetch(struct vm_page *pg)
693 {
694 struct vm_page_md * const md = VM_PAGE_TO_MD(pg);
695
696 return md->mdpg_attrs;
697 }
698
699 static inline void
700 pmap_attr_save(struct vm_page *pg, int ptebit)
701 {
702 struct vm_page_md * const md = VM_PAGE_TO_MD(pg);
703
704 md->mdpg_attrs |= ptebit;
705 }
706
707 static inline int
708 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt)
709 {
710 if (pt->pte_hi == pvo_pt->pte_hi
711 #if 0
712 && ((pt->pte_lo ^ pvo_pt->pte_lo) &
713 ~(PTE_REF|PTE_CHG)) == 0
714 #endif
715 )
716 return 1;
717 return 0;
718 }
719
720 static inline void
721 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo)
722 {
723 /*
724 * Construct the PTE. Default to IMB initially. Valid bit
725 * only gets set when the real pte is set in memory.
726 *
727 * Note: Don't set the valid bit for correct operation of tlb update.
728 */
729 #if defined(PMAP_OEA)
730 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT)
731 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API);
732 pt->pte_lo = pte_lo;
733 #elif defined (PMAP_OEA64_BRIDGE) || defined (PMAP_OEA64)
734 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT)
735 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API);
736 pt->pte_lo = (u_int64_t) pte_lo;
737 #endif /* PMAP_OEA */
738 }
739
740 static inline void
741 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt)
742 {
743 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG);
744 }
745
746 static inline void
747 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit)
748 {
749 /*
750 * As shown in Section 7.6.3.2.3
751 */
752 pt->pte_lo &= ~ptebit;
753 TLBIE(va);
754 SYNC();
755 EIEIO();
756 TLBSYNC();
757 SYNC();
758 #ifdef MULTIPROCESSOR
759 DCBST(pt);
760 #endif
761 }
762
763 static inline void
764 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt)
765 {
766 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
767 if (pvo_pt->pte_hi & PTE_VALID)
768 panic("pte_set: setting an already valid pte %p", pvo_pt);
769 #endif
770 pvo_pt->pte_hi |= PTE_VALID;
771
772 /*
773 * Update the PTE as defined in section 7.6.3.1
774 * Note that the REF/CHG bits are from pvo_pt and thus should
775 * have been saved so this routine can restore them (if desired).
776 */
777 pt->pte_lo = pvo_pt->pte_lo;
778 EIEIO();
779 pt->pte_hi = pvo_pt->pte_hi;
780 TLBSYNC();
781 SYNC();
782 #ifdef MULTIPROCESSOR
783 DCBST(pt);
784 #endif
785 pmap_pte_valid++;
786 }
787
788 static inline void
789 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va)
790 {
791 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
792 if ((pvo_pt->pte_hi & PTE_VALID) == 0)
793 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt);
794 if ((pt->pte_hi & PTE_VALID) == 0)
795 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt);
796 #endif
797
798 pvo_pt->pte_hi &= ~PTE_VALID;
799 /*
800 * Force the ref & chg bits back into the PTEs.
801 */
802 SYNC();
803 /*
804 * Invalidate the pte ... (Section 7.6.3.3)
805 */
806 pt->pte_hi &= ~PTE_VALID;
807 SYNC();
808 TLBIE(va);
809 SYNC();
810 EIEIO();
811 TLBSYNC();
812 SYNC();
813 /*
814 * Save the ref & chg bits ...
815 */
816 pmap_pte_synch(pt, pvo_pt);
817 pmap_pte_valid--;
818 }
819
820 static inline void
821 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va)
822 {
823 /*
824 * Invalidate the PTE
825 */
826 pmap_pte_unset(pt, pvo_pt, va);
827 pmap_pte_set(pt, pvo_pt);
828 }
829
830 /*
831 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx
832 * (either primary or secondary location).
833 *
834 * Note: both the destination and source PTEs must not have PTE_VALID set.
835 */
836
837 static int
838 pmap_pte_insert(int ptegidx, struct pte *pvo_pt)
839 {
840 volatile struct pte *pt;
841 int i;
842
843 #if defined(DEBUG)
844 DPRINTFN(PTE, "pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n",
845 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo);
846 #endif
847 /*
848 * First try primary hash.
849 */
850 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) {
851 if ((pt->pte_hi & PTE_VALID) == 0) {
852 pvo_pt->pte_hi &= ~PTE_HID;
853 pmap_pte_set(pt, pvo_pt);
854 return i;
855 }
856 }
857
858 /*
859 * Now try secondary hash.
860 */
861 ptegidx ^= pmap_pteg_mask;
862 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) {
863 if ((pt->pte_hi & PTE_VALID) == 0) {
864 pvo_pt->pte_hi |= PTE_HID;
865 pmap_pte_set(pt, pvo_pt);
866 return i;
867 }
868 }
869 return -1;
870 }
871
872 /*
873 * Spill handler.
874 *
875 * Tries to spill a page table entry from the overflow area.
876 * This runs in either real mode (if dealing with a exception spill)
877 * or virtual mode when dealing with manually spilling one of the
878 * kernel's pte entries. In either case, interrupts are already
879 * disabled.
880 */
881
882 int
883 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec)
884 {
885 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo;
886 struct pvo_entry *pvo;
887 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */
888 struct pvo_tqhead *pvoh, *vpvoh = NULL;
889 int ptegidx, i, j;
890 volatile struct pteg *pteg;
891 volatile struct pte *pt;
892
893 PMAP_LOCK();
894
895 ptegidx = va_to_pteg(pm, addr);
896
897 /*
898 * Have to substitute some entry. Use the primary hash for this.
899 * Use low bits of timebase as random generator. Make sure we are
900 * not picking a kernel pte for replacement.
901 */
902 pteg = &pmap_pteg_table[ptegidx];
903 i = MFTB() & 7;
904 for (j = 0; j < 8; j++) {
905 pt = &pteg->pt[i];
906 if ((pt->pte_hi & PTE_VALID) == 0)
907 break;
908 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT)
909 < PHYSMAP_VSIDBITS)
910 break;
911 i = (i + 1) & 7;
912 }
913 KASSERT(j < 8);
914
915 source_pvo = NULL;
916 victim_pvo = NULL;
917 pvoh = &pmap_pvo_table[ptegidx];
918 TAILQ_FOREACH(pvo, pvoh, pvo_olink) {
919
920 /*
921 * We need to find pvo entry for this address...
922 */
923 PMAP_PVO_CHECK(pvo); /* sanity check */
924
925 /*
926 * If we haven't found the source and we come to a PVO with
927 * a valid PTE, then we know we can't find it because all
928 * evicted PVOs always are first in the list.
929 */
930 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID))
931 break;
932 if (source_pvo == NULL && pm == pvo->pvo_pmap &&
933 addr == PVO_VADDR(pvo)) {
934
935 /*
936 * Now we have found the entry to be spilled into the
937 * pteg. Attempt to insert it into the page table.
938 */
939 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte);
940 if (j >= 0) {
941 PVO_PTEGIDX_SET(pvo, j);
942 PMAP_PVO_CHECK(pvo); /* sanity check */
943 PVO_WHERE(pvo, SPILL_INSERT);
944 pvo->pvo_pmap->pm_evictions--;
945 PMAPCOUNT(ptes_spilled);
946 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID)
947 ? pmap_evcnt_ptes_secondary
948 : pmap_evcnt_ptes_primary)[j]);
949
950 /*
951 * Since we keep the evicted entries at the
952 * from of the PVO list, we need move this
953 * (now resident) PVO after the evicted
954 * entries.
955 */
956 next_pvo = TAILQ_NEXT(pvo, pvo_olink);
957
958 /*
959 * If we don't have to move (either we were the
960 * last entry or the next entry was valid),
961 * don't change our position. Otherwise
962 * move ourselves to the tail of the queue.
963 */
964 if (next_pvo != NULL &&
965 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) {
966 TAILQ_REMOVE(pvoh, pvo, pvo_olink);
967 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink);
968 }
969 PMAP_UNLOCK();
970 return 1;
971 }
972 source_pvo = pvo;
973 if (exec && !PVO_EXECUTABLE_P(source_pvo)) {
974 PMAP_UNLOCK();
975 return 0;
976 }
977 if (victim_pvo != NULL)
978 break;
979 }
980
981 /*
982 * We also need the pvo entry of the victim we are replacing
983 * so save the R & C bits of the PTE.
984 */
985 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL &&
986 pmap_pte_compare(pt, &pvo->pvo_pte)) {
987 vpvoh = pvoh; /* *1* */
988 victim_pvo = pvo;
989 if (source_pvo != NULL)
990 break;
991 }
992 }
993
994 if (source_pvo == NULL) {
995 PMAPCOUNT(ptes_unspilled);
996 PMAP_UNLOCK();
997 return 0;
998 }
999
1000 if (victim_pvo == NULL) {
1001 if ((pt->pte_hi & PTE_HID) == 0)
1002 panic("pmap_pte_spill: victim p-pte (%p) has "
1003 "no pvo entry!", pt);
1004
1005 /*
1006 * If this is a secondary PTE, we need to search
1007 * its primary pvo bucket for the matching PVO.
1008 */
1009 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */
1010 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) {
1011 PMAP_PVO_CHECK(pvo); /* sanity check */
1012
1013 /*
1014 * We also need the pvo entry of the victim we are
1015 * replacing so save the R & C bits of the PTE.
1016 */
1017 if (pmap_pte_compare(pt, &pvo->pvo_pte)) {
1018 victim_pvo = pvo;
1019 break;
1020 }
1021 }
1022 if (victim_pvo == NULL)
1023 panic("pmap_pte_spill: victim s-pte (%p) has "
1024 "no pvo entry!", pt);
1025 }
1026
1027 /*
1028 * The victim should be not be a kernel PVO/PTE entry.
1029 */
1030 KASSERT(victim_pvo->pvo_pmap != pmap_kernel());
1031 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo));
1032 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i);
1033
1034 /*
1035 * We are invalidating the TLB entry for the EA for the
1036 * we are replacing even though its valid; If we don't
1037 * we lose any ref/chg bit changes contained in the TLB
1038 * entry.
1039 */
1040 source_pvo->pvo_pte.pte_hi &= ~PTE_HID;
1041
1042 /*
1043 * To enforce the PVO list ordering constraint that all
1044 * evicted entries should come before all valid entries,
1045 * move the source PVO to the tail of its list and the
1046 * victim PVO to the head of its list (which might not be
1047 * the same list, if the victim was using the secondary hash).
1048 */
1049 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink);
1050 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink);
1051 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink);
1052 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink);
1053 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr);
1054 pmap_pte_set(pt, &source_pvo->pvo_pte);
1055 victim_pvo->pvo_pmap->pm_evictions++;
1056 source_pvo->pvo_pmap->pm_evictions--;
1057 PVO_WHERE(victim_pvo, SPILL_UNSET);
1058 PVO_WHERE(source_pvo, SPILL_SET);
1059
1060 PVO_PTEGIDX_CLR(victim_pvo);
1061 PVO_PTEGIDX_SET(source_pvo, i);
1062 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]);
1063 PMAPCOUNT(ptes_spilled);
1064 PMAPCOUNT(ptes_evicted);
1065 PMAPCOUNT(ptes_removed);
1066
1067 PMAP_PVO_CHECK(victim_pvo);
1068 PMAP_PVO_CHECK(source_pvo);
1069
1070 PMAP_UNLOCK();
1071 return 1;
1072 }
1073
1074 /*
1075 * Restrict given range to physical memory
1076 */
1077 void
1078 pmap_real_memory(paddr_t *start, psize_t *size)
1079 {
1080 struct mem_region *mp;
1081
1082 for (mp = mem; mp->size; mp++) {
1083 if (*start + *size > mp->start
1084 && *start < mp->start + mp->size) {
1085 if (*start < mp->start) {
1086 *size -= mp->start - *start;
1087 *start = mp->start;
1088 }
1089 if (*start + *size > mp->start + mp->size)
1090 *size = mp->start + mp->size - *start;
1091 return;
1092 }
1093 }
1094 *size = 0;
1095 }
1096
1097 /*
1098 * Initialize anything else for pmap handling.
1099 * Called during vm_init().
1100 */
1101 void
1102 pmap_init(void)
1103 {
1104 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry),
1105 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl",
1106 &pmap_pool_mallocator, IPL_NONE);
1107
1108 pool_setlowat(&pmap_mpvo_pool, 1008);
1109
1110 pmap_initialized = 1;
1111
1112 }
1113
1114 /*
1115 * How much virtual space does the kernel get?
1116 */
1117 void
1118 pmap_virtual_space(vaddr_t *start, vaddr_t *end)
1119 {
1120 /*
1121 * For now, reserve one segment (minus some overhead) for kernel
1122 * virtual memory
1123 */
1124 *start = VM_MIN_KERNEL_ADDRESS;
1125 *end = VM_MAX_KERNEL_ADDRESS;
1126 }
1127
1128 /*
1129 * Allocate, initialize, and return a new physical map.
1130 */
1131 pmap_t
1132 pmap_create(void)
1133 {
1134 pmap_t pm;
1135
1136 pm = pool_get(&pmap_pool, PR_WAITOK);
1137 KASSERT((vaddr_t)pm < VM_MIN_KERNEL_ADDRESS);
1138 memset((void *)pm, 0, sizeof *pm);
1139 pmap_pinit(pm);
1140
1141 DPRINTFN(CREATE, "pmap_create: pm %p:\n"
1142 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr
1143 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n"
1144 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr
1145 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n",
1146 pm,
1147 pm->pm_sr[0], pm->pm_sr[1],
1148 pm->pm_sr[2], pm->pm_sr[3],
1149 pm->pm_sr[4], pm->pm_sr[5],
1150 pm->pm_sr[6], pm->pm_sr[7],
1151 pm->pm_sr[8], pm->pm_sr[9],
1152 pm->pm_sr[10], pm->pm_sr[11],
1153 pm->pm_sr[12], pm->pm_sr[13],
1154 pm->pm_sr[14], pm->pm_sr[15]);
1155 return pm;
1156 }
1157
1158 /*
1159 * Initialize a preallocated and zeroed pmap structure.
1160 */
1161 void
1162 pmap_pinit(pmap_t pm)
1163 {
1164 register_t entropy = MFTB();
1165 register_t mask;
1166 int i;
1167
1168 /*
1169 * Allocate some segment registers for this pmap.
1170 */
1171 pm->pm_refs = 1;
1172 PMAP_LOCK();
1173 for (i = 0; i < NPMAPS; i += VSID_NBPW) {
1174 static register_t pmap_vsidcontext;
1175 register_t hash;
1176 unsigned int n;
1177
1178 /* Create a new value by multiplying by a prime adding in
1179 * entropy from the timebase register. This is to make the
1180 * VSID more random so that the PT Hash function collides
1181 * less often. (note that the prime causes gcc to do shifts
1182 * instead of a multiply)
1183 */
1184 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy;
1185 hash = pmap_vsidcontext & (NPMAPS - 1);
1186 if (hash == 0) { /* 0 is special, avoid it */
1187 entropy += 0xbadf00d;
1188 continue;
1189 }
1190 n = hash >> 5;
1191 mask = 1L << (hash & (VSID_NBPW-1));
1192 hash = pmap_vsidcontext;
1193 if (pmap_vsid_bitmap[n] & mask) { /* collision? */
1194 /* anything free in this bucket? */
1195 if (~pmap_vsid_bitmap[n] == 0) {
1196 entropy = hash ^ (hash >> 16);
1197 continue;
1198 }
1199 i = ffs(~pmap_vsid_bitmap[n]) - 1;
1200 mask = 1L << i;
1201 hash &= ~(VSID_NBPW-1);
1202 hash |= i;
1203 }
1204 hash &= PTE_VSID >> PTE_VSID_SHFT;
1205 pmap_vsid_bitmap[n] |= mask;
1206 pm->pm_vsid = hash;
1207 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE)
1208 for (i = 0; i < 16; i++)
1209 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY |
1210 SR_NOEXEC;
1211 #endif
1212 PMAP_UNLOCK();
1213 return;
1214 }
1215 PMAP_UNLOCK();
1216 panic("pmap_pinit: out of segments");
1217 }
1218
1219 /*
1220 * Add a reference to the given pmap.
1221 */
1222 void
1223 pmap_reference(pmap_t pm)
1224 {
1225 atomic_inc_uint(&pm->pm_refs);
1226 }
1227
1228 /*
1229 * Retire the given pmap from service.
1230 * Should only be called if the map contains no valid mappings.
1231 */
1232 void
1233 pmap_destroy(pmap_t pm)
1234 {
1235 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) {
1236 pmap_release(pm);
1237 pool_put(&pmap_pool, pm);
1238 }
1239 }
1240
1241 /*
1242 * Release any resources held by the given physical map.
1243 * Called when a pmap initialized by pmap_pinit is being released.
1244 */
1245 void
1246 pmap_release(pmap_t pm)
1247 {
1248 int idx, mask;
1249
1250 KASSERT(pm->pm_stats.resident_count == 0);
1251 KASSERT(pm->pm_stats.wired_count == 0);
1252
1253 PMAP_LOCK();
1254 if (pm->pm_sr[0] == 0)
1255 panic("pmap_release");
1256 idx = pm->pm_vsid & (NPMAPS-1);
1257 mask = 1 << (idx % VSID_NBPW);
1258 idx /= VSID_NBPW;
1259
1260 KASSERT(pmap_vsid_bitmap[idx] & mask);
1261 pmap_vsid_bitmap[idx] &= ~mask;
1262 PMAP_UNLOCK();
1263 }
1264
1265 /*
1266 * Copy the range specified by src_addr/len
1267 * from the source map to the range dst_addr/len
1268 * in the destination map.
1269 *
1270 * This routine is only advisory and need not do anything.
1271 */
1272 void
1273 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr,
1274 vsize_t len, vaddr_t src_addr)
1275 {
1276 PMAPCOUNT(copies);
1277 }
1278
1279 /*
1280 * Require that all active physical maps contain no
1281 * incorrect entries NOW.
1282 */
1283 void
1284 pmap_update(struct pmap *pmap)
1285 {
1286 PMAPCOUNT(updates);
1287 TLBSYNC();
1288 }
1289
1290 static inline int
1291 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx)
1292 {
1293 int pteidx;
1294 /*
1295 * We can find the actual pte entry without searching by
1296 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9]
1297 * and by noticing the HID bit.
1298 */
1299 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo);
1300 if (pvo->pvo_pte.pte_hi & PTE_HID)
1301 pteidx ^= pmap_pteg_mask * 8;
1302 return pteidx;
1303 }
1304
1305 volatile struct pte *
1306 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx)
1307 {
1308 volatile struct pte *pt;
1309
1310 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK)
1311 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0)
1312 return NULL;
1313 #endif
1314
1315 /*
1316 * If we haven't been supplied the ptegidx, calculate it.
1317 */
1318 if (pteidx == -1) {
1319 int ptegidx;
1320 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr);
1321 pteidx = pmap_pvo_pte_index(pvo, ptegidx);
1322 }
1323
1324 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7];
1325
1326 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK)
1327 return pt;
1328 #else
1329 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) {
1330 panic("pmap_pvo_to_pte: pvo %p: has valid pte in "
1331 "pvo but no valid pte index", pvo);
1332 }
1333 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) {
1334 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in "
1335 "pvo but no valid pte", pvo);
1336 }
1337
1338 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) {
1339 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) {
1340 #if defined(DEBUG) || defined(PMAPCHECK)
1341 pmap_pte_print(pt);
1342 #endif
1343 panic("pmap_pvo_to_pte: pvo %p: has valid pte in "
1344 "pmap_pteg_table %p but invalid in pvo",
1345 pvo, pt);
1346 }
1347 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) {
1348 #if defined(DEBUG) || defined(PMAPCHECK)
1349 pmap_pte_print(pt);
1350 #endif
1351 panic("pmap_pvo_to_pte: pvo %p: pvo pte does "
1352 "not match pte %p in pmap_pteg_table",
1353 pvo, pt);
1354 }
1355 return pt;
1356 }
1357
1358 if (pvo->pvo_pte.pte_hi & PTE_VALID) {
1359 #if defined(DEBUG) || defined(PMAPCHECK)
1360 pmap_pte_print(pt);
1361 #endif
1362 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in "
1363 "pmap_pteg_table but valid in pvo", pvo, pt);
1364 }
1365 return NULL;
1366 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */
1367 }
1368
1369 struct pvo_entry *
1370 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p)
1371 {
1372 struct pvo_entry *pvo;
1373 int ptegidx;
1374
1375 va &= ~ADDR_POFF;
1376 ptegidx = va_to_pteg(pm, va);
1377
1378 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) {
1379 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
1380 if ((uintptr_t) pvo >= SEGMENT_LENGTH)
1381 panic("pmap_pvo_find_va: invalid pvo %p on "
1382 "list %#x (%p)", pvo, ptegidx,
1383 &pmap_pvo_table[ptegidx]);
1384 #endif
1385 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) {
1386 if (pteidx_p)
1387 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx);
1388 return pvo;
1389 }
1390 }
1391 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH))
1392 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n",
1393 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va);
1394 return NULL;
1395 }
1396
1397 #if defined(DEBUG) || defined(PMAPCHECK)
1398 void
1399 pmap_pvo_check(const struct pvo_entry *pvo)
1400 {
1401 struct pvo_head *pvo_head;
1402 struct pvo_entry *pvo0;
1403 volatile struct pte *pt;
1404 int failed = 0;
1405
1406 PMAP_LOCK();
1407
1408 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH)
1409 panic("pmap_pvo_check: pvo %p: invalid address", pvo);
1410
1411 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) {
1412 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n",
1413 pvo, pvo->pvo_pmap);
1414 failed = 1;
1415 }
1416
1417 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH ||
1418 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) {
1419 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n",
1420 pvo, TAILQ_NEXT(pvo, pvo_olink));
1421 failed = 1;
1422 }
1423
1424 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH ||
1425 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) {
1426 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n",
1427 pvo, LIST_NEXT(pvo, pvo_vlink));
1428 failed = 1;
1429 }
1430
1431 if (PVO_MANAGED_P(pvo)) {
1432 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL);
1433 } else {
1434 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) {
1435 printf("pmap_pvo_check: pvo %p: non kernel address "
1436 "on kernel unmanaged list\n", pvo);
1437 failed = 1;
1438 }
1439 pvo_head = &pmap_pvo_kunmanaged;
1440 }
1441 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) {
1442 if (pvo0 == pvo)
1443 break;
1444 }
1445 if (pvo0 == NULL) {
1446 printf("pmap_pvo_check: pvo %p: not present "
1447 "on its vlist head %p\n", pvo, pvo_head);
1448 failed = 1;
1449 }
1450 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) {
1451 printf("pmap_pvo_check: pvo %p: not present "
1452 "on its olist head\n", pvo);
1453 failed = 1;
1454 }
1455 pt = pmap_pvo_to_pte(pvo, -1);
1456 if (pt == NULL) {
1457 if (pvo->pvo_pte.pte_hi & PTE_VALID) {
1458 printf("pmap_pvo_check: pvo %p: pte_hi VALID but "
1459 "no PTE\n", pvo);
1460 failed = 1;
1461 }
1462 } else {
1463 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] ||
1464 (uintptr_t) pt >=
1465 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) {
1466 printf("pmap_pvo_check: pvo %p: pte %p not in "
1467 "pteg table\n", pvo, pt);
1468 failed = 1;
1469 }
1470 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) {
1471 printf("pmap_pvo_check: pvo %p: pte_hi VALID but "
1472 "no PTE\n", pvo);
1473 failed = 1;
1474 }
1475 if (pvo->pvo_pte.pte_hi != pt->pte_hi) {
1476 printf("pmap_pvo_check: pvo %p: pte_hi differ: "
1477 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo,
1478 pvo->pvo_pte.pte_hi,
1479 pt->pte_hi);
1480 failed = 1;
1481 }
1482 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) &
1483 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) {
1484 printf("pmap_pvo_check: pvo %p: pte_lo differ: "
1485 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo,
1486 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)),
1487 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)));
1488 failed = 1;
1489 }
1490 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) {
1491 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva ""
1492 " doesn't not match PVO's VA %#" _PRIxva "\n",
1493 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo));
1494 failed = 1;
1495 }
1496 if (failed)
1497 pmap_pte_print(pt);
1498 }
1499 if (failed)
1500 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo,
1501 pvo->pvo_pmap);
1502
1503 PMAP_UNLOCK();
1504 }
1505 #endif /* DEBUG || PMAPCHECK */
1506
1507 /*
1508 * Search the PVO table looking for a non-wired entry.
1509 * If we find one, remove it and return it.
1510 */
1511
1512 struct pvo_entry *
1513 pmap_pvo_reclaim(struct pmap *pm)
1514 {
1515 struct pvo_tqhead *pvoh;
1516 struct pvo_entry *pvo;
1517 uint32_t idx, endidx;
1518
1519 endidx = pmap_pvo_reclaim_nextidx;
1520 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx;
1521 idx = (idx + 1) & pmap_pteg_mask) {
1522 pvoh = &pmap_pvo_table[idx];
1523 TAILQ_FOREACH(pvo, pvoh, pvo_olink) {
1524 if (!PVO_WIRED_P(pvo)) {
1525 pmap_pvo_remove(pvo, -1, NULL);
1526 pmap_pvo_reclaim_nextidx = idx;
1527 PMAPCOUNT(pvos_reclaimed);
1528 return pvo;
1529 }
1530 }
1531 }
1532 return NULL;
1533 }
1534
1535 static struct pool *
1536 pmap_pvo_pl(struct pvo_entry *pvo)
1537 {
1538
1539 return PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool;
1540 }
1541
1542 /*
1543 * This returns whether this is the first mapping of a page.
1544 */
1545 int
1546 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head,
1547 vaddr_t va, paddr_t pa, register_t pte_lo, int flags)
1548 {
1549 struct pvo_entry *pvo;
1550 struct pvo_tqhead *pvoh;
1551 register_t msr;
1552 int ptegidx;
1553 int i;
1554 int poolflags = PR_NOWAIT;
1555
1556 /*
1557 * Compute the PTE Group index.
1558 */
1559 va &= ~ADDR_POFF;
1560 ptegidx = va_to_pteg(pm, va);
1561
1562 msr = pmap_interrupts_off();
1563
1564 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
1565 if (pmap_pvo_remove_depth > 0)
1566 panic("pmap_pvo_enter: called while pmap_pvo_remove active!");
1567 if (++pmap_pvo_enter_depth > 1)
1568 panic("pmap_pvo_enter: called recursively!");
1569 #endif
1570
1571 /*
1572 * Remove any existing mapping for this page. Reuse the
1573 * pvo entry if there a mapping.
1574 */
1575 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) {
1576 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) {
1577 #ifdef DEBUG
1578 if ((pmapdebug & PMAPDEBUG_PVOENTER) &&
1579 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) &
1580 ~(PTE_REF|PTE_CHG)) == 0 &&
1581 va < VM_MIN_KERNEL_ADDRESS) {
1582 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n",
1583 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa);
1584 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n",
1585 pvo->pvo_pte.pte_hi,
1586 pm->pm_sr[va >> ADDR_SR_SHFT]);
1587 pmap_pte_print(pmap_pvo_to_pte(pvo, -1));
1588 #ifdef DDBX
1589 Debugger();
1590 #endif
1591 }
1592 #endif
1593 PMAPCOUNT(mappings_replaced);
1594 pmap_pvo_remove(pvo, -1, NULL);
1595 break;
1596 }
1597 }
1598
1599 /*
1600 * If we aren't overwriting an mapping, try to allocate
1601 */
1602 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
1603 --pmap_pvo_enter_depth;
1604 #endif
1605 pmap_interrupts_restore(msr);
1606 if (pvo) {
1607 KASSERT(pmap_pvo_pl(pvo) == pl);
1608 } else {
1609 pvo = pool_get(pl, poolflags);
1610 }
1611 KASSERT((vaddr_t)pvo < VM_MIN_KERNEL_ADDRESS);
1612
1613 #ifdef DEBUG
1614 /*
1615 * Exercise pmap_pvo_reclaim() a little.
1616 */
1617 if (pvo && (flags & PMAP_CANFAIL) != 0 &&
1618 pmap_pvo_reclaim_debugctr++ > 0x1000 &&
1619 (pmap_pvo_reclaim_debugctr & 0xff) == 0) {
1620 pool_put(pl, pvo);
1621 pvo = NULL;
1622 }
1623 #endif
1624
1625 msr = pmap_interrupts_off();
1626 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
1627 ++pmap_pvo_enter_depth;
1628 #endif
1629 if (pvo == NULL) {
1630 pvo = pmap_pvo_reclaim(pm);
1631 if (pvo == NULL) {
1632 if ((flags & PMAP_CANFAIL) == 0)
1633 panic("pmap_pvo_enter: failed");
1634 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
1635 pmap_pvo_enter_depth--;
1636 #endif
1637 PMAPCOUNT(pvos_failed);
1638 pmap_interrupts_restore(msr);
1639 return ENOMEM;
1640 }
1641 }
1642
1643 pvo->pvo_vaddr = va;
1644 pvo->pvo_pmap = pm;
1645 pvo->pvo_vaddr &= ~ADDR_POFF;
1646 if (flags & VM_PROT_EXECUTE) {
1647 PMAPCOUNT(exec_mappings);
1648 pvo_set_exec(pvo);
1649 }
1650 if (flags & PMAP_WIRED)
1651 pvo->pvo_vaddr |= PVO_WIRED;
1652 if (pvo_head != &pmap_pvo_kunmanaged) {
1653 pvo->pvo_vaddr |= PVO_MANAGED;
1654 PMAPCOUNT(mappings);
1655 } else {
1656 PMAPCOUNT(kernel_mappings);
1657 }
1658 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo);
1659
1660 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink);
1661 if (PVO_WIRED_P(pvo))
1662 pvo->pvo_pmap->pm_stats.wired_count++;
1663 pvo->pvo_pmap->pm_stats.resident_count++;
1664 #if defined(DEBUG)
1665 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */
1666 DPRINTFN(PVOENTER,
1667 "pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n",
1668 pvo, pm, va, pa);
1669 #endif
1670
1671 /*
1672 * We hope this succeeds but it isn't required.
1673 */
1674 pvoh = &pmap_pvo_table[ptegidx];
1675 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte);
1676 if (i >= 0) {
1677 PVO_PTEGIDX_SET(pvo, i);
1678 PVO_WHERE(pvo, ENTER_INSERT);
1679 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID)
1680 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]);
1681 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink);
1682
1683 } else {
1684 /*
1685 * Since we didn't have room for this entry (which makes it
1686 * and evicted entry), place it at the head of the list.
1687 */
1688 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink);
1689 PMAPCOUNT(ptes_evicted);
1690 pm->pm_evictions++;
1691 /*
1692 * If this is a kernel page, make sure it's active.
1693 */
1694 if (pm == pmap_kernel()) {
1695 i = pmap_pte_spill(pm, va, false);
1696 KASSERT(i);
1697 }
1698 }
1699 PMAP_PVO_CHECK(pvo); /* sanity check */
1700 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
1701 pmap_pvo_enter_depth--;
1702 #endif
1703 pmap_interrupts_restore(msr);
1704 return 0;
1705 }
1706
1707 static void
1708 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol)
1709 {
1710 volatile struct pte *pt;
1711 int ptegidx;
1712
1713 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
1714 if (++pmap_pvo_remove_depth > 1)
1715 panic("pmap_pvo_remove: called recursively!");
1716 #endif
1717
1718 /*
1719 * If we haven't been supplied the ptegidx, calculate it.
1720 */
1721 if (pteidx == -1) {
1722 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr);
1723 pteidx = pmap_pvo_pte_index(pvo, ptegidx);
1724 } else {
1725 ptegidx = pteidx >> 3;
1726 if (pvo->pvo_pte.pte_hi & PTE_HID)
1727 ptegidx ^= pmap_pteg_mask;
1728 }
1729 PMAP_PVO_CHECK(pvo); /* sanity check */
1730
1731 /*
1732 * If there is an active pte entry, we need to deactivate it
1733 * (and save the ref & chg bits).
1734 */
1735 pt = pmap_pvo_to_pte(pvo, pteidx);
1736 if (pt != NULL) {
1737 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1738 PVO_WHERE(pvo, REMOVE);
1739 PVO_PTEGIDX_CLR(pvo);
1740 PMAPCOUNT(ptes_removed);
1741 } else {
1742 KASSERT(pvo->pvo_pmap->pm_evictions > 0);
1743 pvo->pvo_pmap->pm_evictions--;
1744 }
1745
1746 /*
1747 * Account for executable mappings.
1748 */
1749 if (PVO_EXECUTABLE_P(pvo))
1750 pvo_clear_exec(pvo);
1751
1752 /*
1753 * Update our statistics.
1754 */
1755 pvo->pvo_pmap->pm_stats.resident_count--;
1756 if (PVO_WIRED_P(pvo))
1757 pvo->pvo_pmap->pm_stats.wired_count--;
1758
1759 /*
1760 * Save the REF/CHG bits into their cache if the page is managed.
1761 */
1762 if (PVO_MANAGED_P(pvo)) {
1763 register_t ptelo = pvo->pvo_pte.pte_lo;
1764 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN);
1765
1766 if (pg != NULL) {
1767 /*
1768 * If this page was changed and it is mapped exec,
1769 * invalidate it.
1770 */
1771 if ((ptelo & PTE_CHG) &&
1772 (pmap_attr_fetch(pg) & PTE_EXEC)) {
1773 struct pvo_head *pvoh = vm_page_to_pvoh(pg);
1774 if (LIST_EMPTY(pvoh)) {
1775 DPRINTFN(EXEC, "[pmap_pvo_remove: "
1776 "%#" _PRIxpa ": clear-exec]\n",
1777 VM_PAGE_TO_PHYS(pg));
1778 pmap_attr_clear(pg, PTE_EXEC);
1779 PMAPCOUNT(exec_uncached_pvo_remove);
1780 } else {
1781 DPRINTFN(EXEC, "[pmap_pvo_remove: "
1782 "%#" _PRIxpa ": syncicache]\n",
1783 VM_PAGE_TO_PHYS(pg));
1784 pmap_syncicache(VM_PAGE_TO_PHYS(pg),
1785 PAGE_SIZE);
1786 PMAPCOUNT(exec_synced_pvo_remove);
1787 }
1788 }
1789
1790 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG));
1791 }
1792 PMAPCOUNT(unmappings);
1793 } else {
1794 PMAPCOUNT(kernel_unmappings);
1795 }
1796
1797 /*
1798 * Remove the PVO from its lists and return it to the pool.
1799 */
1800 LIST_REMOVE(pvo, pvo_vlink);
1801 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink);
1802 if (pvol) {
1803 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink);
1804 }
1805 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
1806 pmap_pvo_remove_depth--;
1807 #endif
1808 }
1809
1810 void
1811 pmap_pvo_free(struct pvo_entry *pvo)
1812 {
1813
1814 pool_put(pmap_pvo_pl(pvo), pvo);
1815 }
1816
1817 void
1818 pmap_pvo_free_list(struct pvo_head *pvol)
1819 {
1820 struct pvo_entry *pvo, *npvo;
1821
1822 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) {
1823 npvo = LIST_NEXT(pvo, pvo_vlink);
1824 LIST_REMOVE(pvo, pvo_vlink);
1825 pmap_pvo_free(pvo);
1826 }
1827 }
1828
1829 /*
1830 * Mark a mapping as executable.
1831 * If this is the first executable mapping in the segment,
1832 * clear the noexec flag.
1833 */
1834 static void
1835 pvo_set_exec(struct pvo_entry *pvo)
1836 {
1837 struct pmap *pm = pvo->pvo_pmap;
1838
1839 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) {
1840 return;
1841 }
1842 pvo->pvo_vaddr |= PVO_EXECUTABLE;
1843 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE)
1844 {
1845 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT;
1846 if (pm->pm_exec[sr]++ == 0) {
1847 pm->pm_sr[sr] &= ~SR_NOEXEC;
1848 }
1849 }
1850 #endif
1851 }
1852
1853 /*
1854 * Mark a mapping as non-executable.
1855 * If this was the last executable mapping in the segment,
1856 * set the noexec flag.
1857 */
1858 static void
1859 pvo_clear_exec(struct pvo_entry *pvo)
1860 {
1861 struct pmap *pm = pvo->pvo_pmap;
1862
1863 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) {
1864 return;
1865 }
1866 pvo->pvo_vaddr &= ~PVO_EXECUTABLE;
1867 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE)
1868 {
1869 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT;
1870 if (--pm->pm_exec[sr] == 0) {
1871 pm->pm_sr[sr] |= SR_NOEXEC;
1872 }
1873 }
1874 #endif
1875 }
1876
1877 /*
1878 * Insert physical page at pa into the given pmap at virtual address va.
1879 */
1880 int
1881 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags)
1882 {
1883 struct mem_region *mp;
1884 struct pvo_head *pvo_head;
1885 struct vm_page *pg;
1886 struct pool *pl;
1887 register_t pte_lo;
1888 int error;
1889 u_int was_exec = 0;
1890
1891 PMAP_LOCK();
1892
1893 if (__predict_false(!pmap_initialized)) {
1894 pvo_head = &pmap_pvo_kunmanaged;
1895 pl = &pmap_upvo_pool;
1896 pg = NULL;
1897 was_exec = PTE_EXEC;
1898 } else {
1899 pvo_head = pa_to_pvoh(pa, &pg);
1900 pl = &pmap_mpvo_pool;
1901 }
1902
1903 DPRINTFN(ENTER,
1904 "pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):",
1905 pm, va, pa, prot, flags);
1906
1907 /*
1908 * If this is a managed page, and it's the first reference to the
1909 * page clear the execness of the page. Otherwise fetch the execness.
1910 */
1911 if (pg != NULL)
1912 was_exec = pmap_attr_fetch(pg) & PTE_EXEC;
1913
1914 DPRINTFN(ENTER, " was_exec=%d", was_exec);
1915
1916 /*
1917 * Assume the page is cache inhibited and access is guarded unless
1918 * it's in our available memory array. If it is in the memory array,
1919 * asssume it's in memory coherent memory.
1920 */
1921 if (flags & PMAP_MD_PREFETCHABLE) {
1922 pte_lo = 0;
1923 } else
1924 pte_lo = PTE_G;
1925
1926 if ((flags & PMAP_NOCACHE) == 0) {
1927 for (mp = mem; mp->size; mp++) {
1928 if (pa >= mp->start && pa < mp->start + mp->size) {
1929 pte_lo = PTE_M;
1930 break;
1931 }
1932 }
1933 #ifdef MULTIPROCESSOR
1934 if (((mfpvr() >> 16) & 0xffff) == MPC603e)
1935 pte_lo = PTE_M;
1936 #endif
1937 } else {
1938 pte_lo |= PTE_I;
1939 }
1940
1941 if (prot & VM_PROT_WRITE)
1942 pte_lo |= PTE_BW;
1943 else
1944 pte_lo |= PTE_BR;
1945
1946 /*
1947 * If this was in response to a fault, "pre-fault" the PTE's
1948 * changed/referenced bit appropriately.
1949 */
1950 if (flags & VM_PROT_WRITE)
1951 pte_lo |= PTE_CHG;
1952 if (flags & VM_PROT_ALL)
1953 pte_lo |= PTE_REF;
1954
1955 /*
1956 * We need to know if this page can be executable
1957 */
1958 flags |= (prot & VM_PROT_EXECUTE);
1959
1960 /*
1961 * Record mapping for later back-translation and pte spilling.
1962 * This will overwrite any existing mapping.
1963 */
1964 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags);
1965
1966 /*
1967 * Flush the real page from the instruction cache if this page is
1968 * mapped executable and cacheable and has not been flushed since
1969 * the last time it was modified.
1970 */
1971 if (error == 0 &&
1972 (flags & VM_PROT_EXECUTE) &&
1973 (pte_lo & PTE_I) == 0 &&
1974 was_exec == 0) {
1975 DPRINTFN(ENTER, " %s", "syncicache");
1976 PMAPCOUNT(exec_synced);
1977 pmap_syncicache(pa, PAGE_SIZE);
1978 if (pg != NULL) {
1979 pmap_attr_save(pg, PTE_EXEC);
1980 PMAPCOUNT(exec_cached);
1981 #if defined(DEBUG) || defined(PMAPDEBUG)
1982 if (pmapdebug & PMAPDEBUG_ENTER)
1983 printf(" marked-as-exec");
1984 else if (pmapdebug & PMAPDEBUG_EXEC)
1985 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n",
1986 VM_PAGE_TO_PHYS(pg));
1987
1988 #endif
1989 }
1990 }
1991
1992 DPRINTFN(ENTER, ": error=%d\n", error);
1993
1994 PMAP_UNLOCK();
1995
1996 return error;
1997 }
1998
1999 void
2000 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags)
2001 {
2002 struct mem_region *mp;
2003 register_t pte_lo;
2004 int error;
2005
2006 #if defined (PMAP_OEA64_BRIDGE) || defined (PMAP_OEA)
2007 if (va < VM_MIN_KERNEL_ADDRESS)
2008 panic("pmap_kenter_pa: attempt to enter "
2009 "non-kernel address %#" _PRIxva "!", va);
2010 #endif
2011
2012 DPRINTFN(KENTER,
2013 "pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot);
2014
2015 PMAP_LOCK();
2016
2017 /*
2018 * Assume the page is cache inhibited and access is guarded unless
2019 * it's in our available memory array. If it is in the memory array,
2020 * asssume it's in memory coherent memory.
2021 */
2022 pte_lo = PTE_IG;
2023 if ((flags & PMAP_NOCACHE) == 0) {
2024 for (mp = mem; mp->size; mp++) {
2025 if (pa >= mp->start && pa < mp->start + mp->size) {
2026 pte_lo = PTE_M;
2027 break;
2028 }
2029 }
2030 #ifdef MULTIPROCESSOR
2031 if (((mfpvr() >> 16) & 0xffff) == MPC603e)
2032 pte_lo = PTE_M;
2033 #endif
2034 }
2035
2036 if (prot & VM_PROT_WRITE)
2037 pte_lo |= PTE_BW;
2038 else
2039 pte_lo |= PTE_BR;
2040
2041 /*
2042 * We don't care about REF/CHG on PVOs on the unmanaged list.
2043 */
2044 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool,
2045 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED);
2046
2047 if (error != 0)
2048 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d",
2049 va, pa, error);
2050
2051 PMAP_UNLOCK();
2052 }
2053
2054 void
2055 pmap_kremove(vaddr_t va, vsize_t len)
2056 {
2057 if (va < VM_MIN_KERNEL_ADDRESS)
2058 panic("pmap_kremove: attempt to remove "
2059 "non-kernel address %#" _PRIxva "!", va);
2060
2061 DPRINTFN(KREMOVE, "pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len);
2062 pmap_remove(pmap_kernel(), va, va + len);
2063 }
2064
2065 /*
2066 * Remove the given range of mapping entries.
2067 */
2068 void
2069 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva)
2070 {
2071 struct pvo_head pvol;
2072 struct pvo_entry *pvo;
2073 register_t msr;
2074 int pteidx;
2075
2076 PMAP_LOCK();
2077 LIST_INIT(&pvol);
2078 msr = pmap_interrupts_off();
2079 for (; va < endva; va += PAGE_SIZE) {
2080 pvo = pmap_pvo_find_va(pm, va, &pteidx);
2081 if (pvo != NULL) {
2082 pmap_pvo_remove(pvo, pteidx, &pvol);
2083 }
2084 }
2085 pmap_interrupts_restore(msr);
2086 pmap_pvo_free_list(&pvol);
2087 PMAP_UNLOCK();
2088 }
2089
2090 #if defined(PMAP_OEA)
2091 #ifdef PPC_OEA601
2092 bool
2093 pmap_extract_ioseg601(vaddr_t va, paddr_t *pap)
2094 {
2095 if ((MFPVR() >> 16) != MPC601)
2096 return false;
2097
2098 const register_t sr = iosrtable[va >> ADDR_SR_SHFT];
2099
2100 if (SR601_VALID_P(sr) && SR601_PA_MATCH_P(sr, va)) {
2101 if (pap)
2102 *pap = va;
2103 return true;
2104 }
2105 return false;
2106 }
2107
2108 static bool
2109 pmap_extract_battable601(vaddr_t va, paddr_t *pap)
2110 {
2111 const register_t batu = battable[va >> 23].batu;
2112 const register_t batl = battable[va >> 23].batl;
2113
2114 if (BAT601_VALID_P(batl) && BAT601_VA_MATCH_P(batu, batl, va)) {
2115 const register_t mask =
2116 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL;
2117 if (pap)
2118 *pap = (batl & mask) | (va & ~mask);
2119 return true;
2120 }
2121 return false;
2122 }
2123 #endif /* PPC_OEA601 */
2124
2125 bool
2126 pmap_extract_battable(vaddr_t va, paddr_t *pap)
2127 {
2128 #ifdef PPC_OEA601
2129 if ((MFPVR() >> 16) == MPC601)
2130 return pmap_extract_battable601(va, pap);
2131 #endif /* PPC_OEA601 */
2132
2133 if (oeacpufeat & OEACPU_NOBAT)
2134 return false;
2135
2136 const register_t batu = battable[BAT_VA2IDX(va)].batu;
2137
2138 if (BAT_VALID_P(batu, 0) && BAT_VA_MATCH_P(batu, va)) {
2139 const register_t batl = battable[BAT_VA2IDX(va)].batl;
2140 const register_t mask =
2141 (~(batu & (BAT_XBL|BAT_BL)) << 15) & ~0x1ffffL;
2142 if (pap)
2143 *pap = (batl & mask) | (va & ~mask);
2144 return true;
2145 }
2146 return false;
2147 }
2148 #endif /* PMAP_OEA */
2149
2150 /*
2151 * Get the physical page address for the given pmap/virtual address.
2152 */
2153 bool
2154 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap)
2155 {
2156 struct pvo_entry *pvo;
2157 register_t msr;
2158
2159 PMAP_LOCK();
2160
2161 /*
2162 * If this is the kernel pmap, check the battable and I/O
2163 * segments for a hit. This is done only for regions outside
2164 * VM_MIN_KERNEL_ADDRESS-VM_MAX_KERNEL_ADDRESS.
2165 *
2166 * Be careful when checking VM_MAX_KERNEL_ADDRESS; you don't
2167 * want to wrap around to 0.
2168 */
2169 if (pm == pmap_kernel() &&
2170 (va < VM_MIN_KERNEL_ADDRESS ||
2171 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) {
2172 KASSERT((va >> ADDR_SR_SHFT) != USER_SR);
2173 #if defined(PMAP_OEA)
2174 #ifdef PPC_OEA601
2175 if (pmap_extract_ioseg601(va, pap)) {
2176 PMAP_UNLOCK();
2177 return true;
2178 }
2179 #endif /* PPC_OEA601 */
2180 if (pmap_extract_battable(va, pap)) {
2181 PMAP_UNLOCK();
2182 return true;
2183 }
2184 /*
2185 * We still check the HTAB...
2186 */
2187 #elif defined(PMAP_OEA64_BRIDGE)
2188 if (va < SEGMENT_LENGTH) {
2189 if (pap)
2190 *pap = va;
2191 PMAP_UNLOCK();
2192 return true;
2193 }
2194 /*
2195 * We still check the HTAB...
2196 */
2197 #elif defined(PMAP_OEA64)
2198 #error PPC_OEA64 not supported
2199 #endif /* PPC_OEA */
2200 }
2201
2202 msr = pmap_interrupts_off();
2203 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL);
2204 if (pvo != NULL) {
2205 PMAP_PVO_CHECK(pvo); /* sanity check */
2206 if (pap)
2207 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN)
2208 | (va & ADDR_POFF);
2209 }
2210 pmap_interrupts_restore(msr);
2211 PMAP_UNLOCK();
2212 return pvo != NULL;
2213 }
2214
2215 /*
2216 * Lower the protection on the specified range of this pmap.
2217 */
2218 void
2219 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot)
2220 {
2221 struct pvo_entry *pvo;
2222 volatile struct pte *pt;
2223 register_t msr;
2224 int pteidx;
2225
2226 /*
2227 * Since this routine only downgrades protection, we should
2228 * always be called with at least one bit not set.
2229 */
2230 KASSERT(prot != VM_PROT_ALL);
2231
2232 /*
2233 * If there is no protection, this is equivalent to
2234 * remove the pmap from the pmap.
2235 */
2236 if ((prot & VM_PROT_READ) == 0) {
2237 pmap_remove(pm, va, endva);
2238 return;
2239 }
2240
2241 PMAP_LOCK();
2242
2243 msr = pmap_interrupts_off();
2244 for (; va < endva; va += PAGE_SIZE) {
2245 pvo = pmap_pvo_find_va(pm, va, &pteidx);
2246 if (pvo == NULL)
2247 continue;
2248 PMAP_PVO_CHECK(pvo); /* sanity check */
2249
2250 /*
2251 * Revoke executable if asked to do so.
2252 */
2253 if ((prot & VM_PROT_EXECUTE) == 0)
2254 pvo_clear_exec(pvo);
2255
2256 #if 0
2257 /*
2258 * If the page is already read-only, no change
2259 * needs to be made.
2260 */
2261 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR)
2262 continue;
2263 #endif
2264 /*
2265 * Grab the PTE pointer before we diddle with
2266 * the cached PTE copy.
2267 */
2268 pt = pmap_pvo_to_pte(pvo, pteidx);
2269 /*
2270 * Change the protection of the page.
2271 */
2272 pvo->pvo_pte.pte_lo &= ~PTE_PP;
2273 pvo->pvo_pte.pte_lo |= PTE_BR;
2274
2275 /*
2276 * If the PVO is in the page table, update
2277 * that pte at well.
2278 */
2279 if (pt != NULL) {
2280 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
2281 PVO_WHERE(pvo, PMAP_PROTECT);
2282 PMAPCOUNT(ptes_changed);
2283 }
2284
2285 PMAP_PVO_CHECK(pvo); /* sanity check */
2286 }
2287 pmap_interrupts_restore(msr);
2288 PMAP_UNLOCK();
2289 }
2290
2291 void
2292 pmap_unwire(pmap_t pm, vaddr_t va)
2293 {
2294 struct pvo_entry *pvo;
2295 register_t msr;
2296
2297 PMAP_LOCK();
2298 msr = pmap_interrupts_off();
2299 pvo = pmap_pvo_find_va(pm, va, NULL);
2300 if (pvo != NULL) {
2301 if (PVO_WIRED_P(pvo)) {
2302 pvo->pvo_vaddr &= ~PVO_WIRED;
2303 pm->pm_stats.wired_count--;
2304 }
2305 PMAP_PVO_CHECK(pvo); /* sanity check */
2306 }
2307 pmap_interrupts_restore(msr);
2308 PMAP_UNLOCK();
2309 }
2310
2311 /*
2312 * Lower the protection on the specified physical page.
2313 */
2314 void
2315 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
2316 {
2317 struct pvo_head *pvo_head, pvol;
2318 struct pvo_entry *pvo, *next_pvo;
2319 volatile struct pte *pt;
2320 register_t msr;
2321
2322 PMAP_LOCK();
2323
2324 KASSERT(prot != VM_PROT_ALL);
2325 LIST_INIT(&pvol);
2326 msr = pmap_interrupts_off();
2327
2328 /*
2329 * When UVM reuses a page, it does a pmap_page_protect with
2330 * VM_PROT_NONE. At that point, we can clear the exec flag
2331 * since we know the page will have different contents.
2332 */
2333 if ((prot & VM_PROT_READ) == 0) {
2334 DPRINTFN(EXEC, "[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n",
2335 VM_PAGE_TO_PHYS(pg));
2336 if (pmap_attr_fetch(pg) & PTE_EXEC) {
2337 PMAPCOUNT(exec_uncached_page_protect);
2338 pmap_attr_clear(pg, PTE_EXEC);
2339 }
2340 }
2341
2342 pvo_head = vm_page_to_pvoh(pg);
2343 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) {
2344 next_pvo = LIST_NEXT(pvo, pvo_vlink);
2345 PMAP_PVO_CHECK(pvo); /* sanity check */
2346
2347 /*
2348 * Downgrading to no mapping at all, we just remove the entry.
2349 */
2350 if ((prot & VM_PROT_READ) == 0) {
2351 pmap_pvo_remove(pvo, -1, &pvol);
2352 continue;
2353 }
2354
2355 /*
2356 * If EXEC permission is being revoked, just clear the
2357 * flag in the PVO.
2358 */
2359 if ((prot & VM_PROT_EXECUTE) == 0)
2360 pvo_clear_exec(pvo);
2361
2362 /*
2363 * If this entry is already RO, don't diddle with the
2364 * page table.
2365 */
2366 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) {
2367 PMAP_PVO_CHECK(pvo);
2368 continue;
2369 }
2370
2371 /*
2372 * Grab the PTE before the we diddle the bits so
2373 * pvo_to_pte can verify the pte contents are as
2374 * expected.
2375 */
2376 pt = pmap_pvo_to_pte(pvo, -1);
2377 pvo->pvo_pte.pte_lo &= ~PTE_PP;
2378 pvo->pvo_pte.pte_lo |= PTE_BR;
2379 if (pt != NULL) {
2380 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
2381 PVO_WHERE(pvo, PMAP_PAGE_PROTECT);
2382 PMAPCOUNT(ptes_changed);
2383 }
2384 PMAP_PVO_CHECK(pvo); /* sanity check */
2385 }
2386 pmap_interrupts_restore(msr);
2387 pmap_pvo_free_list(&pvol);
2388
2389 PMAP_UNLOCK();
2390 }
2391
2392 /*
2393 * Activate the address space for the specified process. If the process
2394 * is the current process, load the new MMU context.
2395 */
2396 void
2397 pmap_activate(struct lwp *l)
2398 {
2399 struct pcb *pcb = lwp_getpcb(l);
2400 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap;
2401
2402 DPRINTFN(ACTIVATE,
2403 "pmap_activate: lwp %p (curlwp %p)\n", l, curlwp);
2404
2405 /*
2406 * XXX Normally performed in cpu_lwp_fork().
2407 */
2408 pcb->pcb_pm = pmap;
2409
2410 /*
2411 * In theory, the SR registers need only be valid on return
2412 * to user space wait to do them there.
2413 */
2414 if (l == curlwp) {
2415 /* Store pointer to new current pmap. */
2416 curpm = pmap;
2417 }
2418 }
2419
2420 /*
2421 * Deactivate the specified process's address space.
2422 */
2423 void
2424 pmap_deactivate(struct lwp *l)
2425 {
2426 }
2427
2428 bool
2429 pmap_query_bit(struct vm_page *pg, int ptebit)
2430 {
2431 struct pvo_entry *pvo;
2432 volatile struct pte *pt;
2433 register_t msr;
2434
2435 PMAP_LOCK();
2436
2437 if (pmap_attr_fetch(pg) & ptebit) {
2438 PMAP_UNLOCK();
2439 return true;
2440 }
2441
2442 msr = pmap_interrupts_off();
2443 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) {
2444 PMAP_PVO_CHECK(pvo); /* sanity check */
2445 /*
2446 * See if we saved the bit off. If so cache, it and return
2447 * success.
2448 */
2449 if (pvo->pvo_pte.pte_lo & ptebit) {
2450 pmap_attr_save(pg, ptebit);
2451 PMAP_PVO_CHECK(pvo); /* sanity check */
2452 pmap_interrupts_restore(msr);
2453 PMAP_UNLOCK();
2454 return true;
2455 }
2456 }
2457 /*
2458 * No luck, now go thru the hard part of looking at the ptes
2459 * themselves. Sync so any pending REF/CHG bits are flushed
2460 * to the PTEs.
2461 */
2462 SYNC();
2463 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) {
2464 PMAP_PVO_CHECK(pvo); /* sanity check */
2465 /*
2466 * See if this pvo have a valid PTE. If so, fetch the
2467 * REF/CHG bits from the valid PTE. If the appropriate
2468 * ptebit is set, cache, it and return success.
2469 */
2470 pt = pmap_pvo_to_pte(pvo, -1);
2471 if (pt != NULL) {
2472 pmap_pte_synch(pt, &pvo->pvo_pte);
2473 if (pvo->pvo_pte.pte_lo & ptebit) {
2474 pmap_attr_save(pg, ptebit);
2475 PMAP_PVO_CHECK(pvo); /* sanity check */
2476 pmap_interrupts_restore(msr);
2477 PMAP_UNLOCK();
2478 return true;
2479 }
2480 }
2481 }
2482 pmap_interrupts_restore(msr);
2483 PMAP_UNLOCK();
2484 return false;
2485 }
2486
2487 bool
2488 pmap_clear_bit(struct vm_page *pg, int ptebit)
2489 {
2490 struct pvo_head *pvoh = vm_page_to_pvoh(pg);
2491 struct pvo_entry *pvo;
2492 volatile struct pte *pt;
2493 register_t msr;
2494 int rv = 0;
2495
2496 PMAP_LOCK();
2497 msr = pmap_interrupts_off();
2498
2499 /*
2500 * Fetch the cache value
2501 */
2502 rv |= pmap_attr_fetch(pg);
2503
2504 /*
2505 * Clear the cached value.
2506 */
2507 pmap_attr_clear(pg, ptebit);
2508
2509 /*
2510 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we
2511 * can reset the right ones). Note that since the pvo entries and
2512 * list heads are accessed via BAT0 and are never placed in the
2513 * page table, we don't have to worry about further accesses setting
2514 * the REF/CHG bits.
2515 */
2516 SYNC();
2517
2518 /*
2519 * For each pvo entry, clear pvo's ptebit. If this pvo have a
2520 * valid PTE. If so, clear the ptebit from the valid PTE.
2521 */
2522 LIST_FOREACH(pvo, pvoh, pvo_vlink) {
2523 PMAP_PVO_CHECK(pvo); /* sanity check */
2524 pt = pmap_pvo_to_pte(pvo, -1);
2525 if (pt != NULL) {
2526 /*
2527 * Only sync the PTE if the bit we are looking
2528 * for is not already set.
2529 */
2530 if ((pvo->pvo_pte.pte_lo & ptebit) == 0)
2531 pmap_pte_synch(pt, &pvo->pvo_pte);
2532 /*
2533 * If the bit we are looking for was already set,
2534 * clear that bit in the pte.
2535 */
2536 if (pvo->pvo_pte.pte_lo & ptebit)
2537 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit);
2538 }
2539 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF);
2540 pvo->pvo_pte.pte_lo &= ~ptebit;
2541 PMAP_PVO_CHECK(pvo); /* sanity check */
2542 }
2543 pmap_interrupts_restore(msr);
2544
2545 /*
2546 * If we are clearing the modify bit and this page was marked EXEC
2547 * and the user of the page thinks the page was modified, then we
2548 * need to clean it from the icache if it's mapped or clear the EXEC
2549 * bit if it's not mapped. The page itself might not have the CHG
2550 * bit set if the modification was done via DMA to the page.
2551 */
2552 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) {
2553 if (LIST_EMPTY(pvoh)) {
2554 DPRINTFN(EXEC, "[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n",
2555 VM_PAGE_TO_PHYS(pg));
2556 pmap_attr_clear(pg, PTE_EXEC);
2557 PMAPCOUNT(exec_uncached_clear_modify);
2558 } else {
2559 DPRINTFN(EXEC, "[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n",
2560 VM_PAGE_TO_PHYS(pg));
2561 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE);
2562 PMAPCOUNT(exec_synced_clear_modify);
2563 }
2564 }
2565 PMAP_UNLOCK();
2566 return (rv & ptebit) != 0;
2567 }
2568
2569 void
2570 pmap_procwr(struct proc *p, vaddr_t va, size_t len)
2571 {
2572 struct pvo_entry *pvo;
2573 size_t offset = va & ADDR_POFF;
2574 int s;
2575
2576 PMAP_LOCK();
2577 s = splvm();
2578 while (len > 0) {
2579 size_t seglen = PAGE_SIZE - offset;
2580 if (seglen > len)
2581 seglen = len;
2582 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL);
2583 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) {
2584 pmap_syncicache(
2585 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen);
2586 PMAP_PVO_CHECK(pvo);
2587 }
2588 va += seglen;
2589 len -= seglen;
2590 offset = 0;
2591 }
2592 splx(s);
2593 PMAP_UNLOCK();
2594 }
2595
2596 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB)
2597 void
2598 pmap_pte_print(volatile struct pte *pt)
2599 {
2600 printf("PTE %p: ", pt);
2601
2602 #if defined(PMAP_OEA)
2603 /* High word: */
2604 printf("%#" _PRIxpte ": [", pt->pte_hi);
2605 #else
2606 printf("%#" _PRIxpte ": [", pt->pte_hi);
2607 #endif /* PMAP_OEA */
2608
2609 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i');
2610 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-');
2611
2612 printf("%#" _PRIxpte " %#" _PRIxpte "",
2613 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT,
2614 pt->pte_hi & PTE_API);
2615 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE)
2616 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt));
2617 #else
2618 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt));
2619 #endif /* PMAP_OEA */
2620
2621 /* Low word: */
2622 #if defined (PMAP_OEA)
2623 printf(" %#" _PRIxpte ": [", pt->pte_lo);
2624 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12);
2625 #else
2626 printf(" %#" _PRIxpte ": [", pt->pte_lo);
2627 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12);
2628 #endif
2629 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u');
2630 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n');
2631 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.');
2632 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.');
2633 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.');
2634 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.');
2635 switch (pt->pte_lo & PTE_PP) {
2636 case PTE_BR: printf("br]\n"); break;
2637 case PTE_BW: printf("bw]\n"); break;
2638 case PTE_SO: printf("so]\n"); break;
2639 case PTE_SW: printf("sw]\n"); break;
2640 }
2641 }
2642 #endif
2643
2644 #if defined(DDB)
2645 void
2646 pmap_pteg_check(void)
2647 {
2648 volatile struct pte *pt;
2649 int i;
2650 int ptegidx;
2651 u_int p_valid = 0;
2652 u_int s_valid = 0;
2653 u_int invalid = 0;
2654
2655 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) {
2656 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) {
2657 if (pt->pte_hi & PTE_VALID) {
2658 if (pt->pte_hi & PTE_HID)
2659 s_valid++;
2660 else
2661 {
2662 p_valid++;
2663 }
2664 } else
2665 invalid++;
2666 }
2667 }
2668 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n",
2669 p_valid, p_valid, s_valid, s_valid,
2670 invalid, invalid);
2671 }
2672
2673 void
2674 pmap_print_mmuregs(void)
2675 {
2676 int i;
2677 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE)
2678 u_int cpuvers;
2679 #endif
2680 #ifndef PMAP_OEA64
2681 vaddr_t addr;
2682 register_t soft_sr[16];
2683 #endif
2684 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE)
2685 struct bat soft_ibat[4];
2686 struct bat soft_dbat[4];
2687 #endif
2688 paddr_t sdr1;
2689
2690 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE)
2691 cpuvers = MFPVR() >> 16;
2692 #endif
2693 __asm volatile ("mfsdr1 %0" : "=r"(sdr1));
2694 #ifndef PMAP_OEA64
2695 addr = 0;
2696 for (i = 0; i < 16; i++) {
2697 soft_sr[i] = MFSRIN(addr);
2698 addr += (1 << ADDR_SR_SHFT);
2699 }
2700 #endif
2701
2702 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE)
2703 /* read iBAT (601: uBAT) registers */
2704 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu));
2705 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl));
2706 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu));
2707 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl));
2708 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu));
2709 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl));
2710 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu));
2711 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl));
2712
2713
2714 if (cpuvers != MPC601) {
2715 /* read dBAT registers */
2716 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu));
2717 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl));
2718 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu));
2719 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl));
2720 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu));
2721 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl));
2722 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu));
2723 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl));
2724 }
2725 #endif
2726
2727 printf("SDR1:\t%#" _PRIxpa "\n", sdr1);
2728 #ifndef PMAP_OEA64
2729 printf("SR[]:\t");
2730 for (i = 0; i < 4; i++)
2731 printf("0x%08lx, ", soft_sr[i]);
2732 printf("\n\t");
2733 for ( ; i < 8; i++)
2734 printf("0x%08lx, ", soft_sr[i]);
2735 printf("\n\t");
2736 for ( ; i < 12; i++)
2737 printf("0x%08lx, ", soft_sr[i]);
2738 printf("\n\t");
2739 for ( ; i < 16; i++)
2740 printf("0x%08lx, ", soft_sr[i]);
2741 printf("\n");
2742 #endif
2743
2744 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE)
2745 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i');
2746 for (i = 0; i < 4; i++) {
2747 printf("0x%08lx 0x%08lx, ",
2748 soft_ibat[i].batu, soft_ibat[i].batl);
2749 if (i == 1)
2750 printf("\n\t");
2751 }
2752 if (cpuvers != MPC601) {
2753 printf("\ndBAT[]:\t");
2754 for (i = 0; i < 4; i++) {
2755 printf("0x%08lx 0x%08lx, ",
2756 soft_dbat[i].batu, soft_dbat[i].batl);
2757 if (i == 1)
2758 printf("\n\t");
2759 }
2760 }
2761 printf("\n");
2762 #endif /* PMAP_OEA... */
2763 }
2764
2765 void
2766 pmap_print_pte(pmap_t pm, vaddr_t va)
2767 {
2768 struct pvo_entry *pvo;
2769 volatile struct pte *pt;
2770 int pteidx;
2771
2772 pvo = pmap_pvo_find_va(pm, va, &pteidx);
2773 if (pvo != NULL) {
2774 pt = pmap_pvo_to_pte(pvo, pteidx);
2775 if (pt != NULL) {
2776 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n",
2777 va, pt,
2778 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)",
2779 pt->pte_hi, pt->pte_lo);
2780 } else {
2781 printf("No valid PTE found\n");
2782 }
2783 } else {
2784 printf("Address not in pmap\n");
2785 }
2786 }
2787
2788 void
2789 pmap_pteg_dist(void)
2790 {
2791 struct pvo_entry *pvo;
2792 int ptegidx;
2793 int depth;
2794 int max_depth = 0;
2795 unsigned int depths[64];
2796
2797 memset(depths, 0, sizeof(depths));
2798 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) {
2799 depth = 0;
2800 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) {
2801 depth++;
2802 }
2803 if (depth > max_depth)
2804 max_depth = depth;
2805 if (depth > 63)
2806 depth = 63;
2807 depths[depth]++;
2808 }
2809
2810 for (depth = 0; depth < 64; depth++) {
2811 printf(" [%2d]: %8u", depth, depths[depth]);
2812 if ((depth & 3) == 3)
2813 printf("\n");
2814 if (depth == max_depth)
2815 break;
2816 }
2817 if ((depth & 3) != 3)
2818 printf("\n");
2819 printf("Max depth found was %d\n", max_depth);
2820 }
2821 #endif /* DEBUG */
2822
2823 #if defined(PMAPCHECK) || defined(DEBUG)
2824 void
2825 pmap_pvo_verify(void)
2826 {
2827 int ptegidx;
2828 int s;
2829
2830 s = splvm();
2831 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) {
2832 struct pvo_entry *pvo;
2833 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) {
2834 if ((uintptr_t) pvo >= SEGMENT_LENGTH)
2835 panic("pmap_pvo_verify: invalid pvo %p "
2836 "on list %#x", pvo, ptegidx);
2837 pmap_pvo_check(pvo);
2838 }
2839 }
2840 splx(s);
2841 }
2842 #endif /* PMAPCHECK */
2843
2844
2845 void *
2846 pmap_pool_ualloc(struct pool *pp, int flags)
2847 {
2848 struct pvo_page *pvop;
2849
2850 if (uvm.page_init_done != true) {
2851 return (void *) uvm_pageboot_alloc(PAGE_SIZE);
2852 }
2853
2854 PMAP_LOCK();
2855 pvop = SIMPLEQ_FIRST(&pmap_upvop_head);
2856 if (pvop != NULL) {
2857 pmap_upvop_free--;
2858 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link);
2859 PMAP_UNLOCK();
2860 return pvop;
2861 }
2862 PMAP_UNLOCK();
2863 return pmap_pool_malloc(pp, flags);
2864 }
2865
2866 void *
2867 pmap_pool_malloc(struct pool *pp, int flags)
2868 {
2869 struct pvo_page *pvop;
2870 struct vm_page *pg;
2871
2872 PMAP_LOCK();
2873 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head);
2874 if (pvop != NULL) {
2875 pmap_mpvop_free--;
2876 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link);
2877 PMAP_UNLOCK();
2878 return pvop;
2879 }
2880 PMAP_UNLOCK();
2881 again:
2882 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE,
2883 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256);
2884 if (__predict_false(pg == NULL)) {
2885 if (flags & PR_WAITOK) {
2886 uvm_wait("plpg");
2887 goto again;
2888 } else {
2889 return (0);
2890 }
2891 }
2892 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg));
2893 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg);
2894 }
2895
2896 void
2897 pmap_pool_ufree(struct pool *pp, void *va)
2898 {
2899 struct pvo_page *pvop;
2900 #if 0
2901 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) {
2902 pmap_pool_mfree(va, size, tag);
2903 return;
2904 }
2905 #endif
2906 PMAP_LOCK();
2907 pvop = va;
2908 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link);
2909 pmap_upvop_free++;
2910 if (pmap_upvop_free > pmap_upvop_maxfree)
2911 pmap_upvop_maxfree = pmap_upvop_free;
2912 PMAP_UNLOCK();
2913 }
2914
2915 void
2916 pmap_pool_mfree(struct pool *pp, void *va)
2917 {
2918 struct pvo_page *pvop;
2919
2920 PMAP_LOCK();
2921 pvop = va;
2922 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link);
2923 pmap_mpvop_free++;
2924 if (pmap_mpvop_free > pmap_mpvop_maxfree)
2925 pmap_mpvop_maxfree = pmap_mpvop_free;
2926 PMAP_UNLOCK();
2927 #if 0
2928 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va));
2929 #endif
2930 }
2931
2932 /*
2933 * This routine in bootstraping to steal to-be-managed memory (which will
2934 * then be unmanaged). We use it to grab from the first 256MB for our
2935 * pmap needs and above 256MB for other stuff.
2936 */
2937 vaddr_t
2938 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp)
2939 {
2940 vsize_t size;
2941 vaddr_t va;
2942 paddr_t start, end, pa = 0;
2943 int npgs, freelist;
2944 uvm_physseg_t bank;
2945
2946 if (uvm.page_init_done == true)
2947 panic("pmap_steal_memory: called _after_ bootstrap");
2948
2949 *vstartp = VM_MIN_KERNEL_ADDRESS;
2950 *vendp = VM_MAX_KERNEL_ADDRESS;
2951
2952 size = round_page(vsize);
2953 npgs = atop(size);
2954
2955 /*
2956 * PA 0 will never be among those given to UVM so we can use it
2957 * to indicate we couldn't steal any memory.
2958 */
2959
2960 for (bank = uvm_physseg_get_first();
2961 uvm_physseg_valid_p(bank);
2962 bank = uvm_physseg_get_next(bank)) {
2963
2964 freelist = uvm_physseg_get_free_list(bank);
2965 start = uvm_physseg_get_start(bank);
2966 end = uvm_physseg_get_end(bank);
2967
2968 if (freelist == VM_FREELIST_FIRST256 &&
2969 (end - start) >= npgs) {
2970 pa = ptoa(start);
2971 break;
2972 }
2973 }
2974
2975 if (pa == 0)
2976 panic("pmap_steal_memory: no approriate memory to steal!");
2977
2978 uvm_physseg_unplug(start, npgs);
2979
2980 va = (vaddr_t) pa;
2981 memset((void *) va, 0, size);
2982 pmap_pages_stolen += npgs;
2983 #ifdef DEBUG
2984 if (pmapdebug && npgs > 1) {
2985 u_int cnt = 0;
2986 for (bank = uvm_physseg_get_first();
2987 uvm_physseg_valid_p(bank);
2988 bank = uvm_physseg_get_next(bank)) {
2989 cnt += uvm_physseg_get_avail_end(bank) - uvm_physseg_get_avail_start(bank);
2990 }
2991 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n",
2992 npgs, pmap_pages_stolen, cnt);
2993 }
2994 #endif
2995
2996 return va;
2997 }
2998
2999 /*
3000 * Find a chuck of memory with right size and alignment.
3001 */
3002 paddr_t
3003 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end)
3004 {
3005 struct mem_region *mp;
3006 paddr_t s, e;
3007 int i, j;
3008
3009 size = round_page(size);
3010
3011 DPRINTFN(BOOT,
3012 "pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d",
3013 size, alignment, at_end);
3014
3015 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0)
3016 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa,
3017 alignment);
3018
3019 if (at_end) {
3020 if (alignment != PAGE_SIZE)
3021 panic("pmap_boot_find_memory: invalid ending "
3022 "alignment %#" _PRIxpa, alignment);
3023
3024 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) {
3025 s = mp->start + mp->size - size;
3026 if (s >= mp->start && mp->size >= size) {
3027 DPRINTFN(BOOT, ": %#" _PRIxpa "\n", s);
3028 DPRINTFN(BOOT,
3029 "pmap_boot_find_memory: b-avail[%d] start "
3030 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail,
3031 mp->start, mp->size);
3032 mp->size -= size;
3033 DPRINTFN(BOOT,
3034 "pmap_boot_find_memory: a-avail[%d] start "
3035 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail,
3036 mp->start, mp->size);
3037 return s;
3038 }
3039 }
3040 panic("pmap_boot_find_memory: no available memory");
3041 }
3042
3043 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) {
3044 s = (mp->start + alignment - 1) & ~(alignment-1);
3045 e = s + size;
3046
3047 /*
3048 * Is the calculated region entirely within the region?
3049 */
3050 if (s < mp->start || e > mp->start + mp->size)
3051 continue;
3052
3053 DPRINTFN(BOOT, ": %#" _PRIxpa "\n", s);
3054 if (s == mp->start) {
3055 /*
3056 * If the block starts at the beginning of region,
3057 * adjust the size & start. (the region may now be
3058 * zero in length)
3059 */
3060 DPRINTFN(BOOT,
3061 "pmap_boot_find_memory: b-avail[%d] start "
3062 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size);
3063 mp->start += size;
3064 mp->size -= size;
3065 DPRINTFN(BOOT,
3066 "pmap_boot_find_memory: a-avail[%d] start "
3067 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size);
3068 } else if (e == mp->start + mp->size) {
3069 /*
3070 * If the block starts at the beginning of region,
3071 * adjust only the size.
3072 */
3073 DPRINTFN(BOOT,
3074 "pmap_boot_find_memory: b-avail[%d] start "
3075 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size);
3076 mp->size -= size;
3077 DPRINTFN(BOOT,
3078 "pmap_boot_find_memory: a-avail[%d] start "
3079 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size);
3080 } else {
3081 /*
3082 * Block is in the middle of the region, so we
3083 * have to split it in two.
3084 */
3085 for (j = avail_cnt; j > i + 1; j--) {
3086 avail[j] = avail[j-1];
3087 }
3088 DPRINTFN(BOOT,
3089 "pmap_boot_find_memory: b-avail[%d] start "
3090 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size);
3091 mp[1].start = e;
3092 mp[1].size = mp[0].start + mp[0].size - e;
3093 mp[0].size = s - mp[0].start;
3094 avail_cnt++;
3095 for (; i < avail_cnt; i++) {
3096 DPRINTFN(BOOT,
3097 "pmap_boot_find_memory: a-avail[%d] "
3098 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i,
3099 avail[i].start, avail[i].size);
3100 }
3101 }
3102 KASSERT(s == (uintptr_t) s);
3103 return s;
3104 }
3105 panic("pmap_boot_find_memory: not enough memory for "
3106 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment);
3107 }
3108
3109 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */
3110 #if defined (PMAP_OEA64_BRIDGE)
3111 int
3112 pmap_setup_segment0_map(int use_large_pages, ...)
3113 {
3114 vaddr_t va, va_end;
3115
3116 register_t pte_lo = 0x0;
3117 int ptegidx = 0;
3118 struct pte pte;
3119 va_list ap;
3120
3121 /* Coherent + Supervisor RW, no user access */
3122 pte_lo = PTE_M;
3123
3124 /* XXXSL
3125 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later,
3126 * these have to take priority.
3127 */
3128 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) {
3129 ptegidx = va_to_pteg(pmap_kernel(), va);
3130 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo);
3131 (void)pmap_pte_insert(ptegidx, &pte);
3132 }
3133
3134 va_start(ap, use_large_pages);
3135 while (1) {
3136 paddr_t pa;
3137 size_t size;
3138
3139 va = va_arg(ap, vaddr_t);
3140
3141 if (va == 0)
3142 break;
3143
3144 pa = va_arg(ap, paddr_t);
3145 size = va_arg(ap, size_t);
3146
3147 for (va_end = va + size; va < va_end; va += 0x1000, pa += 0x1000) {
3148 #if 0
3149 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa);
3150 #endif
3151 ptegidx = va_to_pteg(pmap_kernel(), va);
3152 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo);
3153 (void)pmap_pte_insert(ptegidx, &pte);
3154 }
3155 }
3156 va_end(ap);
3157
3158 TLBSYNC();
3159 SYNC();
3160 return (0);
3161 }
3162 #endif /* PMAP_OEA64_BRIDGE */
3163
3164 /*
3165 * Set up the bottom level of the data structures necessary for the kernel
3166 * to manage memory. MMU hardware is programmed in pmap_bootstrap2().
3167 */
3168 void
3169 pmap_bootstrap1(paddr_t kernelstart, paddr_t kernelend)
3170 {
3171 struct mem_region *mp, tmp;
3172 paddr_t s, e;
3173 psize_t size;
3174 int i, j;
3175
3176 /*
3177 * Get memory.
3178 */
3179 mem_regions(&mem, &avail);
3180 #if defined(DEBUG)
3181 if (pmapdebug & PMAPDEBUG_BOOT) {
3182 printf("pmap_bootstrap: memory configuration:\n");
3183 for (mp = mem; mp->size; mp++) {
3184 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n",
3185 mp->start, mp->size);
3186 }
3187 for (mp = avail; mp->size; mp++) {
3188 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n",
3189 mp->start, mp->size);
3190 }
3191 }
3192 #endif
3193
3194 /*
3195 * Find out how much physical memory we have and in how many chunks.
3196 */
3197 for (mem_cnt = 0, mp = mem; mp->size; mp++) {
3198 if (mp->start >= pmap_memlimit)
3199 continue;
3200 if (mp->start + mp->size > pmap_memlimit) {
3201 size = pmap_memlimit - mp->start;
3202 physmem += btoc(size);
3203 } else {
3204 physmem += btoc(mp->size);
3205 }
3206 mem_cnt++;
3207 }
3208
3209 /*
3210 * Count the number of available entries.
3211 */
3212 for (avail_cnt = 0, mp = avail; mp->size; mp++)
3213 avail_cnt++;
3214
3215 /*
3216 * Page align all regions.
3217 */
3218 kernelstart = trunc_page(kernelstart);
3219 kernelend = round_page(kernelend);
3220 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) {
3221 s = round_page(mp->start);
3222 mp->size -= (s - mp->start);
3223 mp->size = trunc_page(mp->size);
3224 mp->start = s;
3225 e = mp->start + mp->size;
3226
3227 DPRINTFN(BOOT,
3228 "pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n",
3229 i, mp->start, mp->size);
3230
3231 /*
3232 * Don't allow the end to run beyond our artificial limit
3233 */
3234 if (e > pmap_memlimit)
3235 e = pmap_memlimit;
3236
3237 /*
3238 * Is this region empty or strange? skip it.
3239 */
3240 if (e <= s) {
3241 mp->start = 0;
3242 mp->size = 0;
3243 continue;
3244 }
3245
3246 /*
3247 * Does this overlap the beginning of kernel?
3248 * Does extend past the end of the kernel?
3249 */
3250 else if (s < kernelstart && e > kernelstart) {
3251 if (e > kernelend) {
3252 avail[avail_cnt].start = kernelend;
3253 avail[avail_cnt].size = e - kernelend;
3254 avail_cnt++;
3255 }
3256 mp->size = kernelstart - s;
3257 }
3258 /*
3259 * Check whether this region overlaps the end of the kernel.
3260 */
3261 else if (s < kernelend && e > kernelend) {
3262 mp->start = kernelend;
3263 mp->size = e - kernelend;
3264 }
3265 /*
3266 * Look whether this regions is completely inside the kernel.
3267 * Nuke it if it does.
3268 */
3269 else if (s >= kernelstart && e <= kernelend) {
3270 mp->start = 0;
3271 mp->size = 0;
3272 }
3273 /*
3274 * If the user imposed a memory limit, enforce it.
3275 */
3276 else if (s >= pmap_memlimit) {
3277 mp->start = -PAGE_SIZE; /* let's know why */
3278 mp->size = 0;
3279 }
3280 else {
3281 mp->start = s;
3282 mp->size = e - s;
3283 }
3284 DPRINTFN(BOOT,
3285 "pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n",
3286 i, mp->start, mp->size);
3287 }
3288
3289 /*
3290 * Move (and uncount) all the null return to the end.
3291 */
3292 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) {
3293 if (mp->size == 0) {
3294 tmp = avail[i];
3295 avail[i] = avail[--avail_cnt];
3296 avail[avail_cnt] = avail[i];
3297 }
3298 }
3299
3300 /*
3301 * (Bubble)sort them into ascending order.
3302 */
3303 for (i = 0; i < avail_cnt; i++) {
3304 for (j = i + 1; j < avail_cnt; j++) {
3305 if (avail[i].start > avail[j].start) {
3306 tmp = avail[i];
3307 avail[i] = avail[j];
3308 avail[j] = tmp;
3309 }
3310 }
3311 }
3312
3313 /*
3314 * Make sure they don't overlap.
3315 */
3316 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) {
3317 if (mp[0].start + mp[0].size > mp[1].start) {
3318 mp[0].size = mp[1].start - mp[0].start;
3319 }
3320 DPRINTFN(BOOT,
3321 "pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n",
3322 i, mp->start, mp->size);
3323 }
3324 DPRINTFN(BOOT,
3325 "pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n",
3326 i, mp->start, mp->size);
3327
3328 #ifdef PTEGCOUNT
3329 pmap_pteg_cnt = PTEGCOUNT;
3330 #else /* PTEGCOUNT */
3331
3332 pmap_pteg_cnt = 0x1000;
3333
3334 while (pmap_pteg_cnt < physmem)
3335 pmap_pteg_cnt <<= 1;
3336
3337 pmap_pteg_cnt >>= 1;
3338 #endif /* PTEGCOUNT */
3339
3340 #ifdef DEBUG
3341 DPRINTFN(BOOT, "pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt);
3342 #endif
3343
3344 /*
3345 * Find suitably aligned memory for PTEG hash table.
3346 */
3347 size = pmap_pteg_cnt * sizeof(struct pteg);
3348 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0);
3349
3350 #ifdef DEBUG
3351 DPRINTFN(BOOT,
3352 "PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table);
3353 #endif
3354
3355
3356 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
3357 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH)
3358 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB",
3359 pmap_pteg_table, size);
3360 #endif
3361
3362 memset(__UNVOLATILE(pmap_pteg_table), 0,
3363 pmap_pteg_cnt * sizeof(struct pteg));
3364 pmap_pteg_mask = pmap_pteg_cnt - 1;
3365
3366 /*
3367 * We cannot do pmap_steal_memory here since UVM hasn't been loaded
3368 * with pages. So we just steal them before giving them to UVM.
3369 */
3370 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt;
3371 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0);
3372 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK)
3373 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH)
3374 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB",
3375 pmap_pvo_table, size);
3376 #endif
3377
3378 for (i = 0; i < pmap_pteg_cnt; i++)
3379 TAILQ_INIT(&pmap_pvo_table[i]);
3380
3381 #ifndef MSGBUFADDR
3382 /*
3383 * Allocate msgbuf in high memory.
3384 */
3385 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1);
3386 #endif
3387
3388 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) {
3389 paddr_t pfstart = atop(mp->start);
3390 paddr_t pfend = atop(mp->start + mp->size);
3391 if (mp->size == 0)
3392 continue;
3393 if (mp->start + mp->size <= SEGMENT_LENGTH) {
3394 uvm_page_physload(pfstart, pfend, pfstart, pfend,
3395 VM_FREELIST_FIRST256);
3396 } else if (mp->start >= SEGMENT_LENGTH) {
3397 uvm_page_physload(pfstart, pfend, pfstart, pfend,
3398 VM_FREELIST_DEFAULT);
3399 } else {
3400 pfend = atop(SEGMENT_LENGTH);
3401 uvm_page_physload(pfstart, pfend, pfstart, pfend,
3402 VM_FREELIST_FIRST256);
3403 pfstart = atop(SEGMENT_LENGTH);
3404 pfend = atop(mp->start + mp->size);
3405 uvm_page_physload(pfstart, pfend, pfstart, pfend,
3406 VM_FREELIST_DEFAULT);
3407 }
3408 }
3409
3410 /*
3411 * Make sure kernel vsid is allocated as well as VSID 0.
3412 */
3413 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW]
3414 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW);
3415 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW]
3416 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW);
3417 pmap_vsid_bitmap[0] |= 1;
3418
3419 /*
3420 * Initialize kernel pmap.
3421 */
3422 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE)
3423 for (i = 0; i < 16; i++) {
3424 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY;
3425 }
3426 pmap_kernel()->pm_vsid = KERNEL_VSIDBITS;
3427
3428 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY;
3429 #ifdef KERNEL2_SR
3430 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY;
3431 #endif
3432 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */
3433
3434 #if defined(PMAP_OEA) && defined(PPC_OEA601)
3435 if ((MFPVR() >> 16) == MPC601) {
3436 for (i = 0; i < 16; i++) {
3437 if (iosrtable[i] & SR601_T) {
3438 pmap_kernel()->pm_sr[i] = iosrtable[i];
3439 }
3440 }
3441 }
3442 #endif /* PMAP_OEA && PPC_OEA601 */
3443
3444 #ifdef ALTIVEC
3445 pmap_use_altivec = cpu_altivec;
3446 #endif
3447
3448 #ifdef DEBUG
3449 if (pmapdebug & PMAPDEBUG_BOOT) {
3450 u_int cnt;
3451 uvm_physseg_t bank;
3452 char pbuf[9];
3453 for (cnt = 0, bank = uvm_physseg_get_first();
3454 uvm_physseg_valid_p(bank);
3455 bank = uvm_physseg_get_next(bank)) {
3456 cnt += uvm_physseg_get_avail_end(bank) -
3457 uvm_physseg_get_avail_start(bank);
3458 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n",
3459 bank,
3460 ptoa(uvm_physseg_get_avail_start(bank)),
3461 ptoa(uvm_physseg_get_avail_end(bank)),
3462 ptoa(uvm_physseg_get_avail_end(bank) - uvm_physseg_get_avail_start(bank)));
3463 }
3464 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt));
3465 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n",
3466 pbuf, cnt);
3467 }
3468 #endif
3469
3470 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry),
3471 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl",
3472 &pmap_pool_uallocator, IPL_VM);
3473
3474 pool_setlowat(&pmap_upvo_pool, 252);
3475
3476 pool_init(&pmap_pool, sizeof(struct pmap),
3477 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator,
3478 IPL_NONE);
3479
3480 #if defined(PMAP_NEED_MAPKERNEL)
3481 {
3482 struct pmap *pm = pmap_kernel();
3483 #if defined(PMAP_NEED_FULL_MAPKERNEL)
3484 extern int etext[], kernel_text[];
3485 vaddr_t va, va_etext = (paddr_t) etext;
3486 #endif
3487 paddr_t pa, pa_end;
3488 register_t sr;
3489 struct pte pt;
3490 unsigned int ptegidx;
3491 int bank;
3492
3493 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY;
3494 pm->pm_sr[0] = sr;
3495
3496 for (bank = 0; bank < vm_nphysseg; bank++) {
3497 pa_end = ptoa(VM_PHYSMEM_PTR(bank)->avail_end);
3498 pa = ptoa(VM_PHYSMEM_PTR(bank)->avail_start);
3499 for (; pa < pa_end; pa += PAGE_SIZE) {
3500 ptegidx = va_to_pteg(pm, pa);
3501 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW);
3502 pmap_pte_insert(ptegidx, &pt);
3503 }
3504 }
3505
3506 #if defined(PMAP_NEED_FULL_MAPKERNEL)
3507 va = (vaddr_t) kernel_text;
3508
3509 for (pa = kernelstart; va < va_etext;
3510 pa += PAGE_SIZE, va += PAGE_SIZE) {
3511 ptegidx = va_to_pteg(pm, va);
3512 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR);
3513 pmap_pte_insert(ptegidx, &pt);
3514 }
3515
3516 for (; pa < kernelend;
3517 pa += PAGE_SIZE, va += PAGE_SIZE) {
3518 ptegidx = va_to_pteg(pm, va);
3519 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW);
3520 pmap_pte_insert(ptegidx, &pt);
3521 }
3522
3523 for (va = 0, pa = 0; va < kernelstart;
3524 pa += PAGE_SIZE, va += PAGE_SIZE) {
3525 ptegidx = va_to_pteg(pm, va);
3526 if (va < 0x3000)
3527 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR);
3528 else
3529 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW);
3530 pmap_pte_insert(ptegidx, &pt);
3531 }
3532 for (va = kernelend, pa = kernelend; va < SEGMENT_LENGTH;
3533 pa += PAGE_SIZE, va += PAGE_SIZE) {
3534 ptegidx = va_to_pteg(pm, va);
3535 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW);
3536 pmap_pte_insert(ptegidx, &pt);
3537 }
3538 #endif /* PMAP_NEED_FULL_MAPKERNEL */
3539 }
3540 #endif /* PMAP_NEED_MAPKERNEL */
3541 }
3542
3543 /*
3544 * Using the data structures prepared in pmap_bootstrap1(), program
3545 * the MMU hardware.
3546 */
3547 void
3548 pmap_bootstrap2(void)
3549 {
3550 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE)
3551 for (int i = 0; i < 16; i++) {
3552 __asm volatile("mtsrin %0,%1"
3553 :: "r"(pmap_kernel()->pm_sr[i]),
3554 "r"(i << ADDR_SR_SHFT));
3555 }
3556 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */
3557
3558 #if defined(PMAP_OEA)
3559 __asm volatile("sync; mtsdr1 %0; isync"
3560 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10)));
3561 #elif defined(PMAP_OEA64) || defined(PMAP_OEA64_BRIDGE)
3562 __asm __volatile("sync; mtsdr1 %0; isync"
3563 :: "r"((uintptr_t)pmap_pteg_table |
3564 (32 - __builtin_clz(pmap_pteg_mask >> 11))));
3565 #endif
3566 tlbia();
3567
3568 #if defined(PMAPDEBUG)
3569 if (pmapdebug)
3570 pmap_print_mmuregs();
3571 #endif
3572 }
3573
3574 /*
3575 * This is not part of the defined PMAP interface and is specific to the
3576 * PowerPC architecture. This is called during initppc, before the system
3577 * is really initialized.
3578 */
3579 void
3580 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend)
3581 {
3582 pmap_bootstrap1(kernelstart, kernelend);
3583 pmap_bootstrap2();
3584 }
3585