pmap.c revision 1.41
1 /* $NetBSD: pmap.c,v 1.41 2006/09/19 20:19:53 matt Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 43 * Copyright (C) 1995, 1996 TooLs GmbH. 44 * All rights reserved. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. All advertising materials mentioning features or use of this software 55 * must display the following acknowledgement: 56 * This product includes software developed by TooLs GmbH. 57 * 4. The name of TooLs GmbH may not be used to endorse or promote products 58 * derived from this software without specific prior written permission. 59 * 60 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 61 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 62 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 63 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 64 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 65 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 66 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 67 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 68 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 69 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.41 2006/09/19 20:19:53 matt Exp $"); 74 75 #include "opt_ppcarch.h" 76 #include "opt_altivec.h" 77 #include "opt_pmap.h" 78 #include <sys/param.h> 79 #include <sys/malloc.h> 80 #include <sys/proc.h> 81 #include <sys/user.h> 82 #include <sys/pool.h> 83 #include <sys/queue.h> 84 #include <sys/device.h> /* for evcnt */ 85 #include <sys/systm.h> 86 87 #if __NetBSD_Version__ < 105010000 88 #include <vm/vm.h> 89 #include <vm/vm_kern.h> 90 #define splvm() splimp() 91 #endif 92 93 #include <uvm/uvm.h> 94 95 #include <machine/pcb.h> 96 #include <machine/powerpc.h> 97 #include <powerpc/spr.h> 98 #include <powerpc/oea/sr_601.h> 99 #include <powerpc/bat.h> 100 #include <powerpc/stdarg.h> 101 102 #if defined(DEBUG) || defined(PMAPCHECK) 103 #define STATIC 104 #else 105 #define STATIC static 106 #endif 107 108 #ifdef ALTIVEC 109 int pmap_use_altivec; 110 #endif 111 112 volatile struct pteg *pmap_pteg_table; 113 unsigned int pmap_pteg_cnt; 114 unsigned int pmap_pteg_mask; 115 #ifdef PMAP_MEMLIMIT 116 paddr_t pmap_memlimit = PMAP_MEMLIMIT; 117 #else 118 paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 119 #endif 120 121 struct pmap kernel_pmap_; 122 unsigned int pmap_pages_stolen; 123 u_long pmap_pte_valid; 124 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 125 u_long pmap_pvo_enter_depth; 126 u_long pmap_pvo_remove_depth; 127 #endif 128 129 int physmem; 130 #ifndef MSGBUFADDR 131 extern paddr_t msgbuf_paddr; 132 #endif 133 134 static struct mem_region *mem, *avail; 135 static u_int mem_cnt, avail_cnt; 136 137 #ifdef __HAVE_PMAP_PHYSSEG 138 /* 139 * This is a cache of referenced/modified bits. 140 * Bits herein are shifted by ATTRSHFT. 141 */ 142 #define ATTR_SHFT 4 143 struct pmap_physseg pmap_physseg; 144 #endif 145 146 /* 147 * The following structure is aligned to 32 bytes 148 */ 149 struct pvo_entry { 150 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 151 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 152 struct pte pvo_pte; /* Prebuilt PTE */ 153 pmap_t pvo_pmap; /* ptr to owning pmap */ 154 vaddr_t pvo_vaddr; /* VA of entry */ 155 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 156 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 157 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 158 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 159 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 160 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 161 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 162 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 163 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 164 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 165 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 166 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 167 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 168 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 169 #define PVO_REMOVE 6 /* PVO has been removed */ 170 #define PVO_WHERE_MASK 15 171 #define PVO_WHERE_SHFT 8 172 } __attribute__ ((aligned (32))); 173 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 174 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 175 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 176 #define PVO_PTEGIDX_CLR(pvo) \ 177 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 178 #define PVO_PTEGIDX_SET(pvo,i) \ 179 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 180 #define PVO_WHERE(pvo,w) \ 181 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 182 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 183 184 TAILQ_HEAD(pvo_tqhead, pvo_entry); 185 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 186 struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 187 struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 188 189 struct pool pmap_pool; /* pool for pmap structures */ 190 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 191 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 192 193 /* 194 * We keep a cache of unmanaged pages to be used for pvo entries for 195 * unmanaged pages. 196 */ 197 struct pvo_page { 198 SIMPLEQ_ENTRY(pvo_page) pvop_link; 199 }; 200 SIMPLEQ_HEAD(pvop_head, pvo_page); 201 struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 202 struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 203 u_long pmap_upvop_free; 204 u_long pmap_upvop_maxfree; 205 u_long pmap_mpvop_free; 206 u_long pmap_mpvop_maxfree; 207 208 STATIC void *pmap_pool_ualloc(struct pool *, int); 209 STATIC void *pmap_pool_malloc(struct pool *, int); 210 211 STATIC void pmap_pool_ufree(struct pool *, void *); 212 STATIC void pmap_pool_mfree(struct pool *, void *); 213 214 static struct pool_allocator pmap_pool_mallocator = { 215 pmap_pool_malloc, pmap_pool_mfree, 0, 216 }; 217 218 static struct pool_allocator pmap_pool_uallocator = { 219 pmap_pool_ualloc, pmap_pool_ufree, 0, 220 }; 221 222 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 223 void pmap_pte_print(volatile struct pte *); 224 void pmap_pteg_check(void); 225 void pmap_pteg_dist(void); 226 void pmap_print_pte(pmap_t, vaddr_t); 227 void pmap_print_mmuregs(void); 228 #endif 229 230 #if defined(DEBUG) || defined(PMAPCHECK) 231 #ifdef PMAPCHECK 232 int pmapcheck = 1; 233 #else 234 int pmapcheck = 0; 235 #endif 236 void pmap_pvo_verify(void); 237 STATIC void pmap_pvo_check(const struct pvo_entry *); 238 #define PMAP_PVO_CHECK(pvo) \ 239 do { \ 240 if (pmapcheck) \ 241 pmap_pvo_check(pvo); \ 242 } while (0) 243 #else 244 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 245 #endif 246 STATIC int pmap_pte_insert(int, struct pte *); 247 STATIC int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 248 vaddr_t, paddr_t, register_t, int); 249 STATIC void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 250 STATIC void pmap_pvo_free(struct pvo_entry *); 251 STATIC void pmap_pvo_free_list(struct pvo_head *); 252 STATIC struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 253 STATIC volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 254 STATIC struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 255 STATIC void pvo_set_exec(struct pvo_entry *); 256 STATIC void pvo_clear_exec(struct pvo_entry *); 257 258 STATIC void tlbia(void); 259 260 STATIC void pmap_release(pmap_t); 261 STATIC void *pmap_boot_find_memory(psize_t, psize_t, int); 262 263 static uint32_t pmap_pvo_reclaim_nextidx; 264 #ifdef DEBUG 265 static int pmap_pvo_reclaim_debugctr; 266 #endif 267 268 #define VSID_NBPW (sizeof(uint32_t) * 8) 269 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 270 271 static int pmap_initialized; 272 273 #if defined(DEBUG) || defined(PMAPDEBUG) 274 #define PMAPDEBUG_BOOT 0x0001 275 #define PMAPDEBUG_PTE 0x0002 276 #define PMAPDEBUG_EXEC 0x0008 277 #define PMAPDEBUG_PVOENTER 0x0010 278 #define PMAPDEBUG_PVOREMOVE 0x0020 279 #define PMAPDEBUG_ACTIVATE 0x0100 280 #define PMAPDEBUG_CREATE 0x0200 281 #define PMAPDEBUG_ENTER 0x1000 282 #define PMAPDEBUG_KENTER 0x2000 283 #define PMAPDEBUG_KREMOVE 0x4000 284 #define PMAPDEBUG_REMOVE 0x8000 285 286 unsigned int pmapdebug = 0; 287 288 # define DPRINTF(x) printf x 289 # define DPRINTFN(n, x) if (pmapdebug & PMAPDEBUG_ ## n) printf x 290 #else 291 # define DPRINTF(x) 292 # define DPRINTFN(n, x) 293 #endif 294 295 296 #ifdef PMAPCOUNTERS 297 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 298 #define PMAPCOUNT2(ev) ((ev).ev_count++) 299 300 struct evcnt pmap_evcnt_mappings = 301 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 302 "pmap", "pages mapped"); 303 struct evcnt pmap_evcnt_unmappings = 304 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_mappings, 305 "pmap", "pages unmapped"); 306 307 struct evcnt pmap_evcnt_kernel_mappings = 308 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 309 "pmap", "kernel pages mapped"); 310 struct evcnt pmap_evcnt_kernel_unmappings = 311 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_kernel_mappings, 312 "pmap", "kernel pages unmapped"); 313 314 struct evcnt pmap_evcnt_mappings_replaced = 315 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 316 "pmap", "page mappings replaced"); 317 318 struct evcnt pmap_evcnt_exec_mappings = 319 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_mappings, 320 "pmap", "exec pages mapped"); 321 struct evcnt pmap_evcnt_exec_cached = 322 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_mappings, 323 "pmap", "exec pages cached"); 324 325 struct evcnt pmap_evcnt_exec_synced = 326 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_exec_mappings, 327 "pmap", "exec pages synced"); 328 struct evcnt pmap_evcnt_exec_synced_clear_modify = 329 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_exec_mappings, 330 "pmap", "exec pages synced (CM)"); 331 struct evcnt pmap_evcnt_exec_synced_pvo_remove = 332 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_exec_mappings, 333 "pmap", "exec pages synced (PR)"); 334 335 struct evcnt pmap_evcnt_exec_uncached_page_protect = 336 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_exec_mappings, 337 "pmap", "exec pages uncached (PP)"); 338 struct evcnt pmap_evcnt_exec_uncached_clear_modify = 339 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_exec_mappings, 340 "pmap", "exec pages uncached (CM)"); 341 struct evcnt pmap_evcnt_exec_uncached_zero_page = 342 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_exec_mappings, 343 "pmap", "exec pages uncached (ZP)"); 344 struct evcnt pmap_evcnt_exec_uncached_copy_page = 345 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_exec_mappings, 346 "pmap", "exec pages uncached (CP)"); 347 struct evcnt pmap_evcnt_exec_uncached_pvo_remove = 348 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, &pmap_evcnt_exec_mappings, 349 "pmap", "exec pages uncached (PR)"); 350 351 struct evcnt pmap_evcnt_updates = 352 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 353 "pmap", "updates"); 354 struct evcnt pmap_evcnt_collects = 355 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 356 "pmap", "collects"); 357 struct evcnt pmap_evcnt_copies = 358 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 359 "pmap", "copies"); 360 361 struct evcnt pmap_evcnt_ptes_spilled = 362 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 363 "pmap", "ptes spilled from overflow"); 364 struct evcnt pmap_evcnt_ptes_unspilled = 365 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 366 "pmap", "ptes not spilled"); 367 struct evcnt pmap_evcnt_ptes_evicted = 368 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 369 "pmap", "ptes evicted"); 370 371 struct evcnt pmap_evcnt_ptes_primary[8] = { 372 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 373 "pmap", "ptes added at primary[0]"), 374 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 375 "pmap", "ptes added at primary[1]"), 376 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 377 "pmap", "ptes added at primary[2]"), 378 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 379 "pmap", "ptes added at primary[3]"), 380 381 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 382 "pmap", "ptes added at primary[4]"), 383 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 384 "pmap", "ptes added at primary[5]"), 385 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 386 "pmap", "ptes added at primary[6]"), 387 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 388 "pmap", "ptes added at primary[7]"), 389 }; 390 struct evcnt pmap_evcnt_ptes_secondary[8] = { 391 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 392 "pmap", "ptes added at secondary[0]"), 393 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 394 "pmap", "ptes added at secondary[1]"), 395 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 396 "pmap", "ptes added at secondary[2]"), 397 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 398 "pmap", "ptes added at secondary[3]"), 399 400 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 401 "pmap", "ptes added at secondary[4]"), 402 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 403 "pmap", "ptes added at secondary[5]"), 404 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 405 "pmap", "ptes added at secondary[6]"), 406 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 407 "pmap", "ptes added at secondary[7]"), 408 }; 409 struct evcnt pmap_evcnt_ptes_removed = 410 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 411 "pmap", "ptes removed"); 412 struct evcnt pmap_evcnt_ptes_changed = 413 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 414 "pmap", "ptes changed"); 415 struct evcnt pmap_evcnt_pvos_reclaimed = 416 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 417 "pmap", "pvos reclaimed"); 418 struct evcnt pmap_evcnt_pvos_failed = 419 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, 420 "pmap", "pvo allocation failures"); 421 422 /* 423 * From pmap_subr.c 424 */ 425 extern struct evcnt pmap_evcnt_zeroed_pages; 426 extern struct evcnt pmap_evcnt_copied_pages; 427 extern struct evcnt pmap_evcnt_idlezeroed_pages; 428 429 EVCNT_ATTACH_STATIC(pmap_evcnt_mappings); 430 EVCNT_ATTACH_STATIC(pmap_evcnt_mappings_replaced); 431 EVCNT_ATTACH_STATIC(pmap_evcnt_unmappings); 432 433 EVCNT_ATTACH_STATIC(pmap_evcnt_kernel_mappings); 434 EVCNT_ATTACH_STATIC(pmap_evcnt_kernel_unmappings); 435 436 EVCNT_ATTACH_STATIC(pmap_evcnt_exec_mappings); 437 EVCNT_ATTACH_STATIC(pmap_evcnt_exec_cached); 438 EVCNT_ATTACH_STATIC(pmap_evcnt_exec_synced); 439 EVCNT_ATTACH_STATIC(pmap_evcnt_exec_synced_clear_modify); 440 EVCNT_ATTACH_STATIC(pmap_evcnt_exec_synced_pvo_remove); 441 442 EVCNT_ATTACH_STATIC(pmap_evcnt_exec_uncached_page_protect); 443 EVCNT_ATTACH_STATIC(pmap_evcnt_exec_uncached_clear_modify); 444 EVCNT_ATTACH_STATIC(pmap_evcnt_exec_uncached_zero_page); 445 EVCNT_ATTACH_STATIC(pmap_evcnt_exec_uncached_copy_page); 446 EVCNT_ATTACH_STATIC(pmap_evcnt_exec_uncached_pvo_remove); 447 448 EVCNT_ATTACH_STATIC(pmap_evcnt_zeroed_pages); 449 EVCNT_ATTACH_STATIC(pmap_evcnt_copied_pages); 450 EVCNT_ATTACH_STATIC(pmap_evcnt_idlezeroed_pages); 451 452 EVCNT_ATTACH_STATIC(pmap_evcnt_updates); 453 EVCNT_ATTACH_STATIC(pmap_evcnt_collects); 454 EVCNT_ATTACH_STATIC(pmap_evcnt_copies); 455 456 EVCNT_ATTACH_STATIC(pmap_evcnt_ptes_spilled); 457 EVCNT_ATTACH_STATIC(pmap_evcnt_ptes_unspilled); 458 EVCNT_ATTACH_STATIC(pmap_evcnt_ptes_evicted); 459 EVCNT_ATTACH_STATIC(pmap_evcnt_ptes_removed); 460 EVCNT_ATTACH_STATIC(pmap_evcnt_ptes_changed); 461 462 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_primary, 0); 463 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_primary, 1); 464 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_primary, 2); 465 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_primary, 3); 466 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_primary, 4); 467 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_primary, 5); 468 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_primary, 6); 469 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_primary, 7); 470 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_secondary, 0); 471 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_secondary, 1); 472 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_secondary, 2); 473 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_secondary, 3); 474 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_secondary, 4); 475 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_secondary, 5); 476 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_secondary, 6); 477 EVCNT_ATTACH_STATIC2(pmap_evcnt_ptes_secondary, 7); 478 479 EVCNT_ATTACH_STATIC(pmap_evcnt_pvos_reclaimed); 480 EVCNT_ATTACH_STATIC(pmap_evcnt_pvos_failed); 481 #else 482 #define PMAPCOUNT(ev) ((void) 0) 483 #define PMAPCOUNT2(ev) ((void) 0) 484 #endif 485 486 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 487 488 /* XXXSL: this needs to be moved to assembler */ 489 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 490 491 #define TLBSYNC() __asm volatile("tlbsync") 492 #define SYNC() __asm volatile("sync") 493 #define EIEIO() __asm volatile("eieio") 494 #define MFMSR() mfmsr() 495 #define MTMSR(psl) mtmsr(psl) 496 #define MFPVR() mfpvr() 497 #define MFSRIN(va) mfsrin(va) 498 #define MFTB() mfrtcltbl() 499 500 #if defined (PPC_OEA) || defined (PPC_OEA64_BRIDGE) 501 static inline register_t 502 mfsrin(vaddr_t va) 503 { 504 register_t sr; 505 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 506 return sr; 507 } 508 #endif /* PPC_OEA*/ 509 510 #if defined (PPC_OEA64_BRIDGE) 511 extern void mfmsr64 (register64_t *result); 512 #endif /* PPC_OEA64_BRIDGE */ 513 514 515 static inline register_t 516 pmap_interrupts_off(void) 517 { 518 register_t msr = MFMSR(); 519 if (msr & PSL_EE) 520 MTMSR(msr & ~PSL_EE); 521 return msr; 522 } 523 524 static void 525 pmap_interrupts_restore(register_t msr) 526 { 527 if (msr & PSL_EE) 528 MTMSR(msr); 529 } 530 531 static inline u_int32_t 532 mfrtcltbl(void) 533 { 534 535 if ((MFPVR() >> 16) == MPC601) 536 return (mfrtcl() >> 7); 537 else 538 return (mftbl()); 539 } 540 541 /* 542 * These small routines may have to be replaced, 543 * if/when we support processors other that the 604. 544 */ 545 546 void 547 tlbia(void) 548 { 549 caddr_t i; 550 551 SYNC(); 552 #if defined(PPC_OEA) 553 /* 554 * Why not use "tlbia"? Because not all processors implement it. 555 * 556 * This needs to be a per-CPU callback to do the appropriate thing 557 * for the CPU. XXX 558 */ 559 for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 560 TLBIE(i); 561 EIEIO(); 562 SYNC(); 563 } 564 #elif defined (PPC_OEA64) || defined (PPC_OEA64_BRIDGE) 565 printf("Invalidating ALL TLB entries......\n"); 566 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 567 for (i = 0; i <= (caddr_t)0xFF000; i += 0x00001000) { 568 TLBIEL(i); 569 EIEIO(); 570 SYNC(); 571 } 572 #endif 573 TLBSYNC(); 574 SYNC(); 575 } 576 577 static inline register_t 578 va_to_vsid(const struct pmap *pm, vaddr_t addr) 579 { 580 #if defined (PPC_OEA) || defined (PPC_OEA64_BRIDGE) 581 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 582 #else /* PPC_OEA64 */ 583 #if 0 584 const struct ste *ste; 585 register_t hash; 586 int i; 587 588 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 589 590 /* 591 * Try the primary group first 592 */ 593 ste = pm->pm_stes[hash].stes; 594 for (i = 0; i < 8; i++, ste++) { 595 if (ste->ste_hi & STE_V) && 596 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 597 return ste; 598 } 599 600 /* 601 * Then the secondary group. 602 */ 603 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 604 for (i = 0; i < 8; i++, ste++) { 605 if (ste->ste_hi & STE_V) && 606 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 607 return addr; 608 } 609 610 return NULL; 611 #else 612 /* 613 * Rather than searching the STE groups for the VSID, we know 614 * how we generate that from the ESID and so do that. 615 */ 616 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 617 #endif 618 #endif /* PPC_OEA */ 619 } 620 621 static inline register_t 622 va_to_pteg(const struct pmap *pm, vaddr_t addr) 623 { 624 register_t hash; 625 626 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 627 return hash & pmap_pteg_mask; 628 } 629 630 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 631 /* 632 * Given a PTE in the page table, calculate the VADDR that hashes to it. 633 * The only bit of magic is that the top 4 bits of the address doesn't 634 * technically exist in the PTE. But we know we reserved 4 bits of the 635 * VSID for it so that's how we get it. 636 */ 637 static vaddr_t 638 pmap_pte_to_va(volatile const struct pte *pt) 639 { 640 vaddr_t va; 641 uintptr_t ptaddr = (uintptr_t) pt; 642 643 if (pt->pte_hi & PTE_HID) 644 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 645 646 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 647 #if defined(PPC_OEA) 648 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 649 #elif defined (PPC_OEA64) || defined (PPC_OEA64_BRIDGE) 650 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 651 #endif 652 va <<= ADDR_PIDX_SHFT; 653 654 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 655 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 656 657 #if defined(PPC_OEA64) 658 /* PPC63 Bits 0-35 */ 659 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 660 #elif defined(PPC_OEA) || defined(PPC_OEA64_BRIDGE) 661 /* PPC Bits 0-3 */ 662 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 663 #endif 664 665 return va; 666 } 667 #endif 668 669 static inline struct pvo_head * 670 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 671 { 672 #ifdef __HAVE_VM_PAGE_MD 673 struct vm_page *pg; 674 675 pg = PHYS_TO_VM_PAGE(pa); 676 if (pg_p != NULL) 677 *pg_p = pg; 678 if (pg == NULL) 679 return &pmap_pvo_unmanaged; 680 return &pg->mdpage.mdpg_pvoh; 681 #endif 682 #ifdef __HAVE_PMAP_PHYSSEG 683 int bank, pg; 684 685 bank = vm_physseg_find(atop(pa), &pg); 686 if (pg_p != NULL) 687 *pg_p = pg; 688 if (bank == -1) 689 return &pmap_pvo_unmanaged; 690 return &vm_physmem[bank].pmseg.pvoh[pg]; 691 #endif 692 } 693 694 static inline struct pvo_head * 695 vm_page_to_pvoh(struct vm_page *pg) 696 { 697 #ifdef __HAVE_VM_PAGE_MD 698 return &pg->mdpage.mdpg_pvoh; 699 #endif 700 #ifdef __HAVE_PMAP_PHYSSEG 701 return pa_to_pvoh(VM_PAGE_TO_PHYS(pg), NULL); 702 #endif 703 } 704 705 706 #ifdef __HAVE_PMAP_PHYSSEG 707 static inline char * 708 pa_to_attr(paddr_t pa) 709 { 710 int bank, pg; 711 712 bank = vm_physseg_find(atop(pa), &pg); 713 if (bank == -1) 714 return NULL; 715 return &vm_physmem[bank].pmseg.attrs[pg]; 716 } 717 #endif 718 719 static inline void 720 pmap_attr_clear(struct vm_page *pg, int ptebit) 721 { 722 #ifdef __HAVE_PMAP_PHYSSEG 723 *pa_to_attr(VM_PAGE_TO_PHYS(pg)) &= ~(ptebit >> ATTR_SHFT); 724 #endif 725 #ifdef __HAVE_VM_PAGE_MD 726 pg->mdpage.mdpg_attrs &= ~ptebit; 727 #endif 728 } 729 730 static inline int 731 pmap_attr_fetch(struct vm_page *pg) 732 { 733 #ifdef __HAVE_PMAP_PHYSSEG 734 return *pa_to_attr(VM_PAGE_TO_PHYS(pg)) << ATTR_SHFT; 735 #endif 736 #ifdef __HAVE_VM_PAGE_MD 737 return pg->mdpage.mdpg_attrs; 738 #endif 739 } 740 741 static inline void 742 pmap_attr_save(struct vm_page *pg, int ptebit) 743 { 744 #ifdef __HAVE_PMAP_PHYSSEG 745 *pa_to_attr(VM_PAGE_TO_PHYS(pg)) |= (ptebit >> ATTR_SHFT); 746 #endif 747 #ifdef __HAVE_VM_PAGE_MD 748 pg->mdpage.mdpg_attrs |= ptebit; 749 #endif 750 } 751 752 static inline int 753 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 754 { 755 if (pt->pte_hi == pvo_pt->pte_hi 756 #if 0 757 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 758 ~(PTE_REF|PTE_CHG)) == 0 759 #endif 760 ) 761 return 1; 762 return 0; 763 } 764 765 static inline void 766 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 767 { 768 /* 769 * Construct the PTE. Default to IMB initially. Valid bit 770 * only gets set when the real pte is set in memory. 771 * 772 * Note: Don't set the valid bit for correct operation of tlb update. 773 */ 774 #if defined(PPC_OEA) 775 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 776 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 777 pt->pte_lo = pte_lo; 778 #elif defined (PPC_OEA64_BRIDGE) 779 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 780 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 781 pt->pte_lo = (u_int64_t) pte_lo; 782 #elif defined (PPC_OEA64) 783 #error PPC_OEA64 not supported 784 #endif /* PPC_OEA */ 785 } 786 787 static inline void 788 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 789 { 790 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 791 } 792 793 static inline void 794 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 795 { 796 /* 797 * As shown in Section 7.6.3.2.3 798 */ 799 pt->pte_lo &= ~ptebit; 800 TLBIE(va); 801 SYNC(); 802 EIEIO(); 803 TLBSYNC(); 804 SYNC(); 805 } 806 807 static inline void 808 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 809 { 810 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 811 if (pvo_pt->pte_hi & PTE_VALID) 812 panic("pte_set: setting an already valid pte %p", pvo_pt); 813 #endif 814 pvo_pt->pte_hi |= PTE_VALID; 815 816 /* 817 * Update the PTE as defined in section 7.6.3.1 818 * Note that the REF/CHG bits are from pvo_pt and thus should 819 * have been saved so this routine can restore them (if desired). 820 */ 821 pt->pte_lo = pvo_pt->pte_lo; 822 EIEIO(); 823 pt->pte_hi = pvo_pt->pte_hi; 824 TLBSYNC(); 825 SYNC(); 826 pmap_pte_valid++; 827 } 828 829 static inline void 830 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 831 { 832 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 833 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 834 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 835 if ((pt->pte_hi & PTE_VALID) == 0) 836 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 837 #endif 838 839 pvo_pt->pte_hi &= ~PTE_VALID; 840 /* 841 * Force the ref & chg bits back into the PTEs. 842 */ 843 SYNC(); 844 /* 845 * Invalidate the pte ... (Section 7.6.3.3) 846 */ 847 pt->pte_hi &= ~PTE_VALID; 848 SYNC(); 849 TLBIE(va); 850 SYNC(); 851 EIEIO(); 852 TLBSYNC(); 853 SYNC(); 854 /* 855 * Save the ref & chg bits ... 856 */ 857 pmap_pte_synch(pt, pvo_pt); 858 pmap_pte_valid--; 859 } 860 861 static inline void 862 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 863 { 864 /* 865 * Invalidate the PTE 866 */ 867 pmap_pte_unset(pt, pvo_pt, va); 868 pmap_pte_set(pt, pvo_pt); 869 } 870 871 /* 872 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 873 * (either primary or secondary location). 874 * 875 * Note: both the destination and source PTEs must not have PTE_VALID set. 876 */ 877 878 STATIC int 879 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 880 { 881 volatile struct pte *pt; 882 int i; 883 884 #if defined(DEBUG) 885 #if defined (PPC_OEA) 886 DPRINTFN(PTE, ("pmap_pte_insert: idx 0x%x, pte 0x%x 0x%x\n", 887 ptegidx, (unsigned int) pvo_pt->pte_hi, (unsigned int) pvo_pt->pte_lo)); 888 #elif defined (PPC_OEA64_BRIDGE) 889 DPRINTFN(PTE, ("pmap_pte_insert: idx 0x%x, pte 0x%016llx 0x%016llx\n", 890 ptegidx, (unsigned long long) pvo_pt->pte_hi, 891 (unsigned long long) pvo_pt->pte_lo)); 892 893 #endif 894 #endif 895 /* 896 * First try primary hash. 897 */ 898 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 899 if ((pt->pte_hi & PTE_VALID) == 0) { 900 pvo_pt->pte_hi &= ~PTE_HID; 901 pmap_pte_set(pt, pvo_pt); 902 return i; 903 } 904 } 905 906 /* 907 * Now try secondary hash. 908 */ 909 ptegidx ^= pmap_pteg_mask; 910 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 911 if ((pt->pte_hi & PTE_VALID) == 0) { 912 pvo_pt->pte_hi |= PTE_HID; 913 pmap_pte_set(pt, pvo_pt); 914 return i; 915 } 916 } 917 return -1; 918 } 919 920 /* 921 * Spill handler. 922 * 923 * Tries to spill a page table entry from the overflow area. 924 * This runs in either real mode (if dealing with a exception spill) 925 * or virtual mode when dealing with manually spilling one of the 926 * kernel's pte entries. In either case, interrupts are already 927 * disabled. 928 */ 929 930 int 931 pmap_pte_spill(struct pmap *pm, vaddr_t addr, boolean_t exec) 932 { 933 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 934 struct pvo_entry *pvo; 935 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 936 struct pvo_tqhead *pvoh, *vpvoh = NULL; 937 int ptegidx, i, j; 938 volatile struct pteg *pteg; 939 volatile struct pte *pt; 940 941 ptegidx = va_to_pteg(pm, addr); 942 943 /* 944 * Have to substitute some entry. Use the primary hash for this. 945 * Use low bits of timebase as random generator. Make sure we are 946 * not picking a kernel pte for replacement. 947 */ 948 pteg = &pmap_pteg_table[ptegidx]; 949 i = MFTB() & 7; 950 for (j = 0; j < 8; j++) { 951 pt = &pteg->pt[i]; 952 if ((pt->pte_hi & PTE_VALID) == 0 || 953 VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 954 != KERNEL_VSIDBITS) 955 break; 956 i = (i + 1) & 7; 957 } 958 KASSERT(j < 8); 959 960 source_pvo = NULL; 961 victim_pvo = NULL; 962 pvoh = &pmap_pvo_table[ptegidx]; 963 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 964 965 /* 966 * We need to find pvo entry for this address... 967 */ 968 PMAP_PVO_CHECK(pvo); /* sanity check */ 969 970 /* 971 * If we haven't found the source and we come to a PVO with 972 * a valid PTE, then we know we can't find it because all 973 * evicted PVOs always are first in the list. 974 */ 975 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 976 break; 977 if (source_pvo == NULL && pm == pvo->pvo_pmap && 978 addr == PVO_VADDR(pvo)) { 979 980 /* 981 * Now we have found the entry to be spilled into the 982 * pteg. Attempt to insert it into the page table. 983 */ 984 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 985 if (j >= 0) { 986 PVO_PTEGIDX_SET(pvo, j); 987 PMAP_PVO_CHECK(pvo); /* sanity check */ 988 PVO_WHERE(pvo, SPILL_INSERT); 989 pvo->pvo_pmap->pm_evictions--; 990 PMAPCOUNT(ptes_spilled); 991 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 992 ? pmap_evcnt_ptes_secondary 993 : pmap_evcnt_ptes_primary)[j]); 994 995 /* 996 * Since we keep the evicted entries at the 997 * from of the PVO list, we need move this 998 * (now resident) PVO after the evicted 999 * entries. 1000 */ 1001 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 1002 1003 /* 1004 * If we don't have to move (either we were the 1005 * last entry or the next entry was valid), 1006 * don't change our position. Otherwise 1007 * move ourselves to the tail of the queue. 1008 */ 1009 if (next_pvo != NULL && 1010 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 1011 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 1012 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1013 } 1014 return 1; 1015 } 1016 source_pvo = pvo; 1017 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 1018 return 0; 1019 } 1020 if (victim_pvo != NULL) 1021 break; 1022 } 1023 1024 /* 1025 * We also need the pvo entry of the victim we are replacing 1026 * so save the R & C bits of the PTE. 1027 */ 1028 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1029 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1030 vpvoh = pvoh; /* *1* */ 1031 victim_pvo = pvo; 1032 if (source_pvo != NULL) 1033 break; 1034 } 1035 } 1036 1037 if (source_pvo == NULL) { 1038 PMAPCOUNT(ptes_unspilled); 1039 return 0; 1040 } 1041 1042 if (victim_pvo == NULL) { 1043 if ((pt->pte_hi & PTE_HID) == 0) 1044 panic("pmap_pte_spill: victim p-pte (%p) has " 1045 "no pvo entry!", pt); 1046 1047 /* 1048 * If this is a secondary PTE, we need to search 1049 * its primary pvo bucket for the matching PVO. 1050 */ 1051 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1052 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1053 PMAP_PVO_CHECK(pvo); /* sanity check */ 1054 1055 /* 1056 * We also need the pvo entry of the victim we are 1057 * replacing so save the R & C bits of the PTE. 1058 */ 1059 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1060 victim_pvo = pvo; 1061 break; 1062 } 1063 } 1064 if (victim_pvo == NULL) 1065 panic("pmap_pte_spill: victim s-pte (%p) has " 1066 "no pvo entry!", pt); 1067 } 1068 1069 /* 1070 * The victim should be not be a kernel PVO/PTE entry. 1071 */ 1072 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1073 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1074 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1075 1076 /* 1077 * We are invalidating the TLB entry for the EA for the 1078 * we are replacing even though its valid; If we don't 1079 * we lose any ref/chg bit changes contained in the TLB 1080 * entry. 1081 */ 1082 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1083 1084 /* 1085 * To enforce the PVO list ordering constraint that all 1086 * evicted entries should come before all valid entries, 1087 * move the source PVO to the tail of its list and the 1088 * victim PVO to the head of its list (which might not be 1089 * the same list, if the victim was using the secondary hash). 1090 */ 1091 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1092 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1093 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1094 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1095 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1096 pmap_pte_set(pt, &source_pvo->pvo_pte); 1097 victim_pvo->pvo_pmap->pm_evictions++; 1098 source_pvo->pvo_pmap->pm_evictions--; 1099 PVO_WHERE(victim_pvo, SPILL_UNSET); 1100 PVO_WHERE(source_pvo, SPILL_SET); 1101 1102 PVO_PTEGIDX_CLR(victim_pvo); 1103 PVO_PTEGIDX_SET(source_pvo, i); 1104 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1105 PMAPCOUNT(ptes_spilled); 1106 PMAPCOUNT(ptes_evicted); 1107 PMAPCOUNT(ptes_removed); 1108 1109 PMAP_PVO_CHECK(victim_pvo); 1110 PMAP_PVO_CHECK(source_pvo); 1111 return 1; 1112 } 1113 1114 /* 1115 * Restrict given range to physical memory 1116 */ 1117 void 1118 pmap_real_memory(paddr_t *start, psize_t *size) 1119 { 1120 struct mem_region *mp; 1121 1122 for (mp = mem; mp->size; mp++) { 1123 if (*start + *size > mp->start 1124 && *start < mp->start + mp->size) { 1125 if (*start < mp->start) { 1126 *size -= mp->start - *start; 1127 *start = mp->start; 1128 } 1129 if (*start + *size > mp->start + mp->size) 1130 *size = mp->start + mp->size - *start; 1131 return; 1132 } 1133 } 1134 *size = 0; 1135 } 1136 1137 /* 1138 * Initialize anything else for pmap handling. 1139 * Called during vm_init(). 1140 */ 1141 void 1142 pmap_init(void) 1143 { 1144 #ifdef __HAVE_PMAP_PHYSSEG 1145 struct pvo_tqhead *pvoh; 1146 int bank; 1147 long sz; 1148 char *attr; 1149 1150 pvoh = pmap_physseg.pvoh; 1151 attr = pmap_physseg.attrs; 1152 for (bank = 0; bank < vm_nphysseg; bank++) { 1153 sz = vm_physmem[bank].end - vm_physmem[bank].start; 1154 vm_physmem[bank].pmseg.pvoh = pvoh; 1155 vm_physmem[bank].pmseg.attrs = attr; 1156 for (; sz > 0; sz--, pvoh++, attr++) { 1157 TAILQ_INIT(pvoh); 1158 *attr = 0; 1159 } 1160 } 1161 #endif 1162 1163 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1164 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1165 &pmap_pool_mallocator); 1166 1167 pool_setlowat(&pmap_mpvo_pool, 1008); 1168 1169 pmap_initialized = 1; 1170 1171 } 1172 1173 /* 1174 * How much virtual space does the kernel get? 1175 */ 1176 void 1177 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1178 { 1179 /* 1180 * For now, reserve one segment (minus some overhead) for kernel 1181 * virtual memory 1182 */ 1183 *start = VM_MIN_KERNEL_ADDRESS; 1184 *end = VM_MAX_KERNEL_ADDRESS; 1185 } 1186 1187 /* 1188 * Allocate, initialize, and return a new physical map. 1189 */ 1190 pmap_t 1191 pmap_create(void) 1192 { 1193 pmap_t pm; 1194 1195 pm = pool_get(&pmap_pool, PR_WAITOK); 1196 memset((caddr_t)pm, 0, sizeof *pm); 1197 pmap_pinit(pm); 1198 1199 DPRINTFN(CREATE,("pmap_create: pm %p:\n" 1200 "\t%06x %06x %06x %06x %06x %06x %06x %06x\n" 1201 "\t%06x %06x %06x %06x %06x %06x %06x %06x\n", pm, 1202 (unsigned int) pm->pm_sr[0], (unsigned int) pm->pm_sr[1], 1203 (unsigned int) pm->pm_sr[2], (unsigned int) pm->pm_sr[3], 1204 (unsigned int) pm->pm_sr[4], (unsigned int) pm->pm_sr[5], 1205 (unsigned int) pm->pm_sr[6], (unsigned int) pm->pm_sr[7], 1206 (unsigned int) pm->pm_sr[8], (unsigned int) pm->pm_sr[9], 1207 (unsigned int) pm->pm_sr[10], (unsigned int) pm->pm_sr[11], 1208 (unsigned int) pm->pm_sr[12], (unsigned int) pm->pm_sr[13], 1209 (unsigned int) pm->pm_sr[14], (unsigned int) pm->pm_sr[15])); 1210 return pm; 1211 } 1212 1213 /* 1214 * Initialize a preallocated and zeroed pmap structure. 1215 */ 1216 void 1217 pmap_pinit(pmap_t pm) 1218 { 1219 register_t entropy = MFTB(); 1220 register_t mask; 1221 int i; 1222 1223 /* 1224 * Allocate some segment registers for this pmap. 1225 */ 1226 pm->pm_refs = 1; 1227 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1228 static register_t pmap_vsidcontext; 1229 register_t hash; 1230 unsigned int n; 1231 1232 /* Create a new value by multiplying by a prime adding in 1233 * entropy from the timebase register. This is to make the 1234 * VSID more random so that the PT Hash function collides 1235 * less often. (note that the prime causes gcc to do shifts 1236 * instead of a multiply) 1237 */ 1238 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1239 hash = pmap_vsidcontext & (NPMAPS - 1); 1240 if (hash == 0) { /* 0 is special, avoid it */ 1241 entropy += 0xbadf00d; 1242 continue; 1243 } 1244 n = hash >> 5; 1245 mask = 1L << (hash & (VSID_NBPW-1)); 1246 hash = pmap_vsidcontext; 1247 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1248 /* anything free in this bucket? */ 1249 if (~pmap_vsid_bitmap[n] == 0) { 1250 entropy = hash ^ (hash >> 16); 1251 continue; 1252 } 1253 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1254 mask = 1L << i; 1255 hash &= ~(VSID_NBPW-1); 1256 hash |= i; 1257 } 1258 hash &= PTE_VSID >> PTE_VSID_SHFT; 1259 pmap_vsid_bitmap[n] |= mask; 1260 pm->pm_vsid = hash; 1261 #if defined (PPC_OEA) || defined (PPC_OEA64_BRIDGE) 1262 for (i = 0; i < 16; i++) 1263 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1264 SR_NOEXEC; 1265 #endif 1266 return; 1267 } 1268 panic("pmap_pinit: out of segments"); 1269 } 1270 1271 /* 1272 * Add a reference to the given pmap. 1273 */ 1274 void 1275 pmap_reference(pmap_t pm) 1276 { 1277 pm->pm_refs++; 1278 } 1279 1280 /* 1281 * Retire the given pmap from service. 1282 * Should only be called if the map contains no valid mappings. 1283 */ 1284 void 1285 pmap_destroy(pmap_t pm) 1286 { 1287 if (--pm->pm_refs == 0) { 1288 pmap_release(pm); 1289 pool_put(&pmap_pool, pm); 1290 } 1291 } 1292 1293 /* 1294 * Release any resources held by the given physical map. 1295 * Called when a pmap initialized by pmap_pinit is being released. 1296 */ 1297 void 1298 pmap_release(pmap_t pm) 1299 { 1300 int idx, mask; 1301 1302 KASSERT(pm->pm_stats.resident_count == 0); 1303 KASSERT(pm->pm_stats.wired_count == 0); 1304 1305 if (pm->pm_sr[0] == 0) 1306 panic("pmap_release"); 1307 idx = pm->pm_vsid & (NPMAPS-1); 1308 mask = 1 << (idx % VSID_NBPW); 1309 idx /= VSID_NBPW; 1310 1311 KASSERT(pmap_vsid_bitmap[idx] & mask); 1312 pmap_vsid_bitmap[idx] &= ~mask; 1313 } 1314 1315 /* 1316 * Copy the range specified by src_addr/len 1317 * from the source map to the range dst_addr/len 1318 * in the destination map. 1319 * 1320 * This routine is only advisory and need not do anything. 1321 */ 1322 void 1323 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1324 vsize_t len, vaddr_t src_addr) 1325 { 1326 PMAPCOUNT(copies); 1327 } 1328 1329 /* 1330 * Require that all active physical maps contain no 1331 * incorrect entries NOW. 1332 */ 1333 void 1334 pmap_update(struct pmap *pmap) 1335 { 1336 PMAPCOUNT(updates); 1337 TLBSYNC(); 1338 } 1339 1340 /* 1341 * Garbage collects the physical map system for 1342 * pages which are no longer used. 1343 * Success need not be guaranteed -- that is, there 1344 * may well be pages which are not referenced, but 1345 * others may be collected. 1346 * Called by the pageout daemon when pages are scarce. 1347 */ 1348 void 1349 pmap_collect(pmap_t pm) 1350 { 1351 PMAPCOUNT(collects); 1352 } 1353 1354 static inline int 1355 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1356 { 1357 int pteidx; 1358 /* 1359 * We can find the actual pte entry without searching by 1360 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1361 * and by noticing the HID bit. 1362 */ 1363 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1364 if (pvo->pvo_pte.pte_hi & PTE_HID) 1365 pteidx ^= pmap_pteg_mask * 8; 1366 return pteidx; 1367 } 1368 1369 volatile struct pte * 1370 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1371 { 1372 volatile struct pte *pt; 1373 1374 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1375 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1376 return NULL; 1377 #endif 1378 1379 /* 1380 * If we haven't been supplied the ptegidx, calculate it. 1381 */ 1382 if (pteidx == -1) { 1383 int ptegidx; 1384 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1385 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1386 } 1387 1388 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1389 1390 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1391 return pt; 1392 #else 1393 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1394 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1395 "pvo but no valid pte index", pvo); 1396 } 1397 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1398 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1399 "pvo but no valid pte", pvo); 1400 } 1401 1402 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1403 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1404 #if defined(DEBUG) || defined(PMAPCHECK) 1405 pmap_pte_print(pt); 1406 #endif 1407 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1408 "pmap_pteg_table %p but invalid in pvo", 1409 pvo, pt); 1410 } 1411 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1412 #if defined(DEBUG) || defined(PMAPCHECK) 1413 pmap_pte_print(pt); 1414 #endif 1415 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1416 "not match pte %p in pmap_pteg_table", 1417 pvo, pt); 1418 } 1419 return pt; 1420 } 1421 1422 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1423 #if defined(DEBUG) || defined(PMAPCHECK) 1424 pmap_pte_print(pt); 1425 #endif 1426 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1427 "pmap_pteg_table but valid in pvo", pvo, pt); 1428 } 1429 return NULL; 1430 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1431 } 1432 1433 struct pvo_entry * 1434 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1435 { 1436 struct pvo_entry *pvo; 1437 int ptegidx; 1438 1439 va &= ~ADDR_POFF; 1440 ptegidx = va_to_pteg(pm, va); 1441 1442 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1443 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1444 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1445 panic("pmap_pvo_find_va: invalid pvo %p on " 1446 "list %#x (%p)", pvo, ptegidx, 1447 &pmap_pvo_table[ptegidx]); 1448 #endif 1449 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1450 if (pteidx_p) 1451 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1452 return pvo; 1453 } 1454 } 1455 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1456 panic("%s: returning NULL for %s pmap, va: 0x%08lx\n", __FUNCTION__, 1457 (pm == pmap_kernel() ? "kernel" : "user"), va); 1458 return NULL; 1459 } 1460 1461 #if defined(DEBUG) || defined(PMAPCHECK) 1462 void 1463 pmap_pvo_check(const struct pvo_entry *pvo) 1464 { 1465 struct pvo_head *pvo_head; 1466 struct pvo_entry *pvo0; 1467 volatile struct pte *pt; 1468 int failed = 0; 1469 1470 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1471 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1472 1473 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1474 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1475 pvo, pvo->pvo_pmap); 1476 failed = 1; 1477 } 1478 1479 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1480 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1481 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1482 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1483 failed = 1; 1484 } 1485 1486 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1487 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1488 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1489 pvo, LIST_NEXT(pvo, pvo_vlink)); 1490 failed = 1; 1491 } 1492 1493 if (PVO_MANAGED_P(pvo)) { 1494 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1495 } else { 1496 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1497 printf("pmap_pvo_check: pvo %p: non kernel address " 1498 "on kernel unmanaged list\n", pvo); 1499 failed = 1; 1500 } 1501 pvo_head = &pmap_pvo_kunmanaged; 1502 } 1503 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1504 if (pvo0 == pvo) 1505 break; 1506 } 1507 if (pvo0 == NULL) { 1508 printf("pmap_pvo_check: pvo %p: not present " 1509 "on its vlist head %p\n", pvo, pvo_head); 1510 failed = 1; 1511 } 1512 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1513 printf("pmap_pvo_check: pvo %p: not present " 1514 "on its olist head\n", pvo); 1515 failed = 1; 1516 } 1517 pt = pmap_pvo_to_pte(pvo, -1); 1518 if (pt == NULL) { 1519 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1520 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1521 "no PTE\n", pvo); 1522 failed = 1; 1523 } 1524 } else { 1525 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1526 (uintptr_t) pt >= 1527 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1528 printf("pmap_pvo_check: pvo %p: pte %p not in " 1529 "pteg table\n", pvo, pt); 1530 failed = 1; 1531 } 1532 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1533 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1534 "no PTE\n", pvo); 1535 failed = 1; 1536 } 1537 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1538 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1539 "%#x/%#x\n", pvo, (unsigned int) pvo->pvo_pte.pte_hi, (unsigned int) pt->pte_hi); 1540 failed = 1; 1541 } 1542 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1543 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1544 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1545 "%#x/%#x\n", pvo, 1546 (unsigned int) (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1547 (unsigned int) (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1548 failed = 1; 1549 } 1550 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1551 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#lx" 1552 " doesn't not match PVO's VA %#lx\n", 1553 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1554 failed = 1; 1555 } 1556 if (failed) 1557 pmap_pte_print(pt); 1558 } 1559 if (failed) 1560 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1561 pvo->pvo_pmap); 1562 } 1563 #endif /* DEBUG || PMAPCHECK */ 1564 1565 /* 1566 * Search the PVO table looking for a non-wired entry. 1567 * If we find one, remove it and return it. 1568 */ 1569 1570 struct pvo_entry * 1571 pmap_pvo_reclaim(struct pmap *pm) 1572 { 1573 struct pvo_tqhead *pvoh; 1574 struct pvo_entry *pvo; 1575 uint32_t idx, endidx; 1576 1577 endidx = pmap_pvo_reclaim_nextidx; 1578 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1579 idx = (idx + 1) & pmap_pteg_mask) { 1580 pvoh = &pmap_pvo_table[idx]; 1581 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1582 if (!PVO_WIRED_P(pvo)) { 1583 pmap_pvo_remove(pvo, -1, NULL); 1584 pmap_pvo_reclaim_nextidx = idx; 1585 PMAPCOUNT(pvos_reclaimed); 1586 return pvo; 1587 } 1588 } 1589 } 1590 return NULL; 1591 } 1592 1593 /* 1594 * This returns whether this is the first mapping of a page. 1595 */ 1596 int 1597 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1598 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1599 { 1600 struct pvo_entry *pvo; 1601 struct pvo_tqhead *pvoh; 1602 register_t msr; 1603 int ptegidx; 1604 int i; 1605 int poolflags = PR_NOWAIT; 1606 1607 /* 1608 * Compute the PTE Group index. 1609 */ 1610 va &= ~ADDR_POFF; 1611 ptegidx = va_to_pteg(pm, va); 1612 1613 msr = pmap_interrupts_off(); 1614 1615 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1616 if (pmap_pvo_remove_depth > 0) 1617 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1618 if (++pmap_pvo_enter_depth > 1) 1619 panic("pmap_pvo_enter: called recursively!"); 1620 #endif 1621 1622 /* 1623 * Remove any existing mapping for this page. Reuse the 1624 * pvo entry if there a mapping. 1625 */ 1626 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1627 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1628 #ifdef DEBUG 1629 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1630 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1631 ~(PTE_REF|PTE_CHG)) == 0 && 1632 va < VM_MIN_KERNEL_ADDRESS) { 1633 printf("pmap_pvo_enter: pvo %p: dup %#x/%#lx\n", 1634 pvo, (unsigned int) pvo->pvo_pte.pte_lo, (unsigned int) pte_lo|pa); 1635 printf("pmap_pvo_enter: pte_hi=%#x sr=%#x\n", 1636 (unsigned int) pvo->pvo_pte.pte_hi, 1637 (unsigned int) pm->pm_sr[va >> ADDR_SR_SHFT]); 1638 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1639 #ifdef DDBX 1640 Debugger(); 1641 #endif 1642 } 1643 #endif 1644 PMAPCOUNT(mappings_replaced); 1645 pmap_pvo_remove(pvo, -1, NULL); 1646 break; 1647 } 1648 } 1649 1650 /* 1651 * If we aren't overwriting an mapping, try to allocate 1652 */ 1653 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1654 --pmap_pvo_enter_depth; 1655 #endif 1656 pmap_interrupts_restore(msr); 1657 if (pvo) { 1658 pmap_pvo_free(pvo); 1659 } 1660 pvo = pool_get(pl, poolflags); 1661 1662 #ifdef DEBUG 1663 /* 1664 * Exercise pmap_pvo_reclaim() a little. 1665 */ 1666 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1667 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1668 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1669 pool_put(pl, pvo); 1670 pvo = NULL; 1671 } 1672 #endif 1673 1674 msr = pmap_interrupts_off(); 1675 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1676 ++pmap_pvo_enter_depth; 1677 #endif 1678 if (pvo == NULL) { 1679 pvo = pmap_pvo_reclaim(pm); 1680 if (pvo == NULL) { 1681 if ((flags & PMAP_CANFAIL) == 0) 1682 panic("pmap_pvo_enter: failed"); 1683 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1684 pmap_pvo_enter_depth--; 1685 #endif 1686 PMAPCOUNT(pvos_failed); 1687 pmap_interrupts_restore(msr); 1688 return ENOMEM; 1689 } 1690 } 1691 1692 pvo->pvo_vaddr = va; 1693 pvo->pvo_pmap = pm; 1694 pvo->pvo_vaddr &= ~ADDR_POFF; 1695 if (flags & VM_PROT_EXECUTE) { 1696 PMAPCOUNT(exec_mappings); 1697 pvo_set_exec(pvo); 1698 } 1699 if (flags & PMAP_WIRED) 1700 pvo->pvo_vaddr |= PVO_WIRED; 1701 if (pvo_head != &pmap_pvo_kunmanaged) { 1702 pvo->pvo_vaddr |= PVO_MANAGED; 1703 PMAPCOUNT(mappings); 1704 } else { 1705 PMAPCOUNT(kernel_mappings); 1706 } 1707 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1708 1709 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1710 if (PVO_WIRED_P(pvo)) 1711 pvo->pvo_pmap->pm_stats.wired_count++; 1712 pvo->pvo_pmap->pm_stats.resident_count++; 1713 #if defined(DEBUG) 1714 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1715 DPRINTFN(PVOENTER, 1716 ("pmap_pvo_enter: pvo %p: pm %p va %#lx pa %#lx\n", 1717 pvo, pm, va, pa)); 1718 #endif 1719 1720 /* 1721 * We hope this succeeds but it isn't required. 1722 */ 1723 pvoh = &pmap_pvo_table[ptegidx]; 1724 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1725 if (i >= 0) { 1726 PVO_PTEGIDX_SET(pvo, i); 1727 PVO_WHERE(pvo, ENTER_INSERT); 1728 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1729 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1730 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1731 1732 } else { 1733 /* 1734 * Since we didn't have room for this entry (which makes it 1735 * and evicted entry), place it at the head of the list. 1736 */ 1737 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1738 PMAPCOUNT(ptes_evicted); 1739 pm->pm_evictions++; 1740 /* 1741 * If this is a kernel page, make sure it's active. 1742 */ 1743 if (pm == pmap_kernel()) { 1744 i = pmap_pte_spill(pm, va, FALSE); 1745 KASSERT(i); 1746 } 1747 } 1748 PMAP_PVO_CHECK(pvo); /* sanity check */ 1749 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1750 pmap_pvo_enter_depth--; 1751 #endif 1752 pmap_interrupts_restore(msr); 1753 return 0; 1754 } 1755 1756 void 1757 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1758 { 1759 volatile struct pte *pt; 1760 int ptegidx; 1761 1762 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1763 if (++pmap_pvo_remove_depth > 1) 1764 panic("pmap_pvo_remove: called recursively!"); 1765 #endif 1766 1767 /* 1768 * If we haven't been supplied the ptegidx, calculate it. 1769 */ 1770 if (pteidx == -1) { 1771 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1772 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1773 } else { 1774 ptegidx = pteidx >> 3; 1775 if (pvo->pvo_pte.pte_hi & PTE_HID) 1776 ptegidx ^= pmap_pteg_mask; 1777 } 1778 PMAP_PVO_CHECK(pvo); /* sanity check */ 1779 1780 /* 1781 * If there is an active pte entry, we need to deactivate it 1782 * (and save the ref & chg bits). 1783 */ 1784 pt = pmap_pvo_to_pte(pvo, pteidx); 1785 if (pt != NULL) { 1786 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1787 PVO_WHERE(pvo, REMOVE); 1788 PVO_PTEGIDX_CLR(pvo); 1789 PMAPCOUNT(ptes_removed); 1790 } else { 1791 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1792 pvo->pvo_pmap->pm_evictions--; 1793 } 1794 1795 /* 1796 * Account for executable mappings. 1797 */ 1798 if (PVO_EXECUTABLE_P(pvo)) 1799 pvo_clear_exec(pvo); 1800 1801 /* 1802 * Update our statistics. 1803 */ 1804 pvo->pvo_pmap->pm_stats.resident_count--; 1805 if (PVO_WIRED_P(pvo)) 1806 pvo->pvo_pmap->pm_stats.wired_count--; 1807 1808 /* 1809 * Save the REF/CHG bits into their cache if the page is managed. 1810 */ 1811 if (PVO_MANAGED_P(pvo)) { 1812 register_t ptelo = pvo->pvo_pte.pte_lo; 1813 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1814 1815 if (pg != NULL) { 1816 /* 1817 * If this page was changed and it is mapped exec, 1818 * invalidate it. 1819 */ 1820 if ((ptelo & PTE_CHG) && 1821 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1822 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1823 if (LIST_EMPTY(pvoh)) { 1824 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1825 "%#lx: clear-exec]\n", 1826 VM_PAGE_TO_PHYS(pg))); 1827 pmap_attr_clear(pg, PTE_EXEC); 1828 PMAPCOUNT(exec_uncached_pvo_remove); 1829 } else { 1830 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1831 "%#lx: syncicache]\n", 1832 VM_PAGE_TO_PHYS(pg))); 1833 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1834 PAGE_SIZE); 1835 PMAPCOUNT(exec_synced_pvo_remove); 1836 } 1837 } 1838 1839 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1840 } 1841 PMAPCOUNT(unmappings); 1842 } else { 1843 PMAPCOUNT(kernel_unmappings); 1844 } 1845 1846 /* 1847 * Remove the PVO from its lists and return it to the pool. 1848 */ 1849 LIST_REMOVE(pvo, pvo_vlink); 1850 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1851 if (pvol) { 1852 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1853 } 1854 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1855 pmap_pvo_remove_depth--; 1856 #endif 1857 } 1858 1859 void 1860 pmap_pvo_free(struct pvo_entry *pvo) 1861 { 1862 1863 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1864 } 1865 1866 void 1867 pmap_pvo_free_list(struct pvo_head *pvol) 1868 { 1869 struct pvo_entry *pvo, *npvo; 1870 1871 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1872 npvo = LIST_NEXT(pvo, pvo_vlink); 1873 LIST_REMOVE(pvo, pvo_vlink); 1874 pmap_pvo_free(pvo); 1875 } 1876 } 1877 1878 /* 1879 * Mark a mapping as executable. 1880 * If this is the first executable mapping in the segment, 1881 * clear the noexec flag. 1882 */ 1883 STATIC void 1884 pvo_set_exec(struct pvo_entry *pvo) 1885 { 1886 struct pmap *pm = pvo->pvo_pmap; 1887 1888 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1889 return; 1890 } 1891 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1892 #if defined (PPC_OEA) || defined (PPC_OEA64_BRIDGE) 1893 { 1894 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1895 if (pm->pm_exec[sr]++ == 0) { 1896 pm->pm_sr[sr] &= ~SR_NOEXEC; 1897 } 1898 } 1899 #endif 1900 } 1901 1902 /* 1903 * Mark a mapping as non-executable. 1904 * If this was the last executable mapping in the segment, 1905 * set the noexec flag. 1906 */ 1907 STATIC void 1908 pvo_clear_exec(struct pvo_entry *pvo) 1909 { 1910 struct pmap *pm = pvo->pvo_pmap; 1911 1912 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1913 return; 1914 } 1915 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1916 #if defined (PPC_OEA) || defined (PPC_OEA64_BRIDGE) 1917 { 1918 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1919 if (--pm->pm_exec[sr] == 0) { 1920 pm->pm_sr[sr] |= SR_NOEXEC; 1921 } 1922 } 1923 #endif 1924 } 1925 1926 /* 1927 * Insert physical page at pa into the given pmap at virtual address va. 1928 */ 1929 int 1930 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags) 1931 { 1932 struct mem_region *mp; 1933 struct pvo_head *pvo_head; 1934 struct vm_page *pg; 1935 struct pool *pl; 1936 register_t pte_lo; 1937 int error; 1938 u_int pvo_flags; 1939 u_int was_exec = 0; 1940 1941 if (__predict_false(!pmap_initialized)) { 1942 pvo_head = &pmap_pvo_kunmanaged; 1943 pl = &pmap_upvo_pool; 1944 pvo_flags = 0; 1945 pg = NULL; 1946 was_exec = PTE_EXEC; 1947 } else { 1948 pvo_head = pa_to_pvoh(pa, &pg); 1949 pl = &pmap_mpvo_pool; 1950 pvo_flags = PVO_MANAGED; 1951 } 1952 1953 DPRINTFN(ENTER, 1954 ("pmap_enter(%p, 0x%lx, 0x%lx, 0x%x, 0x%x):", 1955 pm, va, pa, prot, flags)); 1956 1957 /* 1958 * If this is a managed page, and it's the first reference to the 1959 * page clear the execness of the page. Otherwise fetch the execness. 1960 */ 1961 if (pg != NULL) 1962 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1963 1964 DPRINTFN(ENTER, (" was_exec=%d", was_exec)); 1965 1966 /* 1967 * Assume the page is cache inhibited and access is guarded unless 1968 * it's in our available memory array. If it is in the memory array, 1969 * asssume it's in memory coherent memory. 1970 */ 1971 pte_lo = PTE_IG; 1972 if ((flags & PMAP_NC) == 0) { 1973 for (mp = mem; mp->size; mp++) { 1974 if (pa >= mp->start && pa < mp->start + mp->size) { 1975 pte_lo = PTE_M; 1976 break; 1977 } 1978 } 1979 } 1980 1981 if (prot & VM_PROT_WRITE) 1982 pte_lo |= PTE_BW; 1983 else 1984 pte_lo |= PTE_BR; 1985 1986 /* 1987 * If this was in response to a fault, "pre-fault" the PTE's 1988 * changed/referenced bit appropriately. 1989 */ 1990 if (flags & VM_PROT_WRITE) 1991 pte_lo |= PTE_CHG; 1992 if (flags & VM_PROT_ALL) 1993 pte_lo |= PTE_REF; 1994 1995 /* 1996 * We need to know if this page can be executable 1997 */ 1998 flags |= (prot & VM_PROT_EXECUTE); 1999 2000 /* 2001 * Record mapping for later back-translation and pte spilling. 2002 * This will overwrite any existing mapping. 2003 */ 2004 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 2005 2006 /* 2007 * Flush the real page from the instruction cache if this page is 2008 * mapped executable and cacheable and has not been flushed since 2009 * the last time it was modified. 2010 */ 2011 if (error == 0 && 2012 (flags & VM_PROT_EXECUTE) && 2013 (pte_lo & PTE_I) == 0 && 2014 was_exec == 0) { 2015 DPRINTFN(ENTER, (" syncicache")); 2016 PMAPCOUNT(exec_synced); 2017 pmap_syncicache(pa, PAGE_SIZE); 2018 if (pg != NULL) { 2019 pmap_attr_save(pg, PTE_EXEC); 2020 PMAPCOUNT(exec_cached); 2021 #if defined(DEBUG) || defined(PMAPDEBUG) 2022 if (pmapdebug & PMAPDEBUG_ENTER) 2023 printf(" marked-as-exec"); 2024 else if (pmapdebug & PMAPDEBUG_EXEC) 2025 printf("[pmap_enter: %#lx: marked-as-exec]\n", 2026 VM_PAGE_TO_PHYS(pg)); 2027 2028 #endif 2029 } 2030 } 2031 2032 DPRINTFN(ENTER, (": error=%d\n", error)); 2033 2034 return error; 2035 } 2036 2037 void 2038 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2039 { 2040 struct mem_region *mp; 2041 register_t pte_lo; 2042 int error; 2043 2044 #if defined (PPC_OEA64_BRIDGE) 2045 if (va < VM_MIN_KERNEL_ADDRESS) 2046 panic("pmap_kenter_pa: attempt to enter " 2047 "non-kernel address %#lx!", va); 2048 #endif 2049 2050 DPRINTFN(KENTER, 2051 ("pmap_kenter_pa(%#lx,%#lx,%#x)\n", va, pa, prot)); 2052 2053 /* 2054 * Assume the page is cache inhibited and access is guarded unless 2055 * it's in our available memory array. If it is in the memory array, 2056 * asssume it's in memory coherent memory. 2057 */ 2058 pte_lo = PTE_IG; 2059 if ((prot & PMAP_NC) == 0) { 2060 for (mp = mem; mp->size; mp++) { 2061 if (pa >= mp->start && pa < mp->start + mp->size) { 2062 pte_lo = PTE_M; 2063 break; 2064 } 2065 } 2066 } 2067 2068 if (prot & VM_PROT_WRITE) 2069 pte_lo |= PTE_BW; 2070 else 2071 pte_lo |= PTE_BR; 2072 2073 /* 2074 * We don't care about REF/CHG on PVOs on the unmanaged list. 2075 */ 2076 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2077 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2078 2079 if (error != 0) 2080 panic("pmap_kenter_pa: failed to enter va %#lx pa %#lx: %d", 2081 va, pa, error); 2082 } 2083 2084 void 2085 pmap_kremove(vaddr_t va, vsize_t len) 2086 { 2087 if (va < VM_MIN_KERNEL_ADDRESS) 2088 panic("pmap_kremove: attempt to remove " 2089 "non-kernel address %#lx!", va); 2090 2091 DPRINTFN(KREMOVE,("pmap_kremove(%#lx,%#lx)\n", va, len)); 2092 pmap_remove(pmap_kernel(), va, va + len); 2093 } 2094 2095 /* 2096 * Remove the given range of mapping entries. 2097 */ 2098 void 2099 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2100 { 2101 struct pvo_head pvol; 2102 struct pvo_entry *pvo; 2103 register_t msr; 2104 int pteidx; 2105 2106 LIST_INIT(&pvol); 2107 msr = pmap_interrupts_off(); 2108 for (; va < endva; va += PAGE_SIZE) { 2109 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2110 if (pvo != NULL) { 2111 pmap_pvo_remove(pvo, pteidx, &pvol); 2112 } 2113 } 2114 pmap_interrupts_restore(msr); 2115 pmap_pvo_free_list(&pvol); 2116 } 2117 2118 /* 2119 * Get the physical page address for the given pmap/virtual address. 2120 */ 2121 boolean_t 2122 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2123 { 2124 struct pvo_entry *pvo; 2125 register_t msr; 2126 2127 2128 /* 2129 * If this is a kernel pmap lookup, also check the battable 2130 * and if we get a hit, translate the VA to a PA using the 2131 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2132 * that will wrap back to 0. 2133 */ 2134 if (pm == pmap_kernel() && 2135 (va < VM_MIN_KERNEL_ADDRESS || 2136 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2137 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2138 #if defined (PPC_OEA) 2139 if ((MFPVR() >> 16) != MPC601) { 2140 register_t batu = battable[va >> ADDR_SR_SHFT].batu; 2141 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2142 register_t batl = 2143 battable[va >> ADDR_SR_SHFT].batl; 2144 register_t mask = 2145 (~(batu & BAT_BL) << 15) & ~0x1ffffL; 2146 if (pap) 2147 *pap = (batl & mask) | (va & ~mask); 2148 return TRUE; 2149 } 2150 } else { 2151 register_t batu = battable[va >> 23].batu; 2152 register_t batl = battable[va >> 23].batl; 2153 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2154 if (BAT601_VALID_P(batl) && 2155 BAT601_VA_MATCH_P(batu, batl, va)) { 2156 register_t mask = 2157 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2158 if (pap) 2159 *pap = (batl & mask) | (va & ~mask); 2160 return TRUE; 2161 } else if (SR601_VALID_P(sr) && 2162 SR601_PA_MATCH_P(sr, va)) { 2163 if (pap) 2164 *pap = va; 2165 return TRUE; 2166 } 2167 } 2168 return FALSE; 2169 #elif defined (PPC_OEA64_BRIDGE) 2170 panic("%s: pm: %s, va: 0x%08lx\n", __FUNCTION__, 2171 (pm == pmap_kernel() ? "kernel" : "user"), va); 2172 #elif defined (PPC_OEA64) 2173 #error PPC_OEA64 not supported 2174 #endif /* PPC_OEA */ 2175 } 2176 2177 msr = pmap_interrupts_off(); 2178 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2179 if (pvo != NULL) { 2180 PMAP_PVO_CHECK(pvo); /* sanity check */ 2181 if (pap) 2182 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2183 | (va & ADDR_POFF); 2184 } 2185 pmap_interrupts_restore(msr); 2186 return pvo != NULL; 2187 } 2188 2189 /* 2190 * Lower the protection on the specified range of this pmap. 2191 */ 2192 void 2193 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2194 { 2195 struct pvo_entry *pvo; 2196 volatile struct pte *pt; 2197 register_t msr; 2198 int pteidx; 2199 2200 /* 2201 * Since this routine only downgrades protection, we should 2202 * always be called with at least one bit not set. 2203 */ 2204 KASSERT(prot != VM_PROT_ALL); 2205 2206 /* 2207 * If there is no protection, this is equivalent to 2208 * remove the pmap from the pmap. 2209 */ 2210 if ((prot & VM_PROT_READ) == 0) { 2211 pmap_remove(pm, va, endva); 2212 return; 2213 } 2214 2215 msr = pmap_interrupts_off(); 2216 for (; va < endva; va += PAGE_SIZE) { 2217 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2218 if (pvo == NULL) 2219 continue; 2220 PMAP_PVO_CHECK(pvo); /* sanity check */ 2221 2222 /* 2223 * Revoke executable if asked to do so. 2224 */ 2225 if ((prot & VM_PROT_EXECUTE) == 0) 2226 pvo_clear_exec(pvo); 2227 2228 #if 0 2229 /* 2230 * If the page is already read-only, no change 2231 * needs to be made. 2232 */ 2233 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2234 continue; 2235 #endif 2236 /* 2237 * Grab the PTE pointer before we diddle with 2238 * the cached PTE copy. 2239 */ 2240 pt = pmap_pvo_to_pte(pvo, pteidx); 2241 /* 2242 * Change the protection of the page. 2243 */ 2244 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2245 pvo->pvo_pte.pte_lo |= PTE_BR; 2246 2247 /* 2248 * If the PVO is in the page table, update 2249 * that pte at well. 2250 */ 2251 if (pt != NULL) { 2252 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2253 PVO_WHERE(pvo, PMAP_PROTECT); 2254 PMAPCOUNT(ptes_changed); 2255 } 2256 2257 PMAP_PVO_CHECK(pvo); /* sanity check */ 2258 } 2259 pmap_interrupts_restore(msr); 2260 } 2261 2262 void 2263 pmap_unwire(pmap_t pm, vaddr_t va) 2264 { 2265 struct pvo_entry *pvo; 2266 register_t msr; 2267 2268 msr = pmap_interrupts_off(); 2269 pvo = pmap_pvo_find_va(pm, va, NULL); 2270 if (pvo != NULL) { 2271 if (PVO_WIRED_P(pvo)) { 2272 pvo->pvo_vaddr &= ~PVO_WIRED; 2273 pm->pm_stats.wired_count--; 2274 } 2275 PMAP_PVO_CHECK(pvo); /* sanity check */ 2276 } 2277 pmap_interrupts_restore(msr); 2278 } 2279 2280 /* 2281 * Lower the protection on the specified physical page. 2282 */ 2283 void 2284 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2285 { 2286 struct pvo_head *pvo_head, pvol; 2287 struct pvo_entry *pvo, *next_pvo; 2288 volatile struct pte *pt; 2289 register_t msr; 2290 2291 KASSERT(prot != VM_PROT_ALL); 2292 LIST_INIT(&pvol); 2293 msr = pmap_interrupts_off(); 2294 2295 /* 2296 * When UVM reuses a page, it does a pmap_page_protect with 2297 * VM_PROT_NONE. At that point, we can clear the exec flag 2298 * since we know the page will have different contents. 2299 */ 2300 if ((prot & VM_PROT_READ) == 0) { 2301 DPRINTFN(EXEC, ("[pmap_page_protect: %#lx: clear-exec]\n", 2302 VM_PAGE_TO_PHYS(pg))); 2303 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2304 PMAPCOUNT(exec_uncached_page_protect); 2305 pmap_attr_clear(pg, PTE_EXEC); 2306 } 2307 } 2308 2309 pvo_head = vm_page_to_pvoh(pg); 2310 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2311 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2312 PMAP_PVO_CHECK(pvo); /* sanity check */ 2313 2314 /* 2315 * Downgrading to no mapping at all, we just remove the entry. 2316 */ 2317 if ((prot & VM_PROT_READ) == 0) { 2318 pmap_pvo_remove(pvo, -1, &pvol); 2319 continue; 2320 } 2321 2322 /* 2323 * If EXEC permission is being revoked, just clear the 2324 * flag in the PVO. 2325 */ 2326 if ((prot & VM_PROT_EXECUTE) == 0) 2327 pvo_clear_exec(pvo); 2328 2329 /* 2330 * If this entry is already RO, don't diddle with the 2331 * page table. 2332 */ 2333 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2334 PMAP_PVO_CHECK(pvo); 2335 continue; 2336 } 2337 2338 /* 2339 * Grab the PTE before the we diddle the bits so 2340 * pvo_to_pte can verify the pte contents are as 2341 * expected. 2342 */ 2343 pt = pmap_pvo_to_pte(pvo, -1); 2344 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2345 pvo->pvo_pte.pte_lo |= PTE_BR; 2346 if (pt != NULL) { 2347 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2348 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2349 PMAPCOUNT(ptes_changed); 2350 } 2351 PMAP_PVO_CHECK(pvo); /* sanity check */ 2352 } 2353 pmap_interrupts_restore(msr); 2354 pmap_pvo_free_list(&pvol); 2355 } 2356 2357 /* 2358 * Activate the address space for the specified process. If the process 2359 * is the current process, load the new MMU context. 2360 */ 2361 void 2362 pmap_activate(struct lwp *l) 2363 { 2364 struct pcb *pcb = &l->l_addr->u_pcb; 2365 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2366 2367 DPRINTFN(ACTIVATE, 2368 ("pmap_activate: lwp %p (curlwp %p)\n", l, curlwp)); 2369 2370 /* 2371 * XXX Normally performed in cpu_fork(). 2372 */ 2373 pcb->pcb_pm = pmap; 2374 2375 /* 2376 * In theory, the SR registers need only be valid on return 2377 * to user space wait to do them there. 2378 */ 2379 if (l == curlwp) { 2380 /* Store pointer to new current pmap. */ 2381 curpm = pmap; 2382 } 2383 } 2384 2385 /* 2386 * Deactivate the specified process's address space. 2387 */ 2388 void 2389 pmap_deactivate(struct lwp *l) 2390 { 2391 } 2392 2393 boolean_t 2394 pmap_query_bit(struct vm_page *pg, int ptebit) 2395 { 2396 struct pvo_entry *pvo; 2397 volatile struct pte *pt; 2398 register_t msr; 2399 2400 if (pmap_attr_fetch(pg) & ptebit) 2401 return TRUE; 2402 2403 msr = pmap_interrupts_off(); 2404 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2405 PMAP_PVO_CHECK(pvo); /* sanity check */ 2406 /* 2407 * See if we saved the bit off. If so cache, it and return 2408 * success. 2409 */ 2410 if (pvo->pvo_pte.pte_lo & ptebit) { 2411 pmap_attr_save(pg, ptebit); 2412 PMAP_PVO_CHECK(pvo); /* sanity check */ 2413 pmap_interrupts_restore(msr); 2414 return TRUE; 2415 } 2416 } 2417 /* 2418 * No luck, now go thru the hard part of looking at the ptes 2419 * themselves. Sync so any pending REF/CHG bits are flushed 2420 * to the PTEs. 2421 */ 2422 SYNC(); 2423 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2424 PMAP_PVO_CHECK(pvo); /* sanity check */ 2425 /* 2426 * See if this pvo have a valid PTE. If so, fetch the 2427 * REF/CHG bits from the valid PTE. If the appropriate 2428 * ptebit is set, cache, it and return success. 2429 */ 2430 pt = pmap_pvo_to_pte(pvo, -1); 2431 if (pt != NULL) { 2432 pmap_pte_synch(pt, &pvo->pvo_pte); 2433 if (pvo->pvo_pte.pte_lo & ptebit) { 2434 pmap_attr_save(pg, ptebit); 2435 PMAP_PVO_CHECK(pvo); /* sanity check */ 2436 pmap_interrupts_restore(msr); 2437 return TRUE; 2438 } 2439 } 2440 } 2441 pmap_interrupts_restore(msr); 2442 return FALSE; 2443 } 2444 2445 boolean_t 2446 pmap_clear_bit(struct vm_page *pg, int ptebit) 2447 { 2448 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2449 struct pvo_entry *pvo; 2450 volatile struct pte *pt; 2451 register_t msr; 2452 int rv = 0; 2453 2454 msr = pmap_interrupts_off(); 2455 2456 /* 2457 * Fetch the cache value 2458 */ 2459 rv |= pmap_attr_fetch(pg); 2460 2461 /* 2462 * Clear the cached value. 2463 */ 2464 pmap_attr_clear(pg, ptebit); 2465 2466 /* 2467 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2468 * can reset the right ones). Note that since the pvo entries and 2469 * list heads are accessed via BAT0 and are never placed in the 2470 * page table, we don't have to worry about further accesses setting 2471 * the REF/CHG bits. 2472 */ 2473 SYNC(); 2474 2475 /* 2476 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2477 * valid PTE. If so, clear the ptebit from the valid PTE. 2478 */ 2479 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2480 PMAP_PVO_CHECK(pvo); /* sanity check */ 2481 pt = pmap_pvo_to_pte(pvo, -1); 2482 if (pt != NULL) { 2483 /* 2484 * Only sync the PTE if the bit we are looking 2485 * for is not already set. 2486 */ 2487 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2488 pmap_pte_synch(pt, &pvo->pvo_pte); 2489 /* 2490 * If the bit we are looking for was already set, 2491 * clear that bit in the pte. 2492 */ 2493 if (pvo->pvo_pte.pte_lo & ptebit) 2494 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2495 } 2496 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2497 pvo->pvo_pte.pte_lo &= ~ptebit; 2498 PMAP_PVO_CHECK(pvo); /* sanity check */ 2499 } 2500 pmap_interrupts_restore(msr); 2501 2502 /* 2503 * If we are clearing the modify bit and this page was marked EXEC 2504 * and the user of the page thinks the page was modified, then we 2505 * need to clean it from the icache if it's mapped or clear the EXEC 2506 * bit if it's not mapped. The page itself might not have the CHG 2507 * bit set if the modification was done via DMA to the page. 2508 */ 2509 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2510 if (LIST_EMPTY(pvoh)) { 2511 DPRINTFN(EXEC, ("[pmap_clear_bit: %#lx: clear-exec]\n", 2512 VM_PAGE_TO_PHYS(pg))); 2513 pmap_attr_clear(pg, PTE_EXEC); 2514 PMAPCOUNT(exec_uncached_clear_modify); 2515 } else { 2516 DPRINTFN(EXEC, ("[pmap_clear_bit: %#lx: syncicache]\n", 2517 VM_PAGE_TO_PHYS(pg))); 2518 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2519 PMAPCOUNT(exec_synced_clear_modify); 2520 } 2521 } 2522 return (rv & ptebit) != 0; 2523 } 2524 2525 void 2526 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2527 { 2528 struct pvo_entry *pvo; 2529 size_t offset = va & ADDR_POFF; 2530 int s; 2531 2532 s = splvm(); 2533 while (len > 0) { 2534 size_t seglen = PAGE_SIZE - offset; 2535 if (seglen > len) 2536 seglen = len; 2537 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2538 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2539 pmap_syncicache( 2540 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2541 PMAP_PVO_CHECK(pvo); 2542 } 2543 va += seglen; 2544 len -= seglen; 2545 offset = 0; 2546 } 2547 splx(s); 2548 } 2549 2550 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2551 void 2552 pmap_pte_print(volatile struct pte *pt) 2553 { 2554 printf("PTE %p: ", pt); 2555 2556 #if defined(PPC_OEA) 2557 /* High word: */ 2558 printf("0x%08lx: [", pt->pte_hi); 2559 #elif defined (PPC_OEA64_BRIDGE) 2560 printf("0x%016llx: [", pt->pte_hi); 2561 #else /* PPC_OEA64 */ 2562 printf("0x%016lx: [", pt->pte_hi); 2563 #endif /* PPC_OEA */ 2564 2565 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2566 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2567 2568 #if defined (PPC_OEA) 2569 printf("0x%06lx 0x%02lx", 2570 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2571 pt->pte_hi & PTE_API); 2572 printf(" (va 0x%08lx)] ", pmap_pte_to_va(pt)); 2573 #elif defined (PPC_OEA64) 2574 printf("0x%06lx 0x%02lx", 2575 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2576 pt->pte_hi & PTE_API); 2577 printf(" (va 0x%016lx)] ", pmap_pte_to_va(pt)); 2578 #else 2579 /* PPC_OEA64_BRIDGE */ 2580 printf("0x%06llx 0x%02llx", 2581 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2582 pt->pte_hi & PTE_API); 2583 printf(" (va 0x%08lx)] ", pmap_pte_to_va(pt)); 2584 #endif /* PPC_OEA */ 2585 2586 /* Low word: */ 2587 #if defined (PPC_OEA) 2588 printf(" 0x%08lx: [", pt->pte_lo); 2589 printf("0x%05lx... ", pt->pte_lo >> 12); 2590 #elif defined (PPC_OEA64) 2591 printf(" 0x%016lx: [", pt->pte_lo); 2592 printf("0x%012lx... ", pt->pte_lo >> 12); 2593 #else /* PPC_OEA64_BRIDGE */ 2594 printf(" 0x%016llx: [", pt->pte_lo); 2595 printf("0x%012llx... ", pt->pte_lo >> 12); 2596 #endif 2597 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2598 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2599 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2600 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2601 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2602 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2603 switch (pt->pte_lo & PTE_PP) { 2604 case PTE_BR: printf("br]\n"); break; 2605 case PTE_BW: printf("bw]\n"); break; 2606 case PTE_SO: printf("so]\n"); break; 2607 case PTE_SW: printf("sw]\n"); break; 2608 } 2609 } 2610 #endif 2611 2612 #if defined(DDB) 2613 void 2614 pmap_pteg_check(void) 2615 { 2616 volatile struct pte *pt; 2617 int i; 2618 int ptegidx; 2619 u_int p_valid = 0; 2620 u_int s_valid = 0; 2621 u_int invalid = 0; 2622 2623 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2624 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2625 if (pt->pte_hi & PTE_VALID) { 2626 if (pt->pte_hi & PTE_HID) 2627 s_valid++; 2628 else 2629 { 2630 p_valid++; 2631 } 2632 } else 2633 invalid++; 2634 } 2635 } 2636 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2637 p_valid, p_valid, s_valid, s_valid, 2638 invalid, invalid); 2639 } 2640 2641 void 2642 pmap_print_mmuregs(void) 2643 { 2644 int i; 2645 u_int cpuvers; 2646 #ifndef PPC_OEA64 2647 vaddr_t addr; 2648 register_t soft_sr[16]; 2649 #endif 2650 #if defined (PPC_OEA) && !defined (PPC_OEA64) && !defined (PPC_OEA64_BRIDGE) 2651 struct bat soft_ibat[4]; 2652 struct bat soft_dbat[4]; 2653 #endif 2654 register_t sdr1; 2655 2656 cpuvers = MFPVR() >> 16; 2657 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2658 #ifndef PPC_OEA64 2659 addr = 0; 2660 for (i = 0; i < 16; i++) { 2661 soft_sr[i] = MFSRIN(addr); 2662 addr += (1 << ADDR_SR_SHFT); 2663 } 2664 #endif 2665 2666 #if defined(PPC_OEA) && !defined (PPC_OEA64) && !defined (PPC_OEA64_BRIDGE) 2667 /* read iBAT (601: uBAT) registers */ 2668 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2669 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2670 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2671 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2672 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2673 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2674 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2675 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2676 2677 2678 if (cpuvers != MPC601) { 2679 /* read dBAT registers */ 2680 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2681 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2682 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2683 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2684 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2685 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2686 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2687 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2688 } 2689 #endif 2690 2691 printf("SDR1:\t0x%lx\n", (long) sdr1); 2692 #ifndef PPC_OEA64 2693 printf("SR[]:\t"); 2694 for (i = 0; i < 4; i++) 2695 printf("0x%08lx, ", (long) soft_sr[i]); 2696 printf("\n\t"); 2697 for ( ; i < 8; i++) 2698 printf("0x%08lx, ", (long) soft_sr[i]); 2699 printf("\n\t"); 2700 for ( ; i < 12; i++) 2701 printf("0x%08lx, ", (long) soft_sr[i]); 2702 printf("\n\t"); 2703 for ( ; i < 16; i++) 2704 printf("0x%08lx, ", (long) soft_sr[i]); 2705 printf("\n"); 2706 #endif 2707 2708 #if defined(PPC_OEA) && !defined (PPC_OEA64) && !defined (PPC_OEA64_BRIDGE) 2709 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2710 for (i = 0; i < 4; i++) { 2711 printf("0x%08lx 0x%08lx, ", 2712 soft_ibat[i].batu, soft_ibat[i].batl); 2713 if (i == 1) 2714 printf("\n\t"); 2715 } 2716 if (cpuvers != MPC601) { 2717 printf("\ndBAT[]:\t"); 2718 for (i = 0; i < 4; i++) { 2719 printf("0x%08lx 0x%08lx, ", 2720 soft_dbat[i].batu, soft_dbat[i].batl); 2721 if (i == 1) 2722 printf("\n\t"); 2723 } 2724 } 2725 printf("\n"); 2726 #endif /* PPC_OEA... */ 2727 } 2728 2729 void 2730 pmap_print_pte(pmap_t pm, vaddr_t va) 2731 { 2732 struct pvo_entry *pvo; 2733 volatile struct pte *pt; 2734 int pteidx; 2735 2736 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2737 if (pvo != NULL) { 2738 pt = pmap_pvo_to_pte(pvo, pteidx); 2739 if (pt != NULL) { 2740 #if defined (PPC_OEA) || defined (PPC_OEA64) 2741 printf("VA %#lx -> %p -> %s %#lx, %#lx\n", 2742 va, pt, 2743 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2744 pt->pte_hi, pt->pte_lo); 2745 #else /* PPC_OEA64_BRIDGE */ 2746 printf("VA %#lx -> %p -> %s %#llx, %#llx\n", 2747 va, pt, 2748 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2749 pt->pte_hi, pt->pte_lo); 2750 #endif 2751 } else { 2752 printf("No valid PTE found\n"); 2753 } 2754 } else { 2755 printf("Address not in pmap\n"); 2756 } 2757 } 2758 2759 void 2760 pmap_pteg_dist(void) 2761 { 2762 struct pvo_entry *pvo; 2763 int ptegidx; 2764 int depth; 2765 int max_depth = 0; 2766 unsigned int depths[64]; 2767 2768 memset(depths, 0, sizeof(depths)); 2769 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2770 depth = 0; 2771 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2772 depth++; 2773 } 2774 if (depth > max_depth) 2775 max_depth = depth; 2776 if (depth > 63) 2777 depth = 63; 2778 depths[depth]++; 2779 } 2780 2781 for (depth = 0; depth < 64; depth++) { 2782 printf(" [%2d]: %8u", depth, depths[depth]); 2783 if ((depth & 3) == 3) 2784 printf("\n"); 2785 if (depth == max_depth) 2786 break; 2787 } 2788 if ((depth & 3) != 3) 2789 printf("\n"); 2790 printf("Max depth found was %d\n", max_depth); 2791 } 2792 #endif /* DEBUG */ 2793 2794 #if defined(PMAPCHECK) || defined(DEBUG) 2795 void 2796 pmap_pvo_verify(void) 2797 { 2798 int ptegidx; 2799 int s; 2800 2801 s = splvm(); 2802 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2803 struct pvo_entry *pvo; 2804 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2805 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2806 panic("pmap_pvo_verify: invalid pvo %p " 2807 "on list %#x", pvo, ptegidx); 2808 pmap_pvo_check(pvo); 2809 } 2810 } 2811 splx(s); 2812 } 2813 #endif /* PMAPCHECK */ 2814 2815 2816 void * 2817 pmap_pool_ualloc(struct pool *pp, int flags) 2818 { 2819 struct pvo_page *pvop; 2820 2821 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2822 if (pvop != NULL) { 2823 pmap_upvop_free--; 2824 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2825 return pvop; 2826 } 2827 if (uvm.page_init_done != TRUE) { 2828 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2829 } 2830 return pmap_pool_malloc(pp, flags); 2831 } 2832 2833 void * 2834 pmap_pool_malloc(struct pool *pp, int flags) 2835 { 2836 struct pvo_page *pvop; 2837 struct vm_page *pg; 2838 2839 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2840 if (pvop != NULL) { 2841 pmap_mpvop_free--; 2842 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2843 return pvop; 2844 } 2845 again: 2846 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2847 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2848 if (__predict_false(pg == NULL)) { 2849 if (flags & PR_WAITOK) { 2850 uvm_wait("plpg"); 2851 goto again; 2852 } else { 2853 return (0); 2854 } 2855 } 2856 return (void *) VM_PAGE_TO_PHYS(pg); 2857 } 2858 2859 void 2860 pmap_pool_ufree(struct pool *pp, void *va) 2861 { 2862 struct pvo_page *pvop; 2863 #if 0 2864 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2865 pmap_pool_mfree(va, size, tag); 2866 return; 2867 } 2868 #endif 2869 pvop = va; 2870 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2871 pmap_upvop_free++; 2872 if (pmap_upvop_free > pmap_upvop_maxfree) 2873 pmap_upvop_maxfree = pmap_upvop_free; 2874 } 2875 2876 void 2877 pmap_pool_mfree(struct pool *pp, void *va) 2878 { 2879 struct pvo_page *pvop; 2880 2881 pvop = va; 2882 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2883 pmap_mpvop_free++; 2884 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2885 pmap_mpvop_maxfree = pmap_mpvop_free; 2886 #if 0 2887 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2888 #endif 2889 } 2890 2891 /* 2892 * This routine in bootstraping to steal to-be-managed memory (which will 2893 * then be unmanaged). We use it to grab from the first 256MB for our 2894 * pmap needs and above 256MB for other stuff. 2895 */ 2896 vaddr_t 2897 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2898 { 2899 vsize_t size; 2900 vaddr_t va; 2901 paddr_t pa = 0; 2902 int npgs, bank; 2903 struct vm_physseg *ps; 2904 2905 if (uvm.page_init_done == TRUE) 2906 panic("pmap_steal_memory: called _after_ bootstrap"); 2907 2908 *vstartp = VM_MIN_KERNEL_ADDRESS; 2909 *vendp = VM_MAX_KERNEL_ADDRESS; 2910 2911 size = round_page(vsize); 2912 npgs = atop(size); 2913 2914 /* 2915 * PA 0 will never be among those given to UVM so we can use it 2916 * to indicate we couldn't steal any memory. 2917 */ 2918 for (ps = vm_physmem, bank = 0; bank < vm_nphysseg; bank++, ps++) { 2919 if (ps->free_list == VM_FREELIST_FIRST256 && 2920 ps->avail_end - ps->avail_start >= npgs) { 2921 pa = ptoa(ps->avail_start); 2922 break; 2923 } 2924 } 2925 2926 if (pa == 0) 2927 panic("pmap_steal_memory: no approriate memory to steal!"); 2928 2929 ps->avail_start += npgs; 2930 ps->start += npgs; 2931 2932 /* 2933 * If we've used up all the pages in the segment, remove it and 2934 * compact the list. 2935 */ 2936 if (ps->avail_start == ps->end) { 2937 /* 2938 * If this was the last one, then a very bad thing has occurred 2939 */ 2940 if (--vm_nphysseg == 0) 2941 panic("pmap_steal_memory: out of memory!"); 2942 2943 printf("pmap_steal_memory: consumed bank %d\n", bank); 2944 for (; bank < vm_nphysseg; bank++, ps++) { 2945 ps[0] = ps[1]; 2946 } 2947 } 2948 2949 va = (vaddr_t) pa; 2950 memset((caddr_t) va, 0, size); 2951 pmap_pages_stolen += npgs; 2952 #ifdef DEBUG 2953 if (pmapdebug && npgs > 1) { 2954 u_int cnt = 0; 2955 for (bank = 0, ps = vm_physmem; bank < vm_nphysseg; bank++, ps++) 2956 cnt += ps->avail_end - ps->avail_start; 2957 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2958 npgs, pmap_pages_stolen, cnt); 2959 } 2960 #endif 2961 2962 return va; 2963 } 2964 2965 /* 2966 * Find a chuck of memory with right size and alignment. 2967 */ 2968 void * 2969 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2970 { 2971 struct mem_region *mp; 2972 paddr_t s, e; 2973 int i, j; 2974 2975 size = round_page(size); 2976 2977 DPRINTFN(BOOT, 2978 ("pmap_boot_find_memory: size=%lx, alignment=%lx, at_end=%d", 2979 size, alignment, at_end)); 2980 2981 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2982 panic("pmap_boot_find_memory: invalid alignment %lx", 2983 alignment); 2984 2985 if (at_end) { 2986 if (alignment != PAGE_SIZE) 2987 panic("pmap_boot_find_memory: invalid ending " 2988 "alignment %lx", alignment); 2989 2990 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 2991 s = mp->start + mp->size - size; 2992 if (s >= mp->start && mp->size >= size) { 2993 DPRINTFN(BOOT,(": %lx\n", s)); 2994 DPRINTFN(BOOT, 2995 ("pmap_boot_find_memory: b-avail[%d] start " 2996 "0x%lx size 0x%lx\n", mp - avail, 2997 mp->start, mp->size)); 2998 mp->size -= size; 2999 DPRINTFN(BOOT, 3000 ("pmap_boot_find_memory: a-avail[%d] start " 3001 "0x%lx size 0x%lx\n", mp - avail, 3002 mp->start, mp->size)); 3003 return (void *) s; 3004 } 3005 } 3006 panic("pmap_boot_find_memory: no available memory"); 3007 } 3008 3009 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3010 s = (mp->start + alignment - 1) & ~(alignment-1); 3011 e = s + size; 3012 3013 /* 3014 * Is the calculated region entirely within the region? 3015 */ 3016 if (s < mp->start || e > mp->start + mp->size) 3017 continue; 3018 3019 DPRINTFN(BOOT,(": %lx\n", s)); 3020 if (s == mp->start) { 3021 /* 3022 * If the block starts at the beginning of region, 3023 * adjust the size & start. (the region may now be 3024 * zero in length) 3025 */ 3026 DPRINTFN(BOOT, 3027 ("pmap_boot_find_memory: b-avail[%d] start " 3028 "0x%lx size 0x%lx\n", i, mp->start, mp->size)); 3029 mp->start += size; 3030 mp->size -= size; 3031 DPRINTFN(BOOT, 3032 ("pmap_boot_find_memory: a-avail[%d] start " 3033 "0x%lx size 0x%lx\n", i, mp->start, mp->size)); 3034 } else if (e == mp->start + mp->size) { 3035 /* 3036 * If the block starts at the beginning of region, 3037 * adjust only the size. 3038 */ 3039 DPRINTFN(BOOT, 3040 ("pmap_boot_find_memory: b-avail[%d] start " 3041 "0x%lx size 0x%lx\n", i, mp->start, mp->size)); 3042 mp->size -= size; 3043 DPRINTFN(BOOT, 3044 ("pmap_boot_find_memory: a-avail[%d] start " 3045 "0x%lx size 0x%lx\n", i, mp->start, mp->size)); 3046 } else { 3047 /* 3048 * Block is in the middle of the region, so we 3049 * have to split it in two. 3050 */ 3051 for (j = avail_cnt; j > i + 1; j--) { 3052 avail[j] = avail[j-1]; 3053 } 3054 DPRINTFN(BOOT, 3055 ("pmap_boot_find_memory: b-avail[%d] start " 3056 "0x%lx size 0x%lx\n", i, mp->start, mp->size)); 3057 mp[1].start = e; 3058 mp[1].size = mp[0].start + mp[0].size - e; 3059 mp[0].size = s - mp[0].start; 3060 avail_cnt++; 3061 for (; i < avail_cnt; i++) { 3062 DPRINTFN(BOOT, 3063 ("pmap_boot_find_memory: a-avail[%d] " 3064 "start 0x%lx size 0x%lx\n", i, 3065 avail[i].start, avail[i].size)); 3066 } 3067 } 3068 return (void *) s; 3069 } 3070 panic("pmap_boot_find_memory: not enough memory for " 3071 "%lx/%lx allocation?", size, alignment); 3072 } 3073 3074 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3075 #if defined (PPC_OEA64_BRIDGE) 3076 int 3077 pmap_setup_segment0_map(int use_large_pages, ...) 3078 { 3079 vaddr_t va; 3080 3081 register_t pte_lo = 0x0; 3082 int ptegidx = 0, i = 0; 3083 struct pte pte; 3084 va_list ap; 3085 3086 /* Coherent + Supervisor RW, no user access */ 3087 pte_lo = PTE_M; 3088 3089 /* XXXSL 3090 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3091 * these have to take priority. 3092 */ 3093 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3094 ptegidx = va_to_pteg(pmap_kernel(), va); 3095 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3096 i = pmap_pte_insert(ptegidx, &pte); 3097 } 3098 3099 va_start(ap, use_large_pages); 3100 while (1) { 3101 paddr_t pa; 3102 size_t size; 3103 3104 va = va_arg(ap, vaddr_t); 3105 3106 if (va == 0) 3107 break; 3108 3109 pa = va_arg(ap, paddr_t); 3110 size = va_arg(ap, size_t); 3111 3112 for (; va < (va + size); va += 0x1000, pa += 0x1000) { 3113 #if 0 3114 printf("%s: Inserting: va: 0x%08lx, pa: 0x%08lx\n", __FUNCTION__, va, pa); 3115 #endif 3116 ptegidx = va_to_pteg(pmap_kernel(), va); 3117 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3118 i = pmap_pte_insert(ptegidx, &pte); 3119 } 3120 } 3121 3122 TLBSYNC(); 3123 SYNC(); 3124 return (0); 3125 } 3126 #endif /* PPC_OEA64_BRIDGE */ 3127 3128 /* 3129 * This is not part of the defined PMAP interface and is specific to the 3130 * PowerPC architecture. This is called during initppc, before the system 3131 * is really initialized. 3132 */ 3133 void 3134 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3135 { 3136 struct mem_region *mp, tmp; 3137 paddr_t s, e; 3138 psize_t size; 3139 int i, j; 3140 3141 /* 3142 * Get memory. 3143 */ 3144 mem_regions(&mem, &avail); 3145 #if defined(DEBUG) 3146 if (pmapdebug & PMAPDEBUG_BOOT) { 3147 printf("pmap_bootstrap: memory configuration:\n"); 3148 for (mp = mem; mp->size; mp++) { 3149 printf("pmap_bootstrap: mem start 0x%lx size 0x%lx\n", 3150 mp->start, mp->size); 3151 } 3152 for (mp = avail; mp->size; mp++) { 3153 printf("pmap_bootstrap: avail start 0x%lx size 0x%lx\n", 3154 mp->start, mp->size); 3155 } 3156 } 3157 #endif 3158 3159 /* 3160 * Find out how much physical memory we have and in how many chunks. 3161 */ 3162 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3163 if (mp->start >= pmap_memlimit) 3164 continue; 3165 if (mp->start + mp->size > pmap_memlimit) { 3166 size = pmap_memlimit - mp->start; 3167 physmem += btoc(size); 3168 } else { 3169 physmem += btoc(mp->size); 3170 } 3171 mem_cnt++; 3172 } 3173 3174 /* 3175 * Count the number of available entries. 3176 */ 3177 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3178 avail_cnt++; 3179 3180 /* 3181 * Page align all regions. 3182 */ 3183 kernelstart = trunc_page(kernelstart); 3184 kernelend = round_page(kernelend); 3185 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3186 s = round_page(mp->start); 3187 mp->size -= (s - mp->start); 3188 mp->size = trunc_page(mp->size); 3189 mp->start = s; 3190 e = mp->start + mp->size; 3191 3192 DPRINTFN(BOOT, 3193 ("pmap_bootstrap: b-avail[%d] start 0x%lx size 0x%lx\n", 3194 i, mp->start, mp->size)); 3195 3196 /* 3197 * Don't allow the end to run beyond our artificial limit 3198 */ 3199 if (e > pmap_memlimit) 3200 e = pmap_memlimit; 3201 3202 /* 3203 * Is this region empty or strange? skip it. 3204 */ 3205 if (e <= s) { 3206 mp->start = 0; 3207 mp->size = 0; 3208 continue; 3209 } 3210 3211 /* 3212 * Does this overlap the beginning of kernel? 3213 * Does extend past the end of the kernel? 3214 */ 3215 else if (s < kernelstart && e > kernelstart) { 3216 if (e > kernelend) { 3217 avail[avail_cnt].start = kernelend; 3218 avail[avail_cnt].size = e - kernelend; 3219 avail_cnt++; 3220 } 3221 mp->size = kernelstart - s; 3222 } 3223 /* 3224 * Check whether this region overlaps the end of the kernel. 3225 */ 3226 else if (s < kernelend && e > kernelend) { 3227 mp->start = kernelend; 3228 mp->size = e - kernelend; 3229 } 3230 /* 3231 * Look whether this regions is completely inside the kernel. 3232 * Nuke it if it does. 3233 */ 3234 else if (s >= kernelstart && e <= kernelend) { 3235 mp->start = 0; 3236 mp->size = 0; 3237 } 3238 /* 3239 * If the user imposed a memory limit, enforce it. 3240 */ 3241 else if (s >= pmap_memlimit) { 3242 mp->start = -PAGE_SIZE; /* let's know why */ 3243 mp->size = 0; 3244 } 3245 else { 3246 mp->start = s; 3247 mp->size = e - s; 3248 } 3249 DPRINTFN(BOOT, 3250 ("pmap_bootstrap: a-avail[%d] start 0x%lx size 0x%lx\n", 3251 i, mp->start, mp->size)); 3252 } 3253 3254 /* 3255 * Move (and uncount) all the null return to the end. 3256 */ 3257 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3258 if (mp->size == 0) { 3259 tmp = avail[i]; 3260 avail[i] = avail[--avail_cnt]; 3261 avail[avail_cnt] = avail[i]; 3262 } 3263 } 3264 3265 /* 3266 * (Bubble)sort them into asecnding order. 3267 */ 3268 for (i = 0; i < avail_cnt; i++) { 3269 for (j = i + 1; j < avail_cnt; j++) { 3270 if (avail[i].start > avail[j].start) { 3271 tmp = avail[i]; 3272 avail[i] = avail[j]; 3273 avail[j] = tmp; 3274 } 3275 } 3276 } 3277 3278 /* 3279 * Make sure they don't overlap. 3280 */ 3281 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3282 if (mp[0].start + mp[0].size > mp[1].start) { 3283 mp[0].size = mp[1].start - mp[0].start; 3284 } 3285 DPRINTFN(BOOT, 3286 ("pmap_bootstrap: avail[%d] start 0x%lx size 0x%lx\n", 3287 i, mp->start, mp->size)); 3288 } 3289 DPRINTFN(BOOT, 3290 ("pmap_bootstrap: avail[%d] start 0x%lx size 0x%lx\n", 3291 i, mp->start, mp->size)); 3292 3293 #ifdef PTEGCOUNT 3294 pmap_pteg_cnt = PTEGCOUNT; 3295 #else /* PTEGCOUNT */ 3296 3297 pmap_pteg_cnt = 0x1000; 3298 3299 while (pmap_pteg_cnt < physmem) 3300 pmap_pteg_cnt <<= 1; 3301 3302 pmap_pteg_cnt >>= 1; 3303 #endif /* PTEGCOUNT */ 3304 3305 #ifdef DEBUG 3306 DPRINTFN(BOOT, 3307 ("pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt)); 3308 #endif 3309 3310 /* 3311 * Find suitably aligned memory for PTEG hash table. 3312 */ 3313 size = pmap_pteg_cnt * sizeof(struct pteg); 3314 pmap_pteg_table = pmap_boot_find_memory(size, size, 0); 3315 3316 #ifdef DEBUG 3317 DPRINTFN(BOOT, 3318 ("PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table)); 3319 #endif 3320 3321 3322 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3323 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3324 panic("pmap_bootstrap: pmap_pteg_table end (%p + %lx) > 256MB", 3325 pmap_pteg_table, size); 3326 #endif 3327 3328 memset(__UNVOLATILE(pmap_pteg_table), 0, 3329 pmap_pteg_cnt * sizeof(struct pteg)); 3330 pmap_pteg_mask = pmap_pteg_cnt - 1; 3331 3332 /* 3333 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3334 * with pages. So we just steal them before giving them to UVM. 3335 */ 3336 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3337 pmap_pvo_table = pmap_boot_find_memory(size, PAGE_SIZE, 0); 3338 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3339 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3340 panic("pmap_bootstrap: pmap_pvo_table end (%p + %lx) > 256MB", 3341 pmap_pvo_table, size); 3342 #endif 3343 3344 for (i = 0; i < pmap_pteg_cnt; i++) 3345 TAILQ_INIT(&pmap_pvo_table[i]); 3346 3347 #ifndef MSGBUFADDR 3348 /* 3349 * Allocate msgbuf in high memory. 3350 */ 3351 msgbuf_paddr = 3352 (paddr_t) pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3353 #endif 3354 3355 #ifdef __HAVE_PMAP_PHYSSEG 3356 { 3357 u_int npgs = 0; 3358 for (i = 0, mp = avail; i < avail_cnt; i++, mp++) 3359 npgs += btoc(mp->size); 3360 size = (sizeof(struct pvo_head) + 1) * npgs; 3361 pmap_physseg.pvoh = pmap_boot_find_memory(size, PAGE_SIZE, 0); 3362 pmap_physseg.attrs = (char *) &pmap_physseg.pvoh[npgs]; 3363 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3364 if ((uintptr_t)pmap_physseg.pvoh + size > SEGMENT_LENGTH) 3365 panic("pmap_bootstrap: PVO list end (%p + %lx) > 256MB", 3366 pmap_physseg.pvoh, size); 3367 #endif 3368 } 3369 #endif 3370 3371 3372 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3373 paddr_t pfstart = atop(mp->start); 3374 paddr_t pfend = atop(mp->start + mp->size); 3375 if (mp->size == 0) 3376 continue; 3377 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3378 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3379 VM_FREELIST_FIRST256); 3380 } else if (mp->start >= SEGMENT_LENGTH) { 3381 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3382 VM_FREELIST_DEFAULT); 3383 } else { 3384 pfend = atop(SEGMENT_LENGTH); 3385 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3386 VM_FREELIST_FIRST256); 3387 pfstart = atop(SEGMENT_LENGTH); 3388 pfend = atop(mp->start + mp->size); 3389 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3390 VM_FREELIST_DEFAULT); 3391 } 3392 } 3393 3394 /* 3395 * Make sure kernel vsid is allocated as well as VSID 0. 3396 */ 3397 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3398 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3399 pmap_vsid_bitmap[0] |= 1; 3400 3401 /* 3402 * Initialize kernel pmap and hardware. 3403 */ 3404 3405 /* PPC_OEA64_BRIDGE does support these instructions */ 3406 #if defined (PPC_OEA) || defined (PPC_OEA64_BRIDGE) 3407 for (i = 0; i < 16; i++) { 3408 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3409 __asm volatile ("mtsrin %0,%1" 3410 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3411 } 3412 3413 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3414 __asm volatile ("mtsr %0,%1" 3415 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3416 #ifdef KERNEL2_SR 3417 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3418 __asm volatile ("mtsr %0,%1" 3419 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3420 #endif 3421 for (i = 0; i < 16; i++) { 3422 if (iosrtable[i] & SR601_T) { 3423 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3424 __asm volatile ("mtsrin %0,%1" 3425 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3426 } 3427 } 3428 #endif /* PPC_OEA || PPC_OEA64_BRIDGE */ 3429 #if defined (PPC_OEA) 3430 __asm volatile ("sync; mtsdr1 %0; isync" 3431 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3432 #elif defined (PPC_OEA64) || defined (PPC_OEA64_BRIDGE) 3433 __asm __volatile ("sync; mtsdr1 %0; isync" 3434 :: "r"((uintptr_t)pmap_pteg_table | (32 - cntlzw(pmap_pteg_mask >> 11)))); 3435 #endif 3436 tlbia(); 3437 3438 #ifdef ALTIVEC 3439 pmap_use_altivec = cpu_altivec; 3440 #endif 3441 3442 #ifdef DEBUG 3443 if (pmapdebug & PMAPDEBUG_BOOT) { 3444 u_int cnt; 3445 int bank; 3446 char pbuf[9]; 3447 for (cnt = 0, bank = 0; bank < vm_nphysseg; bank++) { 3448 cnt += vm_physmem[bank].avail_end - vm_physmem[bank].avail_start; 3449 printf("pmap_bootstrap: vm_physmem[%d]=%#lx-%#lx/%#lx\n", 3450 bank, 3451 ptoa(vm_physmem[bank].avail_start), 3452 ptoa(vm_physmem[bank].avail_end), 3453 ptoa(vm_physmem[bank].avail_end - vm_physmem[bank].avail_start)); 3454 } 3455 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3456 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3457 pbuf, cnt); 3458 } 3459 #endif 3460 3461 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3462 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3463 &pmap_pool_uallocator); 3464 3465 pool_setlowat(&pmap_upvo_pool, 252); 3466 3467 pool_init(&pmap_pool, sizeof(struct pmap), 3468 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator); 3469 3470 #if defined(PMAP_NEED_MAPKERNEL) 3471 { 3472 extern int etext[], kernel_text[]; 3473 vaddr_t va, va_etext = (paddr_t) etext; 3474 paddr_t pa; 3475 3476 va = (vaddr_t) kernel_text; 3477 3478 for (pa = kernelstart; va < va_etext; 3479 pa += PAGE_SIZE, va += PAGE_SIZE) 3480 pmap_enter(pmap_kernel(), va, pa, 3481 VM_PROT_READ|VM_PROT_EXECUTE, 0); 3482 3483 for (; pa < kernelend; 3484 pa += PAGE_SIZE, va += PAGE_SIZE) 3485 pmap_enter(pmap_kernel(), va, pa, 3486 VM_PROT_READ|VM_PROT_WRITE, 0); 3487 } 3488 #endif 3489 } 3490
Indexes created Sat Sep 27 21:09:56 GMT 2025