pmap.c revision 1.55
1 /* $NetBSD: pmap.c,v 1.55 2008/02/05 22:31:49 garbled Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 43 * Copyright (C) 1995, 1996 TooLs GmbH. 44 * All rights reserved. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. All advertising materials mentioning features or use of this software 55 * must display the following acknowledgement: 56 * This product includes software developed by TooLs GmbH. 57 * 4. The name of TooLs GmbH may not be used to endorse or promote products 58 * derived from this software without specific prior written permission. 59 * 60 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 61 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 62 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 63 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 64 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 65 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 66 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 67 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 68 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 69 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.55 2008/02/05 22:31:49 garbled Exp $"); 74 75 #define PMAP_NOOPNAMES 76 77 #include "opt_ppcarch.h" 78 #include "opt_altivec.h" 79 #include "opt_pmap.h" 80 #include <sys/param.h> 81 #include <sys/malloc.h> 82 #include <sys/proc.h> 83 #include <sys/user.h> 84 #include <sys/pool.h> 85 #include <sys/queue.h> 86 #include <sys/device.h> /* for evcnt */ 87 #include <sys/systm.h> 88 #include <sys/atomic.h> 89 90 #include <uvm/uvm.h> 91 92 #include <machine/pcb.h> 93 #include <machine/powerpc.h> 94 #include <powerpc/spr.h> 95 #include <powerpc/oea/sr_601.h> 96 #include <powerpc/bat.h> 97 #include <powerpc/stdarg.h> 98 99 #ifdef ALTIVEC 100 int pmap_use_altivec; 101 #endif 102 103 volatile struct pteg *pmap_pteg_table; 104 unsigned int pmap_pteg_cnt; 105 unsigned int pmap_pteg_mask; 106 #ifdef PMAP_MEMLIMIT 107 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 108 #else 109 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 110 #endif 111 112 struct pmap kernel_pmap_; 113 unsigned int pmap_pages_stolen; 114 u_long pmap_pte_valid; 115 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 116 u_long pmap_pvo_enter_depth; 117 u_long pmap_pvo_remove_depth; 118 #endif 119 120 int physmem; 121 #ifndef MSGBUFADDR 122 extern paddr_t msgbuf_paddr; 123 #endif 124 125 static struct mem_region *mem, *avail; 126 static u_int mem_cnt, avail_cnt; 127 128 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 129 # define PMAP_OEA 1 130 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA64) && !defined(PPC_OEA64_BRIDGE) 131 # define PMAPNAME(name) pmap_##name 132 # endif 133 #endif 134 135 #if defined(PMAP_OEA64) 136 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64_BRIDGE) 137 # define PMAPNAME(name) pmap_##name 138 # endif 139 #endif 140 141 #if defined(PMAP_OEA64_BRIDGE) 142 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64) 143 # define PMAPNAME(name) pmap_##name 144 # endif 145 #endif 146 147 #if defined(PMAP_OEA) 148 #define _PRIxpte "lx" 149 #else 150 #define _PRIxpte PRIx64 151 #endif 152 #define _PRIxpa "lx" 153 #define _PRIxva "lx" 154 #define _PRIsr "lx" 155 156 #if defined(PMAP_EXCLUDE_DECLS) && !defined(PMAPNAME) 157 #if defined(PMAP_OEA) 158 #define PMAPNAME(name) pmap32_##name 159 #elif defined(PMAP_OEA64) 160 #define PMAPNAME(name) pmap64_##name 161 #elif defined(PMAP_OEA64_BRIDGE) 162 #define PMAPNAME(name) pmap64bridge_##name 163 #else 164 #error unknown variant for pmap 165 #endif 166 #endif /* PMAP_EXLCUDE_DECLS && !PMAPNAME */ 167 168 #if defined(PMAPNAME) 169 #define STATIC static 170 #define pmap_pte_spill PMAPNAME(pte_spill) 171 #define pmap_real_memory PMAPNAME(real_memory) 172 #define pmap_init PMAPNAME(init) 173 #define pmap_virtual_space PMAPNAME(virtual_space) 174 #define pmap_create PMAPNAME(create) 175 #define pmap_reference PMAPNAME(reference) 176 #define pmap_destroy PMAPNAME(destroy) 177 #define pmap_copy PMAPNAME(copy) 178 #define pmap_update PMAPNAME(update) 179 #define pmap_collect PMAPNAME(collect) 180 #define pmap_enter PMAPNAME(enter) 181 #define pmap_remove PMAPNAME(remove) 182 #define pmap_kenter_pa PMAPNAME(kenter_pa) 183 #define pmap_kremove PMAPNAME(kremove) 184 #define pmap_extract PMAPNAME(extract) 185 #define pmap_protect PMAPNAME(protect) 186 #define pmap_unwire PMAPNAME(unwire) 187 #define pmap_page_protect PMAPNAME(page_protect) 188 #define pmap_query_bit PMAPNAME(query_bit) 189 #define pmap_clear_bit PMAPNAME(clear_bit) 190 191 #define pmap_activate PMAPNAME(activate) 192 #define pmap_deactivate PMAPNAME(deactivate) 193 194 #define pmap_pinit PMAPNAME(pinit) 195 #define pmap_procwr PMAPNAME(procwr) 196 197 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 198 #define pmap_pte_print PMAPNAME(pte_print) 199 #define pmap_pteg_check PMAPNAME(pteg_check) 200 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 201 #define pmap_print_pte PMAPNAME(print_pte) 202 #define pmap_pteg_dist PMAPNAME(pteg_dist) 203 #endif 204 #if defined(DEBUG) || defined(PMAPCHECK) 205 #define pmap_pvo_verify PMAPNAME(pvo_verify) 206 #endif 207 #define pmap_steal_memory PMAPNAME(steal_memory) 208 #define pmap_bootstrap PMAPNAME(bootstrap) 209 #else 210 #define STATIC /* nothing */ 211 #endif /* PMAPNAME */ 212 213 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 214 STATIC void pmap_real_memory(paddr_t *, psize_t *); 215 STATIC void pmap_init(void); 216 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 217 STATIC pmap_t pmap_create(void); 218 STATIC void pmap_reference(pmap_t); 219 STATIC void pmap_destroy(pmap_t); 220 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 221 STATIC void pmap_update(pmap_t); 222 STATIC void pmap_collect(pmap_t); 223 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, int); 224 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 225 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t); 226 STATIC void pmap_kremove(vaddr_t, vsize_t); 227 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 228 229 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 230 STATIC void pmap_unwire(pmap_t, vaddr_t); 231 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 232 STATIC bool pmap_query_bit(struct vm_page *, int); 233 STATIC bool pmap_clear_bit(struct vm_page *, int); 234 235 STATIC void pmap_activate(struct lwp *); 236 STATIC void pmap_deactivate(struct lwp *); 237 238 STATIC void pmap_pinit(pmap_t pm); 239 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 240 241 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 242 STATIC void pmap_pte_print(volatile struct pte *); 243 STATIC void pmap_pteg_check(void); 244 STATIC void pmap_print_mmuregs(void); 245 STATIC void pmap_print_pte(pmap_t, vaddr_t); 246 STATIC void pmap_pteg_dist(void); 247 #endif 248 #if defined(DEBUG) || defined(PMAPCHECK) 249 STATIC void pmap_pvo_verify(void); 250 #endif 251 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 252 STATIC void pmap_bootstrap(paddr_t, paddr_t); 253 254 #ifdef PMAPNAME 255 const struct pmap_ops PMAPNAME(ops) = { 256 .pmapop_pte_spill = pmap_pte_spill, 257 .pmapop_real_memory = pmap_real_memory, 258 .pmapop_init = pmap_init, 259 .pmapop_virtual_space = pmap_virtual_space, 260 .pmapop_create = pmap_create, 261 .pmapop_reference = pmap_reference, 262 .pmapop_destroy = pmap_destroy, 263 .pmapop_copy = pmap_copy, 264 .pmapop_update = pmap_update, 265 .pmapop_collect = pmap_collect, 266 .pmapop_enter = pmap_enter, 267 .pmapop_remove = pmap_remove, 268 .pmapop_kenter_pa = pmap_kenter_pa, 269 .pmapop_kremove = pmap_kremove, 270 .pmapop_extract = pmap_extract, 271 .pmapop_protect = pmap_protect, 272 .pmapop_unwire = pmap_unwire, 273 .pmapop_page_protect = pmap_page_protect, 274 .pmapop_query_bit = pmap_query_bit, 275 .pmapop_clear_bit = pmap_clear_bit, 276 .pmapop_activate = pmap_activate, 277 .pmapop_deactivate = pmap_deactivate, 278 .pmapop_pinit = pmap_pinit, 279 .pmapop_procwr = pmap_procwr, 280 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 281 .pmapop_pte_print = pmap_pte_print, 282 .pmapop_pteg_check = pmap_pteg_check, 283 .pmapop_print_mmuregs = pmap_print_mmuregs, 284 .pmapop_print_pte = pmap_print_pte, 285 .pmapop_pteg_dist = pmap_pteg_dist, 286 #else 287 .pmapop_pte_print = NULL, 288 .pmapop_pteg_check = NULL, 289 .pmapop_print_mmuregs = NULL, 290 .pmapop_print_pte = NULL, 291 .pmapop_pteg_dist = NULL, 292 #endif 293 #if defined(DEBUG) || defined(PMAPCHECK) 294 .pmapop_pvo_verify = pmap_pvo_verify, 295 #else 296 .pmapop_pvo_verify = NULL, 297 #endif 298 .pmapop_steal_memory = pmap_steal_memory, 299 .pmapop_bootstrap = pmap_bootstrap, 300 }; 301 #endif /* !PMAPNAME */ 302 303 /* 304 * The following structure is aligned to 32 bytes 305 */ 306 struct pvo_entry { 307 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 308 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 309 struct pte pvo_pte; /* Prebuilt PTE */ 310 pmap_t pvo_pmap; /* ptr to owning pmap */ 311 vaddr_t pvo_vaddr; /* VA of entry */ 312 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 313 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 314 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 315 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 316 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 317 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 318 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 319 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 320 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 321 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 322 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 323 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 324 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 325 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 326 #define PVO_REMOVE 6 /* PVO has been removed */ 327 #define PVO_WHERE_MASK 15 328 #define PVO_WHERE_SHFT 8 329 } __attribute__ ((aligned (32))); 330 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 331 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 332 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 333 #define PVO_PTEGIDX_CLR(pvo) \ 334 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 335 #define PVO_PTEGIDX_SET(pvo,i) \ 336 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 337 #define PVO_WHERE(pvo,w) \ 338 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 339 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 340 341 TAILQ_HEAD(pvo_tqhead, pvo_entry); 342 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 343 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 344 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 345 346 struct pool pmap_pool; /* pool for pmap structures */ 347 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 348 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 349 350 /* 351 * We keep a cache of unmanaged pages to be used for pvo entries for 352 * unmanaged pages. 353 */ 354 struct pvo_page { 355 SIMPLEQ_ENTRY(pvo_page) pvop_link; 356 }; 357 SIMPLEQ_HEAD(pvop_head, pvo_page); 358 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 359 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 360 u_long pmap_upvop_free; 361 u_long pmap_upvop_maxfree; 362 u_long pmap_mpvop_free; 363 u_long pmap_mpvop_maxfree; 364 365 static void *pmap_pool_ualloc(struct pool *, int); 366 static void *pmap_pool_malloc(struct pool *, int); 367 368 static void pmap_pool_ufree(struct pool *, void *); 369 static void pmap_pool_mfree(struct pool *, void *); 370 371 static struct pool_allocator pmap_pool_mallocator = { 372 .pa_alloc = pmap_pool_malloc, 373 .pa_free = pmap_pool_mfree, 374 .pa_pagesz = 0, 375 }; 376 377 static struct pool_allocator pmap_pool_uallocator = { 378 .pa_alloc = pmap_pool_ualloc, 379 .pa_free = pmap_pool_ufree, 380 .pa_pagesz = 0, 381 }; 382 383 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 384 void pmap_pte_print(volatile struct pte *); 385 void pmap_pteg_check(void); 386 void pmap_pteg_dist(void); 387 void pmap_print_pte(pmap_t, vaddr_t); 388 void pmap_print_mmuregs(void); 389 #endif 390 391 #if defined(DEBUG) || defined(PMAPCHECK) 392 #ifdef PMAPCHECK 393 int pmapcheck = 1; 394 #else 395 int pmapcheck = 0; 396 #endif 397 void pmap_pvo_verify(void); 398 static void pmap_pvo_check(const struct pvo_entry *); 399 #define PMAP_PVO_CHECK(pvo) \ 400 do { \ 401 if (pmapcheck) \ 402 pmap_pvo_check(pvo); \ 403 } while (0) 404 #else 405 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 406 #endif 407 static int pmap_pte_insert(int, struct pte *); 408 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 409 vaddr_t, paddr_t, register_t, int); 410 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 411 static void pmap_pvo_free(struct pvo_entry *); 412 static void pmap_pvo_free_list(struct pvo_head *); 413 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 414 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 415 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 416 static void pvo_set_exec(struct pvo_entry *); 417 static void pvo_clear_exec(struct pvo_entry *); 418 419 static void tlbia(void); 420 421 static void pmap_release(pmap_t); 422 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 423 424 static uint32_t pmap_pvo_reclaim_nextidx; 425 #ifdef DEBUG 426 static int pmap_pvo_reclaim_debugctr; 427 #endif 428 429 #define VSID_NBPW (sizeof(uint32_t) * 8) 430 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 431 432 static int pmap_initialized; 433 434 #if defined(DEBUG) || defined(PMAPDEBUG) 435 #define PMAPDEBUG_BOOT 0x0001 436 #define PMAPDEBUG_PTE 0x0002 437 #define PMAPDEBUG_EXEC 0x0008 438 #define PMAPDEBUG_PVOENTER 0x0010 439 #define PMAPDEBUG_PVOREMOVE 0x0020 440 #define PMAPDEBUG_ACTIVATE 0x0100 441 #define PMAPDEBUG_CREATE 0x0200 442 #define PMAPDEBUG_ENTER 0x1000 443 #define PMAPDEBUG_KENTER 0x2000 444 #define PMAPDEBUG_KREMOVE 0x4000 445 #define PMAPDEBUG_REMOVE 0x8000 446 447 unsigned int pmapdebug = 0; 448 449 # define DPRINTF(x) printf x 450 # define DPRINTFN(n, x) if (pmapdebug & PMAPDEBUG_ ## n) printf x 451 #else 452 # define DPRINTF(x) 453 # define DPRINTFN(n, x) 454 #endif 455 456 457 #ifdef PMAPCOUNTERS 458 /* 459 * From pmap_subr.c 460 */ 461 extern struct evcnt pmap_evcnt_mappings; 462 extern struct evcnt pmap_evcnt_unmappings; 463 464 extern struct evcnt pmap_evcnt_kernel_mappings; 465 extern struct evcnt pmap_evcnt_kernel_unmappings; 466 467 extern struct evcnt pmap_evcnt_mappings_replaced; 468 469 extern struct evcnt pmap_evcnt_exec_mappings; 470 extern struct evcnt pmap_evcnt_exec_cached; 471 472 extern struct evcnt pmap_evcnt_exec_synced; 473 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 474 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 475 476 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 477 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 478 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 479 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 480 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 481 482 extern struct evcnt pmap_evcnt_updates; 483 extern struct evcnt pmap_evcnt_collects; 484 extern struct evcnt pmap_evcnt_copies; 485 486 extern struct evcnt pmap_evcnt_ptes_spilled; 487 extern struct evcnt pmap_evcnt_ptes_unspilled; 488 extern struct evcnt pmap_evcnt_ptes_evicted; 489 490 extern struct evcnt pmap_evcnt_ptes_primary[8]; 491 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 492 extern struct evcnt pmap_evcnt_ptes_removed; 493 extern struct evcnt pmap_evcnt_ptes_changed; 494 extern struct evcnt pmap_evcnt_pvos_reclaimed; 495 extern struct evcnt pmap_evcnt_pvos_failed; 496 497 extern struct evcnt pmap_evcnt_zeroed_pages; 498 extern struct evcnt pmap_evcnt_copied_pages; 499 extern struct evcnt pmap_evcnt_idlezeroed_pages; 500 501 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 502 #define PMAPCOUNT2(ev) ((ev).ev_count++) 503 #else 504 #define PMAPCOUNT(ev) ((void) 0) 505 #define PMAPCOUNT2(ev) ((void) 0) 506 #endif 507 508 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 509 510 /* XXXSL: this needs to be moved to assembler */ 511 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 512 513 #define TLBSYNC() __asm volatile("tlbsync") 514 #define SYNC() __asm volatile("sync") 515 #define EIEIO() __asm volatile("eieio") 516 #define MFMSR() mfmsr() 517 #define MTMSR(psl) mtmsr(psl) 518 #define MFPVR() mfpvr() 519 #define MFSRIN(va) mfsrin(va) 520 #define MFTB() mfrtcltbl() 521 522 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 523 static inline register_t 524 mfsrin(vaddr_t va) 525 { 526 register_t sr; 527 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 528 return sr; 529 } 530 #endif /* PMAP_OEA*/ 531 532 #if defined (PMAP_OEA64_BRIDGE) 533 extern void mfmsr64 (register64_t *result); 534 #endif /* PMAP_OEA64_BRIDGE */ 535 536 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 537 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 538 539 static inline register_t 540 pmap_interrupts_off(void) 541 { 542 register_t msr = MFMSR(); 543 if (msr & PSL_EE) 544 MTMSR(msr & ~PSL_EE); 545 return msr; 546 } 547 548 static void 549 pmap_interrupts_restore(register_t msr) 550 { 551 if (msr & PSL_EE) 552 MTMSR(msr); 553 } 554 555 static inline u_int32_t 556 mfrtcltbl(void) 557 { 558 #ifdef PPC_OEA601 559 if ((MFPVR() >> 16) == MPC601) 560 return (mfrtcl() >> 7); 561 else 562 #endif 563 return (mftbl()); 564 } 565 566 /* 567 * These small routines may have to be replaced, 568 * if/when we support processors other that the 604. 569 */ 570 571 void 572 tlbia(void) 573 { 574 char *i; 575 576 SYNC(); 577 #if defined(PMAP_OEA) 578 /* 579 * Why not use "tlbia"? Because not all processors implement it. 580 * 581 * This needs to be a per-CPU callback to do the appropriate thing 582 * for the CPU. XXX 583 */ 584 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 585 TLBIE(i); 586 EIEIO(); 587 SYNC(); 588 } 589 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 590 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 591 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 592 TLBIEL(i); 593 EIEIO(); 594 SYNC(); 595 } 596 #endif 597 TLBSYNC(); 598 SYNC(); 599 } 600 601 static inline register_t 602 va_to_vsid(const struct pmap *pm, vaddr_t addr) 603 { 604 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 605 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 606 #else /* PMAP_OEA64 */ 607 #if 0 608 const struct ste *ste; 609 register_t hash; 610 int i; 611 612 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 613 614 /* 615 * Try the primary group first 616 */ 617 ste = pm->pm_stes[hash].stes; 618 for (i = 0; i < 8; i++, ste++) { 619 if (ste->ste_hi & STE_V) && 620 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 621 return ste; 622 } 623 624 /* 625 * Then the secondary group. 626 */ 627 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 628 for (i = 0; i < 8; i++, ste++) { 629 if (ste->ste_hi & STE_V) && 630 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 631 return addr; 632 } 633 634 return NULL; 635 #else 636 /* 637 * Rather than searching the STE groups for the VSID, we know 638 * how we generate that from the ESID and so do that. 639 */ 640 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 641 #endif 642 #endif /* PMAP_OEA */ 643 } 644 645 static inline register_t 646 va_to_pteg(const struct pmap *pm, vaddr_t addr) 647 { 648 register_t hash; 649 650 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 651 return hash & pmap_pteg_mask; 652 } 653 654 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 655 /* 656 * Given a PTE in the page table, calculate the VADDR that hashes to it. 657 * The only bit of magic is that the top 4 bits of the address doesn't 658 * technically exist in the PTE. But we know we reserved 4 bits of the 659 * VSID for it so that's how we get it. 660 */ 661 static vaddr_t 662 pmap_pte_to_va(volatile const struct pte *pt) 663 { 664 vaddr_t va; 665 uintptr_t ptaddr = (uintptr_t) pt; 666 667 if (pt->pte_hi & PTE_HID) 668 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 669 670 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 671 #if defined(PMAP_OEA) 672 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 673 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 674 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 675 #endif 676 va <<= ADDR_PIDX_SHFT; 677 678 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 679 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 680 681 #if defined(PMAP_OEA64) 682 /* PPC63 Bits 0-35 */ 683 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 684 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 685 /* PPC Bits 0-3 */ 686 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 687 #endif 688 689 return va; 690 } 691 #endif 692 693 static inline struct pvo_head * 694 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 695 { 696 struct vm_page *pg; 697 698 pg = PHYS_TO_VM_PAGE(pa); 699 if (pg_p != NULL) 700 *pg_p = pg; 701 if (pg == NULL) 702 return &pmap_pvo_unmanaged; 703 return &pg->mdpage.mdpg_pvoh; 704 } 705 706 static inline struct pvo_head * 707 vm_page_to_pvoh(struct vm_page *pg) 708 { 709 return &pg->mdpage.mdpg_pvoh; 710 } 711 712 713 static inline void 714 pmap_attr_clear(struct vm_page *pg, int ptebit) 715 { 716 pg->mdpage.mdpg_attrs &= ~ptebit; 717 } 718 719 static inline int 720 pmap_attr_fetch(struct vm_page *pg) 721 { 722 return pg->mdpage.mdpg_attrs; 723 } 724 725 static inline void 726 pmap_attr_save(struct vm_page *pg, int ptebit) 727 { 728 pg->mdpage.mdpg_attrs |= ptebit; 729 } 730 731 static inline int 732 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 733 { 734 if (pt->pte_hi == pvo_pt->pte_hi 735 #if 0 736 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 737 ~(PTE_REF|PTE_CHG)) == 0 738 #endif 739 ) 740 return 1; 741 return 0; 742 } 743 744 static inline void 745 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 746 { 747 /* 748 * Construct the PTE. Default to IMB initially. Valid bit 749 * only gets set when the real pte is set in memory. 750 * 751 * Note: Don't set the valid bit for correct operation of tlb update. 752 */ 753 #if defined(PMAP_OEA) 754 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 755 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 756 pt->pte_lo = pte_lo; 757 #elif defined (PMAP_OEA64_BRIDGE) 758 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 759 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 760 pt->pte_lo = (u_int64_t) pte_lo; 761 #elif defined (PMAP_OEA64) 762 #error PMAP_OEA64 not supported 763 #endif /* PMAP_OEA */ 764 } 765 766 static inline void 767 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 768 { 769 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 770 } 771 772 static inline void 773 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 774 { 775 /* 776 * As shown in Section 7.6.3.2.3 777 */ 778 pt->pte_lo &= ~ptebit; 779 TLBIE(va); 780 SYNC(); 781 EIEIO(); 782 TLBSYNC(); 783 SYNC(); 784 } 785 786 static inline void 787 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 788 { 789 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 790 if (pvo_pt->pte_hi & PTE_VALID) 791 panic("pte_set: setting an already valid pte %p", pvo_pt); 792 #endif 793 pvo_pt->pte_hi |= PTE_VALID; 794 795 /* 796 * Update the PTE as defined in section 7.6.3.1 797 * Note that the REF/CHG bits are from pvo_pt and thus should 798 * have been saved so this routine can restore them (if desired). 799 */ 800 pt->pte_lo = pvo_pt->pte_lo; 801 EIEIO(); 802 pt->pte_hi = pvo_pt->pte_hi; 803 TLBSYNC(); 804 SYNC(); 805 pmap_pte_valid++; 806 } 807 808 static inline void 809 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 810 { 811 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 812 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 813 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 814 if ((pt->pte_hi & PTE_VALID) == 0) 815 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 816 #endif 817 818 pvo_pt->pte_hi &= ~PTE_VALID; 819 /* 820 * Force the ref & chg bits back into the PTEs. 821 */ 822 SYNC(); 823 /* 824 * Invalidate the pte ... (Section 7.6.3.3) 825 */ 826 pt->pte_hi &= ~PTE_VALID; 827 SYNC(); 828 TLBIE(va); 829 SYNC(); 830 EIEIO(); 831 TLBSYNC(); 832 SYNC(); 833 /* 834 * Save the ref & chg bits ... 835 */ 836 pmap_pte_synch(pt, pvo_pt); 837 pmap_pte_valid--; 838 } 839 840 static inline void 841 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 842 { 843 /* 844 * Invalidate the PTE 845 */ 846 pmap_pte_unset(pt, pvo_pt, va); 847 pmap_pte_set(pt, pvo_pt); 848 } 849 850 /* 851 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 852 * (either primary or secondary location). 853 * 854 * Note: both the destination and source PTEs must not have PTE_VALID set. 855 */ 856 857 static int 858 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 859 { 860 volatile struct pte *pt; 861 int i; 862 863 #if defined(DEBUG) 864 DPRINTFN(PTE, ("pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 865 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo)); 866 #endif 867 /* 868 * First try primary hash. 869 */ 870 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 871 if ((pt->pte_hi & PTE_VALID) == 0) { 872 pvo_pt->pte_hi &= ~PTE_HID; 873 pmap_pte_set(pt, pvo_pt); 874 return i; 875 } 876 } 877 878 /* 879 * Now try secondary hash. 880 */ 881 ptegidx ^= pmap_pteg_mask; 882 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 883 if ((pt->pte_hi & PTE_VALID) == 0) { 884 pvo_pt->pte_hi |= PTE_HID; 885 pmap_pte_set(pt, pvo_pt); 886 return i; 887 } 888 } 889 return -1; 890 } 891 892 /* 893 * Spill handler. 894 * 895 * Tries to spill a page table entry from the overflow area. 896 * This runs in either real mode (if dealing with a exception spill) 897 * or virtual mode when dealing with manually spilling one of the 898 * kernel's pte entries. In either case, interrupts are already 899 * disabled. 900 */ 901 902 int 903 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 904 { 905 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 906 struct pvo_entry *pvo; 907 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 908 struct pvo_tqhead *pvoh, *vpvoh = NULL; 909 int ptegidx, i, j; 910 volatile struct pteg *pteg; 911 volatile struct pte *pt; 912 913 PMAP_LOCK(); 914 915 ptegidx = va_to_pteg(pm, addr); 916 917 /* 918 * Have to substitute some entry. Use the primary hash for this. 919 * Use low bits of timebase as random generator. Make sure we are 920 * not picking a kernel pte for replacement. 921 */ 922 pteg = &pmap_pteg_table[ptegidx]; 923 i = MFTB() & 7; 924 for (j = 0; j < 8; j++) { 925 pt = &pteg->pt[i]; 926 if ((pt->pte_hi & PTE_VALID) == 0) 927 break; 928 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 929 < PHYSMAP_VSIDBITS) 930 break; 931 i = (i + 1) & 7; 932 } 933 KASSERT(j < 8); 934 935 source_pvo = NULL; 936 victim_pvo = NULL; 937 pvoh = &pmap_pvo_table[ptegidx]; 938 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 939 940 /* 941 * We need to find pvo entry for this address... 942 */ 943 PMAP_PVO_CHECK(pvo); /* sanity check */ 944 945 /* 946 * If we haven't found the source and we come to a PVO with 947 * a valid PTE, then we know we can't find it because all 948 * evicted PVOs always are first in the list. 949 */ 950 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 951 break; 952 if (source_pvo == NULL && pm == pvo->pvo_pmap && 953 addr == PVO_VADDR(pvo)) { 954 955 /* 956 * Now we have found the entry to be spilled into the 957 * pteg. Attempt to insert it into the page table. 958 */ 959 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 960 if (j >= 0) { 961 PVO_PTEGIDX_SET(pvo, j); 962 PMAP_PVO_CHECK(pvo); /* sanity check */ 963 PVO_WHERE(pvo, SPILL_INSERT); 964 pvo->pvo_pmap->pm_evictions--; 965 PMAPCOUNT(ptes_spilled); 966 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 967 ? pmap_evcnt_ptes_secondary 968 : pmap_evcnt_ptes_primary)[j]); 969 970 /* 971 * Since we keep the evicted entries at the 972 * from of the PVO list, we need move this 973 * (now resident) PVO after the evicted 974 * entries. 975 */ 976 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 977 978 /* 979 * If we don't have to move (either we were the 980 * last entry or the next entry was valid), 981 * don't change our position. Otherwise 982 * move ourselves to the tail of the queue. 983 */ 984 if (next_pvo != NULL && 985 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 986 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 987 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 988 } 989 PMAP_UNLOCK(); 990 return 1; 991 } 992 source_pvo = pvo; 993 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 994 return 0; 995 } 996 if (victim_pvo != NULL) 997 break; 998 } 999 1000 /* 1001 * We also need the pvo entry of the victim we are replacing 1002 * so save the R & C bits of the PTE. 1003 */ 1004 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1005 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1006 vpvoh = pvoh; /* *1* */ 1007 victim_pvo = pvo; 1008 if (source_pvo != NULL) 1009 break; 1010 } 1011 } 1012 1013 if (source_pvo == NULL) { 1014 PMAPCOUNT(ptes_unspilled); 1015 PMAP_UNLOCK(); 1016 return 0; 1017 } 1018 1019 if (victim_pvo == NULL) { 1020 if ((pt->pte_hi & PTE_HID) == 0) 1021 panic("pmap_pte_spill: victim p-pte (%p) has " 1022 "no pvo entry!", pt); 1023 1024 /* 1025 * If this is a secondary PTE, we need to search 1026 * its primary pvo bucket for the matching PVO. 1027 */ 1028 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1029 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1030 PMAP_PVO_CHECK(pvo); /* sanity check */ 1031 1032 /* 1033 * We also need the pvo entry of the victim we are 1034 * replacing so save the R & C bits of the PTE. 1035 */ 1036 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1037 victim_pvo = pvo; 1038 break; 1039 } 1040 } 1041 if (victim_pvo == NULL) 1042 panic("pmap_pte_spill: victim s-pte (%p) has " 1043 "no pvo entry!", pt); 1044 } 1045 1046 /* 1047 * The victim should be not be a kernel PVO/PTE entry. 1048 */ 1049 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1050 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1051 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1052 1053 /* 1054 * We are invalidating the TLB entry for the EA for the 1055 * we are replacing even though its valid; If we don't 1056 * we lose any ref/chg bit changes contained in the TLB 1057 * entry. 1058 */ 1059 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1060 1061 /* 1062 * To enforce the PVO list ordering constraint that all 1063 * evicted entries should come before all valid entries, 1064 * move the source PVO to the tail of its list and the 1065 * victim PVO to the head of its list (which might not be 1066 * the same list, if the victim was using the secondary hash). 1067 */ 1068 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1069 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1070 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1071 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1072 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1073 pmap_pte_set(pt, &source_pvo->pvo_pte); 1074 victim_pvo->pvo_pmap->pm_evictions++; 1075 source_pvo->pvo_pmap->pm_evictions--; 1076 PVO_WHERE(victim_pvo, SPILL_UNSET); 1077 PVO_WHERE(source_pvo, SPILL_SET); 1078 1079 PVO_PTEGIDX_CLR(victim_pvo); 1080 PVO_PTEGIDX_SET(source_pvo, i); 1081 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1082 PMAPCOUNT(ptes_spilled); 1083 PMAPCOUNT(ptes_evicted); 1084 PMAPCOUNT(ptes_removed); 1085 1086 PMAP_PVO_CHECK(victim_pvo); 1087 PMAP_PVO_CHECK(source_pvo); 1088 1089 PMAP_UNLOCK(); 1090 return 1; 1091 } 1092 1093 /* 1094 * Restrict given range to physical memory 1095 */ 1096 void 1097 pmap_real_memory(paddr_t *start, psize_t *size) 1098 { 1099 struct mem_region *mp; 1100 1101 for (mp = mem; mp->size; mp++) { 1102 if (*start + *size > mp->start 1103 && *start < mp->start + mp->size) { 1104 if (*start < mp->start) { 1105 *size -= mp->start - *start; 1106 *start = mp->start; 1107 } 1108 if (*start + *size > mp->start + mp->size) 1109 *size = mp->start + mp->size - *start; 1110 return; 1111 } 1112 } 1113 *size = 0; 1114 } 1115 1116 /* 1117 * Initialize anything else for pmap handling. 1118 * Called during vm_init(). 1119 */ 1120 void 1121 pmap_init(void) 1122 { 1123 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1124 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1125 &pmap_pool_mallocator, IPL_NONE); 1126 1127 pool_setlowat(&pmap_mpvo_pool, 1008); 1128 1129 pmap_initialized = 1; 1130 1131 } 1132 1133 /* 1134 * How much virtual space does the kernel get? 1135 */ 1136 void 1137 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1138 { 1139 /* 1140 * For now, reserve one segment (minus some overhead) for kernel 1141 * virtual memory 1142 */ 1143 *start = VM_MIN_KERNEL_ADDRESS; 1144 *end = VM_MAX_KERNEL_ADDRESS; 1145 } 1146 1147 /* 1148 * Allocate, initialize, and return a new physical map. 1149 */ 1150 pmap_t 1151 pmap_create(void) 1152 { 1153 pmap_t pm; 1154 1155 pm = pool_get(&pmap_pool, PR_WAITOK); 1156 memset((void *)pm, 0, sizeof *pm); 1157 pmap_pinit(pm); 1158 1159 DPRINTFN(CREATE,("pmap_create: pm %p:\n" 1160 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1161 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1162 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1163 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1164 pm, 1165 pm->pm_sr[0], pm->pm_sr[1], 1166 pm->pm_sr[2], pm->pm_sr[3], 1167 pm->pm_sr[4], pm->pm_sr[5], 1168 pm->pm_sr[6], pm->pm_sr[7], 1169 pm->pm_sr[8], pm->pm_sr[9], 1170 pm->pm_sr[10], pm->pm_sr[11], 1171 pm->pm_sr[12], pm->pm_sr[13], 1172 pm->pm_sr[14], pm->pm_sr[15])); 1173 return pm; 1174 } 1175 1176 /* 1177 * Initialize a preallocated and zeroed pmap structure. 1178 */ 1179 void 1180 pmap_pinit(pmap_t pm) 1181 { 1182 register_t entropy = MFTB(); 1183 register_t mask; 1184 int i; 1185 1186 /* 1187 * Allocate some segment registers for this pmap. 1188 */ 1189 pm->pm_refs = 1; 1190 PMAP_LOCK(); 1191 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1192 static register_t pmap_vsidcontext; 1193 register_t hash; 1194 unsigned int n; 1195 1196 /* Create a new value by multiplying by a prime adding in 1197 * entropy from the timebase register. This is to make the 1198 * VSID more random so that the PT Hash function collides 1199 * less often. (note that the prime causes gcc to do shifts 1200 * instead of a multiply) 1201 */ 1202 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1203 hash = pmap_vsidcontext & (NPMAPS - 1); 1204 if (hash == 0) { /* 0 is special, avoid it */ 1205 entropy += 0xbadf00d; 1206 continue; 1207 } 1208 n = hash >> 5; 1209 mask = 1L << (hash & (VSID_NBPW-1)); 1210 hash = pmap_vsidcontext; 1211 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1212 /* anything free in this bucket? */ 1213 if (~pmap_vsid_bitmap[n] == 0) { 1214 entropy = hash ^ (hash >> 16); 1215 continue; 1216 } 1217 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1218 mask = 1L << i; 1219 hash &= ~(VSID_NBPW-1); 1220 hash |= i; 1221 } 1222 hash &= PTE_VSID >> PTE_VSID_SHFT; 1223 pmap_vsid_bitmap[n] |= mask; 1224 pm->pm_vsid = hash; 1225 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1226 for (i = 0; i < 16; i++) 1227 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1228 SR_NOEXEC; 1229 #endif 1230 PMAP_UNLOCK(); 1231 return; 1232 } 1233 PMAP_UNLOCK(); 1234 panic("pmap_pinit: out of segments"); 1235 } 1236 1237 /* 1238 * Add a reference to the given pmap. 1239 */ 1240 void 1241 pmap_reference(pmap_t pm) 1242 { 1243 atomic_inc_uint(&pm->pm_refs); 1244 } 1245 1246 /* 1247 * Retire the given pmap from service. 1248 * Should only be called if the map contains no valid mappings. 1249 */ 1250 void 1251 pmap_destroy(pmap_t pm) 1252 { 1253 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1254 pmap_release(pm); 1255 pool_put(&pmap_pool, pm); 1256 } 1257 } 1258 1259 /* 1260 * Release any resources held by the given physical map. 1261 * Called when a pmap initialized by pmap_pinit is being released. 1262 */ 1263 void 1264 pmap_release(pmap_t pm) 1265 { 1266 int idx, mask; 1267 1268 KASSERT(pm->pm_stats.resident_count == 0); 1269 KASSERT(pm->pm_stats.wired_count == 0); 1270 1271 PMAP_LOCK(); 1272 if (pm->pm_sr[0] == 0) 1273 panic("pmap_release"); 1274 idx = pm->pm_vsid & (NPMAPS-1); 1275 mask = 1 << (idx % VSID_NBPW); 1276 idx /= VSID_NBPW; 1277 1278 KASSERT(pmap_vsid_bitmap[idx] & mask); 1279 pmap_vsid_bitmap[idx] &= ~mask; 1280 PMAP_UNLOCK(); 1281 } 1282 1283 /* 1284 * Copy the range specified by src_addr/len 1285 * from the source map to the range dst_addr/len 1286 * in the destination map. 1287 * 1288 * This routine is only advisory and need not do anything. 1289 */ 1290 void 1291 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1292 vsize_t len, vaddr_t src_addr) 1293 { 1294 PMAPCOUNT(copies); 1295 } 1296 1297 /* 1298 * Require that all active physical maps contain no 1299 * incorrect entries NOW. 1300 */ 1301 void 1302 pmap_update(struct pmap *pmap) 1303 { 1304 PMAPCOUNT(updates); 1305 TLBSYNC(); 1306 } 1307 1308 /* 1309 * Garbage collects the physical map system for 1310 * pages which are no longer used. 1311 * Success need not be guaranteed -- that is, there 1312 * may well be pages which are not referenced, but 1313 * others may be collected. 1314 * Called by the pageout daemon when pages are scarce. 1315 */ 1316 void 1317 pmap_collect(pmap_t pm) 1318 { 1319 PMAPCOUNT(collects); 1320 } 1321 1322 static inline int 1323 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1324 { 1325 int pteidx; 1326 /* 1327 * We can find the actual pte entry without searching by 1328 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1329 * and by noticing the HID bit. 1330 */ 1331 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1332 if (pvo->pvo_pte.pte_hi & PTE_HID) 1333 pteidx ^= pmap_pteg_mask * 8; 1334 return pteidx; 1335 } 1336 1337 volatile struct pte * 1338 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1339 { 1340 volatile struct pte *pt; 1341 1342 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1343 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1344 return NULL; 1345 #endif 1346 1347 /* 1348 * If we haven't been supplied the ptegidx, calculate it. 1349 */ 1350 if (pteidx == -1) { 1351 int ptegidx; 1352 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1353 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1354 } 1355 1356 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1357 1358 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1359 return pt; 1360 #else 1361 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1362 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1363 "pvo but no valid pte index", pvo); 1364 } 1365 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1366 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1367 "pvo but no valid pte", pvo); 1368 } 1369 1370 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1371 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1372 #if defined(DEBUG) || defined(PMAPCHECK) 1373 pmap_pte_print(pt); 1374 #endif 1375 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1376 "pmap_pteg_table %p but invalid in pvo", 1377 pvo, pt); 1378 } 1379 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1380 #if defined(DEBUG) || defined(PMAPCHECK) 1381 pmap_pte_print(pt); 1382 #endif 1383 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1384 "not match pte %p in pmap_pteg_table", 1385 pvo, pt); 1386 } 1387 return pt; 1388 } 1389 1390 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1391 #if defined(DEBUG) || defined(PMAPCHECK) 1392 pmap_pte_print(pt); 1393 #endif 1394 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1395 "pmap_pteg_table but valid in pvo", pvo, pt); 1396 } 1397 return NULL; 1398 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1399 } 1400 1401 struct pvo_entry * 1402 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1403 { 1404 struct pvo_entry *pvo; 1405 int ptegidx; 1406 1407 va &= ~ADDR_POFF; 1408 ptegidx = va_to_pteg(pm, va); 1409 1410 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1411 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1412 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1413 panic("pmap_pvo_find_va: invalid pvo %p on " 1414 "list %#x (%p)", pvo, ptegidx, 1415 &pmap_pvo_table[ptegidx]); 1416 #endif 1417 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1418 if (pteidx_p) 1419 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1420 return pvo; 1421 } 1422 } 1423 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1424 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1425 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1426 return NULL; 1427 } 1428 1429 #if defined(DEBUG) || defined(PMAPCHECK) 1430 void 1431 pmap_pvo_check(const struct pvo_entry *pvo) 1432 { 1433 struct pvo_head *pvo_head; 1434 struct pvo_entry *pvo0; 1435 volatile struct pte *pt; 1436 int failed = 0; 1437 1438 PMAP_LOCK(); 1439 1440 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1441 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1442 1443 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1444 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1445 pvo, pvo->pvo_pmap); 1446 failed = 1; 1447 } 1448 1449 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1450 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1451 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1452 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1453 failed = 1; 1454 } 1455 1456 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1457 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1458 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1459 pvo, LIST_NEXT(pvo, pvo_vlink)); 1460 failed = 1; 1461 } 1462 1463 if (PVO_MANAGED_P(pvo)) { 1464 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1465 } else { 1466 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1467 printf("pmap_pvo_check: pvo %p: non kernel address " 1468 "on kernel unmanaged list\n", pvo); 1469 failed = 1; 1470 } 1471 pvo_head = &pmap_pvo_kunmanaged; 1472 } 1473 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1474 if (pvo0 == pvo) 1475 break; 1476 } 1477 if (pvo0 == NULL) { 1478 printf("pmap_pvo_check: pvo %p: not present " 1479 "on its vlist head %p\n", pvo, pvo_head); 1480 failed = 1; 1481 } 1482 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1483 printf("pmap_pvo_check: pvo %p: not present " 1484 "on its olist head\n", pvo); 1485 failed = 1; 1486 } 1487 pt = pmap_pvo_to_pte(pvo, -1); 1488 if (pt == NULL) { 1489 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1490 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1491 "no PTE\n", pvo); 1492 failed = 1; 1493 } 1494 } else { 1495 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1496 (uintptr_t) pt >= 1497 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1498 printf("pmap_pvo_check: pvo %p: pte %p not in " 1499 "pteg table\n", pvo, pt); 1500 failed = 1; 1501 } 1502 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1503 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1504 "no PTE\n", pvo); 1505 failed = 1; 1506 } 1507 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1508 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1509 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1510 pvo->pvo_pte.pte_hi, 1511 pt->pte_hi); 1512 failed = 1; 1513 } 1514 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1515 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1516 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1517 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1518 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1519 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1520 failed = 1; 1521 } 1522 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1523 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1524 " doesn't not match PVO's VA %#" _PRIxva "\n", 1525 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1526 failed = 1; 1527 } 1528 if (failed) 1529 pmap_pte_print(pt); 1530 } 1531 if (failed) 1532 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1533 pvo->pvo_pmap); 1534 1535 PMAP_UNLOCK(); 1536 } 1537 #endif /* DEBUG || PMAPCHECK */ 1538 1539 /* 1540 * Search the PVO table looking for a non-wired entry. 1541 * If we find one, remove it and return it. 1542 */ 1543 1544 struct pvo_entry * 1545 pmap_pvo_reclaim(struct pmap *pm) 1546 { 1547 struct pvo_tqhead *pvoh; 1548 struct pvo_entry *pvo; 1549 uint32_t idx, endidx; 1550 1551 endidx = pmap_pvo_reclaim_nextidx; 1552 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1553 idx = (idx + 1) & pmap_pteg_mask) { 1554 pvoh = &pmap_pvo_table[idx]; 1555 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1556 if (!PVO_WIRED_P(pvo)) { 1557 pmap_pvo_remove(pvo, -1, NULL); 1558 pmap_pvo_reclaim_nextidx = idx; 1559 PMAPCOUNT(pvos_reclaimed); 1560 return pvo; 1561 } 1562 } 1563 } 1564 return NULL; 1565 } 1566 1567 /* 1568 * This returns whether this is the first mapping of a page. 1569 */ 1570 int 1571 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1572 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1573 { 1574 struct pvo_entry *pvo; 1575 struct pvo_tqhead *pvoh; 1576 register_t msr; 1577 int ptegidx; 1578 int i; 1579 int poolflags = PR_NOWAIT; 1580 1581 /* 1582 * Compute the PTE Group index. 1583 */ 1584 va &= ~ADDR_POFF; 1585 ptegidx = va_to_pteg(pm, va); 1586 1587 msr = pmap_interrupts_off(); 1588 1589 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1590 if (pmap_pvo_remove_depth > 0) 1591 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1592 if (++pmap_pvo_enter_depth > 1) 1593 panic("pmap_pvo_enter: called recursively!"); 1594 #endif 1595 1596 /* 1597 * Remove any existing mapping for this page. Reuse the 1598 * pvo entry if there a mapping. 1599 */ 1600 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1601 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1602 #ifdef DEBUG 1603 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1604 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1605 ~(PTE_REF|PTE_CHG)) == 0 && 1606 va < VM_MIN_KERNEL_ADDRESS) { 1607 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpa "/%#" _PRIxpa "\n", 1608 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1609 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpa " sr=%#" _PRIsr "\n", 1610 pvo->pvo_pte.pte_hi, 1611 pm->pm_sr[va >> ADDR_SR_SHFT]); 1612 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1613 #ifdef DDBX 1614 Debugger(); 1615 #endif 1616 } 1617 #endif 1618 PMAPCOUNT(mappings_replaced); 1619 pmap_pvo_remove(pvo, -1, NULL); 1620 break; 1621 } 1622 } 1623 1624 /* 1625 * If we aren't overwriting an mapping, try to allocate 1626 */ 1627 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1628 --pmap_pvo_enter_depth; 1629 #endif 1630 pmap_interrupts_restore(msr); 1631 if (pvo) { 1632 pmap_pvo_free(pvo); 1633 } 1634 pvo = pool_get(pl, poolflags); 1635 1636 #ifdef DEBUG 1637 /* 1638 * Exercise pmap_pvo_reclaim() a little. 1639 */ 1640 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1641 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1642 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1643 pool_put(pl, pvo); 1644 pvo = NULL; 1645 } 1646 #endif 1647 1648 msr = pmap_interrupts_off(); 1649 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1650 ++pmap_pvo_enter_depth; 1651 #endif 1652 if (pvo == NULL) { 1653 pvo = pmap_pvo_reclaim(pm); 1654 if (pvo == NULL) { 1655 if ((flags & PMAP_CANFAIL) == 0) 1656 panic("pmap_pvo_enter: failed"); 1657 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1658 pmap_pvo_enter_depth--; 1659 #endif 1660 PMAPCOUNT(pvos_failed); 1661 pmap_interrupts_restore(msr); 1662 return ENOMEM; 1663 } 1664 } 1665 1666 pvo->pvo_vaddr = va; 1667 pvo->pvo_pmap = pm; 1668 pvo->pvo_vaddr &= ~ADDR_POFF; 1669 if (flags & VM_PROT_EXECUTE) { 1670 PMAPCOUNT(exec_mappings); 1671 pvo_set_exec(pvo); 1672 } 1673 if (flags & PMAP_WIRED) 1674 pvo->pvo_vaddr |= PVO_WIRED; 1675 if (pvo_head != &pmap_pvo_kunmanaged) { 1676 pvo->pvo_vaddr |= PVO_MANAGED; 1677 PMAPCOUNT(mappings); 1678 } else { 1679 PMAPCOUNT(kernel_mappings); 1680 } 1681 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1682 1683 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1684 if (PVO_WIRED_P(pvo)) 1685 pvo->pvo_pmap->pm_stats.wired_count++; 1686 pvo->pvo_pmap->pm_stats.resident_count++; 1687 #if defined(DEBUG) 1688 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1689 DPRINTFN(PVOENTER, 1690 ("pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1691 pvo, pm, va, pa)); 1692 #endif 1693 1694 /* 1695 * We hope this succeeds but it isn't required. 1696 */ 1697 pvoh = &pmap_pvo_table[ptegidx]; 1698 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1699 if (i >= 0) { 1700 PVO_PTEGIDX_SET(pvo, i); 1701 PVO_WHERE(pvo, ENTER_INSERT); 1702 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1703 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1704 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1705 1706 } else { 1707 /* 1708 * Since we didn't have room for this entry (which makes it 1709 * and evicted entry), place it at the head of the list. 1710 */ 1711 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1712 PMAPCOUNT(ptes_evicted); 1713 pm->pm_evictions++; 1714 /* 1715 * If this is a kernel page, make sure it's active. 1716 */ 1717 if (pm == pmap_kernel()) { 1718 i = pmap_pte_spill(pm, va, false); 1719 KASSERT(i); 1720 } 1721 } 1722 PMAP_PVO_CHECK(pvo); /* sanity check */ 1723 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1724 pmap_pvo_enter_depth--; 1725 #endif 1726 pmap_interrupts_restore(msr); 1727 return 0; 1728 } 1729 1730 static void 1731 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1732 { 1733 volatile struct pte *pt; 1734 int ptegidx; 1735 1736 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1737 if (++pmap_pvo_remove_depth > 1) 1738 panic("pmap_pvo_remove: called recursively!"); 1739 #endif 1740 1741 /* 1742 * If we haven't been supplied the ptegidx, calculate it. 1743 */ 1744 if (pteidx == -1) { 1745 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1746 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1747 } else { 1748 ptegidx = pteidx >> 3; 1749 if (pvo->pvo_pte.pte_hi & PTE_HID) 1750 ptegidx ^= pmap_pteg_mask; 1751 } 1752 PMAP_PVO_CHECK(pvo); /* sanity check */ 1753 1754 /* 1755 * If there is an active pte entry, we need to deactivate it 1756 * (and save the ref & chg bits). 1757 */ 1758 pt = pmap_pvo_to_pte(pvo, pteidx); 1759 if (pt != NULL) { 1760 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1761 PVO_WHERE(pvo, REMOVE); 1762 PVO_PTEGIDX_CLR(pvo); 1763 PMAPCOUNT(ptes_removed); 1764 } else { 1765 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1766 pvo->pvo_pmap->pm_evictions--; 1767 } 1768 1769 /* 1770 * Account for executable mappings. 1771 */ 1772 if (PVO_EXECUTABLE_P(pvo)) 1773 pvo_clear_exec(pvo); 1774 1775 /* 1776 * Update our statistics. 1777 */ 1778 pvo->pvo_pmap->pm_stats.resident_count--; 1779 if (PVO_WIRED_P(pvo)) 1780 pvo->pvo_pmap->pm_stats.wired_count--; 1781 1782 /* 1783 * Save the REF/CHG bits into their cache if the page is managed. 1784 */ 1785 if (PVO_MANAGED_P(pvo)) { 1786 register_t ptelo = pvo->pvo_pte.pte_lo; 1787 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1788 1789 if (pg != NULL) { 1790 /* 1791 * If this page was changed and it is mapped exec, 1792 * invalidate it. 1793 */ 1794 if ((ptelo & PTE_CHG) && 1795 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1796 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1797 if (LIST_EMPTY(pvoh)) { 1798 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1799 "%#" _PRIxpa ": clear-exec]\n", 1800 VM_PAGE_TO_PHYS(pg))); 1801 pmap_attr_clear(pg, PTE_EXEC); 1802 PMAPCOUNT(exec_uncached_pvo_remove); 1803 } else { 1804 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1805 "%#" _PRIxpa ": syncicache]\n", 1806 VM_PAGE_TO_PHYS(pg))); 1807 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1808 PAGE_SIZE); 1809 PMAPCOUNT(exec_synced_pvo_remove); 1810 } 1811 } 1812 1813 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1814 } 1815 PMAPCOUNT(unmappings); 1816 } else { 1817 PMAPCOUNT(kernel_unmappings); 1818 } 1819 1820 /* 1821 * Remove the PVO from its lists and return it to the pool. 1822 */ 1823 LIST_REMOVE(pvo, pvo_vlink); 1824 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1825 if (pvol) { 1826 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1827 } 1828 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1829 pmap_pvo_remove_depth--; 1830 #endif 1831 } 1832 1833 void 1834 pmap_pvo_free(struct pvo_entry *pvo) 1835 { 1836 1837 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1838 } 1839 1840 void 1841 pmap_pvo_free_list(struct pvo_head *pvol) 1842 { 1843 struct pvo_entry *pvo, *npvo; 1844 1845 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1846 npvo = LIST_NEXT(pvo, pvo_vlink); 1847 LIST_REMOVE(pvo, pvo_vlink); 1848 pmap_pvo_free(pvo); 1849 } 1850 } 1851 1852 /* 1853 * Mark a mapping as executable. 1854 * If this is the first executable mapping in the segment, 1855 * clear the noexec flag. 1856 */ 1857 static void 1858 pvo_set_exec(struct pvo_entry *pvo) 1859 { 1860 struct pmap *pm = pvo->pvo_pmap; 1861 1862 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1863 return; 1864 } 1865 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1866 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1867 { 1868 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1869 if (pm->pm_exec[sr]++ == 0) { 1870 pm->pm_sr[sr] &= ~SR_NOEXEC; 1871 } 1872 } 1873 #endif 1874 } 1875 1876 /* 1877 * Mark a mapping as non-executable. 1878 * If this was the last executable mapping in the segment, 1879 * set the noexec flag. 1880 */ 1881 static void 1882 pvo_clear_exec(struct pvo_entry *pvo) 1883 { 1884 struct pmap *pm = pvo->pvo_pmap; 1885 1886 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1887 return; 1888 } 1889 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1890 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1891 { 1892 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1893 if (--pm->pm_exec[sr] == 0) { 1894 pm->pm_sr[sr] |= SR_NOEXEC; 1895 } 1896 } 1897 #endif 1898 } 1899 1900 /* 1901 * Insert physical page at pa into the given pmap at virtual address va. 1902 */ 1903 int 1904 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags) 1905 { 1906 struct mem_region *mp; 1907 struct pvo_head *pvo_head; 1908 struct vm_page *pg; 1909 struct pool *pl; 1910 register_t pte_lo; 1911 int error; 1912 u_int pvo_flags; 1913 u_int was_exec = 0; 1914 1915 PMAP_LOCK(); 1916 1917 if (__predict_false(!pmap_initialized)) { 1918 pvo_head = &pmap_pvo_kunmanaged; 1919 pl = &pmap_upvo_pool; 1920 pvo_flags = 0; 1921 pg = NULL; 1922 was_exec = PTE_EXEC; 1923 } else { 1924 pvo_head = pa_to_pvoh(pa, &pg); 1925 pl = &pmap_mpvo_pool; 1926 pvo_flags = PVO_MANAGED; 1927 } 1928 1929 DPRINTFN(ENTER, 1930 ("pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1931 pm, va, pa, prot, flags)); 1932 1933 /* 1934 * If this is a managed page, and it's the first reference to the 1935 * page clear the execness of the page. Otherwise fetch the execness. 1936 */ 1937 if (pg != NULL) 1938 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1939 1940 DPRINTFN(ENTER, (" was_exec=%d", was_exec)); 1941 1942 /* 1943 * Assume the page is cache inhibited and access is guarded unless 1944 * it's in our available memory array. If it is in the memory array, 1945 * asssume it's in memory coherent memory. 1946 */ 1947 pte_lo = PTE_IG; 1948 if ((flags & PMAP_NC) == 0) { 1949 for (mp = mem; mp->size; mp++) { 1950 if (pa >= mp->start && pa < mp->start + mp->size) { 1951 pte_lo = PTE_M; 1952 break; 1953 } 1954 } 1955 } 1956 1957 if (prot & VM_PROT_WRITE) 1958 pte_lo |= PTE_BW; 1959 else 1960 pte_lo |= PTE_BR; 1961 1962 /* 1963 * If this was in response to a fault, "pre-fault" the PTE's 1964 * changed/referenced bit appropriately. 1965 */ 1966 if (flags & VM_PROT_WRITE) 1967 pte_lo |= PTE_CHG; 1968 if (flags & VM_PROT_ALL) 1969 pte_lo |= PTE_REF; 1970 1971 /* 1972 * We need to know if this page can be executable 1973 */ 1974 flags |= (prot & VM_PROT_EXECUTE); 1975 1976 /* 1977 * Record mapping for later back-translation and pte spilling. 1978 * This will overwrite any existing mapping. 1979 */ 1980 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1981 1982 /* 1983 * Flush the real page from the instruction cache if this page is 1984 * mapped executable and cacheable and has not been flushed since 1985 * the last time it was modified. 1986 */ 1987 if (error == 0 && 1988 (flags & VM_PROT_EXECUTE) && 1989 (pte_lo & PTE_I) == 0 && 1990 was_exec == 0) { 1991 DPRINTFN(ENTER, (" syncicache")); 1992 PMAPCOUNT(exec_synced); 1993 pmap_syncicache(pa, PAGE_SIZE); 1994 if (pg != NULL) { 1995 pmap_attr_save(pg, PTE_EXEC); 1996 PMAPCOUNT(exec_cached); 1997 #if defined(DEBUG) || defined(PMAPDEBUG) 1998 if (pmapdebug & PMAPDEBUG_ENTER) 1999 printf(" marked-as-exec"); 2000 else if (pmapdebug & PMAPDEBUG_EXEC) 2001 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 2002 VM_PAGE_TO_PHYS(pg)); 2003 2004 #endif 2005 } 2006 } 2007 2008 DPRINTFN(ENTER, (": error=%d\n", error)); 2009 2010 PMAP_UNLOCK(); 2011 2012 return error; 2013 } 2014 2015 void 2016 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2017 { 2018 struct mem_region *mp; 2019 register_t pte_lo; 2020 int error; 2021 2022 #if defined (PMAP_OEA64_BRIDGE) 2023 if (va < VM_MIN_KERNEL_ADDRESS) 2024 panic("pmap_kenter_pa: attempt to enter " 2025 "non-kernel address %#" _PRIxva "!", va); 2026 #endif 2027 2028 DPRINTFN(KENTER, 2029 ("pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot)); 2030 2031 PMAP_LOCK(); 2032 2033 /* 2034 * Assume the page is cache inhibited and access is guarded unless 2035 * it's in our available memory array. If it is in the memory array, 2036 * asssume it's in memory coherent memory. 2037 */ 2038 pte_lo = PTE_IG; 2039 if ((prot & PMAP_NC) == 0) { 2040 for (mp = mem; mp->size; mp++) { 2041 if (pa >= mp->start && pa < mp->start + mp->size) { 2042 pte_lo = PTE_M; 2043 break; 2044 } 2045 } 2046 } 2047 2048 if (prot & VM_PROT_WRITE) 2049 pte_lo |= PTE_BW; 2050 else 2051 pte_lo |= PTE_BR; 2052 2053 /* 2054 * We don't care about REF/CHG on PVOs on the unmanaged list. 2055 */ 2056 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2057 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2058 2059 if (error != 0) 2060 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2061 va, pa, error); 2062 2063 PMAP_UNLOCK(); 2064 } 2065 2066 void 2067 pmap_kremove(vaddr_t va, vsize_t len) 2068 { 2069 if (va < VM_MIN_KERNEL_ADDRESS) 2070 panic("pmap_kremove: attempt to remove " 2071 "non-kernel address %#" _PRIxva "!", va); 2072 2073 DPRINTFN(KREMOVE,("pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len)); 2074 pmap_remove(pmap_kernel(), va, va + len); 2075 } 2076 2077 /* 2078 * Remove the given range of mapping entries. 2079 */ 2080 void 2081 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2082 { 2083 struct pvo_head pvol; 2084 struct pvo_entry *pvo; 2085 register_t msr; 2086 int pteidx; 2087 2088 PMAP_LOCK(); 2089 LIST_INIT(&pvol); 2090 msr = pmap_interrupts_off(); 2091 for (; va < endva; va += PAGE_SIZE) { 2092 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2093 if (pvo != NULL) { 2094 pmap_pvo_remove(pvo, pteidx, &pvol); 2095 } 2096 } 2097 pmap_interrupts_restore(msr); 2098 pmap_pvo_free_list(&pvol); 2099 PMAP_UNLOCK(); 2100 } 2101 2102 /* 2103 * Get the physical page address for the given pmap/virtual address. 2104 */ 2105 bool 2106 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2107 { 2108 struct pvo_entry *pvo; 2109 register_t msr; 2110 2111 PMAP_LOCK(); 2112 2113 /* 2114 * If this is a kernel pmap lookup, also check the battable 2115 * and if we get a hit, translate the VA to a PA using the 2116 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2117 * that will wrap back to 0. 2118 */ 2119 if (pm == pmap_kernel() && 2120 (va < VM_MIN_KERNEL_ADDRESS || 2121 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2122 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2123 #if defined (PMAP_OEA) 2124 #ifdef PPC_OEA601 2125 if ((MFPVR() >> 16) == MPC601) { 2126 register_t batu = battable[va >> 23].batu; 2127 register_t batl = battable[va >> 23].batl; 2128 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2129 if (BAT601_VALID_P(batl) && 2130 BAT601_VA_MATCH_P(batu, batl, va)) { 2131 register_t mask = 2132 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2133 if (pap) 2134 *pap = (batl & mask) | (va & ~mask); 2135 PMAP_UNLOCK(); 2136 return true; 2137 } else if (SR601_VALID_P(sr) && 2138 SR601_PA_MATCH_P(sr, va)) { 2139 if (pap) 2140 *pap = va; 2141 PMAP_UNLOCK(); 2142 return true; 2143 } 2144 } else 2145 #endif /* PPC_OEA601 */ 2146 { 2147 register_t batu = battable[va >> ADDR_SR_SHFT].batu; 2148 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2149 register_t batl = 2150 battable[va >> ADDR_SR_SHFT].batl; 2151 register_t mask = 2152 (~(batu & BAT_BL) << 15) & ~0x1ffffL; 2153 if (pap) 2154 *pap = (batl & mask) | (va & ~mask); 2155 PMAP_UNLOCK(); 2156 return true; 2157 } 2158 } 2159 return false; 2160 #elif defined (PMAP_OEA64_BRIDGE) 2161 if (va >= SEGMENT_LENGTH) 2162 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2163 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2164 else { 2165 if (pap) 2166 *pap = va; 2167 PMAP_UNLOCK(); 2168 return true; 2169 } 2170 #elif defined (PMAP_OEA64) 2171 #error PPC_OEA64 not supported 2172 #endif /* PPC_OEA */ 2173 } 2174 2175 msr = pmap_interrupts_off(); 2176 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2177 if (pvo != NULL) { 2178 PMAP_PVO_CHECK(pvo); /* sanity check */ 2179 if (pap) 2180 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2181 | (va & ADDR_POFF); 2182 } 2183 pmap_interrupts_restore(msr); 2184 PMAP_UNLOCK(); 2185 return pvo != NULL; 2186 } 2187 2188 /* 2189 * Lower the protection on the specified range of this pmap. 2190 */ 2191 void 2192 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2193 { 2194 struct pvo_entry *pvo; 2195 volatile struct pte *pt; 2196 register_t msr; 2197 int pteidx; 2198 2199 /* 2200 * Since this routine only downgrades protection, we should 2201 * always be called with at least one bit not set. 2202 */ 2203 KASSERT(prot != VM_PROT_ALL); 2204 2205 /* 2206 * If there is no protection, this is equivalent to 2207 * remove the pmap from the pmap. 2208 */ 2209 if ((prot & VM_PROT_READ) == 0) { 2210 pmap_remove(pm, va, endva); 2211 return; 2212 } 2213 2214 PMAP_LOCK(); 2215 2216 msr = pmap_interrupts_off(); 2217 for (; va < endva; va += PAGE_SIZE) { 2218 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2219 if (pvo == NULL) 2220 continue; 2221 PMAP_PVO_CHECK(pvo); /* sanity check */ 2222 2223 /* 2224 * Revoke executable if asked to do so. 2225 */ 2226 if ((prot & VM_PROT_EXECUTE) == 0) 2227 pvo_clear_exec(pvo); 2228 2229 #if 0 2230 /* 2231 * If the page is already read-only, no change 2232 * needs to be made. 2233 */ 2234 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2235 continue; 2236 #endif 2237 /* 2238 * Grab the PTE pointer before we diddle with 2239 * the cached PTE copy. 2240 */ 2241 pt = pmap_pvo_to_pte(pvo, pteidx); 2242 /* 2243 * Change the protection of the page. 2244 */ 2245 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2246 pvo->pvo_pte.pte_lo |= PTE_BR; 2247 2248 /* 2249 * If the PVO is in the page table, update 2250 * that pte at well. 2251 */ 2252 if (pt != NULL) { 2253 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2254 PVO_WHERE(pvo, PMAP_PROTECT); 2255 PMAPCOUNT(ptes_changed); 2256 } 2257 2258 PMAP_PVO_CHECK(pvo); /* sanity check */ 2259 } 2260 pmap_interrupts_restore(msr); 2261 PMAP_UNLOCK(); 2262 } 2263 2264 void 2265 pmap_unwire(pmap_t pm, vaddr_t va) 2266 { 2267 struct pvo_entry *pvo; 2268 register_t msr; 2269 2270 PMAP_LOCK(); 2271 msr = pmap_interrupts_off(); 2272 pvo = pmap_pvo_find_va(pm, va, NULL); 2273 if (pvo != NULL) { 2274 if (PVO_WIRED_P(pvo)) { 2275 pvo->pvo_vaddr &= ~PVO_WIRED; 2276 pm->pm_stats.wired_count--; 2277 } 2278 PMAP_PVO_CHECK(pvo); /* sanity check */ 2279 } 2280 pmap_interrupts_restore(msr); 2281 PMAP_UNLOCK(); 2282 } 2283 2284 /* 2285 * Lower the protection on the specified physical page. 2286 */ 2287 void 2288 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2289 { 2290 struct pvo_head *pvo_head, pvol; 2291 struct pvo_entry *pvo, *next_pvo; 2292 volatile struct pte *pt; 2293 register_t msr; 2294 2295 PMAP_LOCK(); 2296 2297 KASSERT(prot != VM_PROT_ALL); 2298 LIST_INIT(&pvol); 2299 msr = pmap_interrupts_off(); 2300 2301 /* 2302 * When UVM reuses a page, it does a pmap_page_protect with 2303 * VM_PROT_NONE. At that point, we can clear the exec flag 2304 * since we know the page will have different contents. 2305 */ 2306 if ((prot & VM_PROT_READ) == 0) { 2307 DPRINTFN(EXEC, ("[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2308 VM_PAGE_TO_PHYS(pg))); 2309 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2310 PMAPCOUNT(exec_uncached_page_protect); 2311 pmap_attr_clear(pg, PTE_EXEC); 2312 } 2313 } 2314 2315 pvo_head = vm_page_to_pvoh(pg); 2316 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2317 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2318 PMAP_PVO_CHECK(pvo); /* sanity check */ 2319 2320 /* 2321 * Downgrading to no mapping at all, we just remove the entry. 2322 */ 2323 if ((prot & VM_PROT_READ) == 0) { 2324 pmap_pvo_remove(pvo, -1, &pvol); 2325 continue; 2326 } 2327 2328 /* 2329 * If EXEC permission is being revoked, just clear the 2330 * flag in the PVO. 2331 */ 2332 if ((prot & VM_PROT_EXECUTE) == 0) 2333 pvo_clear_exec(pvo); 2334 2335 /* 2336 * If this entry is already RO, don't diddle with the 2337 * page table. 2338 */ 2339 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2340 PMAP_PVO_CHECK(pvo); 2341 continue; 2342 } 2343 2344 /* 2345 * Grab the PTE before the we diddle the bits so 2346 * pvo_to_pte can verify the pte contents are as 2347 * expected. 2348 */ 2349 pt = pmap_pvo_to_pte(pvo, -1); 2350 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2351 pvo->pvo_pte.pte_lo |= PTE_BR; 2352 if (pt != NULL) { 2353 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2354 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2355 PMAPCOUNT(ptes_changed); 2356 } 2357 PMAP_PVO_CHECK(pvo); /* sanity check */ 2358 } 2359 pmap_interrupts_restore(msr); 2360 pmap_pvo_free_list(&pvol); 2361 2362 PMAP_UNLOCK(); 2363 } 2364 2365 /* 2366 * Activate the address space for the specified process. If the process 2367 * is the current process, load the new MMU context. 2368 */ 2369 void 2370 pmap_activate(struct lwp *l) 2371 { 2372 struct pcb *pcb = &l->l_addr->u_pcb; 2373 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2374 2375 DPRINTFN(ACTIVATE, 2376 ("pmap_activate: lwp %p (curlwp %p)\n", l, curlwp)); 2377 2378 /* 2379 * XXX Normally performed in cpu_fork(). 2380 */ 2381 pcb->pcb_pm = pmap; 2382 2383 /* 2384 * In theory, the SR registers need only be valid on return 2385 * to user space wait to do them there. 2386 */ 2387 if (l == curlwp) { 2388 /* Store pointer to new current pmap. */ 2389 curpm = pmap; 2390 } 2391 } 2392 2393 /* 2394 * Deactivate the specified process's address space. 2395 */ 2396 void 2397 pmap_deactivate(struct lwp *l) 2398 { 2399 } 2400 2401 bool 2402 pmap_query_bit(struct vm_page *pg, int ptebit) 2403 { 2404 struct pvo_entry *pvo; 2405 volatile struct pte *pt; 2406 register_t msr; 2407 2408 PMAP_LOCK(); 2409 2410 if (pmap_attr_fetch(pg) & ptebit) { 2411 PMAP_UNLOCK(); 2412 return true; 2413 } 2414 2415 msr = pmap_interrupts_off(); 2416 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2417 PMAP_PVO_CHECK(pvo); /* sanity check */ 2418 /* 2419 * See if we saved the bit off. If so cache, it and return 2420 * success. 2421 */ 2422 if (pvo->pvo_pte.pte_lo & ptebit) { 2423 pmap_attr_save(pg, ptebit); 2424 PMAP_PVO_CHECK(pvo); /* sanity check */ 2425 pmap_interrupts_restore(msr); 2426 PMAP_UNLOCK(); 2427 return true; 2428 } 2429 } 2430 /* 2431 * No luck, now go thru the hard part of looking at the ptes 2432 * themselves. Sync so any pending REF/CHG bits are flushed 2433 * to the PTEs. 2434 */ 2435 SYNC(); 2436 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2437 PMAP_PVO_CHECK(pvo); /* sanity check */ 2438 /* 2439 * See if this pvo have a valid PTE. If so, fetch the 2440 * REF/CHG bits from the valid PTE. If the appropriate 2441 * ptebit is set, cache, it and return success. 2442 */ 2443 pt = pmap_pvo_to_pte(pvo, -1); 2444 if (pt != NULL) { 2445 pmap_pte_synch(pt, &pvo->pvo_pte); 2446 if (pvo->pvo_pte.pte_lo & ptebit) { 2447 pmap_attr_save(pg, ptebit); 2448 PMAP_PVO_CHECK(pvo); /* sanity check */ 2449 pmap_interrupts_restore(msr); 2450 PMAP_UNLOCK(); 2451 return true; 2452 } 2453 } 2454 } 2455 pmap_interrupts_restore(msr); 2456 PMAP_UNLOCK(); 2457 return false; 2458 } 2459 2460 bool 2461 pmap_clear_bit(struct vm_page *pg, int ptebit) 2462 { 2463 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2464 struct pvo_entry *pvo; 2465 volatile struct pte *pt; 2466 register_t msr; 2467 int rv = 0; 2468 2469 PMAP_LOCK(); 2470 msr = pmap_interrupts_off(); 2471 2472 /* 2473 * Fetch the cache value 2474 */ 2475 rv |= pmap_attr_fetch(pg); 2476 2477 /* 2478 * Clear the cached value. 2479 */ 2480 pmap_attr_clear(pg, ptebit); 2481 2482 /* 2483 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2484 * can reset the right ones). Note that since the pvo entries and 2485 * list heads are accessed via BAT0 and are never placed in the 2486 * page table, we don't have to worry about further accesses setting 2487 * the REF/CHG bits. 2488 */ 2489 SYNC(); 2490 2491 /* 2492 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2493 * valid PTE. If so, clear the ptebit from the valid PTE. 2494 */ 2495 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2496 PMAP_PVO_CHECK(pvo); /* sanity check */ 2497 pt = pmap_pvo_to_pte(pvo, -1); 2498 if (pt != NULL) { 2499 /* 2500 * Only sync the PTE if the bit we are looking 2501 * for is not already set. 2502 */ 2503 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2504 pmap_pte_synch(pt, &pvo->pvo_pte); 2505 /* 2506 * If the bit we are looking for was already set, 2507 * clear that bit in the pte. 2508 */ 2509 if (pvo->pvo_pte.pte_lo & ptebit) 2510 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2511 } 2512 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2513 pvo->pvo_pte.pte_lo &= ~ptebit; 2514 PMAP_PVO_CHECK(pvo); /* sanity check */ 2515 } 2516 pmap_interrupts_restore(msr); 2517 2518 /* 2519 * If we are clearing the modify bit and this page was marked EXEC 2520 * and the user of the page thinks the page was modified, then we 2521 * need to clean it from the icache if it's mapped or clear the EXEC 2522 * bit if it's not mapped. The page itself might not have the CHG 2523 * bit set if the modification was done via DMA to the page. 2524 */ 2525 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2526 if (LIST_EMPTY(pvoh)) { 2527 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2528 VM_PAGE_TO_PHYS(pg))); 2529 pmap_attr_clear(pg, PTE_EXEC); 2530 PMAPCOUNT(exec_uncached_clear_modify); 2531 } else { 2532 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2533 VM_PAGE_TO_PHYS(pg))); 2534 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2535 PMAPCOUNT(exec_synced_clear_modify); 2536 } 2537 } 2538 PMAP_UNLOCK(); 2539 return (rv & ptebit) != 0; 2540 } 2541 2542 void 2543 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2544 { 2545 struct pvo_entry *pvo; 2546 size_t offset = va & ADDR_POFF; 2547 int s; 2548 2549 PMAP_LOCK(); 2550 s = splvm(); 2551 while (len > 0) { 2552 size_t seglen = PAGE_SIZE - offset; 2553 if (seglen > len) 2554 seglen = len; 2555 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2556 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2557 pmap_syncicache( 2558 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2559 PMAP_PVO_CHECK(pvo); 2560 } 2561 va += seglen; 2562 len -= seglen; 2563 offset = 0; 2564 } 2565 splx(s); 2566 PMAP_UNLOCK(); 2567 } 2568 2569 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2570 void 2571 pmap_pte_print(volatile struct pte *pt) 2572 { 2573 printf("PTE %p: ", pt); 2574 2575 #if defined(PMAP_OEA) 2576 /* High word: */ 2577 printf("%#" _PRIxpte ": [", pt->pte_hi); 2578 #else 2579 printf("%#" _PRIxpte ": [", pt->pte_hi); 2580 #endif /* PMAP_OEA */ 2581 2582 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2583 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2584 2585 printf("%#" _PRIxpte " %#" _PRIxpte "", 2586 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2587 pt->pte_hi & PTE_API); 2588 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2589 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2590 #else 2591 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2592 #endif /* PMAP_OEA */ 2593 2594 /* Low word: */ 2595 #if defined (PMAP_OEA) 2596 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2597 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2598 #else 2599 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2600 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2601 #endif 2602 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2603 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2604 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2605 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2606 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2607 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2608 switch (pt->pte_lo & PTE_PP) { 2609 case PTE_BR: printf("br]\n"); break; 2610 case PTE_BW: printf("bw]\n"); break; 2611 case PTE_SO: printf("so]\n"); break; 2612 case PTE_SW: printf("sw]\n"); break; 2613 } 2614 } 2615 #endif 2616 2617 #if defined(DDB) 2618 void 2619 pmap_pteg_check(void) 2620 { 2621 volatile struct pte *pt; 2622 int i; 2623 int ptegidx; 2624 u_int p_valid = 0; 2625 u_int s_valid = 0; 2626 u_int invalid = 0; 2627 2628 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2629 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2630 if (pt->pte_hi & PTE_VALID) { 2631 if (pt->pte_hi & PTE_HID) 2632 s_valid++; 2633 else 2634 { 2635 p_valid++; 2636 } 2637 } else 2638 invalid++; 2639 } 2640 } 2641 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2642 p_valid, p_valid, s_valid, s_valid, 2643 invalid, invalid); 2644 } 2645 2646 void 2647 pmap_print_mmuregs(void) 2648 { 2649 int i; 2650 u_int cpuvers; 2651 #ifndef PMAP_OEA64 2652 vaddr_t addr; 2653 register_t soft_sr[16]; 2654 #endif 2655 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2656 struct bat soft_ibat[4]; 2657 struct bat soft_dbat[4]; 2658 #endif 2659 paddr_t sdr1; 2660 2661 cpuvers = MFPVR() >> 16; 2662 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2663 #ifndef PMAP_OEA64 2664 addr = 0; 2665 for (i = 0; i < 16; i++) { 2666 soft_sr[i] = MFSRIN(addr); 2667 addr += (1 << ADDR_SR_SHFT); 2668 } 2669 #endif 2670 2671 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2672 /* read iBAT (601: uBAT) registers */ 2673 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2674 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2675 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2676 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2677 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2678 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2679 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2680 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2681 2682 2683 if (cpuvers != MPC601) { 2684 /* read dBAT registers */ 2685 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2686 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2687 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2688 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2689 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2690 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2691 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2692 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2693 } 2694 #endif 2695 2696 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2697 #ifndef PMAP_OEA64 2698 printf("SR[]:\t"); 2699 for (i = 0; i < 4; i++) 2700 printf("0x%08lx, ", soft_sr[i]); 2701 printf("\n\t"); 2702 for ( ; i < 8; i++) 2703 printf("0x%08lx, ", soft_sr[i]); 2704 printf("\n\t"); 2705 for ( ; i < 12; i++) 2706 printf("0x%08lx, ", soft_sr[i]); 2707 printf("\n\t"); 2708 for ( ; i < 16; i++) 2709 printf("0x%08lx, ", soft_sr[i]); 2710 printf("\n"); 2711 #endif 2712 2713 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2714 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2715 for (i = 0; i < 4; i++) { 2716 printf("0x%08lx 0x%08lx, ", 2717 soft_ibat[i].batu, soft_ibat[i].batl); 2718 if (i == 1) 2719 printf("\n\t"); 2720 } 2721 if (cpuvers != MPC601) { 2722 printf("\ndBAT[]:\t"); 2723 for (i = 0; i < 4; i++) { 2724 printf("0x%08lx 0x%08lx, ", 2725 soft_dbat[i].batu, soft_dbat[i].batl); 2726 if (i == 1) 2727 printf("\n\t"); 2728 } 2729 } 2730 printf("\n"); 2731 #endif /* PMAP_OEA... */ 2732 } 2733 2734 void 2735 pmap_print_pte(pmap_t pm, vaddr_t va) 2736 { 2737 struct pvo_entry *pvo; 2738 volatile struct pte *pt; 2739 int pteidx; 2740 2741 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2742 if (pvo != NULL) { 2743 pt = pmap_pvo_to_pte(pvo, pteidx); 2744 if (pt != NULL) { 2745 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2746 va, pt, 2747 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2748 pt->pte_hi, pt->pte_lo); 2749 } else { 2750 printf("No valid PTE found\n"); 2751 } 2752 } else { 2753 printf("Address not in pmap\n"); 2754 } 2755 } 2756 2757 void 2758 pmap_pteg_dist(void) 2759 { 2760 struct pvo_entry *pvo; 2761 int ptegidx; 2762 int depth; 2763 int max_depth = 0; 2764 unsigned int depths[64]; 2765 2766 memset(depths, 0, sizeof(depths)); 2767 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2768 depth = 0; 2769 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2770 depth++; 2771 } 2772 if (depth > max_depth) 2773 max_depth = depth; 2774 if (depth > 63) 2775 depth = 63; 2776 depths[depth]++; 2777 } 2778 2779 for (depth = 0; depth < 64; depth++) { 2780 printf(" [%2d]: %8u", depth, depths[depth]); 2781 if ((depth & 3) == 3) 2782 printf("\n"); 2783 if (depth == max_depth) 2784 break; 2785 } 2786 if ((depth & 3) != 3) 2787 printf("\n"); 2788 printf("Max depth found was %d\n", max_depth); 2789 } 2790 #endif /* DEBUG */ 2791 2792 #if defined(PMAPCHECK) || defined(DEBUG) 2793 void 2794 pmap_pvo_verify(void) 2795 { 2796 int ptegidx; 2797 int s; 2798 2799 s = splvm(); 2800 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2801 struct pvo_entry *pvo; 2802 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2803 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2804 panic("pmap_pvo_verify: invalid pvo %p " 2805 "on list %#x", pvo, ptegidx); 2806 pmap_pvo_check(pvo); 2807 } 2808 } 2809 splx(s); 2810 } 2811 #endif /* PMAPCHECK */ 2812 2813 2814 void * 2815 pmap_pool_ualloc(struct pool *pp, int flags) 2816 { 2817 struct pvo_page *pvop; 2818 2819 if (uvm.page_init_done != true) { 2820 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2821 } 2822 2823 PMAP_LOCK(); 2824 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2825 if (pvop != NULL) { 2826 pmap_upvop_free--; 2827 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2828 PMAP_UNLOCK(); 2829 return pvop; 2830 } 2831 PMAP_UNLOCK(); 2832 return pmap_pool_malloc(pp, flags); 2833 } 2834 2835 void * 2836 pmap_pool_malloc(struct pool *pp, int flags) 2837 { 2838 struct pvo_page *pvop; 2839 struct vm_page *pg; 2840 2841 PMAP_LOCK(); 2842 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2843 if (pvop != NULL) { 2844 pmap_mpvop_free--; 2845 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2846 PMAP_UNLOCK(); 2847 return pvop; 2848 } 2849 PMAP_UNLOCK(); 2850 again: 2851 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2852 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2853 if (__predict_false(pg == NULL)) { 2854 if (flags & PR_WAITOK) { 2855 uvm_wait("plpg"); 2856 goto again; 2857 } else { 2858 return (0); 2859 } 2860 } 2861 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2862 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2863 } 2864 2865 void 2866 pmap_pool_ufree(struct pool *pp, void *va) 2867 { 2868 struct pvo_page *pvop; 2869 #if 0 2870 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2871 pmap_pool_mfree(va, size, tag); 2872 return; 2873 } 2874 #endif 2875 PMAP_LOCK(); 2876 pvop = va; 2877 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2878 pmap_upvop_free++; 2879 if (pmap_upvop_free > pmap_upvop_maxfree) 2880 pmap_upvop_maxfree = pmap_upvop_free; 2881 PMAP_UNLOCK(); 2882 } 2883 2884 void 2885 pmap_pool_mfree(struct pool *pp, void *va) 2886 { 2887 struct pvo_page *pvop; 2888 2889 PMAP_LOCK(); 2890 pvop = va; 2891 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2892 pmap_mpvop_free++; 2893 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2894 pmap_mpvop_maxfree = pmap_mpvop_free; 2895 PMAP_UNLOCK(); 2896 #if 0 2897 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2898 #endif 2899 } 2900 2901 /* 2902 * This routine in bootstraping to steal to-be-managed memory (which will 2903 * then be unmanaged). We use it to grab from the first 256MB for our 2904 * pmap needs and above 256MB for other stuff. 2905 */ 2906 vaddr_t 2907 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2908 { 2909 vsize_t size; 2910 vaddr_t va; 2911 paddr_t pa = 0; 2912 int npgs, bank; 2913 struct vm_physseg *ps; 2914 2915 if (uvm.page_init_done == true) 2916 panic("pmap_steal_memory: called _after_ bootstrap"); 2917 2918 *vstartp = VM_MIN_KERNEL_ADDRESS; 2919 *vendp = VM_MAX_KERNEL_ADDRESS; 2920 2921 size = round_page(vsize); 2922 npgs = atop(size); 2923 2924 /* 2925 * PA 0 will never be among those given to UVM so we can use it 2926 * to indicate we couldn't steal any memory. 2927 */ 2928 for (ps = vm_physmem, bank = 0; bank < vm_nphysseg; bank++, ps++) { 2929 if (ps->free_list == VM_FREELIST_FIRST256 && 2930 ps->avail_end - ps->avail_start >= npgs) { 2931 pa = ptoa(ps->avail_start); 2932 break; 2933 } 2934 } 2935 2936 if (pa == 0) 2937 panic("pmap_steal_memory: no approriate memory to steal!"); 2938 2939 ps->avail_start += npgs; 2940 ps->start += npgs; 2941 2942 /* 2943 * If we've used up all the pages in the segment, remove it and 2944 * compact the list. 2945 */ 2946 if (ps->avail_start == ps->end) { 2947 /* 2948 * If this was the last one, then a very bad thing has occurred 2949 */ 2950 if (--vm_nphysseg == 0) 2951 panic("pmap_steal_memory: out of memory!"); 2952 2953 printf("pmap_steal_memory: consumed bank %d\n", bank); 2954 for (; bank < vm_nphysseg; bank++, ps++) { 2955 ps[0] = ps[1]; 2956 } 2957 } 2958 2959 va = (vaddr_t) pa; 2960 memset((void *) va, 0, size); 2961 pmap_pages_stolen += npgs; 2962 #ifdef DEBUG 2963 if (pmapdebug && npgs > 1) { 2964 u_int cnt = 0; 2965 for (bank = 0, ps = vm_physmem; bank < vm_nphysseg; bank++, ps++) 2966 cnt += ps->avail_end - ps->avail_start; 2967 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2968 npgs, pmap_pages_stolen, cnt); 2969 } 2970 #endif 2971 2972 return va; 2973 } 2974 2975 /* 2976 * Find a chuck of memory with right size and alignment. 2977 */ 2978 paddr_t 2979 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2980 { 2981 struct mem_region *mp; 2982 paddr_t s, e; 2983 int i, j; 2984 2985 size = round_page(size); 2986 2987 DPRINTFN(BOOT, 2988 ("pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 2989 size, alignment, at_end)); 2990 2991 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2992 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 2993 alignment); 2994 2995 if (at_end) { 2996 if (alignment != PAGE_SIZE) 2997 panic("pmap_boot_find_memory: invalid ending " 2998 "alignment %#" _PRIxpa, alignment); 2999 3000 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 3001 s = mp->start + mp->size - size; 3002 if (s >= mp->start && mp->size >= size) { 3003 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3004 DPRINTFN(BOOT, 3005 ("pmap_boot_find_memory: b-avail[%d] start " 3006 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3007 mp->start, mp->size)); 3008 mp->size -= size; 3009 DPRINTFN(BOOT, 3010 ("pmap_boot_find_memory: a-avail[%d] start " 3011 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3012 mp->start, mp->size)); 3013 return s; 3014 } 3015 } 3016 panic("pmap_boot_find_memory: no available memory"); 3017 } 3018 3019 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3020 s = (mp->start + alignment - 1) & ~(alignment-1); 3021 e = s + size; 3022 3023 /* 3024 * Is the calculated region entirely within the region? 3025 */ 3026 if (s < mp->start || e > mp->start + mp->size) 3027 continue; 3028 3029 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3030 if (s == mp->start) { 3031 /* 3032 * If the block starts at the beginning of region, 3033 * adjust the size & start. (the region may now be 3034 * zero in length) 3035 */ 3036 DPRINTFN(BOOT, 3037 ("pmap_boot_find_memory: b-avail[%d] start " 3038 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3039 mp->start += size; 3040 mp->size -= size; 3041 DPRINTFN(BOOT, 3042 ("pmap_boot_find_memory: a-avail[%d] start " 3043 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3044 } else if (e == mp->start + mp->size) { 3045 /* 3046 * If the block starts at the beginning of region, 3047 * adjust only the size. 3048 */ 3049 DPRINTFN(BOOT, 3050 ("pmap_boot_find_memory: b-avail[%d] start " 3051 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3052 mp->size -= size; 3053 DPRINTFN(BOOT, 3054 ("pmap_boot_find_memory: a-avail[%d] start " 3055 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3056 } else { 3057 /* 3058 * Block is in the middle of the region, so we 3059 * have to split it in two. 3060 */ 3061 for (j = avail_cnt; j > i + 1; j--) { 3062 avail[j] = avail[j-1]; 3063 } 3064 DPRINTFN(BOOT, 3065 ("pmap_boot_find_memory: b-avail[%d] start " 3066 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3067 mp[1].start = e; 3068 mp[1].size = mp[0].start + mp[0].size - e; 3069 mp[0].size = s - mp[0].start; 3070 avail_cnt++; 3071 for (; i < avail_cnt; i++) { 3072 DPRINTFN(BOOT, 3073 ("pmap_boot_find_memory: a-avail[%d] " 3074 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3075 avail[i].start, avail[i].size)); 3076 } 3077 } 3078 KASSERT(s == (uintptr_t) s); 3079 return s; 3080 } 3081 panic("pmap_boot_find_memory: not enough memory for " 3082 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3083 } 3084 3085 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3086 #if defined (PMAP_OEA64_BRIDGE) 3087 int 3088 pmap_setup_segment0_map(int use_large_pages, ...) 3089 { 3090 vaddr_t va; 3091 3092 register_t pte_lo = 0x0; 3093 int ptegidx = 0, i = 0; 3094 struct pte pte; 3095 va_list ap; 3096 3097 /* Coherent + Supervisor RW, no user access */ 3098 pte_lo = PTE_M; 3099 3100 /* XXXSL 3101 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3102 * these have to take priority. 3103 */ 3104 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3105 ptegidx = va_to_pteg(pmap_kernel(), va); 3106 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3107 i = pmap_pte_insert(ptegidx, &pte); 3108 } 3109 3110 va_start(ap, use_large_pages); 3111 while (1) { 3112 paddr_t pa; 3113 size_t size; 3114 3115 va = va_arg(ap, vaddr_t); 3116 3117 if (va == 0) 3118 break; 3119 3120 pa = va_arg(ap, paddr_t); 3121 size = va_arg(ap, size_t); 3122 3123 for (; va < (va + size); va += 0x1000, pa += 0x1000) { 3124 #if 0 3125 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3126 #endif 3127 ptegidx = va_to_pteg(pmap_kernel(), va); 3128 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3129 i = pmap_pte_insert(ptegidx, &pte); 3130 } 3131 } 3132 3133 TLBSYNC(); 3134 SYNC(); 3135 return (0); 3136 } 3137 #endif /* PMAP_OEA64_BRIDGE */ 3138 3139 /* 3140 * This is not part of the defined PMAP interface and is specific to the 3141 * PowerPC architecture. This is called during initppc, before the system 3142 * is really initialized. 3143 */ 3144 void 3145 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3146 { 3147 struct mem_region *mp, tmp; 3148 paddr_t s, e; 3149 psize_t size; 3150 int i, j; 3151 3152 /* 3153 * Get memory. 3154 */ 3155 mem_regions(&mem, &avail); 3156 #if defined(DEBUG) 3157 if (pmapdebug & PMAPDEBUG_BOOT) { 3158 printf("pmap_bootstrap: memory configuration:\n"); 3159 for (mp = mem; mp->size; mp++) { 3160 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3161 mp->start, mp->size); 3162 } 3163 for (mp = avail; mp->size; mp++) { 3164 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3165 mp->start, mp->size); 3166 } 3167 } 3168 #endif 3169 3170 /* 3171 * Find out how much physical memory we have and in how many chunks. 3172 */ 3173 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3174 if (mp->start >= pmap_memlimit) 3175 continue; 3176 if (mp->start + mp->size > pmap_memlimit) { 3177 size = pmap_memlimit - mp->start; 3178 physmem += btoc(size); 3179 } else { 3180 physmem += btoc(mp->size); 3181 } 3182 mem_cnt++; 3183 } 3184 3185 /* 3186 * Count the number of available entries. 3187 */ 3188 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3189 avail_cnt++; 3190 3191 /* 3192 * Page align all regions. 3193 */ 3194 kernelstart = trunc_page(kernelstart); 3195 kernelend = round_page(kernelend); 3196 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3197 s = round_page(mp->start); 3198 mp->size -= (s - mp->start); 3199 mp->size = trunc_page(mp->size); 3200 mp->start = s; 3201 e = mp->start + mp->size; 3202 3203 DPRINTFN(BOOT, 3204 ("pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3205 i, mp->start, mp->size)); 3206 3207 /* 3208 * Don't allow the end to run beyond our artificial limit 3209 */ 3210 if (e > pmap_memlimit) 3211 e = pmap_memlimit; 3212 3213 /* 3214 * Is this region empty or strange? skip it. 3215 */ 3216 if (e <= s) { 3217 mp->start = 0; 3218 mp->size = 0; 3219 continue; 3220 } 3221 3222 /* 3223 * Does this overlap the beginning of kernel? 3224 * Does extend past the end of the kernel? 3225 */ 3226 else if (s < kernelstart && e > kernelstart) { 3227 if (e > kernelend) { 3228 avail[avail_cnt].start = kernelend; 3229 avail[avail_cnt].size = e - kernelend; 3230 avail_cnt++; 3231 } 3232 mp->size = kernelstart - s; 3233 } 3234 /* 3235 * Check whether this region overlaps the end of the kernel. 3236 */ 3237 else if (s < kernelend && e > kernelend) { 3238 mp->start = kernelend; 3239 mp->size = e - kernelend; 3240 } 3241 /* 3242 * Look whether this regions is completely inside the kernel. 3243 * Nuke it if it does. 3244 */ 3245 else if (s >= kernelstart && e <= kernelend) { 3246 mp->start = 0; 3247 mp->size = 0; 3248 } 3249 /* 3250 * If the user imposed a memory limit, enforce it. 3251 */ 3252 else if (s >= pmap_memlimit) { 3253 mp->start = -PAGE_SIZE; /* let's know why */ 3254 mp->size = 0; 3255 } 3256 else { 3257 mp->start = s; 3258 mp->size = e - s; 3259 } 3260 DPRINTFN(BOOT, 3261 ("pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3262 i, mp->start, mp->size)); 3263 } 3264 3265 /* 3266 * Move (and uncount) all the null return to the end. 3267 */ 3268 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3269 if (mp->size == 0) { 3270 tmp = avail[i]; 3271 avail[i] = avail[--avail_cnt]; 3272 avail[avail_cnt] = avail[i]; 3273 } 3274 } 3275 3276 /* 3277 * (Bubble)sort them into asecnding order. 3278 */ 3279 for (i = 0; i < avail_cnt; i++) { 3280 for (j = i + 1; j < avail_cnt; j++) { 3281 if (avail[i].start > avail[j].start) { 3282 tmp = avail[i]; 3283 avail[i] = avail[j]; 3284 avail[j] = tmp; 3285 } 3286 } 3287 } 3288 3289 /* 3290 * Make sure they don't overlap. 3291 */ 3292 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3293 if (mp[0].start + mp[0].size > mp[1].start) { 3294 mp[0].size = mp[1].start - mp[0].start; 3295 } 3296 DPRINTFN(BOOT, 3297 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3298 i, mp->start, mp->size)); 3299 } 3300 DPRINTFN(BOOT, 3301 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3302 i, mp->start, mp->size)); 3303 3304 #ifdef PTEGCOUNT 3305 pmap_pteg_cnt = PTEGCOUNT; 3306 #else /* PTEGCOUNT */ 3307 3308 pmap_pteg_cnt = 0x1000; 3309 3310 while (pmap_pteg_cnt < physmem) 3311 pmap_pteg_cnt <<= 1; 3312 3313 pmap_pteg_cnt >>= 1; 3314 #endif /* PTEGCOUNT */ 3315 3316 #ifdef DEBUG 3317 DPRINTFN(BOOT, 3318 ("pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt)); 3319 #endif 3320 3321 /* 3322 * Find suitably aligned memory for PTEG hash table. 3323 */ 3324 size = pmap_pteg_cnt * sizeof(struct pteg); 3325 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3326 3327 #ifdef DEBUG 3328 DPRINTFN(BOOT, 3329 ("PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table)); 3330 #endif 3331 3332 3333 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3334 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3335 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3336 pmap_pteg_table, size); 3337 #endif 3338 3339 memset(__UNVOLATILE(pmap_pteg_table), 0, 3340 pmap_pteg_cnt * sizeof(struct pteg)); 3341 pmap_pteg_mask = pmap_pteg_cnt - 1; 3342 3343 /* 3344 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3345 * with pages. So we just steal them before giving them to UVM. 3346 */ 3347 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3348 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3349 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3350 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3351 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3352 pmap_pvo_table, size); 3353 #endif 3354 3355 for (i = 0; i < pmap_pteg_cnt; i++) 3356 TAILQ_INIT(&pmap_pvo_table[i]); 3357 3358 #ifndef MSGBUFADDR 3359 /* 3360 * Allocate msgbuf in high memory. 3361 */ 3362 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3363 #endif 3364 3365 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3366 paddr_t pfstart = atop(mp->start); 3367 paddr_t pfend = atop(mp->start + mp->size); 3368 if (mp->size == 0) 3369 continue; 3370 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3371 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3372 VM_FREELIST_FIRST256); 3373 } else if (mp->start >= SEGMENT_LENGTH) { 3374 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3375 VM_FREELIST_DEFAULT); 3376 } else { 3377 pfend = atop(SEGMENT_LENGTH); 3378 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3379 VM_FREELIST_FIRST256); 3380 pfstart = atop(SEGMENT_LENGTH); 3381 pfend = atop(mp->start + mp->size); 3382 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3383 VM_FREELIST_DEFAULT); 3384 } 3385 } 3386 3387 /* 3388 * Make sure kernel vsid is allocated as well as VSID 0. 3389 */ 3390 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3391 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3392 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3393 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3394 pmap_vsid_bitmap[0] |= 1; 3395 3396 /* 3397 * Initialize kernel pmap and hardware. 3398 */ 3399 3400 /* PMAP_OEA64_BRIDGE does support these instructions */ 3401 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3402 for (i = 0; i < 16; i++) { 3403 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3404 __asm volatile ("mtsrin %0,%1" 3405 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3406 } 3407 3408 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3409 __asm volatile ("mtsr %0,%1" 3410 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3411 #ifdef KERNEL2_SR 3412 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3413 __asm volatile ("mtsr %0,%1" 3414 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3415 #endif 3416 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3417 #if defined (PMAP_OEA) 3418 for (i = 0; i < 16; i++) { 3419 if (iosrtable[i] & SR601_T) { 3420 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3421 __asm volatile ("mtsrin %0,%1" 3422 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3423 } 3424 } 3425 __asm volatile ("sync; mtsdr1 %0; isync" 3426 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3427 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3428 __asm __volatile ("sync; mtsdr1 %0; isync" 3429 :: "r"((uintptr_t)pmap_pteg_table | (32 - cntlzw(pmap_pteg_mask >> 11)))); 3430 #endif 3431 tlbia(); 3432 3433 #ifdef ALTIVEC 3434 pmap_use_altivec = cpu_altivec; 3435 #endif 3436 3437 #ifdef DEBUG 3438 if (pmapdebug & PMAPDEBUG_BOOT) { 3439 u_int cnt; 3440 int bank; 3441 char pbuf[9]; 3442 for (cnt = 0, bank = 0; bank < vm_nphysseg; bank++) { 3443 cnt += vm_physmem[bank].avail_end - vm_physmem[bank].avail_start; 3444 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3445 bank, 3446 ptoa(vm_physmem[bank].avail_start), 3447 ptoa(vm_physmem[bank].avail_end), 3448 ptoa(vm_physmem[bank].avail_end - vm_physmem[bank].avail_start)); 3449 } 3450 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3451 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3452 pbuf, cnt); 3453 } 3454 #endif 3455 3456 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3457 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3458 &pmap_pool_uallocator, IPL_NONE); 3459 3460 pool_setlowat(&pmap_upvo_pool, 252); 3461 3462 pool_init(&pmap_pool, sizeof(struct pmap), 3463 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3464 IPL_NONE); 3465 3466 #if defined(PMAP_NEED_MAPKERNEL) || 1 3467 { 3468 struct pmap *pm = pmap_kernel(); 3469 #if 0 3470 extern int etext[], kernel_text[]; 3471 vaddr_t va, va_etext = (paddr_t) etext; 3472 #endif 3473 paddr_t pa, pa_end; 3474 register_t sr; 3475 struct pte pt; 3476 unsigned int ptegidx; 3477 int bank; 3478 3479 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3480 pm->pm_sr[0] = sr; 3481 3482 for (bank = 0; bank < vm_nphysseg; bank++) { 3483 pa_end = ptoa(vm_physmem[bank].avail_end); 3484 pa = ptoa(vm_physmem[bank].avail_start); 3485 for (; pa < pa_end; pa += PAGE_SIZE) { 3486 ptegidx = va_to_pteg(pm, pa); 3487 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3488 pmap_pte_insert(ptegidx, &pt); 3489 } 3490 } 3491 3492 #if 0 3493 va = (vaddr_t) kernel_text; 3494 3495 for (pa = kernelstart; va < va_etext; 3496 pa += PAGE_SIZE, va += PAGE_SIZE) { 3497 ptegidx = va_to_pteg(pm, va); 3498 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3499 pmap_pte_insert(ptegidx, &pt); 3500 } 3501 3502 for (; pa < kernelend; 3503 pa += PAGE_SIZE, va += PAGE_SIZE) { 3504 ptegidx = va_to_pteg(pm, va); 3505 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3506 pmap_pte_insert(ptegidx, &pt); 3507 } 3508 3509 for (va = 0, pa = 0; va < 0x3000; 3510 pa += PAGE_SIZE, va += PAGE_SIZE) { 3511 ptegidx = va_to_pteg(pm, va); 3512 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3513 pmap_pte_insert(ptegidx, &pt); 3514 } 3515 #endif 3516 3517 __asm volatile ("mtsrin %0,%1" 3518 :: "r"(sr), "r"(kernelstart)); 3519 } 3520 #endif 3521 } 3522
Indexes created Fri Sep 26 20:09:58 GMT 2025