pmap.c revision 1.56
1 /* $NetBSD: pmap.c,v 1.56 2008/02/17 18:16:42 phx Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 43 * Copyright (C) 1995, 1996 TooLs GmbH. 44 * All rights reserved. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. All advertising materials mentioning features or use of this software 55 * must display the following acknowledgement: 56 * This product includes software developed by TooLs GmbH. 57 * 4. The name of TooLs GmbH may not be used to endorse or promote products 58 * derived from this software without specific prior written permission. 59 * 60 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 61 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 62 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 63 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 64 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 65 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 66 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 67 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 68 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 69 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.56 2008/02/17 18:16:42 phx Exp $"); 74 75 #define PMAP_NOOPNAMES 76 77 #include "opt_ppcarch.h" 78 #include "opt_altivec.h" 79 #include "opt_pmap.h" 80 #include <sys/param.h> 81 #include <sys/malloc.h> 82 #include <sys/proc.h> 83 #include <sys/user.h> 84 #include <sys/pool.h> 85 #include <sys/queue.h> 86 #include <sys/device.h> /* for evcnt */ 87 #include <sys/systm.h> 88 #include <sys/atomic.h> 89 90 #include <uvm/uvm.h> 91 92 #include <machine/pcb.h> 93 #include <machine/powerpc.h> 94 #include <powerpc/spr.h> 95 #include <powerpc/oea/sr_601.h> 96 #include <powerpc/bat.h> 97 #include <powerpc/stdarg.h> 98 99 #ifdef ALTIVEC 100 int pmap_use_altivec; 101 #endif 102 103 volatile struct pteg *pmap_pteg_table; 104 unsigned int pmap_pteg_cnt; 105 unsigned int pmap_pteg_mask; 106 #ifdef PMAP_MEMLIMIT 107 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 108 #else 109 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 110 #endif 111 112 struct pmap kernel_pmap_; 113 unsigned int pmap_pages_stolen; 114 u_long pmap_pte_valid; 115 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 116 u_long pmap_pvo_enter_depth; 117 u_long pmap_pvo_remove_depth; 118 #endif 119 120 int physmem; 121 #ifndef MSGBUFADDR 122 extern paddr_t msgbuf_paddr; 123 #endif 124 125 static struct mem_region *mem, *avail; 126 static u_int mem_cnt, avail_cnt; 127 128 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 129 # define PMAP_OEA 1 130 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA64) && !defined(PPC_OEA64_BRIDGE) 131 # define PMAPNAME(name) pmap_##name 132 # endif 133 #endif 134 135 #if defined(PMAP_OEA64) 136 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64_BRIDGE) 137 # define PMAPNAME(name) pmap_##name 138 # endif 139 #endif 140 141 #if defined(PMAP_OEA64_BRIDGE) 142 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64) 143 # define PMAPNAME(name) pmap_##name 144 # endif 145 #endif 146 147 #if defined(PMAP_OEA) 148 #define _PRIxpte "lx" 149 #else 150 #define _PRIxpte PRIx64 151 #endif 152 #define _PRIxpa "lx" 153 #define _PRIxva "lx" 154 #define _PRIsr "lx" 155 156 #if defined(PMAP_EXCLUDE_DECLS) && !defined(PMAPNAME) 157 #if defined(PMAP_OEA) 158 #define PMAPNAME(name) pmap32_##name 159 #elif defined(PMAP_OEA64) 160 #define PMAPNAME(name) pmap64_##name 161 #elif defined(PMAP_OEA64_BRIDGE) 162 #define PMAPNAME(name) pmap64bridge_##name 163 #else 164 #error unknown variant for pmap 165 #endif 166 #endif /* PMAP_EXLCUDE_DECLS && !PMAPNAME */ 167 168 #if defined(PMAPNAME) 169 #define STATIC static 170 #define pmap_pte_spill PMAPNAME(pte_spill) 171 #define pmap_real_memory PMAPNAME(real_memory) 172 #define pmap_init PMAPNAME(init) 173 #define pmap_virtual_space PMAPNAME(virtual_space) 174 #define pmap_create PMAPNAME(create) 175 #define pmap_reference PMAPNAME(reference) 176 #define pmap_destroy PMAPNAME(destroy) 177 #define pmap_copy PMAPNAME(copy) 178 #define pmap_update PMAPNAME(update) 179 #define pmap_collect PMAPNAME(collect) 180 #define pmap_enter PMAPNAME(enter) 181 #define pmap_remove PMAPNAME(remove) 182 #define pmap_kenter_pa PMAPNAME(kenter_pa) 183 #define pmap_kremove PMAPNAME(kremove) 184 #define pmap_extract PMAPNAME(extract) 185 #define pmap_protect PMAPNAME(protect) 186 #define pmap_unwire PMAPNAME(unwire) 187 #define pmap_page_protect PMAPNAME(page_protect) 188 #define pmap_query_bit PMAPNAME(query_bit) 189 #define pmap_clear_bit PMAPNAME(clear_bit) 190 191 #define pmap_activate PMAPNAME(activate) 192 #define pmap_deactivate PMAPNAME(deactivate) 193 194 #define pmap_pinit PMAPNAME(pinit) 195 #define pmap_procwr PMAPNAME(procwr) 196 197 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 198 #define pmap_pte_print PMAPNAME(pte_print) 199 #define pmap_pteg_check PMAPNAME(pteg_check) 200 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 201 #define pmap_print_pte PMAPNAME(print_pte) 202 #define pmap_pteg_dist PMAPNAME(pteg_dist) 203 #endif 204 #if defined(DEBUG) || defined(PMAPCHECK) 205 #define pmap_pvo_verify PMAPNAME(pvo_verify) 206 #define pmapcheck PMAPNAME(check) 207 #endif 208 #if defined(DEBUG) || defined(PMAPDEBUG) 209 #define pmapdebug PMAPNAME(debug) 210 #endif 211 #define pmap_steal_memory PMAPNAME(steal_memory) 212 #define pmap_bootstrap PMAPNAME(bootstrap) 213 #else 214 #define STATIC /* nothing */ 215 #endif /* PMAPNAME */ 216 217 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 218 STATIC void pmap_real_memory(paddr_t *, psize_t *); 219 STATIC void pmap_init(void); 220 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 221 STATIC pmap_t pmap_create(void); 222 STATIC void pmap_reference(pmap_t); 223 STATIC void pmap_destroy(pmap_t); 224 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 225 STATIC void pmap_update(pmap_t); 226 STATIC void pmap_collect(pmap_t); 227 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, int); 228 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 229 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t); 230 STATIC void pmap_kremove(vaddr_t, vsize_t); 231 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 232 233 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 234 STATIC void pmap_unwire(pmap_t, vaddr_t); 235 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 236 STATIC bool pmap_query_bit(struct vm_page *, int); 237 STATIC bool pmap_clear_bit(struct vm_page *, int); 238 239 STATIC void pmap_activate(struct lwp *); 240 STATIC void pmap_deactivate(struct lwp *); 241 242 STATIC void pmap_pinit(pmap_t pm); 243 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 244 245 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 246 STATIC void pmap_pte_print(volatile struct pte *); 247 STATIC void pmap_pteg_check(void); 248 STATIC void pmap_print_mmuregs(void); 249 STATIC void pmap_print_pte(pmap_t, vaddr_t); 250 STATIC void pmap_pteg_dist(void); 251 #endif 252 #if defined(DEBUG) || defined(PMAPCHECK) 253 STATIC void pmap_pvo_verify(void); 254 #endif 255 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 256 STATIC void pmap_bootstrap(paddr_t, paddr_t); 257 258 #ifdef PMAPNAME 259 const struct pmap_ops PMAPNAME(ops) = { 260 .pmapop_pte_spill = pmap_pte_spill, 261 .pmapop_real_memory = pmap_real_memory, 262 .pmapop_init = pmap_init, 263 .pmapop_virtual_space = pmap_virtual_space, 264 .pmapop_create = pmap_create, 265 .pmapop_reference = pmap_reference, 266 .pmapop_destroy = pmap_destroy, 267 .pmapop_copy = pmap_copy, 268 .pmapop_update = pmap_update, 269 .pmapop_collect = pmap_collect, 270 .pmapop_enter = pmap_enter, 271 .pmapop_remove = pmap_remove, 272 .pmapop_kenter_pa = pmap_kenter_pa, 273 .pmapop_kremove = pmap_kremove, 274 .pmapop_extract = pmap_extract, 275 .pmapop_protect = pmap_protect, 276 .pmapop_unwire = pmap_unwire, 277 .pmapop_page_protect = pmap_page_protect, 278 .pmapop_query_bit = pmap_query_bit, 279 .pmapop_clear_bit = pmap_clear_bit, 280 .pmapop_activate = pmap_activate, 281 .pmapop_deactivate = pmap_deactivate, 282 .pmapop_pinit = pmap_pinit, 283 .pmapop_procwr = pmap_procwr, 284 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 285 .pmapop_pte_print = pmap_pte_print, 286 .pmapop_pteg_check = pmap_pteg_check, 287 .pmapop_print_mmuregs = pmap_print_mmuregs, 288 .pmapop_print_pte = pmap_print_pte, 289 .pmapop_pteg_dist = pmap_pteg_dist, 290 #else 291 .pmapop_pte_print = NULL, 292 .pmapop_pteg_check = NULL, 293 .pmapop_print_mmuregs = NULL, 294 .pmapop_print_pte = NULL, 295 .pmapop_pteg_dist = NULL, 296 #endif 297 #if defined(DEBUG) || defined(PMAPCHECK) 298 .pmapop_pvo_verify = pmap_pvo_verify, 299 #else 300 .pmapop_pvo_verify = NULL, 301 #endif 302 .pmapop_steal_memory = pmap_steal_memory, 303 .pmapop_bootstrap = pmap_bootstrap, 304 }; 305 #endif /* !PMAPNAME */ 306 307 /* 308 * The following structure is aligned to 32 bytes 309 */ 310 struct pvo_entry { 311 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 312 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 313 struct pte pvo_pte; /* Prebuilt PTE */ 314 pmap_t pvo_pmap; /* ptr to owning pmap */ 315 vaddr_t pvo_vaddr; /* VA of entry */ 316 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 317 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 318 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 319 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 320 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 321 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 322 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 323 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 324 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 325 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 326 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 327 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 328 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 329 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 330 #define PVO_REMOVE 6 /* PVO has been removed */ 331 #define PVO_WHERE_MASK 15 332 #define PVO_WHERE_SHFT 8 333 } __attribute__ ((aligned (32))); 334 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 335 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 336 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 337 #define PVO_PTEGIDX_CLR(pvo) \ 338 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 339 #define PVO_PTEGIDX_SET(pvo,i) \ 340 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 341 #define PVO_WHERE(pvo,w) \ 342 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 343 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 344 345 TAILQ_HEAD(pvo_tqhead, pvo_entry); 346 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 347 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 348 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 349 350 struct pool pmap_pool; /* pool for pmap structures */ 351 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 352 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 353 354 /* 355 * We keep a cache of unmanaged pages to be used for pvo entries for 356 * unmanaged pages. 357 */ 358 struct pvo_page { 359 SIMPLEQ_ENTRY(pvo_page) pvop_link; 360 }; 361 SIMPLEQ_HEAD(pvop_head, pvo_page); 362 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 363 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 364 u_long pmap_upvop_free; 365 u_long pmap_upvop_maxfree; 366 u_long pmap_mpvop_free; 367 u_long pmap_mpvop_maxfree; 368 369 static void *pmap_pool_ualloc(struct pool *, int); 370 static void *pmap_pool_malloc(struct pool *, int); 371 372 static void pmap_pool_ufree(struct pool *, void *); 373 static void pmap_pool_mfree(struct pool *, void *); 374 375 static struct pool_allocator pmap_pool_mallocator = { 376 .pa_alloc = pmap_pool_malloc, 377 .pa_free = pmap_pool_mfree, 378 .pa_pagesz = 0, 379 }; 380 381 static struct pool_allocator pmap_pool_uallocator = { 382 .pa_alloc = pmap_pool_ualloc, 383 .pa_free = pmap_pool_ufree, 384 .pa_pagesz = 0, 385 }; 386 387 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 388 void pmap_pte_print(volatile struct pte *); 389 void pmap_pteg_check(void); 390 void pmap_pteg_dist(void); 391 void pmap_print_pte(pmap_t, vaddr_t); 392 void pmap_print_mmuregs(void); 393 #endif 394 395 #if defined(DEBUG) || defined(PMAPCHECK) 396 #ifdef PMAPCHECK 397 int pmapcheck = 1; 398 #else 399 int pmapcheck = 0; 400 #endif 401 void pmap_pvo_verify(void); 402 static void pmap_pvo_check(const struct pvo_entry *); 403 #define PMAP_PVO_CHECK(pvo) \ 404 do { \ 405 if (pmapcheck) \ 406 pmap_pvo_check(pvo); \ 407 } while (0) 408 #else 409 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 410 #endif 411 static int pmap_pte_insert(int, struct pte *); 412 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 413 vaddr_t, paddr_t, register_t, int); 414 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 415 static void pmap_pvo_free(struct pvo_entry *); 416 static void pmap_pvo_free_list(struct pvo_head *); 417 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 418 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 419 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 420 static void pvo_set_exec(struct pvo_entry *); 421 static void pvo_clear_exec(struct pvo_entry *); 422 423 static void tlbia(void); 424 425 static void pmap_release(pmap_t); 426 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 427 428 static uint32_t pmap_pvo_reclaim_nextidx; 429 #ifdef DEBUG 430 static int pmap_pvo_reclaim_debugctr; 431 #endif 432 433 #define VSID_NBPW (sizeof(uint32_t) * 8) 434 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 435 436 static int pmap_initialized; 437 438 #if defined(DEBUG) || defined(PMAPDEBUG) 439 #define PMAPDEBUG_BOOT 0x0001 440 #define PMAPDEBUG_PTE 0x0002 441 #define PMAPDEBUG_EXEC 0x0008 442 #define PMAPDEBUG_PVOENTER 0x0010 443 #define PMAPDEBUG_PVOREMOVE 0x0020 444 #define PMAPDEBUG_ACTIVATE 0x0100 445 #define PMAPDEBUG_CREATE 0x0200 446 #define PMAPDEBUG_ENTER 0x1000 447 #define PMAPDEBUG_KENTER 0x2000 448 #define PMAPDEBUG_KREMOVE 0x4000 449 #define PMAPDEBUG_REMOVE 0x8000 450 451 unsigned int pmapdebug = 0; 452 453 # define DPRINTF(x) printf x 454 # define DPRINTFN(n, x) if (pmapdebug & PMAPDEBUG_ ## n) printf x 455 #else 456 # define DPRINTF(x) 457 # define DPRINTFN(n, x) 458 #endif 459 460 461 #ifdef PMAPCOUNTERS 462 /* 463 * From pmap_subr.c 464 */ 465 extern struct evcnt pmap_evcnt_mappings; 466 extern struct evcnt pmap_evcnt_unmappings; 467 468 extern struct evcnt pmap_evcnt_kernel_mappings; 469 extern struct evcnt pmap_evcnt_kernel_unmappings; 470 471 extern struct evcnt pmap_evcnt_mappings_replaced; 472 473 extern struct evcnt pmap_evcnt_exec_mappings; 474 extern struct evcnt pmap_evcnt_exec_cached; 475 476 extern struct evcnt pmap_evcnt_exec_synced; 477 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 478 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 479 480 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 481 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 482 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 483 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 484 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 485 486 extern struct evcnt pmap_evcnt_updates; 487 extern struct evcnt pmap_evcnt_collects; 488 extern struct evcnt pmap_evcnt_copies; 489 490 extern struct evcnt pmap_evcnt_ptes_spilled; 491 extern struct evcnt pmap_evcnt_ptes_unspilled; 492 extern struct evcnt pmap_evcnt_ptes_evicted; 493 494 extern struct evcnt pmap_evcnt_ptes_primary[8]; 495 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 496 extern struct evcnt pmap_evcnt_ptes_removed; 497 extern struct evcnt pmap_evcnt_ptes_changed; 498 extern struct evcnt pmap_evcnt_pvos_reclaimed; 499 extern struct evcnt pmap_evcnt_pvos_failed; 500 501 extern struct evcnt pmap_evcnt_zeroed_pages; 502 extern struct evcnt pmap_evcnt_copied_pages; 503 extern struct evcnt pmap_evcnt_idlezeroed_pages; 504 505 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 506 #define PMAPCOUNT2(ev) ((ev).ev_count++) 507 #else 508 #define PMAPCOUNT(ev) ((void) 0) 509 #define PMAPCOUNT2(ev) ((void) 0) 510 #endif 511 512 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 513 514 /* XXXSL: this needs to be moved to assembler */ 515 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 516 517 #define TLBSYNC() __asm volatile("tlbsync") 518 #define SYNC() __asm volatile("sync") 519 #define EIEIO() __asm volatile("eieio") 520 #define MFMSR() mfmsr() 521 #define MTMSR(psl) mtmsr(psl) 522 #define MFPVR() mfpvr() 523 #define MFSRIN(va) mfsrin(va) 524 #define MFTB() mfrtcltbl() 525 526 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 527 static inline register_t 528 mfsrin(vaddr_t va) 529 { 530 register_t sr; 531 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 532 return sr; 533 } 534 #endif /* PMAP_OEA*/ 535 536 #if defined (PMAP_OEA64_BRIDGE) 537 extern void mfmsr64 (register64_t *result); 538 #endif /* PMAP_OEA64_BRIDGE */ 539 540 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 541 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 542 543 static inline register_t 544 pmap_interrupts_off(void) 545 { 546 register_t msr = MFMSR(); 547 if (msr & PSL_EE) 548 MTMSR(msr & ~PSL_EE); 549 return msr; 550 } 551 552 static void 553 pmap_interrupts_restore(register_t msr) 554 { 555 if (msr & PSL_EE) 556 MTMSR(msr); 557 } 558 559 static inline u_int32_t 560 mfrtcltbl(void) 561 { 562 #ifdef PPC_OEA601 563 if ((MFPVR() >> 16) == MPC601) 564 return (mfrtcl() >> 7); 565 else 566 #endif 567 return (mftbl()); 568 } 569 570 /* 571 * These small routines may have to be replaced, 572 * if/when we support processors other that the 604. 573 */ 574 575 void 576 tlbia(void) 577 { 578 char *i; 579 580 SYNC(); 581 #if defined(PMAP_OEA) 582 /* 583 * Why not use "tlbia"? Because not all processors implement it. 584 * 585 * This needs to be a per-CPU callback to do the appropriate thing 586 * for the CPU. XXX 587 */ 588 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 589 TLBIE(i); 590 EIEIO(); 591 SYNC(); 592 } 593 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 594 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 595 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 596 TLBIEL(i); 597 EIEIO(); 598 SYNC(); 599 } 600 #endif 601 TLBSYNC(); 602 SYNC(); 603 } 604 605 static inline register_t 606 va_to_vsid(const struct pmap *pm, vaddr_t addr) 607 { 608 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 609 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 610 #else /* PMAP_OEA64 */ 611 #if 0 612 const struct ste *ste; 613 register_t hash; 614 int i; 615 616 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 617 618 /* 619 * Try the primary group first 620 */ 621 ste = pm->pm_stes[hash].stes; 622 for (i = 0; i < 8; i++, ste++) { 623 if (ste->ste_hi & STE_V) && 624 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 625 return ste; 626 } 627 628 /* 629 * Then the secondary group. 630 */ 631 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 632 for (i = 0; i < 8; i++, ste++) { 633 if (ste->ste_hi & STE_V) && 634 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 635 return addr; 636 } 637 638 return NULL; 639 #else 640 /* 641 * Rather than searching the STE groups for the VSID, we know 642 * how we generate that from the ESID and so do that. 643 */ 644 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 645 #endif 646 #endif /* PMAP_OEA */ 647 } 648 649 static inline register_t 650 va_to_pteg(const struct pmap *pm, vaddr_t addr) 651 { 652 register_t hash; 653 654 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 655 return hash & pmap_pteg_mask; 656 } 657 658 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 659 /* 660 * Given a PTE in the page table, calculate the VADDR that hashes to it. 661 * The only bit of magic is that the top 4 bits of the address doesn't 662 * technically exist in the PTE. But we know we reserved 4 bits of the 663 * VSID for it so that's how we get it. 664 */ 665 static vaddr_t 666 pmap_pte_to_va(volatile const struct pte *pt) 667 { 668 vaddr_t va; 669 uintptr_t ptaddr = (uintptr_t) pt; 670 671 if (pt->pte_hi & PTE_HID) 672 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 673 674 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 675 #if defined(PMAP_OEA) 676 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 677 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 678 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 679 #endif 680 va <<= ADDR_PIDX_SHFT; 681 682 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 683 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 684 685 #if defined(PMAP_OEA64) 686 /* PPC63 Bits 0-35 */ 687 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 688 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 689 /* PPC Bits 0-3 */ 690 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 691 #endif 692 693 return va; 694 } 695 #endif 696 697 static inline struct pvo_head * 698 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 699 { 700 struct vm_page *pg; 701 702 pg = PHYS_TO_VM_PAGE(pa); 703 if (pg_p != NULL) 704 *pg_p = pg; 705 if (pg == NULL) 706 return &pmap_pvo_unmanaged; 707 return &pg->mdpage.mdpg_pvoh; 708 } 709 710 static inline struct pvo_head * 711 vm_page_to_pvoh(struct vm_page *pg) 712 { 713 return &pg->mdpage.mdpg_pvoh; 714 } 715 716 717 static inline void 718 pmap_attr_clear(struct vm_page *pg, int ptebit) 719 { 720 pg->mdpage.mdpg_attrs &= ~ptebit; 721 } 722 723 static inline int 724 pmap_attr_fetch(struct vm_page *pg) 725 { 726 return pg->mdpage.mdpg_attrs; 727 } 728 729 static inline void 730 pmap_attr_save(struct vm_page *pg, int ptebit) 731 { 732 pg->mdpage.mdpg_attrs |= ptebit; 733 } 734 735 static inline int 736 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 737 { 738 if (pt->pte_hi == pvo_pt->pte_hi 739 #if 0 740 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 741 ~(PTE_REF|PTE_CHG)) == 0 742 #endif 743 ) 744 return 1; 745 return 0; 746 } 747 748 static inline void 749 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 750 { 751 /* 752 * Construct the PTE. Default to IMB initially. Valid bit 753 * only gets set when the real pte is set in memory. 754 * 755 * Note: Don't set the valid bit for correct operation of tlb update. 756 */ 757 #if defined(PMAP_OEA) 758 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 759 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 760 pt->pte_lo = pte_lo; 761 #elif defined (PMAP_OEA64_BRIDGE) 762 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 763 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 764 pt->pte_lo = (u_int64_t) pte_lo; 765 #elif defined (PMAP_OEA64) 766 #error PMAP_OEA64 not supported 767 #endif /* PMAP_OEA */ 768 } 769 770 static inline void 771 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 772 { 773 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 774 } 775 776 static inline void 777 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 778 { 779 /* 780 * As shown in Section 7.6.3.2.3 781 */ 782 pt->pte_lo &= ~ptebit; 783 TLBIE(va); 784 SYNC(); 785 EIEIO(); 786 TLBSYNC(); 787 SYNC(); 788 } 789 790 static inline void 791 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 792 { 793 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 794 if (pvo_pt->pte_hi & PTE_VALID) 795 panic("pte_set: setting an already valid pte %p", pvo_pt); 796 #endif 797 pvo_pt->pte_hi |= PTE_VALID; 798 799 /* 800 * Update the PTE as defined in section 7.6.3.1 801 * Note that the REF/CHG bits are from pvo_pt and thus should 802 * have been saved so this routine can restore them (if desired). 803 */ 804 pt->pte_lo = pvo_pt->pte_lo; 805 EIEIO(); 806 pt->pte_hi = pvo_pt->pte_hi; 807 TLBSYNC(); 808 SYNC(); 809 pmap_pte_valid++; 810 } 811 812 static inline void 813 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 814 { 815 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 816 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 817 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 818 if ((pt->pte_hi & PTE_VALID) == 0) 819 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 820 #endif 821 822 pvo_pt->pte_hi &= ~PTE_VALID; 823 /* 824 * Force the ref & chg bits back into the PTEs. 825 */ 826 SYNC(); 827 /* 828 * Invalidate the pte ... (Section 7.6.3.3) 829 */ 830 pt->pte_hi &= ~PTE_VALID; 831 SYNC(); 832 TLBIE(va); 833 SYNC(); 834 EIEIO(); 835 TLBSYNC(); 836 SYNC(); 837 /* 838 * Save the ref & chg bits ... 839 */ 840 pmap_pte_synch(pt, pvo_pt); 841 pmap_pte_valid--; 842 } 843 844 static inline void 845 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 846 { 847 /* 848 * Invalidate the PTE 849 */ 850 pmap_pte_unset(pt, pvo_pt, va); 851 pmap_pte_set(pt, pvo_pt); 852 } 853 854 /* 855 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 856 * (either primary or secondary location). 857 * 858 * Note: both the destination and source PTEs must not have PTE_VALID set. 859 */ 860 861 static int 862 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 863 { 864 volatile struct pte *pt; 865 int i; 866 867 #if defined(DEBUG) 868 DPRINTFN(PTE, ("pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 869 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo)); 870 #endif 871 /* 872 * First try primary hash. 873 */ 874 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 875 if ((pt->pte_hi & PTE_VALID) == 0) { 876 pvo_pt->pte_hi &= ~PTE_HID; 877 pmap_pte_set(pt, pvo_pt); 878 return i; 879 } 880 } 881 882 /* 883 * Now try secondary hash. 884 */ 885 ptegidx ^= pmap_pteg_mask; 886 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 887 if ((pt->pte_hi & PTE_VALID) == 0) { 888 pvo_pt->pte_hi |= PTE_HID; 889 pmap_pte_set(pt, pvo_pt); 890 return i; 891 } 892 } 893 return -1; 894 } 895 896 /* 897 * Spill handler. 898 * 899 * Tries to spill a page table entry from the overflow area. 900 * This runs in either real mode (if dealing with a exception spill) 901 * or virtual mode when dealing with manually spilling one of the 902 * kernel's pte entries. In either case, interrupts are already 903 * disabled. 904 */ 905 906 int 907 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 908 { 909 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 910 struct pvo_entry *pvo; 911 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 912 struct pvo_tqhead *pvoh, *vpvoh = NULL; 913 int ptegidx, i, j; 914 volatile struct pteg *pteg; 915 volatile struct pte *pt; 916 917 PMAP_LOCK(); 918 919 ptegidx = va_to_pteg(pm, addr); 920 921 /* 922 * Have to substitute some entry. Use the primary hash for this. 923 * Use low bits of timebase as random generator. Make sure we are 924 * not picking a kernel pte for replacement. 925 */ 926 pteg = &pmap_pteg_table[ptegidx]; 927 i = MFTB() & 7; 928 for (j = 0; j < 8; j++) { 929 pt = &pteg->pt[i]; 930 if ((pt->pte_hi & PTE_VALID) == 0) 931 break; 932 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 933 < PHYSMAP_VSIDBITS) 934 break; 935 i = (i + 1) & 7; 936 } 937 KASSERT(j < 8); 938 939 source_pvo = NULL; 940 victim_pvo = NULL; 941 pvoh = &pmap_pvo_table[ptegidx]; 942 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 943 944 /* 945 * We need to find pvo entry for this address... 946 */ 947 PMAP_PVO_CHECK(pvo); /* sanity check */ 948 949 /* 950 * If we haven't found the source and we come to a PVO with 951 * a valid PTE, then we know we can't find it because all 952 * evicted PVOs always are first in the list. 953 */ 954 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 955 break; 956 if (source_pvo == NULL && pm == pvo->pvo_pmap && 957 addr == PVO_VADDR(pvo)) { 958 959 /* 960 * Now we have found the entry to be spilled into the 961 * pteg. Attempt to insert it into the page table. 962 */ 963 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 964 if (j >= 0) { 965 PVO_PTEGIDX_SET(pvo, j); 966 PMAP_PVO_CHECK(pvo); /* sanity check */ 967 PVO_WHERE(pvo, SPILL_INSERT); 968 pvo->pvo_pmap->pm_evictions--; 969 PMAPCOUNT(ptes_spilled); 970 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 971 ? pmap_evcnt_ptes_secondary 972 : pmap_evcnt_ptes_primary)[j]); 973 974 /* 975 * Since we keep the evicted entries at the 976 * from of the PVO list, we need move this 977 * (now resident) PVO after the evicted 978 * entries. 979 */ 980 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 981 982 /* 983 * If we don't have to move (either we were the 984 * last entry or the next entry was valid), 985 * don't change our position. Otherwise 986 * move ourselves to the tail of the queue. 987 */ 988 if (next_pvo != NULL && 989 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 990 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 991 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 992 } 993 PMAP_UNLOCK(); 994 return 1; 995 } 996 source_pvo = pvo; 997 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 998 return 0; 999 } 1000 if (victim_pvo != NULL) 1001 break; 1002 } 1003 1004 /* 1005 * We also need the pvo entry of the victim we are replacing 1006 * so save the R & C bits of the PTE. 1007 */ 1008 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1009 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1010 vpvoh = pvoh; /* *1* */ 1011 victim_pvo = pvo; 1012 if (source_pvo != NULL) 1013 break; 1014 } 1015 } 1016 1017 if (source_pvo == NULL) { 1018 PMAPCOUNT(ptes_unspilled); 1019 PMAP_UNLOCK(); 1020 return 0; 1021 } 1022 1023 if (victim_pvo == NULL) { 1024 if ((pt->pte_hi & PTE_HID) == 0) 1025 panic("pmap_pte_spill: victim p-pte (%p) has " 1026 "no pvo entry!", pt); 1027 1028 /* 1029 * If this is a secondary PTE, we need to search 1030 * its primary pvo bucket for the matching PVO. 1031 */ 1032 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1033 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1034 PMAP_PVO_CHECK(pvo); /* sanity check */ 1035 1036 /* 1037 * We also need the pvo entry of the victim we are 1038 * replacing so save the R & C bits of the PTE. 1039 */ 1040 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1041 victim_pvo = pvo; 1042 break; 1043 } 1044 } 1045 if (victim_pvo == NULL) 1046 panic("pmap_pte_spill: victim s-pte (%p) has " 1047 "no pvo entry!", pt); 1048 } 1049 1050 /* 1051 * The victim should be not be a kernel PVO/PTE entry. 1052 */ 1053 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1054 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1055 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1056 1057 /* 1058 * We are invalidating the TLB entry for the EA for the 1059 * we are replacing even though its valid; If we don't 1060 * we lose any ref/chg bit changes contained in the TLB 1061 * entry. 1062 */ 1063 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1064 1065 /* 1066 * To enforce the PVO list ordering constraint that all 1067 * evicted entries should come before all valid entries, 1068 * move the source PVO to the tail of its list and the 1069 * victim PVO to the head of its list (which might not be 1070 * the same list, if the victim was using the secondary hash). 1071 */ 1072 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1073 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1074 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1075 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1076 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1077 pmap_pte_set(pt, &source_pvo->pvo_pte); 1078 victim_pvo->pvo_pmap->pm_evictions++; 1079 source_pvo->pvo_pmap->pm_evictions--; 1080 PVO_WHERE(victim_pvo, SPILL_UNSET); 1081 PVO_WHERE(source_pvo, SPILL_SET); 1082 1083 PVO_PTEGIDX_CLR(victim_pvo); 1084 PVO_PTEGIDX_SET(source_pvo, i); 1085 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1086 PMAPCOUNT(ptes_spilled); 1087 PMAPCOUNT(ptes_evicted); 1088 PMAPCOUNT(ptes_removed); 1089 1090 PMAP_PVO_CHECK(victim_pvo); 1091 PMAP_PVO_CHECK(source_pvo); 1092 1093 PMAP_UNLOCK(); 1094 return 1; 1095 } 1096 1097 /* 1098 * Restrict given range to physical memory 1099 */ 1100 void 1101 pmap_real_memory(paddr_t *start, psize_t *size) 1102 { 1103 struct mem_region *mp; 1104 1105 for (mp = mem; mp->size; mp++) { 1106 if (*start + *size > mp->start 1107 && *start < mp->start + mp->size) { 1108 if (*start < mp->start) { 1109 *size -= mp->start - *start; 1110 *start = mp->start; 1111 } 1112 if (*start + *size > mp->start + mp->size) 1113 *size = mp->start + mp->size - *start; 1114 return; 1115 } 1116 } 1117 *size = 0; 1118 } 1119 1120 /* 1121 * Initialize anything else for pmap handling. 1122 * Called during vm_init(). 1123 */ 1124 void 1125 pmap_init(void) 1126 { 1127 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1128 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1129 &pmap_pool_mallocator, IPL_NONE); 1130 1131 pool_setlowat(&pmap_mpvo_pool, 1008); 1132 1133 pmap_initialized = 1; 1134 1135 } 1136 1137 /* 1138 * How much virtual space does the kernel get? 1139 */ 1140 void 1141 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1142 { 1143 /* 1144 * For now, reserve one segment (minus some overhead) for kernel 1145 * virtual memory 1146 */ 1147 *start = VM_MIN_KERNEL_ADDRESS; 1148 *end = VM_MAX_KERNEL_ADDRESS; 1149 } 1150 1151 /* 1152 * Allocate, initialize, and return a new physical map. 1153 */ 1154 pmap_t 1155 pmap_create(void) 1156 { 1157 pmap_t pm; 1158 1159 pm = pool_get(&pmap_pool, PR_WAITOK); 1160 memset((void *)pm, 0, sizeof *pm); 1161 pmap_pinit(pm); 1162 1163 DPRINTFN(CREATE,("pmap_create: pm %p:\n" 1164 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1165 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1166 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1167 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1168 pm, 1169 pm->pm_sr[0], pm->pm_sr[1], 1170 pm->pm_sr[2], pm->pm_sr[3], 1171 pm->pm_sr[4], pm->pm_sr[5], 1172 pm->pm_sr[6], pm->pm_sr[7], 1173 pm->pm_sr[8], pm->pm_sr[9], 1174 pm->pm_sr[10], pm->pm_sr[11], 1175 pm->pm_sr[12], pm->pm_sr[13], 1176 pm->pm_sr[14], pm->pm_sr[15])); 1177 return pm; 1178 } 1179 1180 /* 1181 * Initialize a preallocated and zeroed pmap structure. 1182 */ 1183 void 1184 pmap_pinit(pmap_t pm) 1185 { 1186 register_t entropy = MFTB(); 1187 register_t mask; 1188 int i; 1189 1190 /* 1191 * Allocate some segment registers for this pmap. 1192 */ 1193 pm->pm_refs = 1; 1194 PMAP_LOCK(); 1195 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1196 static register_t pmap_vsidcontext; 1197 register_t hash; 1198 unsigned int n; 1199 1200 /* Create a new value by multiplying by a prime adding in 1201 * entropy from the timebase register. This is to make the 1202 * VSID more random so that the PT Hash function collides 1203 * less often. (note that the prime causes gcc to do shifts 1204 * instead of a multiply) 1205 */ 1206 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1207 hash = pmap_vsidcontext & (NPMAPS - 1); 1208 if (hash == 0) { /* 0 is special, avoid it */ 1209 entropy += 0xbadf00d; 1210 continue; 1211 } 1212 n = hash >> 5; 1213 mask = 1L << (hash & (VSID_NBPW-1)); 1214 hash = pmap_vsidcontext; 1215 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1216 /* anything free in this bucket? */ 1217 if (~pmap_vsid_bitmap[n] == 0) { 1218 entropy = hash ^ (hash >> 16); 1219 continue; 1220 } 1221 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1222 mask = 1L << i; 1223 hash &= ~(VSID_NBPW-1); 1224 hash |= i; 1225 } 1226 hash &= PTE_VSID >> PTE_VSID_SHFT; 1227 pmap_vsid_bitmap[n] |= mask; 1228 pm->pm_vsid = hash; 1229 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1230 for (i = 0; i < 16; i++) 1231 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1232 SR_NOEXEC; 1233 #endif 1234 PMAP_UNLOCK(); 1235 return; 1236 } 1237 PMAP_UNLOCK(); 1238 panic("pmap_pinit: out of segments"); 1239 } 1240 1241 /* 1242 * Add a reference to the given pmap. 1243 */ 1244 void 1245 pmap_reference(pmap_t pm) 1246 { 1247 atomic_inc_uint(&pm->pm_refs); 1248 } 1249 1250 /* 1251 * Retire the given pmap from service. 1252 * Should only be called if the map contains no valid mappings. 1253 */ 1254 void 1255 pmap_destroy(pmap_t pm) 1256 { 1257 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1258 pmap_release(pm); 1259 pool_put(&pmap_pool, pm); 1260 } 1261 } 1262 1263 /* 1264 * Release any resources held by the given physical map. 1265 * Called when a pmap initialized by pmap_pinit is being released. 1266 */ 1267 void 1268 pmap_release(pmap_t pm) 1269 { 1270 int idx, mask; 1271 1272 KASSERT(pm->pm_stats.resident_count == 0); 1273 KASSERT(pm->pm_stats.wired_count == 0); 1274 1275 PMAP_LOCK(); 1276 if (pm->pm_sr[0] == 0) 1277 panic("pmap_release"); 1278 idx = pm->pm_vsid & (NPMAPS-1); 1279 mask = 1 << (idx % VSID_NBPW); 1280 idx /= VSID_NBPW; 1281 1282 KASSERT(pmap_vsid_bitmap[idx] & mask); 1283 pmap_vsid_bitmap[idx] &= ~mask; 1284 PMAP_UNLOCK(); 1285 } 1286 1287 /* 1288 * Copy the range specified by src_addr/len 1289 * from the source map to the range dst_addr/len 1290 * in the destination map. 1291 * 1292 * This routine is only advisory and need not do anything. 1293 */ 1294 void 1295 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1296 vsize_t len, vaddr_t src_addr) 1297 { 1298 PMAPCOUNT(copies); 1299 } 1300 1301 /* 1302 * Require that all active physical maps contain no 1303 * incorrect entries NOW. 1304 */ 1305 void 1306 pmap_update(struct pmap *pmap) 1307 { 1308 PMAPCOUNT(updates); 1309 TLBSYNC(); 1310 } 1311 1312 /* 1313 * Garbage collects the physical map system for 1314 * pages which are no longer used. 1315 * Success need not be guaranteed -- that is, there 1316 * may well be pages which are not referenced, but 1317 * others may be collected. 1318 * Called by the pageout daemon when pages are scarce. 1319 */ 1320 void 1321 pmap_collect(pmap_t pm) 1322 { 1323 PMAPCOUNT(collects); 1324 } 1325 1326 static inline int 1327 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1328 { 1329 int pteidx; 1330 /* 1331 * We can find the actual pte entry without searching by 1332 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1333 * and by noticing the HID bit. 1334 */ 1335 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1336 if (pvo->pvo_pte.pte_hi & PTE_HID) 1337 pteidx ^= pmap_pteg_mask * 8; 1338 return pteidx; 1339 } 1340 1341 volatile struct pte * 1342 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1343 { 1344 volatile struct pte *pt; 1345 1346 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1347 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1348 return NULL; 1349 #endif 1350 1351 /* 1352 * If we haven't been supplied the ptegidx, calculate it. 1353 */ 1354 if (pteidx == -1) { 1355 int ptegidx; 1356 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1357 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1358 } 1359 1360 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1361 1362 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1363 return pt; 1364 #else 1365 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1366 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1367 "pvo but no valid pte index", pvo); 1368 } 1369 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1370 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1371 "pvo but no valid pte", pvo); 1372 } 1373 1374 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1375 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1376 #if defined(DEBUG) || defined(PMAPCHECK) 1377 pmap_pte_print(pt); 1378 #endif 1379 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1380 "pmap_pteg_table %p but invalid in pvo", 1381 pvo, pt); 1382 } 1383 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1384 #if defined(DEBUG) || defined(PMAPCHECK) 1385 pmap_pte_print(pt); 1386 #endif 1387 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1388 "not match pte %p in pmap_pteg_table", 1389 pvo, pt); 1390 } 1391 return pt; 1392 } 1393 1394 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1395 #if defined(DEBUG) || defined(PMAPCHECK) 1396 pmap_pte_print(pt); 1397 #endif 1398 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1399 "pmap_pteg_table but valid in pvo", pvo, pt); 1400 } 1401 return NULL; 1402 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1403 } 1404 1405 struct pvo_entry * 1406 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1407 { 1408 struct pvo_entry *pvo; 1409 int ptegidx; 1410 1411 va &= ~ADDR_POFF; 1412 ptegidx = va_to_pteg(pm, va); 1413 1414 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1415 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1416 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1417 panic("pmap_pvo_find_va: invalid pvo %p on " 1418 "list %#x (%p)", pvo, ptegidx, 1419 &pmap_pvo_table[ptegidx]); 1420 #endif 1421 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1422 if (pteidx_p) 1423 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1424 return pvo; 1425 } 1426 } 1427 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1428 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1429 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1430 return NULL; 1431 } 1432 1433 #if defined(DEBUG) || defined(PMAPCHECK) 1434 void 1435 pmap_pvo_check(const struct pvo_entry *pvo) 1436 { 1437 struct pvo_head *pvo_head; 1438 struct pvo_entry *pvo0; 1439 volatile struct pte *pt; 1440 int failed = 0; 1441 1442 PMAP_LOCK(); 1443 1444 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1445 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1446 1447 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1448 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1449 pvo, pvo->pvo_pmap); 1450 failed = 1; 1451 } 1452 1453 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1454 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1455 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1456 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1457 failed = 1; 1458 } 1459 1460 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1461 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1462 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1463 pvo, LIST_NEXT(pvo, pvo_vlink)); 1464 failed = 1; 1465 } 1466 1467 if (PVO_MANAGED_P(pvo)) { 1468 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1469 } else { 1470 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1471 printf("pmap_pvo_check: pvo %p: non kernel address " 1472 "on kernel unmanaged list\n", pvo); 1473 failed = 1; 1474 } 1475 pvo_head = &pmap_pvo_kunmanaged; 1476 } 1477 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1478 if (pvo0 == pvo) 1479 break; 1480 } 1481 if (pvo0 == NULL) { 1482 printf("pmap_pvo_check: pvo %p: not present " 1483 "on its vlist head %p\n", pvo, pvo_head); 1484 failed = 1; 1485 } 1486 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1487 printf("pmap_pvo_check: pvo %p: not present " 1488 "on its olist head\n", pvo); 1489 failed = 1; 1490 } 1491 pt = pmap_pvo_to_pte(pvo, -1); 1492 if (pt == NULL) { 1493 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1494 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1495 "no PTE\n", pvo); 1496 failed = 1; 1497 } 1498 } else { 1499 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1500 (uintptr_t) pt >= 1501 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1502 printf("pmap_pvo_check: pvo %p: pte %p not in " 1503 "pteg table\n", pvo, pt); 1504 failed = 1; 1505 } 1506 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1507 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1508 "no PTE\n", pvo); 1509 failed = 1; 1510 } 1511 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1512 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1513 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1514 pvo->pvo_pte.pte_hi, 1515 pt->pte_hi); 1516 failed = 1; 1517 } 1518 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1519 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1520 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1521 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1522 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1523 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1524 failed = 1; 1525 } 1526 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1527 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1528 " doesn't not match PVO's VA %#" _PRIxva "\n", 1529 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1530 failed = 1; 1531 } 1532 if (failed) 1533 pmap_pte_print(pt); 1534 } 1535 if (failed) 1536 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1537 pvo->pvo_pmap); 1538 1539 PMAP_UNLOCK(); 1540 } 1541 #endif /* DEBUG || PMAPCHECK */ 1542 1543 /* 1544 * Search the PVO table looking for a non-wired entry. 1545 * If we find one, remove it and return it. 1546 */ 1547 1548 struct pvo_entry * 1549 pmap_pvo_reclaim(struct pmap *pm) 1550 { 1551 struct pvo_tqhead *pvoh; 1552 struct pvo_entry *pvo; 1553 uint32_t idx, endidx; 1554 1555 endidx = pmap_pvo_reclaim_nextidx; 1556 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1557 idx = (idx + 1) & pmap_pteg_mask) { 1558 pvoh = &pmap_pvo_table[idx]; 1559 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1560 if (!PVO_WIRED_P(pvo)) { 1561 pmap_pvo_remove(pvo, -1, NULL); 1562 pmap_pvo_reclaim_nextidx = idx; 1563 PMAPCOUNT(pvos_reclaimed); 1564 return pvo; 1565 } 1566 } 1567 } 1568 return NULL; 1569 } 1570 1571 /* 1572 * This returns whether this is the first mapping of a page. 1573 */ 1574 int 1575 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1576 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1577 { 1578 struct pvo_entry *pvo; 1579 struct pvo_tqhead *pvoh; 1580 register_t msr; 1581 int ptegidx; 1582 int i; 1583 int poolflags = PR_NOWAIT; 1584 1585 /* 1586 * Compute the PTE Group index. 1587 */ 1588 va &= ~ADDR_POFF; 1589 ptegidx = va_to_pteg(pm, va); 1590 1591 msr = pmap_interrupts_off(); 1592 1593 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1594 if (pmap_pvo_remove_depth > 0) 1595 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1596 if (++pmap_pvo_enter_depth > 1) 1597 panic("pmap_pvo_enter: called recursively!"); 1598 #endif 1599 1600 /* 1601 * Remove any existing mapping for this page. Reuse the 1602 * pvo entry if there a mapping. 1603 */ 1604 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1605 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1606 #ifdef DEBUG 1607 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1608 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1609 ~(PTE_REF|PTE_CHG)) == 0 && 1610 va < VM_MIN_KERNEL_ADDRESS) { 1611 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n", 1612 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1613 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n", 1614 pvo->pvo_pte.pte_hi, 1615 pm->pm_sr[va >> ADDR_SR_SHFT]); 1616 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1617 #ifdef DDBX 1618 Debugger(); 1619 #endif 1620 } 1621 #endif 1622 PMAPCOUNT(mappings_replaced); 1623 pmap_pvo_remove(pvo, -1, NULL); 1624 break; 1625 } 1626 } 1627 1628 /* 1629 * If we aren't overwriting an mapping, try to allocate 1630 */ 1631 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1632 --pmap_pvo_enter_depth; 1633 #endif 1634 pmap_interrupts_restore(msr); 1635 if (pvo) { 1636 pmap_pvo_free(pvo); 1637 } 1638 pvo = pool_get(pl, poolflags); 1639 1640 #ifdef DEBUG 1641 /* 1642 * Exercise pmap_pvo_reclaim() a little. 1643 */ 1644 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1645 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1646 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1647 pool_put(pl, pvo); 1648 pvo = NULL; 1649 } 1650 #endif 1651 1652 msr = pmap_interrupts_off(); 1653 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1654 ++pmap_pvo_enter_depth; 1655 #endif 1656 if (pvo == NULL) { 1657 pvo = pmap_pvo_reclaim(pm); 1658 if (pvo == NULL) { 1659 if ((flags & PMAP_CANFAIL) == 0) 1660 panic("pmap_pvo_enter: failed"); 1661 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1662 pmap_pvo_enter_depth--; 1663 #endif 1664 PMAPCOUNT(pvos_failed); 1665 pmap_interrupts_restore(msr); 1666 return ENOMEM; 1667 } 1668 } 1669 1670 pvo->pvo_vaddr = va; 1671 pvo->pvo_pmap = pm; 1672 pvo->pvo_vaddr &= ~ADDR_POFF; 1673 if (flags & VM_PROT_EXECUTE) { 1674 PMAPCOUNT(exec_mappings); 1675 pvo_set_exec(pvo); 1676 } 1677 if (flags & PMAP_WIRED) 1678 pvo->pvo_vaddr |= PVO_WIRED; 1679 if (pvo_head != &pmap_pvo_kunmanaged) { 1680 pvo->pvo_vaddr |= PVO_MANAGED; 1681 PMAPCOUNT(mappings); 1682 } else { 1683 PMAPCOUNT(kernel_mappings); 1684 } 1685 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1686 1687 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1688 if (PVO_WIRED_P(pvo)) 1689 pvo->pvo_pmap->pm_stats.wired_count++; 1690 pvo->pvo_pmap->pm_stats.resident_count++; 1691 #if defined(DEBUG) 1692 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1693 DPRINTFN(PVOENTER, 1694 ("pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1695 pvo, pm, va, pa)); 1696 #endif 1697 1698 /* 1699 * We hope this succeeds but it isn't required. 1700 */ 1701 pvoh = &pmap_pvo_table[ptegidx]; 1702 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1703 if (i >= 0) { 1704 PVO_PTEGIDX_SET(pvo, i); 1705 PVO_WHERE(pvo, ENTER_INSERT); 1706 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1707 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1708 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1709 1710 } else { 1711 /* 1712 * Since we didn't have room for this entry (which makes it 1713 * and evicted entry), place it at the head of the list. 1714 */ 1715 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1716 PMAPCOUNT(ptes_evicted); 1717 pm->pm_evictions++; 1718 /* 1719 * If this is a kernel page, make sure it's active. 1720 */ 1721 if (pm == pmap_kernel()) { 1722 i = pmap_pte_spill(pm, va, false); 1723 KASSERT(i); 1724 } 1725 } 1726 PMAP_PVO_CHECK(pvo); /* sanity check */ 1727 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1728 pmap_pvo_enter_depth--; 1729 #endif 1730 pmap_interrupts_restore(msr); 1731 return 0; 1732 } 1733 1734 static void 1735 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1736 { 1737 volatile struct pte *pt; 1738 int ptegidx; 1739 1740 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1741 if (++pmap_pvo_remove_depth > 1) 1742 panic("pmap_pvo_remove: called recursively!"); 1743 #endif 1744 1745 /* 1746 * If we haven't been supplied the ptegidx, calculate it. 1747 */ 1748 if (pteidx == -1) { 1749 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1750 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1751 } else { 1752 ptegidx = pteidx >> 3; 1753 if (pvo->pvo_pte.pte_hi & PTE_HID) 1754 ptegidx ^= pmap_pteg_mask; 1755 } 1756 PMAP_PVO_CHECK(pvo); /* sanity check */ 1757 1758 /* 1759 * If there is an active pte entry, we need to deactivate it 1760 * (and save the ref & chg bits). 1761 */ 1762 pt = pmap_pvo_to_pte(pvo, pteidx); 1763 if (pt != NULL) { 1764 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1765 PVO_WHERE(pvo, REMOVE); 1766 PVO_PTEGIDX_CLR(pvo); 1767 PMAPCOUNT(ptes_removed); 1768 } else { 1769 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1770 pvo->pvo_pmap->pm_evictions--; 1771 } 1772 1773 /* 1774 * Account for executable mappings. 1775 */ 1776 if (PVO_EXECUTABLE_P(pvo)) 1777 pvo_clear_exec(pvo); 1778 1779 /* 1780 * Update our statistics. 1781 */ 1782 pvo->pvo_pmap->pm_stats.resident_count--; 1783 if (PVO_WIRED_P(pvo)) 1784 pvo->pvo_pmap->pm_stats.wired_count--; 1785 1786 /* 1787 * Save the REF/CHG bits into their cache if the page is managed. 1788 */ 1789 if (PVO_MANAGED_P(pvo)) { 1790 register_t ptelo = pvo->pvo_pte.pte_lo; 1791 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1792 1793 if (pg != NULL) { 1794 /* 1795 * If this page was changed and it is mapped exec, 1796 * invalidate it. 1797 */ 1798 if ((ptelo & PTE_CHG) && 1799 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1800 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1801 if (LIST_EMPTY(pvoh)) { 1802 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1803 "%#" _PRIxpa ": clear-exec]\n", 1804 VM_PAGE_TO_PHYS(pg))); 1805 pmap_attr_clear(pg, PTE_EXEC); 1806 PMAPCOUNT(exec_uncached_pvo_remove); 1807 } else { 1808 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1809 "%#" _PRIxpa ": syncicache]\n", 1810 VM_PAGE_TO_PHYS(pg))); 1811 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1812 PAGE_SIZE); 1813 PMAPCOUNT(exec_synced_pvo_remove); 1814 } 1815 } 1816 1817 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1818 } 1819 PMAPCOUNT(unmappings); 1820 } else { 1821 PMAPCOUNT(kernel_unmappings); 1822 } 1823 1824 /* 1825 * Remove the PVO from its lists and return it to the pool. 1826 */ 1827 LIST_REMOVE(pvo, pvo_vlink); 1828 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1829 if (pvol) { 1830 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1831 } 1832 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1833 pmap_pvo_remove_depth--; 1834 #endif 1835 } 1836 1837 void 1838 pmap_pvo_free(struct pvo_entry *pvo) 1839 { 1840 1841 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1842 } 1843 1844 void 1845 pmap_pvo_free_list(struct pvo_head *pvol) 1846 { 1847 struct pvo_entry *pvo, *npvo; 1848 1849 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1850 npvo = LIST_NEXT(pvo, pvo_vlink); 1851 LIST_REMOVE(pvo, pvo_vlink); 1852 pmap_pvo_free(pvo); 1853 } 1854 } 1855 1856 /* 1857 * Mark a mapping as executable. 1858 * If this is the first executable mapping in the segment, 1859 * clear the noexec flag. 1860 */ 1861 static void 1862 pvo_set_exec(struct pvo_entry *pvo) 1863 { 1864 struct pmap *pm = pvo->pvo_pmap; 1865 1866 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1867 return; 1868 } 1869 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1870 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1871 { 1872 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1873 if (pm->pm_exec[sr]++ == 0) { 1874 pm->pm_sr[sr] &= ~SR_NOEXEC; 1875 } 1876 } 1877 #endif 1878 } 1879 1880 /* 1881 * Mark a mapping as non-executable. 1882 * If this was the last executable mapping in the segment, 1883 * set the noexec flag. 1884 */ 1885 static void 1886 pvo_clear_exec(struct pvo_entry *pvo) 1887 { 1888 struct pmap *pm = pvo->pvo_pmap; 1889 1890 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1891 return; 1892 } 1893 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1894 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1895 { 1896 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1897 if (--pm->pm_exec[sr] == 0) { 1898 pm->pm_sr[sr] |= SR_NOEXEC; 1899 } 1900 } 1901 #endif 1902 } 1903 1904 /* 1905 * Insert physical page at pa into the given pmap at virtual address va. 1906 */ 1907 int 1908 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags) 1909 { 1910 struct mem_region *mp; 1911 struct pvo_head *pvo_head; 1912 struct vm_page *pg; 1913 struct pool *pl; 1914 register_t pte_lo; 1915 int error; 1916 u_int pvo_flags; 1917 u_int was_exec = 0; 1918 1919 PMAP_LOCK(); 1920 1921 if (__predict_false(!pmap_initialized)) { 1922 pvo_head = &pmap_pvo_kunmanaged; 1923 pl = &pmap_upvo_pool; 1924 pvo_flags = 0; 1925 pg = NULL; 1926 was_exec = PTE_EXEC; 1927 } else { 1928 pvo_head = pa_to_pvoh(pa, &pg); 1929 pl = &pmap_mpvo_pool; 1930 pvo_flags = PVO_MANAGED; 1931 } 1932 1933 DPRINTFN(ENTER, 1934 ("pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1935 pm, va, pa, prot, flags)); 1936 1937 /* 1938 * If this is a managed page, and it's the first reference to the 1939 * page clear the execness of the page. Otherwise fetch the execness. 1940 */ 1941 if (pg != NULL) 1942 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1943 1944 DPRINTFN(ENTER, (" was_exec=%d", was_exec)); 1945 1946 /* 1947 * Assume the page is cache inhibited and access is guarded unless 1948 * it's in our available memory array. If it is in the memory array, 1949 * asssume it's in memory coherent memory. 1950 */ 1951 pte_lo = PTE_IG; 1952 if ((flags & PMAP_NC) == 0) { 1953 for (mp = mem; mp->size; mp++) { 1954 if (pa >= mp->start && pa < mp->start + mp->size) { 1955 pte_lo = PTE_M; 1956 break; 1957 } 1958 } 1959 } 1960 1961 if (prot & VM_PROT_WRITE) 1962 pte_lo |= PTE_BW; 1963 else 1964 pte_lo |= PTE_BR; 1965 1966 /* 1967 * If this was in response to a fault, "pre-fault" the PTE's 1968 * changed/referenced bit appropriately. 1969 */ 1970 if (flags & VM_PROT_WRITE) 1971 pte_lo |= PTE_CHG; 1972 if (flags & VM_PROT_ALL) 1973 pte_lo |= PTE_REF; 1974 1975 /* 1976 * We need to know if this page can be executable 1977 */ 1978 flags |= (prot & VM_PROT_EXECUTE); 1979 1980 /* 1981 * Record mapping for later back-translation and pte spilling. 1982 * This will overwrite any existing mapping. 1983 */ 1984 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1985 1986 /* 1987 * Flush the real page from the instruction cache if this page is 1988 * mapped executable and cacheable and has not been flushed since 1989 * the last time it was modified. 1990 */ 1991 if (error == 0 && 1992 (flags & VM_PROT_EXECUTE) && 1993 (pte_lo & PTE_I) == 0 && 1994 was_exec == 0) { 1995 DPRINTFN(ENTER, (" syncicache")); 1996 PMAPCOUNT(exec_synced); 1997 pmap_syncicache(pa, PAGE_SIZE); 1998 if (pg != NULL) { 1999 pmap_attr_save(pg, PTE_EXEC); 2000 PMAPCOUNT(exec_cached); 2001 #if defined(DEBUG) || defined(PMAPDEBUG) 2002 if (pmapdebug & PMAPDEBUG_ENTER) 2003 printf(" marked-as-exec"); 2004 else if (pmapdebug & PMAPDEBUG_EXEC) 2005 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 2006 VM_PAGE_TO_PHYS(pg)); 2007 2008 #endif 2009 } 2010 } 2011 2012 DPRINTFN(ENTER, (": error=%d\n", error)); 2013 2014 PMAP_UNLOCK(); 2015 2016 return error; 2017 } 2018 2019 void 2020 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2021 { 2022 struct mem_region *mp; 2023 register_t pte_lo; 2024 int error; 2025 2026 #if defined (PMAP_OEA64_BRIDGE) 2027 if (va < VM_MIN_KERNEL_ADDRESS) 2028 panic("pmap_kenter_pa: attempt to enter " 2029 "non-kernel address %#" _PRIxva "!", va); 2030 #endif 2031 2032 DPRINTFN(KENTER, 2033 ("pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot)); 2034 2035 PMAP_LOCK(); 2036 2037 /* 2038 * Assume the page is cache inhibited and access is guarded unless 2039 * it's in our available memory array. If it is in the memory array, 2040 * asssume it's in memory coherent memory. 2041 */ 2042 pte_lo = PTE_IG; 2043 if ((prot & PMAP_NC) == 0) { 2044 for (mp = mem; mp->size; mp++) { 2045 if (pa >= mp->start && pa < mp->start + mp->size) { 2046 pte_lo = PTE_M; 2047 break; 2048 } 2049 } 2050 } 2051 2052 if (prot & VM_PROT_WRITE) 2053 pte_lo |= PTE_BW; 2054 else 2055 pte_lo |= PTE_BR; 2056 2057 /* 2058 * We don't care about REF/CHG on PVOs on the unmanaged list. 2059 */ 2060 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2061 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2062 2063 if (error != 0) 2064 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2065 va, pa, error); 2066 2067 PMAP_UNLOCK(); 2068 } 2069 2070 void 2071 pmap_kremove(vaddr_t va, vsize_t len) 2072 { 2073 if (va < VM_MIN_KERNEL_ADDRESS) 2074 panic("pmap_kremove: attempt to remove " 2075 "non-kernel address %#" _PRIxva "!", va); 2076 2077 DPRINTFN(KREMOVE,("pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len)); 2078 pmap_remove(pmap_kernel(), va, va + len); 2079 } 2080 2081 /* 2082 * Remove the given range of mapping entries. 2083 */ 2084 void 2085 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2086 { 2087 struct pvo_head pvol; 2088 struct pvo_entry *pvo; 2089 register_t msr; 2090 int pteidx; 2091 2092 PMAP_LOCK(); 2093 LIST_INIT(&pvol); 2094 msr = pmap_interrupts_off(); 2095 for (; va < endva; va += PAGE_SIZE) { 2096 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2097 if (pvo != NULL) { 2098 pmap_pvo_remove(pvo, pteidx, &pvol); 2099 } 2100 } 2101 pmap_interrupts_restore(msr); 2102 pmap_pvo_free_list(&pvol); 2103 PMAP_UNLOCK(); 2104 } 2105 2106 /* 2107 * Get the physical page address for the given pmap/virtual address. 2108 */ 2109 bool 2110 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2111 { 2112 struct pvo_entry *pvo; 2113 register_t msr; 2114 2115 PMAP_LOCK(); 2116 2117 /* 2118 * If this is a kernel pmap lookup, also check the battable 2119 * and if we get a hit, translate the VA to a PA using the 2120 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2121 * that will wrap back to 0. 2122 */ 2123 if (pm == pmap_kernel() && 2124 (va < VM_MIN_KERNEL_ADDRESS || 2125 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2126 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2127 #if defined (PMAP_OEA) 2128 #ifdef PPC_OEA601 2129 if ((MFPVR() >> 16) == MPC601) { 2130 register_t batu = battable[va >> 23].batu; 2131 register_t batl = battable[va >> 23].batl; 2132 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2133 if (BAT601_VALID_P(batl) && 2134 BAT601_VA_MATCH_P(batu, batl, va)) { 2135 register_t mask = 2136 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2137 if (pap) 2138 *pap = (batl & mask) | (va & ~mask); 2139 PMAP_UNLOCK(); 2140 return true; 2141 } else if (SR601_VALID_P(sr) && 2142 SR601_PA_MATCH_P(sr, va)) { 2143 if (pap) 2144 *pap = va; 2145 PMAP_UNLOCK(); 2146 return true; 2147 } 2148 } else 2149 #endif /* PPC_OEA601 */ 2150 { 2151 register_t batu = battable[va >> ADDR_SR_SHFT].batu; 2152 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2153 register_t batl = 2154 battable[va >> ADDR_SR_SHFT].batl; 2155 register_t mask = 2156 (~(batu & BAT_BL) << 15) & ~0x1ffffL; 2157 if (pap) 2158 *pap = (batl & mask) | (va & ~mask); 2159 PMAP_UNLOCK(); 2160 return true; 2161 } 2162 } 2163 return false; 2164 #elif defined (PMAP_OEA64_BRIDGE) 2165 if (va >= SEGMENT_LENGTH) 2166 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2167 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2168 else { 2169 if (pap) 2170 *pap = va; 2171 PMAP_UNLOCK(); 2172 return true; 2173 } 2174 #elif defined (PMAP_OEA64) 2175 #error PPC_OEA64 not supported 2176 #endif /* PPC_OEA */ 2177 } 2178 2179 msr = pmap_interrupts_off(); 2180 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2181 if (pvo != NULL) { 2182 PMAP_PVO_CHECK(pvo); /* sanity check */ 2183 if (pap) 2184 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2185 | (va & ADDR_POFF); 2186 } 2187 pmap_interrupts_restore(msr); 2188 PMAP_UNLOCK(); 2189 return pvo != NULL; 2190 } 2191 2192 /* 2193 * Lower the protection on the specified range of this pmap. 2194 */ 2195 void 2196 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2197 { 2198 struct pvo_entry *pvo; 2199 volatile struct pte *pt; 2200 register_t msr; 2201 int pteidx; 2202 2203 /* 2204 * Since this routine only downgrades protection, we should 2205 * always be called with at least one bit not set. 2206 */ 2207 KASSERT(prot != VM_PROT_ALL); 2208 2209 /* 2210 * If there is no protection, this is equivalent to 2211 * remove the pmap from the pmap. 2212 */ 2213 if ((prot & VM_PROT_READ) == 0) { 2214 pmap_remove(pm, va, endva); 2215 return; 2216 } 2217 2218 PMAP_LOCK(); 2219 2220 msr = pmap_interrupts_off(); 2221 for (; va < endva; va += PAGE_SIZE) { 2222 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2223 if (pvo == NULL) 2224 continue; 2225 PMAP_PVO_CHECK(pvo); /* sanity check */ 2226 2227 /* 2228 * Revoke executable if asked to do so. 2229 */ 2230 if ((prot & VM_PROT_EXECUTE) == 0) 2231 pvo_clear_exec(pvo); 2232 2233 #if 0 2234 /* 2235 * If the page is already read-only, no change 2236 * needs to be made. 2237 */ 2238 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2239 continue; 2240 #endif 2241 /* 2242 * Grab the PTE pointer before we diddle with 2243 * the cached PTE copy. 2244 */ 2245 pt = pmap_pvo_to_pte(pvo, pteidx); 2246 /* 2247 * Change the protection of the page. 2248 */ 2249 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2250 pvo->pvo_pte.pte_lo |= PTE_BR; 2251 2252 /* 2253 * If the PVO is in the page table, update 2254 * that pte at well. 2255 */ 2256 if (pt != NULL) { 2257 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2258 PVO_WHERE(pvo, PMAP_PROTECT); 2259 PMAPCOUNT(ptes_changed); 2260 } 2261 2262 PMAP_PVO_CHECK(pvo); /* sanity check */ 2263 } 2264 pmap_interrupts_restore(msr); 2265 PMAP_UNLOCK(); 2266 } 2267 2268 void 2269 pmap_unwire(pmap_t pm, vaddr_t va) 2270 { 2271 struct pvo_entry *pvo; 2272 register_t msr; 2273 2274 PMAP_LOCK(); 2275 msr = pmap_interrupts_off(); 2276 pvo = pmap_pvo_find_va(pm, va, NULL); 2277 if (pvo != NULL) { 2278 if (PVO_WIRED_P(pvo)) { 2279 pvo->pvo_vaddr &= ~PVO_WIRED; 2280 pm->pm_stats.wired_count--; 2281 } 2282 PMAP_PVO_CHECK(pvo); /* sanity check */ 2283 } 2284 pmap_interrupts_restore(msr); 2285 PMAP_UNLOCK(); 2286 } 2287 2288 /* 2289 * Lower the protection on the specified physical page. 2290 */ 2291 void 2292 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2293 { 2294 struct pvo_head *pvo_head, pvol; 2295 struct pvo_entry *pvo, *next_pvo; 2296 volatile struct pte *pt; 2297 register_t msr; 2298 2299 PMAP_LOCK(); 2300 2301 KASSERT(prot != VM_PROT_ALL); 2302 LIST_INIT(&pvol); 2303 msr = pmap_interrupts_off(); 2304 2305 /* 2306 * When UVM reuses a page, it does a pmap_page_protect with 2307 * VM_PROT_NONE. At that point, we can clear the exec flag 2308 * since we know the page will have different contents. 2309 */ 2310 if ((prot & VM_PROT_READ) == 0) { 2311 DPRINTFN(EXEC, ("[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2312 VM_PAGE_TO_PHYS(pg))); 2313 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2314 PMAPCOUNT(exec_uncached_page_protect); 2315 pmap_attr_clear(pg, PTE_EXEC); 2316 } 2317 } 2318 2319 pvo_head = vm_page_to_pvoh(pg); 2320 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2321 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2322 PMAP_PVO_CHECK(pvo); /* sanity check */ 2323 2324 /* 2325 * Downgrading to no mapping at all, we just remove the entry. 2326 */ 2327 if ((prot & VM_PROT_READ) == 0) { 2328 pmap_pvo_remove(pvo, -1, &pvol); 2329 continue; 2330 } 2331 2332 /* 2333 * If EXEC permission is being revoked, just clear the 2334 * flag in the PVO. 2335 */ 2336 if ((prot & VM_PROT_EXECUTE) == 0) 2337 pvo_clear_exec(pvo); 2338 2339 /* 2340 * If this entry is already RO, don't diddle with the 2341 * page table. 2342 */ 2343 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2344 PMAP_PVO_CHECK(pvo); 2345 continue; 2346 } 2347 2348 /* 2349 * Grab the PTE before the we diddle the bits so 2350 * pvo_to_pte can verify the pte contents are as 2351 * expected. 2352 */ 2353 pt = pmap_pvo_to_pte(pvo, -1); 2354 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2355 pvo->pvo_pte.pte_lo |= PTE_BR; 2356 if (pt != NULL) { 2357 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2358 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2359 PMAPCOUNT(ptes_changed); 2360 } 2361 PMAP_PVO_CHECK(pvo); /* sanity check */ 2362 } 2363 pmap_interrupts_restore(msr); 2364 pmap_pvo_free_list(&pvol); 2365 2366 PMAP_UNLOCK(); 2367 } 2368 2369 /* 2370 * Activate the address space for the specified process. If the process 2371 * is the current process, load the new MMU context. 2372 */ 2373 void 2374 pmap_activate(struct lwp *l) 2375 { 2376 struct pcb *pcb = &l->l_addr->u_pcb; 2377 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2378 2379 DPRINTFN(ACTIVATE, 2380 ("pmap_activate: lwp %p (curlwp %p)\n", l, curlwp)); 2381 2382 /* 2383 * XXX Normally performed in cpu_fork(). 2384 */ 2385 pcb->pcb_pm = pmap; 2386 2387 /* 2388 * In theory, the SR registers need only be valid on return 2389 * to user space wait to do them there. 2390 */ 2391 if (l == curlwp) { 2392 /* Store pointer to new current pmap. */ 2393 curpm = pmap; 2394 } 2395 } 2396 2397 /* 2398 * Deactivate the specified process's address space. 2399 */ 2400 void 2401 pmap_deactivate(struct lwp *l) 2402 { 2403 } 2404 2405 bool 2406 pmap_query_bit(struct vm_page *pg, int ptebit) 2407 { 2408 struct pvo_entry *pvo; 2409 volatile struct pte *pt; 2410 register_t msr; 2411 2412 PMAP_LOCK(); 2413 2414 if (pmap_attr_fetch(pg) & ptebit) { 2415 PMAP_UNLOCK(); 2416 return true; 2417 } 2418 2419 msr = pmap_interrupts_off(); 2420 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2421 PMAP_PVO_CHECK(pvo); /* sanity check */ 2422 /* 2423 * See if we saved the bit off. If so cache, it and return 2424 * success. 2425 */ 2426 if (pvo->pvo_pte.pte_lo & ptebit) { 2427 pmap_attr_save(pg, ptebit); 2428 PMAP_PVO_CHECK(pvo); /* sanity check */ 2429 pmap_interrupts_restore(msr); 2430 PMAP_UNLOCK(); 2431 return true; 2432 } 2433 } 2434 /* 2435 * No luck, now go thru the hard part of looking at the ptes 2436 * themselves. Sync so any pending REF/CHG bits are flushed 2437 * to the PTEs. 2438 */ 2439 SYNC(); 2440 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2441 PMAP_PVO_CHECK(pvo); /* sanity check */ 2442 /* 2443 * See if this pvo have a valid PTE. If so, fetch the 2444 * REF/CHG bits from the valid PTE. If the appropriate 2445 * ptebit is set, cache, it and return success. 2446 */ 2447 pt = pmap_pvo_to_pte(pvo, -1); 2448 if (pt != NULL) { 2449 pmap_pte_synch(pt, &pvo->pvo_pte); 2450 if (pvo->pvo_pte.pte_lo & ptebit) { 2451 pmap_attr_save(pg, ptebit); 2452 PMAP_PVO_CHECK(pvo); /* sanity check */ 2453 pmap_interrupts_restore(msr); 2454 PMAP_UNLOCK(); 2455 return true; 2456 } 2457 } 2458 } 2459 pmap_interrupts_restore(msr); 2460 PMAP_UNLOCK(); 2461 return false; 2462 } 2463 2464 bool 2465 pmap_clear_bit(struct vm_page *pg, int ptebit) 2466 { 2467 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2468 struct pvo_entry *pvo; 2469 volatile struct pte *pt; 2470 register_t msr; 2471 int rv = 0; 2472 2473 PMAP_LOCK(); 2474 msr = pmap_interrupts_off(); 2475 2476 /* 2477 * Fetch the cache value 2478 */ 2479 rv |= pmap_attr_fetch(pg); 2480 2481 /* 2482 * Clear the cached value. 2483 */ 2484 pmap_attr_clear(pg, ptebit); 2485 2486 /* 2487 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2488 * can reset the right ones). Note that since the pvo entries and 2489 * list heads are accessed via BAT0 and are never placed in the 2490 * page table, we don't have to worry about further accesses setting 2491 * the REF/CHG bits. 2492 */ 2493 SYNC(); 2494 2495 /* 2496 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2497 * valid PTE. If so, clear the ptebit from the valid PTE. 2498 */ 2499 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2500 PMAP_PVO_CHECK(pvo); /* sanity check */ 2501 pt = pmap_pvo_to_pte(pvo, -1); 2502 if (pt != NULL) { 2503 /* 2504 * Only sync the PTE if the bit we are looking 2505 * for is not already set. 2506 */ 2507 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2508 pmap_pte_synch(pt, &pvo->pvo_pte); 2509 /* 2510 * If the bit we are looking for was already set, 2511 * clear that bit in the pte. 2512 */ 2513 if (pvo->pvo_pte.pte_lo & ptebit) 2514 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2515 } 2516 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2517 pvo->pvo_pte.pte_lo &= ~ptebit; 2518 PMAP_PVO_CHECK(pvo); /* sanity check */ 2519 } 2520 pmap_interrupts_restore(msr); 2521 2522 /* 2523 * If we are clearing the modify bit and this page was marked EXEC 2524 * and the user of the page thinks the page was modified, then we 2525 * need to clean it from the icache if it's mapped or clear the EXEC 2526 * bit if it's not mapped. The page itself might not have the CHG 2527 * bit set if the modification was done via DMA to the page. 2528 */ 2529 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2530 if (LIST_EMPTY(pvoh)) { 2531 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2532 VM_PAGE_TO_PHYS(pg))); 2533 pmap_attr_clear(pg, PTE_EXEC); 2534 PMAPCOUNT(exec_uncached_clear_modify); 2535 } else { 2536 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2537 VM_PAGE_TO_PHYS(pg))); 2538 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2539 PMAPCOUNT(exec_synced_clear_modify); 2540 } 2541 } 2542 PMAP_UNLOCK(); 2543 return (rv & ptebit) != 0; 2544 } 2545 2546 void 2547 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2548 { 2549 struct pvo_entry *pvo; 2550 size_t offset = va & ADDR_POFF; 2551 int s; 2552 2553 PMAP_LOCK(); 2554 s = splvm(); 2555 while (len > 0) { 2556 size_t seglen = PAGE_SIZE - offset; 2557 if (seglen > len) 2558 seglen = len; 2559 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2560 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2561 pmap_syncicache( 2562 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2563 PMAP_PVO_CHECK(pvo); 2564 } 2565 va += seglen; 2566 len -= seglen; 2567 offset = 0; 2568 } 2569 splx(s); 2570 PMAP_UNLOCK(); 2571 } 2572 2573 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2574 void 2575 pmap_pte_print(volatile struct pte *pt) 2576 { 2577 printf("PTE %p: ", pt); 2578 2579 #if defined(PMAP_OEA) 2580 /* High word: */ 2581 printf("%#" _PRIxpte ": [", pt->pte_hi); 2582 #else 2583 printf("%#" _PRIxpte ": [", pt->pte_hi); 2584 #endif /* PMAP_OEA */ 2585 2586 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2587 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2588 2589 printf("%#" _PRIxpte " %#" _PRIxpte "", 2590 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2591 pt->pte_hi & PTE_API); 2592 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2593 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2594 #else 2595 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2596 #endif /* PMAP_OEA */ 2597 2598 /* Low word: */ 2599 #if defined (PMAP_OEA) 2600 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2601 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2602 #else 2603 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2604 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2605 #endif 2606 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2607 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2608 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2609 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2610 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2611 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2612 switch (pt->pte_lo & PTE_PP) { 2613 case PTE_BR: printf("br]\n"); break; 2614 case PTE_BW: printf("bw]\n"); break; 2615 case PTE_SO: printf("so]\n"); break; 2616 case PTE_SW: printf("sw]\n"); break; 2617 } 2618 } 2619 #endif 2620 2621 #if defined(DDB) 2622 void 2623 pmap_pteg_check(void) 2624 { 2625 volatile struct pte *pt; 2626 int i; 2627 int ptegidx; 2628 u_int p_valid = 0; 2629 u_int s_valid = 0; 2630 u_int invalid = 0; 2631 2632 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2633 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2634 if (pt->pte_hi & PTE_VALID) { 2635 if (pt->pte_hi & PTE_HID) 2636 s_valid++; 2637 else 2638 { 2639 p_valid++; 2640 } 2641 } else 2642 invalid++; 2643 } 2644 } 2645 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2646 p_valid, p_valid, s_valid, s_valid, 2647 invalid, invalid); 2648 } 2649 2650 void 2651 pmap_print_mmuregs(void) 2652 { 2653 int i; 2654 u_int cpuvers; 2655 #ifndef PMAP_OEA64 2656 vaddr_t addr; 2657 register_t soft_sr[16]; 2658 #endif 2659 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2660 struct bat soft_ibat[4]; 2661 struct bat soft_dbat[4]; 2662 #endif 2663 paddr_t sdr1; 2664 2665 cpuvers = MFPVR() >> 16; 2666 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2667 #ifndef PMAP_OEA64 2668 addr = 0; 2669 for (i = 0; i < 16; i++) { 2670 soft_sr[i] = MFSRIN(addr); 2671 addr += (1 << ADDR_SR_SHFT); 2672 } 2673 #endif 2674 2675 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2676 /* read iBAT (601: uBAT) registers */ 2677 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2678 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2679 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2680 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2681 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2682 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2683 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2684 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2685 2686 2687 if (cpuvers != MPC601) { 2688 /* read dBAT registers */ 2689 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2690 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2691 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2692 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2693 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2694 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2695 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2696 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2697 } 2698 #endif 2699 2700 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2701 #ifndef PMAP_OEA64 2702 printf("SR[]:\t"); 2703 for (i = 0; i < 4; i++) 2704 printf("0x%08lx, ", soft_sr[i]); 2705 printf("\n\t"); 2706 for ( ; i < 8; i++) 2707 printf("0x%08lx, ", soft_sr[i]); 2708 printf("\n\t"); 2709 for ( ; i < 12; i++) 2710 printf("0x%08lx, ", soft_sr[i]); 2711 printf("\n\t"); 2712 for ( ; i < 16; i++) 2713 printf("0x%08lx, ", soft_sr[i]); 2714 printf("\n"); 2715 #endif 2716 2717 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2718 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2719 for (i = 0; i < 4; i++) { 2720 printf("0x%08lx 0x%08lx, ", 2721 soft_ibat[i].batu, soft_ibat[i].batl); 2722 if (i == 1) 2723 printf("\n\t"); 2724 } 2725 if (cpuvers != MPC601) { 2726 printf("\ndBAT[]:\t"); 2727 for (i = 0; i < 4; i++) { 2728 printf("0x%08lx 0x%08lx, ", 2729 soft_dbat[i].batu, soft_dbat[i].batl); 2730 if (i == 1) 2731 printf("\n\t"); 2732 } 2733 } 2734 printf("\n"); 2735 #endif /* PMAP_OEA... */ 2736 } 2737 2738 void 2739 pmap_print_pte(pmap_t pm, vaddr_t va) 2740 { 2741 struct pvo_entry *pvo; 2742 volatile struct pte *pt; 2743 int pteidx; 2744 2745 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2746 if (pvo != NULL) { 2747 pt = pmap_pvo_to_pte(pvo, pteidx); 2748 if (pt != NULL) { 2749 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2750 va, pt, 2751 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2752 pt->pte_hi, pt->pte_lo); 2753 } else { 2754 printf("No valid PTE found\n"); 2755 } 2756 } else { 2757 printf("Address not in pmap\n"); 2758 } 2759 } 2760 2761 void 2762 pmap_pteg_dist(void) 2763 { 2764 struct pvo_entry *pvo; 2765 int ptegidx; 2766 int depth; 2767 int max_depth = 0; 2768 unsigned int depths[64]; 2769 2770 memset(depths, 0, sizeof(depths)); 2771 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2772 depth = 0; 2773 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2774 depth++; 2775 } 2776 if (depth > max_depth) 2777 max_depth = depth; 2778 if (depth > 63) 2779 depth = 63; 2780 depths[depth]++; 2781 } 2782 2783 for (depth = 0; depth < 64; depth++) { 2784 printf(" [%2d]: %8u", depth, depths[depth]); 2785 if ((depth & 3) == 3) 2786 printf("\n"); 2787 if (depth == max_depth) 2788 break; 2789 } 2790 if ((depth & 3) != 3) 2791 printf("\n"); 2792 printf("Max depth found was %d\n", max_depth); 2793 } 2794 #endif /* DEBUG */ 2795 2796 #if defined(PMAPCHECK) || defined(DEBUG) 2797 void 2798 pmap_pvo_verify(void) 2799 { 2800 int ptegidx; 2801 int s; 2802 2803 s = splvm(); 2804 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2805 struct pvo_entry *pvo; 2806 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2807 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2808 panic("pmap_pvo_verify: invalid pvo %p " 2809 "on list %#x", pvo, ptegidx); 2810 pmap_pvo_check(pvo); 2811 } 2812 } 2813 splx(s); 2814 } 2815 #endif /* PMAPCHECK */ 2816 2817 2818 void * 2819 pmap_pool_ualloc(struct pool *pp, int flags) 2820 { 2821 struct pvo_page *pvop; 2822 2823 if (uvm.page_init_done != true) { 2824 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2825 } 2826 2827 PMAP_LOCK(); 2828 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2829 if (pvop != NULL) { 2830 pmap_upvop_free--; 2831 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2832 PMAP_UNLOCK(); 2833 return pvop; 2834 } 2835 PMAP_UNLOCK(); 2836 return pmap_pool_malloc(pp, flags); 2837 } 2838 2839 void * 2840 pmap_pool_malloc(struct pool *pp, int flags) 2841 { 2842 struct pvo_page *pvop; 2843 struct vm_page *pg; 2844 2845 PMAP_LOCK(); 2846 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2847 if (pvop != NULL) { 2848 pmap_mpvop_free--; 2849 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2850 PMAP_UNLOCK(); 2851 return pvop; 2852 } 2853 PMAP_UNLOCK(); 2854 again: 2855 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2856 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2857 if (__predict_false(pg == NULL)) { 2858 if (flags & PR_WAITOK) { 2859 uvm_wait("plpg"); 2860 goto again; 2861 } else { 2862 return (0); 2863 } 2864 } 2865 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2866 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2867 } 2868 2869 void 2870 pmap_pool_ufree(struct pool *pp, void *va) 2871 { 2872 struct pvo_page *pvop; 2873 #if 0 2874 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2875 pmap_pool_mfree(va, size, tag); 2876 return; 2877 } 2878 #endif 2879 PMAP_LOCK(); 2880 pvop = va; 2881 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2882 pmap_upvop_free++; 2883 if (pmap_upvop_free > pmap_upvop_maxfree) 2884 pmap_upvop_maxfree = pmap_upvop_free; 2885 PMAP_UNLOCK(); 2886 } 2887 2888 void 2889 pmap_pool_mfree(struct pool *pp, void *va) 2890 { 2891 struct pvo_page *pvop; 2892 2893 PMAP_LOCK(); 2894 pvop = va; 2895 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2896 pmap_mpvop_free++; 2897 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2898 pmap_mpvop_maxfree = pmap_mpvop_free; 2899 PMAP_UNLOCK(); 2900 #if 0 2901 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2902 #endif 2903 } 2904 2905 /* 2906 * This routine in bootstraping to steal to-be-managed memory (which will 2907 * then be unmanaged). We use it to grab from the first 256MB for our 2908 * pmap needs and above 256MB for other stuff. 2909 */ 2910 vaddr_t 2911 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2912 { 2913 vsize_t size; 2914 vaddr_t va; 2915 paddr_t pa = 0; 2916 int npgs, bank; 2917 struct vm_physseg *ps; 2918 2919 if (uvm.page_init_done == true) 2920 panic("pmap_steal_memory: called _after_ bootstrap"); 2921 2922 *vstartp = VM_MIN_KERNEL_ADDRESS; 2923 *vendp = VM_MAX_KERNEL_ADDRESS; 2924 2925 size = round_page(vsize); 2926 npgs = atop(size); 2927 2928 /* 2929 * PA 0 will never be among those given to UVM so we can use it 2930 * to indicate we couldn't steal any memory. 2931 */ 2932 for (ps = vm_physmem, bank = 0; bank < vm_nphysseg; bank++, ps++) { 2933 if (ps->free_list == VM_FREELIST_FIRST256 && 2934 ps->avail_end - ps->avail_start >= npgs) { 2935 pa = ptoa(ps->avail_start); 2936 break; 2937 } 2938 } 2939 2940 if (pa == 0) 2941 panic("pmap_steal_memory: no approriate memory to steal!"); 2942 2943 ps->avail_start += npgs; 2944 ps->start += npgs; 2945 2946 /* 2947 * If we've used up all the pages in the segment, remove it and 2948 * compact the list. 2949 */ 2950 if (ps->avail_start == ps->end) { 2951 /* 2952 * If this was the last one, then a very bad thing has occurred 2953 */ 2954 if (--vm_nphysseg == 0) 2955 panic("pmap_steal_memory: out of memory!"); 2956 2957 printf("pmap_steal_memory: consumed bank %d\n", bank); 2958 for (; bank < vm_nphysseg; bank++, ps++) { 2959 ps[0] = ps[1]; 2960 } 2961 } 2962 2963 va = (vaddr_t) pa; 2964 memset((void *) va, 0, size); 2965 pmap_pages_stolen += npgs; 2966 #ifdef DEBUG 2967 if (pmapdebug && npgs > 1) { 2968 u_int cnt = 0; 2969 for (bank = 0, ps = vm_physmem; bank < vm_nphysseg; bank++, ps++) 2970 cnt += ps->avail_end - ps->avail_start; 2971 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2972 npgs, pmap_pages_stolen, cnt); 2973 } 2974 #endif 2975 2976 return va; 2977 } 2978 2979 /* 2980 * Find a chuck of memory with right size and alignment. 2981 */ 2982 paddr_t 2983 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2984 { 2985 struct mem_region *mp; 2986 paddr_t s, e; 2987 int i, j; 2988 2989 size = round_page(size); 2990 2991 DPRINTFN(BOOT, 2992 ("pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 2993 size, alignment, at_end)); 2994 2995 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2996 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 2997 alignment); 2998 2999 if (at_end) { 3000 if (alignment != PAGE_SIZE) 3001 panic("pmap_boot_find_memory: invalid ending " 3002 "alignment %#" _PRIxpa, alignment); 3003 3004 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 3005 s = mp->start + mp->size - size; 3006 if (s >= mp->start && mp->size >= size) { 3007 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3008 DPRINTFN(BOOT, 3009 ("pmap_boot_find_memory: b-avail[%d] start " 3010 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3011 mp->start, mp->size)); 3012 mp->size -= size; 3013 DPRINTFN(BOOT, 3014 ("pmap_boot_find_memory: a-avail[%d] start " 3015 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3016 mp->start, mp->size)); 3017 return s; 3018 } 3019 } 3020 panic("pmap_boot_find_memory: no available memory"); 3021 } 3022 3023 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3024 s = (mp->start + alignment - 1) & ~(alignment-1); 3025 e = s + size; 3026 3027 /* 3028 * Is the calculated region entirely within the region? 3029 */ 3030 if (s < mp->start || e > mp->start + mp->size) 3031 continue; 3032 3033 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3034 if (s == mp->start) { 3035 /* 3036 * If the block starts at the beginning of region, 3037 * adjust the size & start. (the region may now be 3038 * zero in length) 3039 */ 3040 DPRINTFN(BOOT, 3041 ("pmap_boot_find_memory: b-avail[%d] start " 3042 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3043 mp->start += size; 3044 mp->size -= size; 3045 DPRINTFN(BOOT, 3046 ("pmap_boot_find_memory: a-avail[%d] start " 3047 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3048 } else if (e == mp->start + mp->size) { 3049 /* 3050 * If the block starts at the beginning of region, 3051 * adjust only the size. 3052 */ 3053 DPRINTFN(BOOT, 3054 ("pmap_boot_find_memory: b-avail[%d] start " 3055 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3056 mp->size -= size; 3057 DPRINTFN(BOOT, 3058 ("pmap_boot_find_memory: a-avail[%d] start " 3059 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3060 } else { 3061 /* 3062 * Block is in the middle of the region, so we 3063 * have to split it in two. 3064 */ 3065 for (j = avail_cnt; j > i + 1; j--) { 3066 avail[j] = avail[j-1]; 3067 } 3068 DPRINTFN(BOOT, 3069 ("pmap_boot_find_memory: b-avail[%d] start " 3070 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3071 mp[1].start = e; 3072 mp[1].size = mp[0].start + mp[0].size - e; 3073 mp[0].size = s - mp[0].start; 3074 avail_cnt++; 3075 for (; i < avail_cnt; i++) { 3076 DPRINTFN(BOOT, 3077 ("pmap_boot_find_memory: a-avail[%d] " 3078 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3079 avail[i].start, avail[i].size)); 3080 } 3081 } 3082 KASSERT(s == (uintptr_t) s); 3083 return s; 3084 } 3085 panic("pmap_boot_find_memory: not enough memory for " 3086 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3087 } 3088 3089 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3090 #if defined (PMAP_OEA64_BRIDGE) 3091 int 3092 pmap_setup_segment0_map(int use_large_pages, ...) 3093 { 3094 vaddr_t va; 3095 3096 register_t pte_lo = 0x0; 3097 int ptegidx = 0, i = 0; 3098 struct pte pte; 3099 va_list ap; 3100 3101 /* Coherent + Supervisor RW, no user access */ 3102 pte_lo = PTE_M; 3103 3104 /* XXXSL 3105 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3106 * these have to take priority. 3107 */ 3108 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3109 ptegidx = va_to_pteg(pmap_kernel(), va); 3110 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3111 i = pmap_pte_insert(ptegidx, &pte); 3112 } 3113 3114 va_start(ap, use_large_pages); 3115 while (1) { 3116 paddr_t pa; 3117 size_t size; 3118 3119 va = va_arg(ap, vaddr_t); 3120 3121 if (va == 0) 3122 break; 3123 3124 pa = va_arg(ap, paddr_t); 3125 size = va_arg(ap, size_t); 3126 3127 for (; va < (va + size); va += 0x1000, pa += 0x1000) { 3128 #if 0 3129 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3130 #endif 3131 ptegidx = va_to_pteg(pmap_kernel(), va); 3132 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3133 i = pmap_pte_insert(ptegidx, &pte); 3134 } 3135 } 3136 3137 TLBSYNC(); 3138 SYNC(); 3139 return (0); 3140 } 3141 #endif /* PMAP_OEA64_BRIDGE */ 3142 3143 /* 3144 * This is not part of the defined PMAP interface and is specific to the 3145 * PowerPC architecture. This is called during initppc, before the system 3146 * is really initialized. 3147 */ 3148 void 3149 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3150 { 3151 struct mem_region *mp, tmp; 3152 paddr_t s, e; 3153 psize_t size; 3154 int i, j; 3155 3156 /* 3157 * Get memory. 3158 */ 3159 mem_regions(&mem, &avail); 3160 #if defined(DEBUG) 3161 if (pmapdebug & PMAPDEBUG_BOOT) { 3162 printf("pmap_bootstrap: memory configuration:\n"); 3163 for (mp = mem; mp->size; mp++) { 3164 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3165 mp->start, mp->size); 3166 } 3167 for (mp = avail; mp->size; mp++) { 3168 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3169 mp->start, mp->size); 3170 } 3171 } 3172 #endif 3173 3174 /* 3175 * Find out how much physical memory we have and in how many chunks. 3176 */ 3177 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3178 if (mp->start >= pmap_memlimit) 3179 continue; 3180 if (mp->start + mp->size > pmap_memlimit) { 3181 size = pmap_memlimit - mp->start; 3182 physmem += btoc(size); 3183 } else { 3184 physmem += btoc(mp->size); 3185 } 3186 mem_cnt++; 3187 } 3188 3189 /* 3190 * Count the number of available entries. 3191 */ 3192 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3193 avail_cnt++; 3194 3195 /* 3196 * Page align all regions. 3197 */ 3198 kernelstart = trunc_page(kernelstart); 3199 kernelend = round_page(kernelend); 3200 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3201 s = round_page(mp->start); 3202 mp->size -= (s - mp->start); 3203 mp->size = trunc_page(mp->size); 3204 mp->start = s; 3205 e = mp->start + mp->size; 3206 3207 DPRINTFN(BOOT, 3208 ("pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3209 i, mp->start, mp->size)); 3210 3211 /* 3212 * Don't allow the end to run beyond our artificial limit 3213 */ 3214 if (e > pmap_memlimit) 3215 e = pmap_memlimit; 3216 3217 /* 3218 * Is this region empty or strange? skip it. 3219 */ 3220 if (e <= s) { 3221 mp->start = 0; 3222 mp->size = 0; 3223 continue; 3224 } 3225 3226 /* 3227 * Does this overlap the beginning of kernel? 3228 * Does extend past the end of the kernel? 3229 */ 3230 else if (s < kernelstart && e > kernelstart) { 3231 if (e > kernelend) { 3232 avail[avail_cnt].start = kernelend; 3233 avail[avail_cnt].size = e - kernelend; 3234 avail_cnt++; 3235 } 3236 mp->size = kernelstart - s; 3237 } 3238 /* 3239 * Check whether this region overlaps the end of the kernel. 3240 */ 3241 else if (s < kernelend && e > kernelend) { 3242 mp->start = kernelend; 3243 mp->size = e - kernelend; 3244 } 3245 /* 3246 * Look whether this regions is completely inside the kernel. 3247 * Nuke it if it does. 3248 */ 3249 else if (s >= kernelstart && e <= kernelend) { 3250 mp->start = 0; 3251 mp->size = 0; 3252 } 3253 /* 3254 * If the user imposed a memory limit, enforce it. 3255 */ 3256 else if (s >= pmap_memlimit) { 3257 mp->start = -PAGE_SIZE; /* let's know why */ 3258 mp->size = 0; 3259 } 3260 else { 3261 mp->start = s; 3262 mp->size = e - s; 3263 } 3264 DPRINTFN(BOOT, 3265 ("pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3266 i, mp->start, mp->size)); 3267 } 3268 3269 /* 3270 * Move (and uncount) all the null return to the end. 3271 */ 3272 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3273 if (mp->size == 0) { 3274 tmp = avail[i]; 3275 avail[i] = avail[--avail_cnt]; 3276 avail[avail_cnt] = avail[i]; 3277 } 3278 } 3279 3280 /* 3281 * (Bubble)sort them into asecnding order. 3282 */ 3283 for (i = 0; i < avail_cnt; i++) { 3284 for (j = i + 1; j < avail_cnt; j++) { 3285 if (avail[i].start > avail[j].start) { 3286 tmp = avail[i]; 3287 avail[i] = avail[j]; 3288 avail[j] = tmp; 3289 } 3290 } 3291 } 3292 3293 /* 3294 * Make sure they don't overlap. 3295 */ 3296 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3297 if (mp[0].start + mp[0].size > mp[1].start) { 3298 mp[0].size = mp[1].start - mp[0].start; 3299 } 3300 DPRINTFN(BOOT, 3301 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3302 i, mp->start, mp->size)); 3303 } 3304 DPRINTFN(BOOT, 3305 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3306 i, mp->start, mp->size)); 3307 3308 #ifdef PTEGCOUNT 3309 pmap_pteg_cnt = PTEGCOUNT; 3310 #else /* PTEGCOUNT */ 3311 3312 pmap_pteg_cnt = 0x1000; 3313 3314 while (pmap_pteg_cnt < physmem) 3315 pmap_pteg_cnt <<= 1; 3316 3317 pmap_pteg_cnt >>= 1; 3318 #endif /* PTEGCOUNT */ 3319 3320 #ifdef DEBUG 3321 DPRINTFN(BOOT, 3322 ("pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt)); 3323 #endif 3324 3325 /* 3326 * Find suitably aligned memory for PTEG hash table. 3327 */ 3328 size = pmap_pteg_cnt * sizeof(struct pteg); 3329 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3330 3331 #ifdef DEBUG 3332 DPRINTFN(BOOT, 3333 ("PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table)); 3334 #endif 3335 3336 3337 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3338 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3339 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3340 pmap_pteg_table, size); 3341 #endif 3342 3343 memset(__UNVOLATILE(pmap_pteg_table), 0, 3344 pmap_pteg_cnt * sizeof(struct pteg)); 3345 pmap_pteg_mask = pmap_pteg_cnt - 1; 3346 3347 /* 3348 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3349 * with pages. So we just steal them before giving them to UVM. 3350 */ 3351 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3352 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3353 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3354 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3355 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3356 pmap_pvo_table, size); 3357 #endif 3358 3359 for (i = 0; i < pmap_pteg_cnt; i++) 3360 TAILQ_INIT(&pmap_pvo_table[i]); 3361 3362 #ifndef MSGBUFADDR 3363 /* 3364 * Allocate msgbuf in high memory. 3365 */ 3366 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3367 #endif 3368 3369 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3370 paddr_t pfstart = atop(mp->start); 3371 paddr_t pfend = atop(mp->start + mp->size); 3372 if (mp->size == 0) 3373 continue; 3374 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3375 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3376 VM_FREELIST_FIRST256); 3377 } else if (mp->start >= SEGMENT_LENGTH) { 3378 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3379 VM_FREELIST_DEFAULT); 3380 } else { 3381 pfend = atop(SEGMENT_LENGTH); 3382 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3383 VM_FREELIST_FIRST256); 3384 pfstart = atop(SEGMENT_LENGTH); 3385 pfend = atop(mp->start + mp->size); 3386 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3387 VM_FREELIST_DEFAULT); 3388 } 3389 } 3390 3391 /* 3392 * Make sure kernel vsid is allocated as well as VSID 0. 3393 */ 3394 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3395 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3396 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3397 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3398 pmap_vsid_bitmap[0] |= 1; 3399 3400 /* 3401 * Initialize kernel pmap and hardware. 3402 */ 3403 3404 /* PMAP_OEA64_BRIDGE does support these instructions */ 3405 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3406 for (i = 0; i < 16; i++) { 3407 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3408 __asm volatile ("mtsrin %0,%1" 3409 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3410 } 3411 3412 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3413 __asm volatile ("mtsr %0,%1" 3414 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3415 #ifdef KERNEL2_SR 3416 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3417 __asm volatile ("mtsr %0,%1" 3418 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3419 #endif 3420 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3421 #if defined (PMAP_OEA) 3422 for (i = 0; i < 16; i++) { 3423 if (iosrtable[i] & SR601_T) { 3424 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3425 __asm volatile ("mtsrin %0,%1" 3426 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3427 } 3428 } 3429 __asm volatile ("sync; mtsdr1 %0; isync" 3430 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3431 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3432 __asm __volatile ("sync; mtsdr1 %0; isync" 3433 :: "r"((uintptr_t)pmap_pteg_table | (32 - cntlzw(pmap_pteg_mask >> 11)))); 3434 #endif 3435 tlbia(); 3436 3437 #ifdef ALTIVEC 3438 pmap_use_altivec = cpu_altivec; 3439 #endif 3440 3441 #ifdef DEBUG 3442 if (pmapdebug & PMAPDEBUG_BOOT) { 3443 u_int cnt; 3444 int bank; 3445 char pbuf[9]; 3446 for (cnt = 0, bank = 0; bank < vm_nphysseg; bank++) { 3447 cnt += vm_physmem[bank].avail_end - vm_physmem[bank].avail_start; 3448 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3449 bank, 3450 ptoa(vm_physmem[bank].avail_start), 3451 ptoa(vm_physmem[bank].avail_end), 3452 ptoa(vm_physmem[bank].avail_end - vm_physmem[bank].avail_start)); 3453 } 3454 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3455 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3456 pbuf, cnt); 3457 } 3458 #endif 3459 3460 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3461 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3462 &pmap_pool_uallocator, IPL_NONE); 3463 3464 pool_setlowat(&pmap_upvo_pool, 252); 3465 3466 pool_init(&pmap_pool, sizeof(struct pmap), 3467 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3468 IPL_NONE); 3469 3470 #if defined(PMAP_NEED_MAPKERNEL) || 1 3471 { 3472 struct pmap *pm = pmap_kernel(); 3473 #if 0 3474 extern int etext[], kernel_text[]; 3475 vaddr_t va, va_etext = (paddr_t) etext; 3476 #endif 3477 paddr_t pa, pa_end; 3478 register_t sr; 3479 struct pte pt; 3480 unsigned int ptegidx; 3481 int bank; 3482 3483 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3484 pm->pm_sr[0] = sr; 3485 3486 for (bank = 0; bank < vm_nphysseg; bank++) { 3487 pa_end = ptoa(vm_physmem[bank].avail_end); 3488 pa = ptoa(vm_physmem[bank].avail_start); 3489 for (; pa < pa_end; pa += PAGE_SIZE) { 3490 ptegidx = va_to_pteg(pm, pa); 3491 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3492 pmap_pte_insert(ptegidx, &pt); 3493 } 3494 } 3495 3496 #if 0 3497 va = (vaddr_t) kernel_text; 3498 3499 for (pa = kernelstart; va < va_etext; 3500 pa += PAGE_SIZE, va += PAGE_SIZE) { 3501 ptegidx = va_to_pteg(pm, va); 3502 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3503 pmap_pte_insert(ptegidx, &pt); 3504 } 3505 3506 for (; pa < kernelend; 3507 pa += PAGE_SIZE, va += PAGE_SIZE) { 3508 ptegidx = va_to_pteg(pm, va); 3509 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3510 pmap_pte_insert(ptegidx, &pt); 3511 } 3512 3513 for (va = 0, pa = 0; va < 0x3000; 3514 pa += PAGE_SIZE, va += PAGE_SIZE) { 3515 ptegidx = va_to_pteg(pm, va); 3516 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3517 pmap_pte_insert(ptegidx, &pt); 3518 } 3519 #endif 3520 3521 __asm volatile ("mtsrin %0,%1" 3522 :: "r"(sr), "r"(kernelstart)); 3523 } 3524 #endif 3525 } 3526
Indexes created Tue Sep 30 07:10:03 GMT 2025