pmap.c revision 1.58
1 /* $NetBSD: pmap.c,v 1.58 2008/04/08 02:33:03 garbled Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 43 * Copyright (C) 1995, 1996 TooLs GmbH. 44 * All rights reserved. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. All advertising materials mentioning features or use of this software 55 * must display the following acknowledgement: 56 * This product includes software developed by TooLs GmbH. 57 * 4. The name of TooLs GmbH may not be used to endorse or promote products 58 * derived from this software without specific prior written permission. 59 * 60 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 61 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 62 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 63 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 64 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 65 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 66 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 67 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 68 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 69 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.58 2008/04/08 02:33:03 garbled Exp $"); 74 75 #define PMAP_NOOPNAMES 76 77 #include "opt_ppcarch.h" 78 #include "opt_altivec.h" 79 #include "opt_multiprocessor.h" 80 #include "opt_pmap.h" 81 82 #include <sys/param.h> 83 #include <sys/malloc.h> 84 #include <sys/proc.h> 85 #include <sys/user.h> 86 #include <sys/pool.h> 87 #include <sys/queue.h> 88 #include <sys/device.h> /* for evcnt */ 89 #include <sys/systm.h> 90 #include <sys/atomic.h> 91 92 #include <uvm/uvm.h> 93 94 #include <machine/pcb.h> 95 #include <machine/powerpc.h> 96 #include <powerpc/spr.h> 97 #include <powerpc/oea/sr_601.h> 98 #include <powerpc/bat.h> 99 #include <powerpc/stdarg.h> 100 101 #ifdef ALTIVEC 102 int pmap_use_altivec; 103 #endif 104 105 volatile struct pteg *pmap_pteg_table; 106 unsigned int pmap_pteg_cnt; 107 unsigned int pmap_pteg_mask; 108 #ifdef PMAP_MEMLIMIT 109 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 110 #else 111 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 112 #endif 113 114 struct pmap kernel_pmap_; 115 unsigned int pmap_pages_stolen; 116 u_long pmap_pte_valid; 117 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 118 u_long pmap_pvo_enter_depth; 119 u_long pmap_pvo_remove_depth; 120 #endif 121 122 int physmem; 123 #ifndef MSGBUFADDR 124 extern paddr_t msgbuf_paddr; 125 #endif 126 127 static struct mem_region *mem, *avail; 128 static u_int mem_cnt, avail_cnt; 129 130 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 131 # define PMAP_OEA 1 132 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA64) && !defined(PPC_OEA64_BRIDGE) 133 # define PMAPNAME(name) pmap_##name 134 # endif 135 #endif 136 137 #if defined(PMAP_OEA64) 138 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64_BRIDGE) 139 # define PMAPNAME(name) pmap_##name 140 # endif 141 #endif 142 143 #if defined(PMAP_OEA64_BRIDGE) 144 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64) 145 # define PMAPNAME(name) pmap_##name 146 # endif 147 #endif 148 149 #if defined(PMAP_OEA) 150 #define _PRIxpte "lx" 151 #else 152 #define _PRIxpte PRIx64 153 #endif 154 #define _PRIxpa "lx" 155 #define _PRIxva "lx" 156 #define _PRIsr "lx" 157 158 #if defined(PMAP_EXCLUDE_DECLS) && !defined(PMAPNAME) 159 #if defined(PMAP_OEA) 160 #define PMAPNAME(name) pmap32_##name 161 #elif defined(PMAP_OEA64) 162 #define PMAPNAME(name) pmap64_##name 163 #elif defined(PMAP_OEA64_BRIDGE) 164 #define PMAPNAME(name) pmap64bridge_##name 165 #else 166 #error unknown variant for pmap 167 #endif 168 #endif /* PMAP_EXLCUDE_DECLS && !PMAPNAME */ 169 170 #if defined(PMAPNAME) 171 #define STATIC static 172 #define pmap_pte_spill PMAPNAME(pte_spill) 173 #define pmap_real_memory PMAPNAME(real_memory) 174 #define pmap_init PMAPNAME(init) 175 #define pmap_virtual_space PMAPNAME(virtual_space) 176 #define pmap_create PMAPNAME(create) 177 #define pmap_reference PMAPNAME(reference) 178 #define pmap_destroy PMAPNAME(destroy) 179 #define pmap_copy PMAPNAME(copy) 180 #define pmap_update PMAPNAME(update) 181 #define pmap_collect PMAPNAME(collect) 182 #define pmap_enter PMAPNAME(enter) 183 #define pmap_remove PMAPNAME(remove) 184 #define pmap_kenter_pa PMAPNAME(kenter_pa) 185 #define pmap_kremove PMAPNAME(kremove) 186 #define pmap_extract PMAPNAME(extract) 187 #define pmap_protect PMAPNAME(protect) 188 #define pmap_unwire PMAPNAME(unwire) 189 #define pmap_page_protect PMAPNAME(page_protect) 190 #define pmap_query_bit PMAPNAME(query_bit) 191 #define pmap_clear_bit PMAPNAME(clear_bit) 192 193 #define pmap_activate PMAPNAME(activate) 194 #define pmap_deactivate PMAPNAME(deactivate) 195 196 #define pmap_pinit PMAPNAME(pinit) 197 #define pmap_procwr PMAPNAME(procwr) 198 199 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 200 #define pmap_pte_print PMAPNAME(pte_print) 201 #define pmap_pteg_check PMAPNAME(pteg_check) 202 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 203 #define pmap_print_pte PMAPNAME(print_pte) 204 #define pmap_pteg_dist PMAPNAME(pteg_dist) 205 #endif 206 #if defined(DEBUG) || defined(PMAPCHECK) 207 #define pmap_pvo_verify PMAPNAME(pvo_verify) 208 #define pmapcheck PMAPNAME(check) 209 #endif 210 #if defined(DEBUG) || defined(PMAPDEBUG) 211 #define pmapdebug PMAPNAME(debug) 212 #endif 213 #define pmap_steal_memory PMAPNAME(steal_memory) 214 #define pmap_bootstrap PMAPNAME(bootstrap) 215 #else 216 #define STATIC /* nothing */ 217 #endif /* PMAPNAME */ 218 219 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 220 STATIC void pmap_real_memory(paddr_t *, psize_t *); 221 STATIC void pmap_init(void); 222 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 223 STATIC pmap_t pmap_create(void); 224 STATIC void pmap_reference(pmap_t); 225 STATIC void pmap_destroy(pmap_t); 226 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 227 STATIC void pmap_update(pmap_t); 228 STATIC void pmap_collect(pmap_t); 229 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, int); 230 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 231 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t); 232 STATIC void pmap_kremove(vaddr_t, vsize_t); 233 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 234 235 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 236 STATIC void pmap_unwire(pmap_t, vaddr_t); 237 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 238 STATIC bool pmap_query_bit(struct vm_page *, int); 239 STATIC bool pmap_clear_bit(struct vm_page *, int); 240 241 STATIC void pmap_activate(struct lwp *); 242 STATIC void pmap_deactivate(struct lwp *); 243 244 STATIC void pmap_pinit(pmap_t pm); 245 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 246 247 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 248 STATIC void pmap_pte_print(volatile struct pte *); 249 STATIC void pmap_pteg_check(void); 250 STATIC void pmap_print_mmuregs(void); 251 STATIC void pmap_print_pte(pmap_t, vaddr_t); 252 STATIC void pmap_pteg_dist(void); 253 #endif 254 #if defined(DEBUG) || defined(PMAPCHECK) 255 STATIC void pmap_pvo_verify(void); 256 #endif 257 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 258 STATIC void pmap_bootstrap(paddr_t, paddr_t); 259 260 #ifdef PMAPNAME 261 const struct pmap_ops PMAPNAME(ops) = { 262 .pmapop_pte_spill = pmap_pte_spill, 263 .pmapop_real_memory = pmap_real_memory, 264 .pmapop_init = pmap_init, 265 .pmapop_virtual_space = pmap_virtual_space, 266 .pmapop_create = pmap_create, 267 .pmapop_reference = pmap_reference, 268 .pmapop_destroy = pmap_destroy, 269 .pmapop_copy = pmap_copy, 270 .pmapop_update = pmap_update, 271 .pmapop_collect = pmap_collect, 272 .pmapop_enter = pmap_enter, 273 .pmapop_remove = pmap_remove, 274 .pmapop_kenter_pa = pmap_kenter_pa, 275 .pmapop_kremove = pmap_kremove, 276 .pmapop_extract = pmap_extract, 277 .pmapop_protect = pmap_protect, 278 .pmapop_unwire = pmap_unwire, 279 .pmapop_page_protect = pmap_page_protect, 280 .pmapop_query_bit = pmap_query_bit, 281 .pmapop_clear_bit = pmap_clear_bit, 282 .pmapop_activate = pmap_activate, 283 .pmapop_deactivate = pmap_deactivate, 284 .pmapop_pinit = pmap_pinit, 285 .pmapop_procwr = pmap_procwr, 286 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 287 .pmapop_pte_print = pmap_pte_print, 288 .pmapop_pteg_check = pmap_pteg_check, 289 .pmapop_print_mmuregs = pmap_print_mmuregs, 290 .pmapop_print_pte = pmap_print_pte, 291 .pmapop_pteg_dist = pmap_pteg_dist, 292 #else 293 .pmapop_pte_print = NULL, 294 .pmapop_pteg_check = NULL, 295 .pmapop_print_mmuregs = NULL, 296 .pmapop_print_pte = NULL, 297 .pmapop_pteg_dist = NULL, 298 #endif 299 #if defined(DEBUG) || defined(PMAPCHECK) 300 .pmapop_pvo_verify = pmap_pvo_verify, 301 #else 302 .pmapop_pvo_verify = NULL, 303 #endif 304 .pmapop_steal_memory = pmap_steal_memory, 305 .pmapop_bootstrap = pmap_bootstrap, 306 }; 307 #endif /* !PMAPNAME */ 308 309 /* 310 * The following structure is aligned to 32 bytes 311 */ 312 struct pvo_entry { 313 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 314 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 315 struct pte pvo_pte; /* Prebuilt PTE */ 316 pmap_t pvo_pmap; /* ptr to owning pmap */ 317 vaddr_t pvo_vaddr; /* VA of entry */ 318 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 319 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 320 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 321 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 322 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 323 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 324 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 325 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 326 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 327 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 328 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 329 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 330 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 331 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 332 #define PVO_REMOVE 6 /* PVO has been removed */ 333 #define PVO_WHERE_MASK 15 334 #define PVO_WHERE_SHFT 8 335 } __attribute__ ((aligned (32))); 336 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 337 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 338 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 339 #define PVO_PTEGIDX_CLR(pvo) \ 340 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 341 #define PVO_PTEGIDX_SET(pvo,i) \ 342 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 343 #define PVO_WHERE(pvo,w) \ 344 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 345 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 346 347 TAILQ_HEAD(pvo_tqhead, pvo_entry); 348 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 349 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 350 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 351 352 struct pool pmap_pool; /* pool for pmap structures */ 353 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 354 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 355 356 /* 357 * We keep a cache of unmanaged pages to be used for pvo entries for 358 * unmanaged pages. 359 */ 360 struct pvo_page { 361 SIMPLEQ_ENTRY(pvo_page) pvop_link; 362 }; 363 SIMPLEQ_HEAD(pvop_head, pvo_page); 364 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 365 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 366 u_long pmap_upvop_free; 367 u_long pmap_upvop_maxfree; 368 u_long pmap_mpvop_free; 369 u_long pmap_mpvop_maxfree; 370 371 static void *pmap_pool_ualloc(struct pool *, int); 372 static void *pmap_pool_malloc(struct pool *, int); 373 374 static void pmap_pool_ufree(struct pool *, void *); 375 static void pmap_pool_mfree(struct pool *, void *); 376 377 static struct pool_allocator pmap_pool_mallocator = { 378 .pa_alloc = pmap_pool_malloc, 379 .pa_free = pmap_pool_mfree, 380 .pa_pagesz = 0, 381 }; 382 383 static struct pool_allocator pmap_pool_uallocator = { 384 .pa_alloc = pmap_pool_ualloc, 385 .pa_free = pmap_pool_ufree, 386 .pa_pagesz = 0, 387 }; 388 389 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 390 void pmap_pte_print(volatile struct pte *); 391 void pmap_pteg_check(void); 392 void pmap_pteg_dist(void); 393 void pmap_print_pte(pmap_t, vaddr_t); 394 void pmap_print_mmuregs(void); 395 #endif 396 397 #if defined(DEBUG) || defined(PMAPCHECK) 398 #ifdef PMAPCHECK 399 int pmapcheck = 1; 400 #else 401 int pmapcheck = 0; 402 #endif 403 void pmap_pvo_verify(void); 404 static void pmap_pvo_check(const struct pvo_entry *); 405 #define PMAP_PVO_CHECK(pvo) \ 406 do { \ 407 if (pmapcheck) \ 408 pmap_pvo_check(pvo); \ 409 } while (0) 410 #else 411 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 412 #endif 413 static int pmap_pte_insert(int, struct pte *); 414 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 415 vaddr_t, paddr_t, register_t, int); 416 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 417 static void pmap_pvo_free(struct pvo_entry *); 418 static void pmap_pvo_free_list(struct pvo_head *); 419 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 420 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 421 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 422 static void pvo_set_exec(struct pvo_entry *); 423 static void pvo_clear_exec(struct pvo_entry *); 424 425 static void tlbia(void); 426 427 static void pmap_release(pmap_t); 428 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 429 430 static uint32_t pmap_pvo_reclaim_nextidx; 431 #ifdef DEBUG 432 static int pmap_pvo_reclaim_debugctr; 433 #endif 434 435 #define VSID_NBPW (sizeof(uint32_t) * 8) 436 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 437 438 static int pmap_initialized; 439 440 #if defined(DEBUG) || defined(PMAPDEBUG) 441 #define PMAPDEBUG_BOOT 0x0001 442 #define PMAPDEBUG_PTE 0x0002 443 #define PMAPDEBUG_EXEC 0x0008 444 #define PMAPDEBUG_PVOENTER 0x0010 445 #define PMAPDEBUG_PVOREMOVE 0x0020 446 #define PMAPDEBUG_ACTIVATE 0x0100 447 #define PMAPDEBUG_CREATE 0x0200 448 #define PMAPDEBUG_ENTER 0x1000 449 #define PMAPDEBUG_KENTER 0x2000 450 #define PMAPDEBUG_KREMOVE 0x4000 451 #define PMAPDEBUG_REMOVE 0x8000 452 453 unsigned int pmapdebug = 0; 454 455 # define DPRINTF(x) printf x 456 # define DPRINTFN(n, x) if (pmapdebug & PMAPDEBUG_ ## n) printf x 457 #else 458 # define DPRINTF(x) 459 # define DPRINTFN(n, x) 460 #endif 461 462 463 #ifdef PMAPCOUNTERS 464 /* 465 * From pmap_subr.c 466 */ 467 extern struct evcnt pmap_evcnt_mappings; 468 extern struct evcnt pmap_evcnt_unmappings; 469 470 extern struct evcnt pmap_evcnt_kernel_mappings; 471 extern struct evcnt pmap_evcnt_kernel_unmappings; 472 473 extern struct evcnt pmap_evcnt_mappings_replaced; 474 475 extern struct evcnt pmap_evcnt_exec_mappings; 476 extern struct evcnt pmap_evcnt_exec_cached; 477 478 extern struct evcnt pmap_evcnt_exec_synced; 479 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 480 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 481 482 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 483 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 484 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 485 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 486 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 487 488 extern struct evcnt pmap_evcnt_updates; 489 extern struct evcnt pmap_evcnt_collects; 490 extern struct evcnt pmap_evcnt_copies; 491 492 extern struct evcnt pmap_evcnt_ptes_spilled; 493 extern struct evcnt pmap_evcnt_ptes_unspilled; 494 extern struct evcnt pmap_evcnt_ptes_evicted; 495 496 extern struct evcnt pmap_evcnt_ptes_primary[8]; 497 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 498 extern struct evcnt pmap_evcnt_ptes_removed; 499 extern struct evcnt pmap_evcnt_ptes_changed; 500 extern struct evcnt pmap_evcnt_pvos_reclaimed; 501 extern struct evcnt pmap_evcnt_pvos_failed; 502 503 extern struct evcnt pmap_evcnt_zeroed_pages; 504 extern struct evcnt pmap_evcnt_copied_pages; 505 extern struct evcnt pmap_evcnt_idlezeroed_pages; 506 507 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 508 #define PMAPCOUNT2(ev) ((ev).ev_count++) 509 #else 510 #define PMAPCOUNT(ev) ((void) 0) 511 #define PMAPCOUNT2(ev) ((void) 0) 512 #endif 513 514 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 515 516 /* XXXSL: this needs to be moved to assembler */ 517 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 518 519 #define TLBSYNC() __asm volatile("tlbsync") 520 #define SYNC() __asm volatile("sync") 521 #define EIEIO() __asm volatile("eieio") 522 #define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va)) 523 #define MFMSR() mfmsr() 524 #define MTMSR(psl) mtmsr(psl) 525 #define MFPVR() mfpvr() 526 #define MFSRIN(va) mfsrin(va) 527 #define MFTB() mfrtcltbl() 528 529 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 530 static inline register_t 531 mfsrin(vaddr_t va) 532 { 533 register_t sr; 534 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 535 return sr; 536 } 537 #endif /* PMAP_OEA*/ 538 539 #if defined (PMAP_OEA64_BRIDGE) 540 extern void mfmsr64 (register64_t *result); 541 #endif /* PMAP_OEA64_BRIDGE */ 542 543 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 544 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 545 546 static inline register_t 547 pmap_interrupts_off(void) 548 { 549 register_t msr = MFMSR(); 550 if (msr & PSL_EE) 551 MTMSR(msr & ~PSL_EE); 552 return msr; 553 } 554 555 static void 556 pmap_interrupts_restore(register_t msr) 557 { 558 if (msr & PSL_EE) 559 MTMSR(msr); 560 } 561 562 static inline u_int32_t 563 mfrtcltbl(void) 564 { 565 #ifdef PPC_OEA601 566 if ((MFPVR() >> 16) == MPC601) 567 return (mfrtcl() >> 7); 568 else 569 #endif 570 return (mftbl()); 571 } 572 573 /* 574 * These small routines may have to be replaced, 575 * if/when we support processors other that the 604. 576 */ 577 578 void 579 tlbia(void) 580 { 581 char *i; 582 583 SYNC(); 584 #if defined(PMAP_OEA) 585 /* 586 * Why not use "tlbia"? Because not all processors implement it. 587 * 588 * This needs to be a per-CPU callback to do the appropriate thing 589 * for the CPU. XXX 590 */ 591 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 592 TLBIE(i); 593 EIEIO(); 594 SYNC(); 595 } 596 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 597 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 598 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 599 TLBIEL(i); 600 EIEIO(); 601 SYNC(); 602 } 603 #endif 604 TLBSYNC(); 605 SYNC(); 606 } 607 608 static inline register_t 609 va_to_vsid(const struct pmap *pm, vaddr_t addr) 610 { 611 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 612 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 613 #else /* PMAP_OEA64 */ 614 #if 0 615 const struct ste *ste; 616 register_t hash; 617 int i; 618 619 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 620 621 /* 622 * Try the primary group first 623 */ 624 ste = pm->pm_stes[hash].stes; 625 for (i = 0; i < 8; i++, ste++) { 626 if (ste->ste_hi & STE_V) && 627 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 628 return ste; 629 } 630 631 /* 632 * Then the secondary group. 633 */ 634 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 635 for (i = 0; i < 8; i++, ste++) { 636 if (ste->ste_hi & STE_V) && 637 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 638 return addr; 639 } 640 641 return NULL; 642 #else 643 /* 644 * Rather than searching the STE groups for the VSID, we know 645 * how we generate that from the ESID and so do that. 646 */ 647 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 648 #endif 649 #endif /* PMAP_OEA */ 650 } 651 652 static inline register_t 653 va_to_pteg(const struct pmap *pm, vaddr_t addr) 654 { 655 register_t hash; 656 657 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 658 return hash & pmap_pteg_mask; 659 } 660 661 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 662 /* 663 * Given a PTE in the page table, calculate the VADDR that hashes to it. 664 * The only bit of magic is that the top 4 bits of the address doesn't 665 * technically exist in the PTE. But we know we reserved 4 bits of the 666 * VSID for it so that's how we get it. 667 */ 668 static vaddr_t 669 pmap_pte_to_va(volatile const struct pte *pt) 670 { 671 vaddr_t va; 672 uintptr_t ptaddr = (uintptr_t) pt; 673 674 if (pt->pte_hi & PTE_HID) 675 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 676 677 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 678 #if defined(PMAP_OEA) 679 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 680 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 681 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 682 #endif 683 va <<= ADDR_PIDX_SHFT; 684 685 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 686 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 687 688 #if defined(PMAP_OEA64) 689 /* PPC63 Bits 0-35 */ 690 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 691 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 692 /* PPC Bits 0-3 */ 693 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 694 #endif 695 696 return va; 697 } 698 #endif 699 700 static inline struct pvo_head * 701 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 702 { 703 struct vm_page *pg; 704 705 pg = PHYS_TO_VM_PAGE(pa); 706 if (pg_p != NULL) 707 *pg_p = pg; 708 if (pg == NULL) 709 return &pmap_pvo_unmanaged; 710 return &pg->mdpage.mdpg_pvoh; 711 } 712 713 static inline struct pvo_head * 714 vm_page_to_pvoh(struct vm_page *pg) 715 { 716 return &pg->mdpage.mdpg_pvoh; 717 } 718 719 720 static inline void 721 pmap_attr_clear(struct vm_page *pg, int ptebit) 722 { 723 pg->mdpage.mdpg_attrs &= ~ptebit; 724 } 725 726 static inline int 727 pmap_attr_fetch(struct vm_page *pg) 728 { 729 return pg->mdpage.mdpg_attrs; 730 } 731 732 static inline void 733 pmap_attr_save(struct vm_page *pg, int ptebit) 734 { 735 pg->mdpage.mdpg_attrs |= ptebit; 736 } 737 738 static inline int 739 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 740 { 741 if (pt->pte_hi == pvo_pt->pte_hi 742 #if 0 743 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 744 ~(PTE_REF|PTE_CHG)) == 0 745 #endif 746 ) 747 return 1; 748 return 0; 749 } 750 751 static inline void 752 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 753 { 754 /* 755 * Construct the PTE. Default to IMB initially. Valid bit 756 * only gets set when the real pte is set in memory. 757 * 758 * Note: Don't set the valid bit for correct operation of tlb update. 759 */ 760 #if defined(PMAP_OEA) 761 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 762 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 763 pt->pte_lo = pte_lo; 764 #elif defined (PMAP_OEA64_BRIDGE) 765 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 766 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 767 pt->pte_lo = (u_int64_t) pte_lo; 768 #elif defined (PMAP_OEA64) 769 #error PMAP_OEA64 not supported 770 #endif /* PMAP_OEA */ 771 } 772 773 static inline void 774 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 775 { 776 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 777 } 778 779 static inline void 780 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 781 { 782 /* 783 * As shown in Section 7.6.3.2.3 784 */ 785 pt->pte_lo &= ~ptebit; 786 TLBIE(va); 787 SYNC(); 788 EIEIO(); 789 TLBSYNC(); 790 SYNC(); 791 #ifdef MULTIPROCESSOR 792 DCBST(pt); 793 #endif 794 } 795 796 static inline void 797 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 798 { 799 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 800 if (pvo_pt->pte_hi & PTE_VALID) 801 panic("pte_set: setting an already valid pte %p", pvo_pt); 802 #endif 803 pvo_pt->pte_hi |= PTE_VALID; 804 805 /* 806 * Update the PTE as defined in section 7.6.3.1 807 * Note that the REF/CHG bits are from pvo_pt and thus should 808 * have been saved so this routine can restore them (if desired). 809 */ 810 pt->pte_lo = pvo_pt->pte_lo; 811 EIEIO(); 812 pt->pte_hi = pvo_pt->pte_hi; 813 TLBSYNC(); 814 SYNC(); 815 #ifdef MULTIPROCESSOR 816 DCBST(pt); 817 #endif 818 pmap_pte_valid++; 819 } 820 821 static inline void 822 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 823 { 824 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 825 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 826 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 827 if ((pt->pte_hi & PTE_VALID) == 0) 828 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 829 #endif 830 831 pvo_pt->pte_hi &= ~PTE_VALID; 832 /* 833 * Force the ref & chg bits back into the PTEs. 834 */ 835 SYNC(); 836 /* 837 * Invalidate the pte ... (Section 7.6.3.3) 838 */ 839 pt->pte_hi &= ~PTE_VALID; 840 SYNC(); 841 TLBIE(va); 842 SYNC(); 843 EIEIO(); 844 TLBSYNC(); 845 SYNC(); 846 /* 847 * Save the ref & chg bits ... 848 */ 849 pmap_pte_synch(pt, pvo_pt); 850 pmap_pte_valid--; 851 } 852 853 static inline void 854 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 855 { 856 /* 857 * Invalidate the PTE 858 */ 859 pmap_pte_unset(pt, pvo_pt, va); 860 pmap_pte_set(pt, pvo_pt); 861 } 862 863 /* 864 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 865 * (either primary or secondary location). 866 * 867 * Note: both the destination and source PTEs must not have PTE_VALID set. 868 */ 869 870 static int 871 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 872 { 873 volatile struct pte *pt; 874 int i; 875 876 #if defined(DEBUG) 877 DPRINTFN(PTE, ("pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 878 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo)); 879 #endif 880 /* 881 * First try primary hash. 882 */ 883 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 884 if ((pt->pte_hi & PTE_VALID) == 0) { 885 pvo_pt->pte_hi &= ~PTE_HID; 886 pmap_pte_set(pt, pvo_pt); 887 return i; 888 } 889 } 890 891 /* 892 * Now try secondary hash. 893 */ 894 ptegidx ^= pmap_pteg_mask; 895 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 896 if ((pt->pte_hi & PTE_VALID) == 0) { 897 pvo_pt->pte_hi |= PTE_HID; 898 pmap_pte_set(pt, pvo_pt); 899 return i; 900 } 901 } 902 return -1; 903 } 904 905 /* 906 * Spill handler. 907 * 908 * Tries to spill a page table entry from the overflow area. 909 * This runs in either real mode (if dealing with a exception spill) 910 * or virtual mode when dealing with manually spilling one of the 911 * kernel's pte entries. In either case, interrupts are already 912 * disabled. 913 */ 914 915 int 916 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 917 { 918 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 919 struct pvo_entry *pvo; 920 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 921 struct pvo_tqhead *pvoh, *vpvoh = NULL; 922 int ptegidx, i, j; 923 volatile struct pteg *pteg; 924 volatile struct pte *pt; 925 926 PMAP_LOCK(); 927 928 ptegidx = va_to_pteg(pm, addr); 929 930 /* 931 * Have to substitute some entry. Use the primary hash for this. 932 * Use low bits of timebase as random generator. Make sure we are 933 * not picking a kernel pte for replacement. 934 */ 935 pteg = &pmap_pteg_table[ptegidx]; 936 i = MFTB() & 7; 937 for (j = 0; j < 8; j++) { 938 pt = &pteg->pt[i]; 939 if ((pt->pte_hi & PTE_VALID) == 0) 940 break; 941 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 942 < PHYSMAP_VSIDBITS) 943 break; 944 i = (i + 1) & 7; 945 } 946 KASSERT(j < 8); 947 948 source_pvo = NULL; 949 victim_pvo = NULL; 950 pvoh = &pmap_pvo_table[ptegidx]; 951 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 952 953 /* 954 * We need to find pvo entry for this address... 955 */ 956 PMAP_PVO_CHECK(pvo); /* sanity check */ 957 958 /* 959 * If we haven't found the source and we come to a PVO with 960 * a valid PTE, then we know we can't find it because all 961 * evicted PVOs always are first in the list. 962 */ 963 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 964 break; 965 if (source_pvo == NULL && pm == pvo->pvo_pmap && 966 addr == PVO_VADDR(pvo)) { 967 968 /* 969 * Now we have found the entry to be spilled into the 970 * pteg. Attempt to insert it into the page table. 971 */ 972 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 973 if (j >= 0) { 974 PVO_PTEGIDX_SET(pvo, j); 975 PMAP_PVO_CHECK(pvo); /* sanity check */ 976 PVO_WHERE(pvo, SPILL_INSERT); 977 pvo->pvo_pmap->pm_evictions--; 978 PMAPCOUNT(ptes_spilled); 979 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 980 ? pmap_evcnt_ptes_secondary 981 : pmap_evcnt_ptes_primary)[j]); 982 983 /* 984 * Since we keep the evicted entries at the 985 * from of the PVO list, we need move this 986 * (now resident) PVO after the evicted 987 * entries. 988 */ 989 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 990 991 /* 992 * If we don't have to move (either we were the 993 * last entry or the next entry was valid), 994 * don't change our position. Otherwise 995 * move ourselves to the tail of the queue. 996 */ 997 if (next_pvo != NULL && 998 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 999 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 1000 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1001 } 1002 PMAP_UNLOCK(); 1003 return 1; 1004 } 1005 source_pvo = pvo; 1006 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 1007 return 0; 1008 } 1009 if (victim_pvo != NULL) 1010 break; 1011 } 1012 1013 /* 1014 * We also need the pvo entry of the victim we are replacing 1015 * so save the R & C bits of the PTE. 1016 */ 1017 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1018 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1019 vpvoh = pvoh; /* *1* */ 1020 victim_pvo = pvo; 1021 if (source_pvo != NULL) 1022 break; 1023 } 1024 } 1025 1026 if (source_pvo == NULL) { 1027 PMAPCOUNT(ptes_unspilled); 1028 PMAP_UNLOCK(); 1029 return 0; 1030 } 1031 1032 if (victim_pvo == NULL) { 1033 if ((pt->pte_hi & PTE_HID) == 0) 1034 panic("pmap_pte_spill: victim p-pte (%p) has " 1035 "no pvo entry!", pt); 1036 1037 /* 1038 * If this is a secondary PTE, we need to search 1039 * its primary pvo bucket for the matching PVO. 1040 */ 1041 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1042 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1043 PMAP_PVO_CHECK(pvo); /* sanity check */ 1044 1045 /* 1046 * We also need the pvo entry of the victim we are 1047 * replacing so save the R & C bits of the PTE. 1048 */ 1049 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1050 victim_pvo = pvo; 1051 break; 1052 } 1053 } 1054 if (victim_pvo == NULL) 1055 panic("pmap_pte_spill: victim s-pte (%p) has " 1056 "no pvo entry!", pt); 1057 } 1058 1059 /* 1060 * The victim should be not be a kernel PVO/PTE entry. 1061 */ 1062 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1063 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1064 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1065 1066 /* 1067 * We are invalidating the TLB entry for the EA for the 1068 * we are replacing even though its valid; If we don't 1069 * we lose any ref/chg bit changes contained in the TLB 1070 * entry. 1071 */ 1072 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1073 1074 /* 1075 * To enforce the PVO list ordering constraint that all 1076 * evicted entries should come before all valid entries, 1077 * move the source PVO to the tail of its list and the 1078 * victim PVO to the head of its list (which might not be 1079 * the same list, if the victim was using the secondary hash). 1080 */ 1081 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1082 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1083 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1084 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1085 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1086 pmap_pte_set(pt, &source_pvo->pvo_pte); 1087 victim_pvo->pvo_pmap->pm_evictions++; 1088 source_pvo->pvo_pmap->pm_evictions--; 1089 PVO_WHERE(victim_pvo, SPILL_UNSET); 1090 PVO_WHERE(source_pvo, SPILL_SET); 1091 1092 PVO_PTEGIDX_CLR(victim_pvo); 1093 PVO_PTEGIDX_SET(source_pvo, i); 1094 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1095 PMAPCOUNT(ptes_spilled); 1096 PMAPCOUNT(ptes_evicted); 1097 PMAPCOUNT(ptes_removed); 1098 1099 PMAP_PVO_CHECK(victim_pvo); 1100 PMAP_PVO_CHECK(source_pvo); 1101 1102 PMAP_UNLOCK(); 1103 return 1; 1104 } 1105 1106 /* 1107 * Restrict given range to physical memory 1108 */ 1109 void 1110 pmap_real_memory(paddr_t *start, psize_t *size) 1111 { 1112 struct mem_region *mp; 1113 1114 for (mp = mem; mp->size; mp++) { 1115 if (*start + *size > mp->start 1116 && *start < mp->start + mp->size) { 1117 if (*start < mp->start) { 1118 *size -= mp->start - *start; 1119 *start = mp->start; 1120 } 1121 if (*start + *size > mp->start + mp->size) 1122 *size = mp->start + mp->size - *start; 1123 return; 1124 } 1125 } 1126 *size = 0; 1127 } 1128 1129 /* 1130 * Initialize anything else for pmap handling. 1131 * Called during vm_init(). 1132 */ 1133 void 1134 pmap_init(void) 1135 { 1136 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1137 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1138 &pmap_pool_mallocator, IPL_NONE); 1139 1140 pool_setlowat(&pmap_mpvo_pool, 1008); 1141 1142 pmap_initialized = 1; 1143 1144 } 1145 1146 /* 1147 * How much virtual space does the kernel get? 1148 */ 1149 void 1150 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1151 { 1152 /* 1153 * For now, reserve one segment (minus some overhead) for kernel 1154 * virtual memory 1155 */ 1156 *start = VM_MIN_KERNEL_ADDRESS; 1157 *end = VM_MAX_KERNEL_ADDRESS; 1158 } 1159 1160 /* 1161 * Allocate, initialize, and return a new physical map. 1162 */ 1163 pmap_t 1164 pmap_create(void) 1165 { 1166 pmap_t pm; 1167 1168 pm = pool_get(&pmap_pool, PR_WAITOK); 1169 memset((void *)pm, 0, sizeof *pm); 1170 pmap_pinit(pm); 1171 1172 DPRINTFN(CREATE,("pmap_create: pm %p:\n" 1173 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1174 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1175 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1176 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1177 pm, 1178 pm->pm_sr[0], pm->pm_sr[1], 1179 pm->pm_sr[2], pm->pm_sr[3], 1180 pm->pm_sr[4], pm->pm_sr[5], 1181 pm->pm_sr[6], pm->pm_sr[7], 1182 pm->pm_sr[8], pm->pm_sr[9], 1183 pm->pm_sr[10], pm->pm_sr[11], 1184 pm->pm_sr[12], pm->pm_sr[13], 1185 pm->pm_sr[14], pm->pm_sr[15])); 1186 return pm; 1187 } 1188 1189 /* 1190 * Initialize a preallocated and zeroed pmap structure. 1191 */ 1192 void 1193 pmap_pinit(pmap_t pm) 1194 { 1195 register_t entropy = MFTB(); 1196 register_t mask; 1197 int i; 1198 1199 /* 1200 * Allocate some segment registers for this pmap. 1201 */ 1202 pm->pm_refs = 1; 1203 PMAP_LOCK(); 1204 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1205 static register_t pmap_vsidcontext; 1206 register_t hash; 1207 unsigned int n; 1208 1209 /* Create a new value by multiplying by a prime adding in 1210 * entropy from the timebase register. This is to make the 1211 * VSID more random so that the PT Hash function collides 1212 * less often. (note that the prime causes gcc to do shifts 1213 * instead of a multiply) 1214 */ 1215 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1216 hash = pmap_vsidcontext & (NPMAPS - 1); 1217 if (hash == 0) { /* 0 is special, avoid it */ 1218 entropy += 0xbadf00d; 1219 continue; 1220 } 1221 n = hash >> 5; 1222 mask = 1L << (hash & (VSID_NBPW-1)); 1223 hash = pmap_vsidcontext; 1224 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1225 /* anything free in this bucket? */ 1226 if (~pmap_vsid_bitmap[n] == 0) { 1227 entropy = hash ^ (hash >> 16); 1228 continue; 1229 } 1230 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1231 mask = 1L << i; 1232 hash &= ~(VSID_NBPW-1); 1233 hash |= i; 1234 } 1235 hash &= PTE_VSID >> PTE_VSID_SHFT; 1236 pmap_vsid_bitmap[n] |= mask; 1237 pm->pm_vsid = hash; 1238 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1239 for (i = 0; i < 16; i++) 1240 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1241 SR_NOEXEC; 1242 #endif 1243 PMAP_UNLOCK(); 1244 return; 1245 } 1246 PMAP_UNLOCK(); 1247 panic("pmap_pinit: out of segments"); 1248 } 1249 1250 /* 1251 * Add a reference to the given pmap. 1252 */ 1253 void 1254 pmap_reference(pmap_t pm) 1255 { 1256 atomic_inc_uint(&pm->pm_refs); 1257 } 1258 1259 /* 1260 * Retire the given pmap from service. 1261 * Should only be called if the map contains no valid mappings. 1262 */ 1263 void 1264 pmap_destroy(pmap_t pm) 1265 { 1266 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1267 pmap_release(pm); 1268 pool_put(&pmap_pool, pm); 1269 } 1270 } 1271 1272 /* 1273 * Release any resources held by the given physical map. 1274 * Called when a pmap initialized by pmap_pinit is being released. 1275 */ 1276 void 1277 pmap_release(pmap_t pm) 1278 { 1279 int idx, mask; 1280 1281 KASSERT(pm->pm_stats.resident_count == 0); 1282 KASSERT(pm->pm_stats.wired_count == 0); 1283 1284 PMAP_LOCK(); 1285 if (pm->pm_sr[0] == 0) 1286 panic("pmap_release"); 1287 idx = pm->pm_vsid & (NPMAPS-1); 1288 mask = 1 << (idx % VSID_NBPW); 1289 idx /= VSID_NBPW; 1290 1291 KASSERT(pmap_vsid_bitmap[idx] & mask); 1292 pmap_vsid_bitmap[idx] &= ~mask; 1293 PMAP_UNLOCK(); 1294 } 1295 1296 /* 1297 * Copy the range specified by src_addr/len 1298 * from the source map to the range dst_addr/len 1299 * in the destination map. 1300 * 1301 * This routine is only advisory and need not do anything. 1302 */ 1303 void 1304 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1305 vsize_t len, vaddr_t src_addr) 1306 { 1307 PMAPCOUNT(copies); 1308 } 1309 1310 /* 1311 * Require that all active physical maps contain no 1312 * incorrect entries NOW. 1313 */ 1314 void 1315 pmap_update(struct pmap *pmap) 1316 { 1317 PMAPCOUNT(updates); 1318 TLBSYNC(); 1319 } 1320 1321 /* 1322 * Garbage collects the physical map system for 1323 * pages which are no longer used. 1324 * Success need not be guaranteed -- that is, there 1325 * may well be pages which are not referenced, but 1326 * others may be collected. 1327 * Called by the pageout daemon when pages are scarce. 1328 */ 1329 void 1330 pmap_collect(pmap_t pm) 1331 { 1332 PMAPCOUNT(collects); 1333 } 1334 1335 static inline int 1336 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1337 { 1338 int pteidx; 1339 /* 1340 * We can find the actual pte entry without searching by 1341 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1342 * and by noticing the HID bit. 1343 */ 1344 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1345 if (pvo->pvo_pte.pte_hi & PTE_HID) 1346 pteidx ^= pmap_pteg_mask * 8; 1347 return pteidx; 1348 } 1349 1350 volatile struct pte * 1351 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1352 { 1353 volatile struct pte *pt; 1354 1355 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1356 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1357 return NULL; 1358 #endif 1359 1360 /* 1361 * If we haven't been supplied the ptegidx, calculate it. 1362 */ 1363 if (pteidx == -1) { 1364 int ptegidx; 1365 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1366 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1367 } 1368 1369 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1370 1371 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1372 return pt; 1373 #else 1374 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1375 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1376 "pvo but no valid pte index", pvo); 1377 } 1378 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1379 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1380 "pvo but no valid pte", pvo); 1381 } 1382 1383 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1384 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1385 #if defined(DEBUG) || defined(PMAPCHECK) 1386 pmap_pte_print(pt); 1387 #endif 1388 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1389 "pmap_pteg_table %p but invalid in pvo", 1390 pvo, pt); 1391 } 1392 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1393 #if defined(DEBUG) || defined(PMAPCHECK) 1394 pmap_pte_print(pt); 1395 #endif 1396 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1397 "not match pte %p in pmap_pteg_table", 1398 pvo, pt); 1399 } 1400 return pt; 1401 } 1402 1403 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1404 #if defined(DEBUG) || defined(PMAPCHECK) 1405 pmap_pte_print(pt); 1406 #endif 1407 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1408 "pmap_pteg_table but valid in pvo", pvo, pt); 1409 } 1410 return NULL; 1411 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1412 } 1413 1414 struct pvo_entry * 1415 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1416 { 1417 struct pvo_entry *pvo; 1418 int ptegidx; 1419 1420 va &= ~ADDR_POFF; 1421 ptegidx = va_to_pteg(pm, va); 1422 1423 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1424 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1425 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1426 panic("pmap_pvo_find_va: invalid pvo %p on " 1427 "list %#x (%p)", pvo, ptegidx, 1428 &pmap_pvo_table[ptegidx]); 1429 #endif 1430 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1431 if (pteidx_p) 1432 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1433 return pvo; 1434 } 1435 } 1436 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1437 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1438 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1439 return NULL; 1440 } 1441 1442 #if defined(DEBUG) || defined(PMAPCHECK) 1443 void 1444 pmap_pvo_check(const struct pvo_entry *pvo) 1445 { 1446 struct pvo_head *pvo_head; 1447 struct pvo_entry *pvo0; 1448 volatile struct pte *pt; 1449 int failed = 0; 1450 1451 PMAP_LOCK(); 1452 1453 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1454 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1455 1456 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1457 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1458 pvo, pvo->pvo_pmap); 1459 failed = 1; 1460 } 1461 1462 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1463 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1464 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1465 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1466 failed = 1; 1467 } 1468 1469 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1470 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1471 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1472 pvo, LIST_NEXT(pvo, pvo_vlink)); 1473 failed = 1; 1474 } 1475 1476 if (PVO_MANAGED_P(pvo)) { 1477 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1478 } else { 1479 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1480 printf("pmap_pvo_check: pvo %p: non kernel address " 1481 "on kernel unmanaged list\n", pvo); 1482 failed = 1; 1483 } 1484 pvo_head = &pmap_pvo_kunmanaged; 1485 } 1486 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1487 if (pvo0 == pvo) 1488 break; 1489 } 1490 if (pvo0 == NULL) { 1491 printf("pmap_pvo_check: pvo %p: not present " 1492 "on its vlist head %p\n", pvo, pvo_head); 1493 failed = 1; 1494 } 1495 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1496 printf("pmap_pvo_check: pvo %p: not present " 1497 "on its olist head\n", pvo); 1498 failed = 1; 1499 } 1500 pt = pmap_pvo_to_pte(pvo, -1); 1501 if (pt == NULL) { 1502 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1503 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1504 "no PTE\n", pvo); 1505 failed = 1; 1506 } 1507 } else { 1508 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1509 (uintptr_t) pt >= 1510 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1511 printf("pmap_pvo_check: pvo %p: pte %p not in " 1512 "pteg table\n", pvo, pt); 1513 failed = 1; 1514 } 1515 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1516 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1517 "no PTE\n", pvo); 1518 failed = 1; 1519 } 1520 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1521 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1522 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1523 pvo->pvo_pte.pte_hi, 1524 pt->pte_hi); 1525 failed = 1; 1526 } 1527 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1528 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1529 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1530 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1531 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1532 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1533 failed = 1; 1534 } 1535 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1536 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1537 " doesn't not match PVO's VA %#" _PRIxva "\n", 1538 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1539 failed = 1; 1540 } 1541 if (failed) 1542 pmap_pte_print(pt); 1543 } 1544 if (failed) 1545 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1546 pvo->pvo_pmap); 1547 1548 PMAP_UNLOCK(); 1549 } 1550 #endif /* DEBUG || PMAPCHECK */ 1551 1552 /* 1553 * Search the PVO table looking for a non-wired entry. 1554 * If we find one, remove it and return it. 1555 */ 1556 1557 struct pvo_entry * 1558 pmap_pvo_reclaim(struct pmap *pm) 1559 { 1560 struct pvo_tqhead *pvoh; 1561 struct pvo_entry *pvo; 1562 uint32_t idx, endidx; 1563 1564 endidx = pmap_pvo_reclaim_nextidx; 1565 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1566 idx = (idx + 1) & pmap_pteg_mask) { 1567 pvoh = &pmap_pvo_table[idx]; 1568 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1569 if (!PVO_WIRED_P(pvo)) { 1570 pmap_pvo_remove(pvo, -1, NULL); 1571 pmap_pvo_reclaim_nextidx = idx; 1572 PMAPCOUNT(pvos_reclaimed); 1573 return pvo; 1574 } 1575 } 1576 } 1577 return NULL; 1578 } 1579 1580 /* 1581 * This returns whether this is the first mapping of a page. 1582 */ 1583 int 1584 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1585 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1586 { 1587 struct pvo_entry *pvo; 1588 struct pvo_tqhead *pvoh; 1589 register_t msr; 1590 int ptegidx; 1591 int i; 1592 int poolflags = PR_NOWAIT; 1593 1594 /* 1595 * Compute the PTE Group index. 1596 */ 1597 va &= ~ADDR_POFF; 1598 ptegidx = va_to_pteg(pm, va); 1599 1600 msr = pmap_interrupts_off(); 1601 1602 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1603 if (pmap_pvo_remove_depth > 0) 1604 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1605 if (++pmap_pvo_enter_depth > 1) 1606 panic("pmap_pvo_enter: called recursively!"); 1607 #endif 1608 1609 /* 1610 * Remove any existing mapping for this page. Reuse the 1611 * pvo entry if there a mapping. 1612 */ 1613 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1614 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1615 #ifdef DEBUG 1616 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1617 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1618 ~(PTE_REF|PTE_CHG)) == 0 && 1619 va < VM_MIN_KERNEL_ADDRESS) { 1620 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n", 1621 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1622 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n", 1623 pvo->pvo_pte.pte_hi, 1624 pm->pm_sr[va >> ADDR_SR_SHFT]); 1625 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1626 #ifdef DDBX 1627 Debugger(); 1628 #endif 1629 } 1630 #endif 1631 PMAPCOUNT(mappings_replaced); 1632 pmap_pvo_remove(pvo, -1, NULL); 1633 break; 1634 } 1635 } 1636 1637 /* 1638 * If we aren't overwriting an mapping, try to allocate 1639 */ 1640 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1641 --pmap_pvo_enter_depth; 1642 #endif 1643 pmap_interrupts_restore(msr); 1644 if (pvo) { 1645 pmap_pvo_free(pvo); 1646 } 1647 pvo = pool_get(pl, poolflags); 1648 1649 #ifdef DEBUG 1650 /* 1651 * Exercise pmap_pvo_reclaim() a little. 1652 */ 1653 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1654 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1655 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1656 pool_put(pl, pvo); 1657 pvo = NULL; 1658 } 1659 #endif 1660 1661 msr = pmap_interrupts_off(); 1662 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1663 ++pmap_pvo_enter_depth; 1664 #endif 1665 if (pvo == NULL) { 1666 pvo = pmap_pvo_reclaim(pm); 1667 if (pvo == NULL) { 1668 if ((flags & PMAP_CANFAIL) == 0) 1669 panic("pmap_pvo_enter: failed"); 1670 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1671 pmap_pvo_enter_depth--; 1672 #endif 1673 PMAPCOUNT(pvos_failed); 1674 pmap_interrupts_restore(msr); 1675 return ENOMEM; 1676 } 1677 } 1678 1679 pvo->pvo_vaddr = va; 1680 pvo->pvo_pmap = pm; 1681 pvo->pvo_vaddr &= ~ADDR_POFF; 1682 if (flags & VM_PROT_EXECUTE) { 1683 PMAPCOUNT(exec_mappings); 1684 pvo_set_exec(pvo); 1685 } 1686 if (flags & PMAP_WIRED) 1687 pvo->pvo_vaddr |= PVO_WIRED; 1688 if (pvo_head != &pmap_pvo_kunmanaged) { 1689 pvo->pvo_vaddr |= PVO_MANAGED; 1690 PMAPCOUNT(mappings); 1691 } else { 1692 PMAPCOUNT(kernel_mappings); 1693 } 1694 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1695 1696 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1697 if (PVO_WIRED_P(pvo)) 1698 pvo->pvo_pmap->pm_stats.wired_count++; 1699 pvo->pvo_pmap->pm_stats.resident_count++; 1700 #if defined(DEBUG) 1701 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1702 DPRINTFN(PVOENTER, 1703 ("pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1704 pvo, pm, va, pa)); 1705 #endif 1706 1707 /* 1708 * We hope this succeeds but it isn't required. 1709 */ 1710 pvoh = &pmap_pvo_table[ptegidx]; 1711 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1712 if (i >= 0) { 1713 PVO_PTEGIDX_SET(pvo, i); 1714 PVO_WHERE(pvo, ENTER_INSERT); 1715 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1716 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1717 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1718 1719 } else { 1720 /* 1721 * Since we didn't have room for this entry (which makes it 1722 * and evicted entry), place it at the head of the list. 1723 */ 1724 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1725 PMAPCOUNT(ptes_evicted); 1726 pm->pm_evictions++; 1727 /* 1728 * If this is a kernel page, make sure it's active. 1729 */ 1730 if (pm == pmap_kernel()) { 1731 i = pmap_pte_spill(pm, va, false); 1732 KASSERT(i); 1733 } 1734 } 1735 PMAP_PVO_CHECK(pvo); /* sanity check */ 1736 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1737 pmap_pvo_enter_depth--; 1738 #endif 1739 pmap_interrupts_restore(msr); 1740 return 0; 1741 } 1742 1743 static void 1744 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1745 { 1746 volatile struct pte *pt; 1747 int ptegidx; 1748 1749 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1750 if (++pmap_pvo_remove_depth > 1) 1751 panic("pmap_pvo_remove: called recursively!"); 1752 #endif 1753 1754 /* 1755 * If we haven't been supplied the ptegidx, calculate it. 1756 */ 1757 if (pteidx == -1) { 1758 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1759 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1760 } else { 1761 ptegidx = pteidx >> 3; 1762 if (pvo->pvo_pte.pte_hi & PTE_HID) 1763 ptegidx ^= pmap_pteg_mask; 1764 } 1765 PMAP_PVO_CHECK(pvo); /* sanity check */ 1766 1767 /* 1768 * If there is an active pte entry, we need to deactivate it 1769 * (and save the ref & chg bits). 1770 */ 1771 pt = pmap_pvo_to_pte(pvo, pteidx); 1772 if (pt != NULL) { 1773 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1774 PVO_WHERE(pvo, REMOVE); 1775 PVO_PTEGIDX_CLR(pvo); 1776 PMAPCOUNT(ptes_removed); 1777 } else { 1778 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1779 pvo->pvo_pmap->pm_evictions--; 1780 } 1781 1782 /* 1783 * Account for executable mappings. 1784 */ 1785 if (PVO_EXECUTABLE_P(pvo)) 1786 pvo_clear_exec(pvo); 1787 1788 /* 1789 * Update our statistics. 1790 */ 1791 pvo->pvo_pmap->pm_stats.resident_count--; 1792 if (PVO_WIRED_P(pvo)) 1793 pvo->pvo_pmap->pm_stats.wired_count--; 1794 1795 /* 1796 * Save the REF/CHG bits into their cache if the page is managed. 1797 */ 1798 if (PVO_MANAGED_P(pvo)) { 1799 register_t ptelo = pvo->pvo_pte.pte_lo; 1800 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1801 1802 if (pg != NULL) { 1803 /* 1804 * If this page was changed and it is mapped exec, 1805 * invalidate it. 1806 */ 1807 if ((ptelo & PTE_CHG) && 1808 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1809 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1810 if (LIST_EMPTY(pvoh)) { 1811 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1812 "%#" _PRIxpa ": clear-exec]\n", 1813 VM_PAGE_TO_PHYS(pg))); 1814 pmap_attr_clear(pg, PTE_EXEC); 1815 PMAPCOUNT(exec_uncached_pvo_remove); 1816 } else { 1817 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1818 "%#" _PRIxpa ": syncicache]\n", 1819 VM_PAGE_TO_PHYS(pg))); 1820 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1821 PAGE_SIZE); 1822 PMAPCOUNT(exec_synced_pvo_remove); 1823 } 1824 } 1825 1826 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1827 } 1828 PMAPCOUNT(unmappings); 1829 } else { 1830 PMAPCOUNT(kernel_unmappings); 1831 } 1832 1833 /* 1834 * Remove the PVO from its lists and return it to the pool. 1835 */ 1836 LIST_REMOVE(pvo, pvo_vlink); 1837 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1838 if (pvol) { 1839 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1840 } 1841 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1842 pmap_pvo_remove_depth--; 1843 #endif 1844 } 1845 1846 void 1847 pmap_pvo_free(struct pvo_entry *pvo) 1848 { 1849 1850 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1851 } 1852 1853 void 1854 pmap_pvo_free_list(struct pvo_head *pvol) 1855 { 1856 struct pvo_entry *pvo, *npvo; 1857 1858 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1859 npvo = LIST_NEXT(pvo, pvo_vlink); 1860 LIST_REMOVE(pvo, pvo_vlink); 1861 pmap_pvo_free(pvo); 1862 } 1863 } 1864 1865 /* 1866 * Mark a mapping as executable. 1867 * If this is the first executable mapping in the segment, 1868 * clear the noexec flag. 1869 */ 1870 static void 1871 pvo_set_exec(struct pvo_entry *pvo) 1872 { 1873 struct pmap *pm = pvo->pvo_pmap; 1874 1875 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1876 return; 1877 } 1878 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1879 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1880 { 1881 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1882 if (pm->pm_exec[sr]++ == 0) { 1883 pm->pm_sr[sr] &= ~SR_NOEXEC; 1884 } 1885 } 1886 #endif 1887 } 1888 1889 /* 1890 * Mark a mapping as non-executable. 1891 * If this was the last executable mapping in the segment, 1892 * set the noexec flag. 1893 */ 1894 static void 1895 pvo_clear_exec(struct pvo_entry *pvo) 1896 { 1897 struct pmap *pm = pvo->pvo_pmap; 1898 1899 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1900 return; 1901 } 1902 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1903 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1904 { 1905 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1906 if (--pm->pm_exec[sr] == 0) { 1907 pm->pm_sr[sr] |= SR_NOEXEC; 1908 } 1909 } 1910 #endif 1911 } 1912 1913 /* 1914 * Insert physical page at pa into the given pmap at virtual address va. 1915 */ 1916 int 1917 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags) 1918 { 1919 struct mem_region *mp; 1920 struct pvo_head *pvo_head; 1921 struct vm_page *pg; 1922 struct pool *pl; 1923 register_t pte_lo; 1924 int error; 1925 u_int pvo_flags; 1926 u_int was_exec = 0; 1927 1928 PMAP_LOCK(); 1929 1930 if (__predict_false(!pmap_initialized)) { 1931 pvo_head = &pmap_pvo_kunmanaged; 1932 pl = &pmap_upvo_pool; 1933 pvo_flags = 0; 1934 pg = NULL; 1935 was_exec = PTE_EXEC; 1936 } else { 1937 pvo_head = pa_to_pvoh(pa, &pg); 1938 pl = &pmap_mpvo_pool; 1939 pvo_flags = PVO_MANAGED; 1940 } 1941 1942 DPRINTFN(ENTER, 1943 ("pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1944 pm, va, pa, prot, flags)); 1945 1946 /* 1947 * If this is a managed page, and it's the first reference to the 1948 * page clear the execness of the page. Otherwise fetch the execness. 1949 */ 1950 if (pg != NULL) 1951 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1952 1953 DPRINTFN(ENTER, (" was_exec=%d", was_exec)); 1954 1955 /* 1956 * Assume the page is cache inhibited and access is guarded unless 1957 * it's in our available memory array. If it is in the memory array, 1958 * asssume it's in memory coherent memory. 1959 */ 1960 pte_lo = PTE_IG; 1961 if ((flags & PMAP_NC) == 0) { 1962 for (mp = mem; mp->size; mp++) { 1963 if (pa >= mp->start && pa < mp->start + mp->size) { 1964 pte_lo = PTE_M; 1965 break; 1966 } 1967 } 1968 } 1969 1970 if (prot & VM_PROT_WRITE) 1971 pte_lo |= PTE_BW; 1972 else 1973 pte_lo |= PTE_BR; 1974 1975 /* 1976 * If this was in response to a fault, "pre-fault" the PTE's 1977 * changed/referenced bit appropriately. 1978 */ 1979 if (flags & VM_PROT_WRITE) 1980 pte_lo |= PTE_CHG; 1981 if (flags & VM_PROT_ALL) 1982 pte_lo |= PTE_REF; 1983 1984 /* 1985 * We need to know if this page can be executable 1986 */ 1987 flags |= (prot & VM_PROT_EXECUTE); 1988 1989 /* 1990 * Record mapping for later back-translation and pte spilling. 1991 * This will overwrite any existing mapping. 1992 */ 1993 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1994 1995 /* 1996 * Flush the real page from the instruction cache if this page is 1997 * mapped executable and cacheable and has not been flushed since 1998 * the last time it was modified. 1999 */ 2000 if (error == 0 && 2001 (flags & VM_PROT_EXECUTE) && 2002 (pte_lo & PTE_I) == 0 && 2003 was_exec == 0) { 2004 DPRINTFN(ENTER, (" syncicache")); 2005 PMAPCOUNT(exec_synced); 2006 pmap_syncicache(pa, PAGE_SIZE); 2007 if (pg != NULL) { 2008 pmap_attr_save(pg, PTE_EXEC); 2009 PMAPCOUNT(exec_cached); 2010 #if defined(DEBUG) || defined(PMAPDEBUG) 2011 if (pmapdebug & PMAPDEBUG_ENTER) 2012 printf(" marked-as-exec"); 2013 else if (pmapdebug & PMAPDEBUG_EXEC) 2014 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 2015 VM_PAGE_TO_PHYS(pg)); 2016 2017 #endif 2018 } 2019 } 2020 2021 DPRINTFN(ENTER, (": error=%d\n", error)); 2022 2023 PMAP_UNLOCK(); 2024 2025 return error; 2026 } 2027 2028 void 2029 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2030 { 2031 struct mem_region *mp; 2032 register_t pte_lo; 2033 int error; 2034 2035 #if defined (PMAP_OEA64_BRIDGE) 2036 if (va < VM_MIN_KERNEL_ADDRESS) 2037 panic("pmap_kenter_pa: attempt to enter " 2038 "non-kernel address %#" _PRIxva "!", va); 2039 #endif 2040 2041 DPRINTFN(KENTER, 2042 ("pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot)); 2043 2044 PMAP_LOCK(); 2045 2046 /* 2047 * Assume the page is cache inhibited and access is guarded unless 2048 * it's in our available memory array. If it is in the memory array, 2049 * asssume it's in memory coherent memory. 2050 */ 2051 pte_lo = PTE_IG; 2052 if ((prot & PMAP_NC) == 0) { 2053 for (mp = mem; mp->size; mp++) { 2054 if (pa >= mp->start && pa < mp->start + mp->size) { 2055 pte_lo = PTE_M; 2056 break; 2057 } 2058 } 2059 } 2060 2061 if (prot & VM_PROT_WRITE) 2062 pte_lo |= PTE_BW; 2063 else 2064 pte_lo |= PTE_BR; 2065 2066 /* 2067 * We don't care about REF/CHG on PVOs on the unmanaged list. 2068 */ 2069 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2070 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2071 2072 if (error != 0) 2073 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2074 va, pa, error); 2075 2076 PMAP_UNLOCK(); 2077 } 2078 2079 void 2080 pmap_kremove(vaddr_t va, vsize_t len) 2081 { 2082 if (va < VM_MIN_KERNEL_ADDRESS) 2083 panic("pmap_kremove: attempt to remove " 2084 "non-kernel address %#" _PRIxva "!", va); 2085 2086 DPRINTFN(KREMOVE,("pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len)); 2087 pmap_remove(pmap_kernel(), va, va + len); 2088 } 2089 2090 /* 2091 * Remove the given range of mapping entries. 2092 */ 2093 void 2094 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2095 { 2096 struct pvo_head pvol; 2097 struct pvo_entry *pvo; 2098 register_t msr; 2099 int pteidx; 2100 2101 PMAP_LOCK(); 2102 LIST_INIT(&pvol); 2103 msr = pmap_interrupts_off(); 2104 for (; va < endva; va += PAGE_SIZE) { 2105 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2106 if (pvo != NULL) { 2107 pmap_pvo_remove(pvo, pteidx, &pvol); 2108 } 2109 } 2110 pmap_interrupts_restore(msr); 2111 pmap_pvo_free_list(&pvol); 2112 PMAP_UNLOCK(); 2113 } 2114 2115 /* 2116 * Get the physical page address for the given pmap/virtual address. 2117 */ 2118 bool 2119 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2120 { 2121 struct pvo_entry *pvo; 2122 register_t msr; 2123 2124 PMAP_LOCK(); 2125 2126 /* 2127 * If this is a kernel pmap lookup, also check the battable 2128 * and if we get a hit, translate the VA to a PA using the 2129 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2130 * that will wrap back to 0. 2131 */ 2132 if (pm == pmap_kernel() && 2133 (va < VM_MIN_KERNEL_ADDRESS || 2134 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2135 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2136 #if defined (PMAP_OEA) 2137 #ifdef PPC_OEA601 2138 if ((MFPVR() >> 16) == MPC601) { 2139 register_t batu = battable[va >> 23].batu; 2140 register_t batl = battable[va >> 23].batl; 2141 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2142 if (BAT601_VALID_P(batl) && 2143 BAT601_VA_MATCH_P(batu, batl, va)) { 2144 register_t mask = 2145 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2146 if (pap) 2147 *pap = (batl & mask) | (va & ~mask); 2148 PMAP_UNLOCK(); 2149 return true; 2150 } else if (SR601_VALID_P(sr) && 2151 SR601_PA_MATCH_P(sr, va)) { 2152 if (pap) 2153 *pap = va; 2154 PMAP_UNLOCK(); 2155 return true; 2156 } 2157 } else 2158 #endif /* PPC_OEA601 */ 2159 { 2160 register_t batu = battable[va >> ADDR_SR_SHFT].batu; 2161 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2162 register_t batl = 2163 battable[va >> ADDR_SR_SHFT].batl; 2164 register_t mask = 2165 (~(batu & BAT_BL) << 15) & ~0x1ffffL; 2166 if (pap) 2167 *pap = (batl & mask) | (va & ~mask); 2168 PMAP_UNLOCK(); 2169 return true; 2170 } 2171 } 2172 return false; 2173 #elif defined (PMAP_OEA64_BRIDGE) 2174 if (va >= SEGMENT_LENGTH) 2175 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2176 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2177 else { 2178 if (pap) 2179 *pap = va; 2180 PMAP_UNLOCK(); 2181 return true; 2182 } 2183 #elif defined (PMAP_OEA64) 2184 #error PPC_OEA64 not supported 2185 #endif /* PPC_OEA */ 2186 } 2187 2188 msr = pmap_interrupts_off(); 2189 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2190 if (pvo != NULL) { 2191 PMAP_PVO_CHECK(pvo); /* sanity check */ 2192 if (pap) 2193 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2194 | (va & ADDR_POFF); 2195 } 2196 pmap_interrupts_restore(msr); 2197 PMAP_UNLOCK(); 2198 return pvo != NULL; 2199 } 2200 2201 /* 2202 * Lower the protection on the specified range of this pmap. 2203 */ 2204 void 2205 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2206 { 2207 struct pvo_entry *pvo; 2208 volatile struct pte *pt; 2209 register_t msr; 2210 int pteidx; 2211 2212 /* 2213 * Since this routine only downgrades protection, we should 2214 * always be called with at least one bit not set. 2215 */ 2216 KASSERT(prot != VM_PROT_ALL); 2217 2218 /* 2219 * If there is no protection, this is equivalent to 2220 * remove the pmap from the pmap. 2221 */ 2222 if ((prot & VM_PROT_READ) == 0) { 2223 pmap_remove(pm, va, endva); 2224 return; 2225 } 2226 2227 PMAP_LOCK(); 2228 2229 msr = pmap_interrupts_off(); 2230 for (; va < endva; va += PAGE_SIZE) { 2231 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2232 if (pvo == NULL) 2233 continue; 2234 PMAP_PVO_CHECK(pvo); /* sanity check */ 2235 2236 /* 2237 * Revoke executable if asked to do so. 2238 */ 2239 if ((prot & VM_PROT_EXECUTE) == 0) 2240 pvo_clear_exec(pvo); 2241 2242 #if 0 2243 /* 2244 * If the page is already read-only, no change 2245 * needs to be made. 2246 */ 2247 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2248 continue; 2249 #endif 2250 /* 2251 * Grab the PTE pointer before we diddle with 2252 * the cached PTE copy. 2253 */ 2254 pt = pmap_pvo_to_pte(pvo, pteidx); 2255 /* 2256 * Change the protection of the page. 2257 */ 2258 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2259 pvo->pvo_pte.pte_lo |= PTE_BR; 2260 2261 /* 2262 * If the PVO is in the page table, update 2263 * that pte at well. 2264 */ 2265 if (pt != NULL) { 2266 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2267 PVO_WHERE(pvo, PMAP_PROTECT); 2268 PMAPCOUNT(ptes_changed); 2269 } 2270 2271 PMAP_PVO_CHECK(pvo); /* sanity check */ 2272 } 2273 pmap_interrupts_restore(msr); 2274 PMAP_UNLOCK(); 2275 } 2276 2277 void 2278 pmap_unwire(pmap_t pm, vaddr_t va) 2279 { 2280 struct pvo_entry *pvo; 2281 register_t msr; 2282 2283 PMAP_LOCK(); 2284 msr = pmap_interrupts_off(); 2285 pvo = pmap_pvo_find_va(pm, va, NULL); 2286 if (pvo != NULL) { 2287 if (PVO_WIRED_P(pvo)) { 2288 pvo->pvo_vaddr &= ~PVO_WIRED; 2289 pm->pm_stats.wired_count--; 2290 } 2291 PMAP_PVO_CHECK(pvo); /* sanity check */ 2292 } 2293 pmap_interrupts_restore(msr); 2294 PMAP_UNLOCK(); 2295 } 2296 2297 /* 2298 * Lower the protection on the specified physical page. 2299 */ 2300 void 2301 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2302 { 2303 struct pvo_head *pvo_head, pvol; 2304 struct pvo_entry *pvo, *next_pvo; 2305 volatile struct pte *pt; 2306 register_t msr; 2307 2308 PMAP_LOCK(); 2309 2310 KASSERT(prot != VM_PROT_ALL); 2311 LIST_INIT(&pvol); 2312 msr = pmap_interrupts_off(); 2313 2314 /* 2315 * When UVM reuses a page, it does a pmap_page_protect with 2316 * VM_PROT_NONE. At that point, we can clear the exec flag 2317 * since we know the page will have different contents. 2318 */ 2319 if ((prot & VM_PROT_READ) == 0) { 2320 DPRINTFN(EXEC, ("[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2321 VM_PAGE_TO_PHYS(pg))); 2322 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2323 PMAPCOUNT(exec_uncached_page_protect); 2324 pmap_attr_clear(pg, PTE_EXEC); 2325 } 2326 } 2327 2328 pvo_head = vm_page_to_pvoh(pg); 2329 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2330 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2331 PMAP_PVO_CHECK(pvo); /* sanity check */ 2332 2333 /* 2334 * Downgrading to no mapping at all, we just remove the entry. 2335 */ 2336 if ((prot & VM_PROT_READ) == 0) { 2337 pmap_pvo_remove(pvo, -1, &pvol); 2338 continue; 2339 } 2340 2341 /* 2342 * If EXEC permission is being revoked, just clear the 2343 * flag in the PVO. 2344 */ 2345 if ((prot & VM_PROT_EXECUTE) == 0) 2346 pvo_clear_exec(pvo); 2347 2348 /* 2349 * If this entry is already RO, don't diddle with the 2350 * page table. 2351 */ 2352 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2353 PMAP_PVO_CHECK(pvo); 2354 continue; 2355 } 2356 2357 /* 2358 * Grab the PTE before the we diddle the bits so 2359 * pvo_to_pte can verify the pte contents are as 2360 * expected. 2361 */ 2362 pt = pmap_pvo_to_pte(pvo, -1); 2363 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2364 pvo->pvo_pte.pte_lo |= PTE_BR; 2365 if (pt != NULL) { 2366 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2367 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2368 PMAPCOUNT(ptes_changed); 2369 } 2370 PMAP_PVO_CHECK(pvo); /* sanity check */ 2371 } 2372 pmap_interrupts_restore(msr); 2373 pmap_pvo_free_list(&pvol); 2374 2375 PMAP_UNLOCK(); 2376 } 2377 2378 /* 2379 * Activate the address space for the specified process. If the process 2380 * is the current process, load the new MMU context. 2381 */ 2382 void 2383 pmap_activate(struct lwp *l) 2384 { 2385 struct pcb *pcb = &l->l_addr->u_pcb; 2386 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2387 2388 DPRINTFN(ACTIVATE, 2389 ("pmap_activate: lwp %p (curlwp %p)\n", l, curlwp)); 2390 2391 /* 2392 * XXX Normally performed in cpu_fork(). 2393 */ 2394 pcb->pcb_pm = pmap; 2395 2396 /* 2397 * In theory, the SR registers need only be valid on return 2398 * to user space wait to do them there. 2399 */ 2400 if (l == curlwp) { 2401 /* Store pointer to new current pmap. */ 2402 curpm = pmap; 2403 } 2404 } 2405 2406 /* 2407 * Deactivate the specified process's address space. 2408 */ 2409 void 2410 pmap_deactivate(struct lwp *l) 2411 { 2412 } 2413 2414 bool 2415 pmap_query_bit(struct vm_page *pg, int ptebit) 2416 { 2417 struct pvo_entry *pvo; 2418 volatile struct pte *pt; 2419 register_t msr; 2420 2421 PMAP_LOCK(); 2422 2423 if (pmap_attr_fetch(pg) & ptebit) { 2424 PMAP_UNLOCK(); 2425 return true; 2426 } 2427 2428 msr = pmap_interrupts_off(); 2429 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2430 PMAP_PVO_CHECK(pvo); /* sanity check */ 2431 /* 2432 * See if we saved the bit off. If so cache, it and return 2433 * success. 2434 */ 2435 if (pvo->pvo_pte.pte_lo & ptebit) { 2436 pmap_attr_save(pg, ptebit); 2437 PMAP_PVO_CHECK(pvo); /* sanity check */ 2438 pmap_interrupts_restore(msr); 2439 PMAP_UNLOCK(); 2440 return true; 2441 } 2442 } 2443 /* 2444 * No luck, now go thru the hard part of looking at the ptes 2445 * themselves. Sync so any pending REF/CHG bits are flushed 2446 * to the PTEs. 2447 */ 2448 SYNC(); 2449 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2450 PMAP_PVO_CHECK(pvo); /* sanity check */ 2451 /* 2452 * See if this pvo have a valid PTE. If so, fetch the 2453 * REF/CHG bits from the valid PTE. If the appropriate 2454 * ptebit is set, cache, it and return success. 2455 */ 2456 pt = pmap_pvo_to_pte(pvo, -1); 2457 if (pt != NULL) { 2458 pmap_pte_synch(pt, &pvo->pvo_pte); 2459 if (pvo->pvo_pte.pte_lo & ptebit) { 2460 pmap_attr_save(pg, ptebit); 2461 PMAP_PVO_CHECK(pvo); /* sanity check */ 2462 pmap_interrupts_restore(msr); 2463 PMAP_UNLOCK(); 2464 return true; 2465 } 2466 } 2467 } 2468 pmap_interrupts_restore(msr); 2469 PMAP_UNLOCK(); 2470 return false; 2471 } 2472 2473 bool 2474 pmap_clear_bit(struct vm_page *pg, int ptebit) 2475 { 2476 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2477 struct pvo_entry *pvo; 2478 volatile struct pte *pt; 2479 register_t msr; 2480 int rv = 0; 2481 2482 PMAP_LOCK(); 2483 msr = pmap_interrupts_off(); 2484 2485 /* 2486 * Fetch the cache value 2487 */ 2488 rv |= pmap_attr_fetch(pg); 2489 2490 /* 2491 * Clear the cached value. 2492 */ 2493 pmap_attr_clear(pg, ptebit); 2494 2495 /* 2496 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2497 * can reset the right ones). Note that since the pvo entries and 2498 * list heads are accessed via BAT0 and are never placed in the 2499 * page table, we don't have to worry about further accesses setting 2500 * the REF/CHG bits. 2501 */ 2502 SYNC(); 2503 2504 /* 2505 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2506 * valid PTE. If so, clear the ptebit from the valid PTE. 2507 */ 2508 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2509 PMAP_PVO_CHECK(pvo); /* sanity check */ 2510 pt = pmap_pvo_to_pte(pvo, -1); 2511 if (pt != NULL) { 2512 /* 2513 * Only sync the PTE if the bit we are looking 2514 * for is not already set. 2515 */ 2516 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2517 pmap_pte_synch(pt, &pvo->pvo_pte); 2518 /* 2519 * If the bit we are looking for was already set, 2520 * clear that bit in the pte. 2521 */ 2522 if (pvo->pvo_pte.pte_lo & ptebit) 2523 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2524 } 2525 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2526 pvo->pvo_pte.pte_lo &= ~ptebit; 2527 PMAP_PVO_CHECK(pvo); /* sanity check */ 2528 } 2529 pmap_interrupts_restore(msr); 2530 2531 /* 2532 * If we are clearing the modify bit and this page was marked EXEC 2533 * and the user of the page thinks the page was modified, then we 2534 * need to clean it from the icache if it's mapped or clear the EXEC 2535 * bit if it's not mapped. The page itself might not have the CHG 2536 * bit set if the modification was done via DMA to the page. 2537 */ 2538 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2539 if (LIST_EMPTY(pvoh)) { 2540 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2541 VM_PAGE_TO_PHYS(pg))); 2542 pmap_attr_clear(pg, PTE_EXEC); 2543 PMAPCOUNT(exec_uncached_clear_modify); 2544 } else { 2545 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2546 VM_PAGE_TO_PHYS(pg))); 2547 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2548 PMAPCOUNT(exec_synced_clear_modify); 2549 } 2550 } 2551 PMAP_UNLOCK(); 2552 return (rv & ptebit) != 0; 2553 } 2554 2555 void 2556 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2557 { 2558 struct pvo_entry *pvo; 2559 size_t offset = va & ADDR_POFF; 2560 int s; 2561 2562 PMAP_LOCK(); 2563 s = splvm(); 2564 while (len > 0) { 2565 size_t seglen = PAGE_SIZE - offset; 2566 if (seglen > len) 2567 seglen = len; 2568 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2569 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2570 pmap_syncicache( 2571 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2572 PMAP_PVO_CHECK(pvo); 2573 } 2574 va += seglen; 2575 len -= seglen; 2576 offset = 0; 2577 } 2578 splx(s); 2579 PMAP_UNLOCK(); 2580 } 2581 2582 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2583 void 2584 pmap_pte_print(volatile struct pte *pt) 2585 { 2586 printf("PTE %p: ", pt); 2587 2588 #if defined(PMAP_OEA) 2589 /* High word: */ 2590 printf("%#" _PRIxpte ": [", pt->pte_hi); 2591 #else 2592 printf("%#" _PRIxpte ": [", pt->pte_hi); 2593 #endif /* PMAP_OEA */ 2594 2595 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2596 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2597 2598 printf("%#" _PRIxpte " %#" _PRIxpte "", 2599 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2600 pt->pte_hi & PTE_API); 2601 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2602 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2603 #else 2604 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2605 #endif /* PMAP_OEA */ 2606 2607 /* Low word: */ 2608 #if defined (PMAP_OEA) 2609 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2610 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2611 #else 2612 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2613 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2614 #endif 2615 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2616 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2617 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2618 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2619 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2620 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2621 switch (pt->pte_lo & PTE_PP) { 2622 case PTE_BR: printf("br]\n"); break; 2623 case PTE_BW: printf("bw]\n"); break; 2624 case PTE_SO: printf("so]\n"); break; 2625 case PTE_SW: printf("sw]\n"); break; 2626 } 2627 } 2628 #endif 2629 2630 #if defined(DDB) 2631 void 2632 pmap_pteg_check(void) 2633 { 2634 volatile struct pte *pt; 2635 int i; 2636 int ptegidx; 2637 u_int p_valid = 0; 2638 u_int s_valid = 0; 2639 u_int invalid = 0; 2640 2641 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2642 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2643 if (pt->pte_hi & PTE_VALID) { 2644 if (pt->pte_hi & PTE_HID) 2645 s_valid++; 2646 else 2647 { 2648 p_valid++; 2649 } 2650 } else 2651 invalid++; 2652 } 2653 } 2654 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2655 p_valid, p_valid, s_valid, s_valid, 2656 invalid, invalid); 2657 } 2658 2659 void 2660 pmap_print_mmuregs(void) 2661 { 2662 int i; 2663 u_int cpuvers; 2664 #ifndef PMAP_OEA64 2665 vaddr_t addr; 2666 register_t soft_sr[16]; 2667 #endif 2668 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2669 struct bat soft_ibat[4]; 2670 struct bat soft_dbat[4]; 2671 #endif 2672 paddr_t sdr1; 2673 2674 cpuvers = MFPVR() >> 16; 2675 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2676 #ifndef PMAP_OEA64 2677 addr = 0; 2678 for (i = 0; i < 16; i++) { 2679 soft_sr[i] = MFSRIN(addr); 2680 addr += (1 << ADDR_SR_SHFT); 2681 } 2682 #endif 2683 2684 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2685 /* read iBAT (601: uBAT) registers */ 2686 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2687 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2688 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2689 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2690 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2691 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2692 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2693 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2694 2695 2696 if (cpuvers != MPC601) { 2697 /* read dBAT registers */ 2698 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2699 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2700 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2701 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2702 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2703 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2704 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2705 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2706 } 2707 #endif 2708 2709 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2710 #ifndef PMAP_OEA64 2711 printf("SR[]:\t"); 2712 for (i = 0; i < 4; i++) 2713 printf("0x%08lx, ", soft_sr[i]); 2714 printf("\n\t"); 2715 for ( ; i < 8; i++) 2716 printf("0x%08lx, ", soft_sr[i]); 2717 printf("\n\t"); 2718 for ( ; i < 12; i++) 2719 printf("0x%08lx, ", soft_sr[i]); 2720 printf("\n\t"); 2721 for ( ; i < 16; i++) 2722 printf("0x%08lx, ", soft_sr[i]); 2723 printf("\n"); 2724 #endif 2725 2726 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2727 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2728 for (i = 0; i < 4; i++) { 2729 printf("0x%08lx 0x%08lx, ", 2730 soft_ibat[i].batu, soft_ibat[i].batl); 2731 if (i == 1) 2732 printf("\n\t"); 2733 } 2734 if (cpuvers != MPC601) { 2735 printf("\ndBAT[]:\t"); 2736 for (i = 0; i < 4; i++) { 2737 printf("0x%08lx 0x%08lx, ", 2738 soft_dbat[i].batu, soft_dbat[i].batl); 2739 if (i == 1) 2740 printf("\n\t"); 2741 } 2742 } 2743 printf("\n"); 2744 #endif /* PMAP_OEA... */ 2745 } 2746 2747 void 2748 pmap_print_pte(pmap_t pm, vaddr_t va) 2749 { 2750 struct pvo_entry *pvo; 2751 volatile struct pte *pt; 2752 int pteidx; 2753 2754 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2755 if (pvo != NULL) { 2756 pt = pmap_pvo_to_pte(pvo, pteidx); 2757 if (pt != NULL) { 2758 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2759 va, pt, 2760 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2761 pt->pte_hi, pt->pte_lo); 2762 } else { 2763 printf("No valid PTE found\n"); 2764 } 2765 } else { 2766 printf("Address not in pmap\n"); 2767 } 2768 } 2769 2770 void 2771 pmap_pteg_dist(void) 2772 { 2773 struct pvo_entry *pvo; 2774 int ptegidx; 2775 int depth; 2776 int max_depth = 0; 2777 unsigned int depths[64]; 2778 2779 memset(depths, 0, sizeof(depths)); 2780 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2781 depth = 0; 2782 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2783 depth++; 2784 } 2785 if (depth > max_depth) 2786 max_depth = depth; 2787 if (depth > 63) 2788 depth = 63; 2789 depths[depth]++; 2790 } 2791 2792 for (depth = 0; depth < 64; depth++) { 2793 printf(" [%2d]: %8u", depth, depths[depth]); 2794 if ((depth & 3) == 3) 2795 printf("\n"); 2796 if (depth == max_depth) 2797 break; 2798 } 2799 if ((depth & 3) != 3) 2800 printf("\n"); 2801 printf("Max depth found was %d\n", max_depth); 2802 } 2803 #endif /* DEBUG */ 2804 2805 #if defined(PMAPCHECK) || defined(DEBUG) 2806 void 2807 pmap_pvo_verify(void) 2808 { 2809 int ptegidx; 2810 int s; 2811 2812 s = splvm(); 2813 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2814 struct pvo_entry *pvo; 2815 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2816 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2817 panic("pmap_pvo_verify: invalid pvo %p " 2818 "on list %#x", pvo, ptegidx); 2819 pmap_pvo_check(pvo); 2820 } 2821 } 2822 splx(s); 2823 } 2824 #endif /* PMAPCHECK */ 2825 2826 2827 void * 2828 pmap_pool_ualloc(struct pool *pp, int flags) 2829 { 2830 struct pvo_page *pvop; 2831 2832 if (uvm.page_init_done != true) { 2833 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2834 } 2835 2836 PMAP_LOCK(); 2837 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2838 if (pvop != NULL) { 2839 pmap_upvop_free--; 2840 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2841 PMAP_UNLOCK(); 2842 return pvop; 2843 } 2844 PMAP_UNLOCK(); 2845 return pmap_pool_malloc(pp, flags); 2846 } 2847 2848 void * 2849 pmap_pool_malloc(struct pool *pp, int flags) 2850 { 2851 struct pvo_page *pvop; 2852 struct vm_page *pg; 2853 2854 PMAP_LOCK(); 2855 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2856 if (pvop != NULL) { 2857 pmap_mpvop_free--; 2858 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2859 PMAP_UNLOCK(); 2860 return pvop; 2861 } 2862 PMAP_UNLOCK(); 2863 again: 2864 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2865 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2866 if (__predict_false(pg == NULL)) { 2867 if (flags & PR_WAITOK) { 2868 uvm_wait("plpg"); 2869 goto again; 2870 } else { 2871 return (0); 2872 } 2873 } 2874 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2875 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2876 } 2877 2878 void 2879 pmap_pool_ufree(struct pool *pp, void *va) 2880 { 2881 struct pvo_page *pvop; 2882 #if 0 2883 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2884 pmap_pool_mfree(va, size, tag); 2885 return; 2886 } 2887 #endif 2888 PMAP_LOCK(); 2889 pvop = va; 2890 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2891 pmap_upvop_free++; 2892 if (pmap_upvop_free > pmap_upvop_maxfree) 2893 pmap_upvop_maxfree = pmap_upvop_free; 2894 PMAP_UNLOCK(); 2895 } 2896 2897 void 2898 pmap_pool_mfree(struct pool *pp, void *va) 2899 { 2900 struct pvo_page *pvop; 2901 2902 PMAP_LOCK(); 2903 pvop = va; 2904 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2905 pmap_mpvop_free++; 2906 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2907 pmap_mpvop_maxfree = pmap_mpvop_free; 2908 PMAP_UNLOCK(); 2909 #if 0 2910 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2911 #endif 2912 } 2913 2914 /* 2915 * This routine in bootstraping to steal to-be-managed memory (which will 2916 * then be unmanaged). We use it to grab from the first 256MB for our 2917 * pmap needs and above 256MB for other stuff. 2918 */ 2919 vaddr_t 2920 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2921 { 2922 vsize_t size; 2923 vaddr_t va; 2924 paddr_t pa = 0; 2925 int npgs, bank; 2926 struct vm_physseg *ps; 2927 2928 if (uvm.page_init_done == true) 2929 panic("pmap_steal_memory: called _after_ bootstrap"); 2930 2931 *vstartp = VM_MIN_KERNEL_ADDRESS; 2932 *vendp = VM_MAX_KERNEL_ADDRESS; 2933 2934 size = round_page(vsize); 2935 npgs = atop(size); 2936 2937 /* 2938 * PA 0 will never be among those given to UVM so we can use it 2939 * to indicate we couldn't steal any memory. 2940 */ 2941 for (ps = vm_physmem, bank = 0; bank < vm_nphysseg; bank++, ps++) { 2942 if (ps->free_list == VM_FREELIST_FIRST256 && 2943 ps->avail_end - ps->avail_start >= npgs) { 2944 pa = ptoa(ps->avail_start); 2945 break; 2946 } 2947 } 2948 2949 if (pa == 0) 2950 panic("pmap_steal_memory: no approriate memory to steal!"); 2951 2952 ps->avail_start += npgs; 2953 ps->start += npgs; 2954 2955 /* 2956 * If we've used up all the pages in the segment, remove it and 2957 * compact the list. 2958 */ 2959 if (ps->avail_start == ps->end) { 2960 /* 2961 * If this was the last one, then a very bad thing has occurred 2962 */ 2963 if (--vm_nphysseg == 0) 2964 panic("pmap_steal_memory: out of memory!"); 2965 2966 printf("pmap_steal_memory: consumed bank %d\n", bank); 2967 for (; bank < vm_nphysseg; bank++, ps++) { 2968 ps[0] = ps[1]; 2969 } 2970 } 2971 2972 va = (vaddr_t) pa; 2973 memset((void *) va, 0, size); 2974 pmap_pages_stolen += npgs; 2975 #ifdef DEBUG 2976 if (pmapdebug && npgs > 1) { 2977 u_int cnt = 0; 2978 for (bank = 0, ps = vm_physmem; bank < vm_nphysseg; bank++, ps++) 2979 cnt += ps->avail_end - ps->avail_start; 2980 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2981 npgs, pmap_pages_stolen, cnt); 2982 } 2983 #endif 2984 2985 return va; 2986 } 2987 2988 /* 2989 * Find a chuck of memory with right size and alignment. 2990 */ 2991 paddr_t 2992 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2993 { 2994 struct mem_region *mp; 2995 paddr_t s, e; 2996 int i, j; 2997 2998 size = round_page(size); 2999 3000 DPRINTFN(BOOT, 3001 ("pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 3002 size, alignment, at_end)); 3003 3004 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 3005 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 3006 alignment); 3007 3008 if (at_end) { 3009 if (alignment != PAGE_SIZE) 3010 panic("pmap_boot_find_memory: invalid ending " 3011 "alignment %#" _PRIxpa, alignment); 3012 3013 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 3014 s = mp->start + mp->size - size; 3015 if (s >= mp->start && mp->size >= size) { 3016 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3017 DPRINTFN(BOOT, 3018 ("pmap_boot_find_memory: b-avail[%d] start " 3019 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3020 mp->start, mp->size)); 3021 mp->size -= size; 3022 DPRINTFN(BOOT, 3023 ("pmap_boot_find_memory: a-avail[%d] start " 3024 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3025 mp->start, mp->size)); 3026 return s; 3027 } 3028 } 3029 panic("pmap_boot_find_memory: no available memory"); 3030 } 3031 3032 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3033 s = (mp->start + alignment - 1) & ~(alignment-1); 3034 e = s + size; 3035 3036 /* 3037 * Is the calculated region entirely within the region? 3038 */ 3039 if (s < mp->start || e > mp->start + mp->size) 3040 continue; 3041 3042 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3043 if (s == mp->start) { 3044 /* 3045 * If the block starts at the beginning of region, 3046 * adjust the size & start. (the region may now be 3047 * zero in length) 3048 */ 3049 DPRINTFN(BOOT, 3050 ("pmap_boot_find_memory: b-avail[%d] start " 3051 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3052 mp->start += size; 3053 mp->size -= size; 3054 DPRINTFN(BOOT, 3055 ("pmap_boot_find_memory: a-avail[%d] start " 3056 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3057 } else if (e == mp->start + mp->size) { 3058 /* 3059 * If the block starts at the beginning of region, 3060 * adjust only the size. 3061 */ 3062 DPRINTFN(BOOT, 3063 ("pmap_boot_find_memory: b-avail[%d] start " 3064 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3065 mp->size -= size; 3066 DPRINTFN(BOOT, 3067 ("pmap_boot_find_memory: a-avail[%d] start " 3068 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3069 } else { 3070 /* 3071 * Block is in the middle of the region, so we 3072 * have to split it in two. 3073 */ 3074 for (j = avail_cnt; j > i + 1; j--) { 3075 avail[j] = avail[j-1]; 3076 } 3077 DPRINTFN(BOOT, 3078 ("pmap_boot_find_memory: b-avail[%d] start " 3079 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3080 mp[1].start = e; 3081 mp[1].size = mp[0].start + mp[0].size - e; 3082 mp[0].size = s - mp[0].start; 3083 avail_cnt++; 3084 for (; i < avail_cnt; i++) { 3085 DPRINTFN(BOOT, 3086 ("pmap_boot_find_memory: a-avail[%d] " 3087 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3088 avail[i].start, avail[i].size)); 3089 } 3090 } 3091 KASSERT(s == (uintptr_t) s); 3092 return s; 3093 } 3094 panic("pmap_boot_find_memory: not enough memory for " 3095 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3096 } 3097 3098 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3099 #if defined (PMAP_OEA64_BRIDGE) 3100 int 3101 pmap_setup_segment0_map(int use_large_pages, ...) 3102 { 3103 vaddr_t va; 3104 3105 register_t pte_lo = 0x0; 3106 int ptegidx = 0, i = 0; 3107 struct pte pte; 3108 va_list ap; 3109 3110 /* Coherent + Supervisor RW, no user access */ 3111 pte_lo = PTE_M; 3112 3113 /* XXXSL 3114 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3115 * these have to take priority. 3116 */ 3117 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3118 ptegidx = va_to_pteg(pmap_kernel(), va); 3119 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3120 i = pmap_pte_insert(ptegidx, &pte); 3121 } 3122 3123 va_start(ap, use_large_pages); 3124 while (1) { 3125 paddr_t pa; 3126 size_t size; 3127 3128 va = va_arg(ap, vaddr_t); 3129 3130 if (va == 0) 3131 break; 3132 3133 pa = va_arg(ap, paddr_t); 3134 size = va_arg(ap, size_t); 3135 3136 for (; va < (va + size); va += 0x1000, pa += 0x1000) { 3137 #if 0 3138 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3139 #endif 3140 ptegidx = va_to_pteg(pmap_kernel(), va); 3141 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3142 i = pmap_pte_insert(ptegidx, &pte); 3143 } 3144 } 3145 3146 TLBSYNC(); 3147 SYNC(); 3148 return (0); 3149 } 3150 #endif /* PMAP_OEA64_BRIDGE */ 3151 3152 /* 3153 * This is not part of the defined PMAP interface and is specific to the 3154 * PowerPC architecture. This is called during initppc, before the system 3155 * is really initialized. 3156 */ 3157 void 3158 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3159 { 3160 struct mem_region *mp, tmp; 3161 paddr_t s, e; 3162 psize_t size; 3163 int i, j; 3164 3165 /* 3166 * Get memory. 3167 */ 3168 mem_regions(&mem, &avail); 3169 #if defined(DEBUG) 3170 if (pmapdebug & PMAPDEBUG_BOOT) { 3171 printf("pmap_bootstrap: memory configuration:\n"); 3172 for (mp = mem; mp->size; mp++) { 3173 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3174 mp->start, mp->size); 3175 } 3176 for (mp = avail; mp->size; mp++) { 3177 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3178 mp->start, mp->size); 3179 } 3180 } 3181 #endif 3182 3183 /* 3184 * Find out how much physical memory we have and in how many chunks. 3185 */ 3186 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3187 if (mp->start >= pmap_memlimit) 3188 continue; 3189 if (mp->start + mp->size > pmap_memlimit) { 3190 size = pmap_memlimit - mp->start; 3191 physmem += btoc(size); 3192 } else { 3193 physmem += btoc(mp->size); 3194 } 3195 mem_cnt++; 3196 } 3197 3198 /* 3199 * Count the number of available entries. 3200 */ 3201 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3202 avail_cnt++; 3203 3204 /* 3205 * Page align all regions. 3206 */ 3207 kernelstart = trunc_page(kernelstart); 3208 kernelend = round_page(kernelend); 3209 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3210 s = round_page(mp->start); 3211 mp->size -= (s - mp->start); 3212 mp->size = trunc_page(mp->size); 3213 mp->start = s; 3214 e = mp->start + mp->size; 3215 3216 DPRINTFN(BOOT, 3217 ("pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3218 i, mp->start, mp->size)); 3219 3220 /* 3221 * Don't allow the end to run beyond our artificial limit 3222 */ 3223 if (e > pmap_memlimit) 3224 e = pmap_memlimit; 3225 3226 /* 3227 * Is this region empty or strange? skip it. 3228 */ 3229 if (e <= s) { 3230 mp->start = 0; 3231 mp->size = 0; 3232 continue; 3233 } 3234 3235 /* 3236 * Does this overlap the beginning of kernel? 3237 * Does extend past the end of the kernel? 3238 */ 3239 else if (s < kernelstart && e > kernelstart) { 3240 if (e > kernelend) { 3241 avail[avail_cnt].start = kernelend; 3242 avail[avail_cnt].size = e - kernelend; 3243 avail_cnt++; 3244 } 3245 mp->size = kernelstart - s; 3246 } 3247 /* 3248 * Check whether this region overlaps the end of the kernel. 3249 */ 3250 else if (s < kernelend && e > kernelend) { 3251 mp->start = kernelend; 3252 mp->size = e - kernelend; 3253 } 3254 /* 3255 * Look whether this regions is completely inside the kernel. 3256 * Nuke it if it does. 3257 */ 3258 else if (s >= kernelstart && e <= kernelend) { 3259 mp->start = 0; 3260 mp->size = 0; 3261 } 3262 /* 3263 * If the user imposed a memory limit, enforce it. 3264 */ 3265 else if (s >= pmap_memlimit) { 3266 mp->start = -PAGE_SIZE; /* let's know why */ 3267 mp->size = 0; 3268 } 3269 else { 3270 mp->start = s; 3271 mp->size = e - s; 3272 } 3273 DPRINTFN(BOOT, 3274 ("pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3275 i, mp->start, mp->size)); 3276 } 3277 3278 /* 3279 * Move (and uncount) all the null return to the end. 3280 */ 3281 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3282 if (mp->size == 0) { 3283 tmp = avail[i]; 3284 avail[i] = avail[--avail_cnt]; 3285 avail[avail_cnt] = avail[i]; 3286 } 3287 } 3288 3289 /* 3290 * (Bubble)sort them into asecnding order. 3291 */ 3292 for (i = 0; i < avail_cnt; i++) { 3293 for (j = i + 1; j < avail_cnt; j++) { 3294 if (avail[i].start > avail[j].start) { 3295 tmp = avail[i]; 3296 avail[i] = avail[j]; 3297 avail[j] = tmp; 3298 } 3299 } 3300 } 3301 3302 /* 3303 * Make sure they don't overlap. 3304 */ 3305 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3306 if (mp[0].start + mp[0].size > mp[1].start) { 3307 mp[0].size = mp[1].start - mp[0].start; 3308 } 3309 DPRINTFN(BOOT, 3310 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3311 i, mp->start, mp->size)); 3312 } 3313 DPRINTFN(BOOT, 3314 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3315 i, mp->start, mp->size)); 3316 3317 #ifdef PTEGCOUNT 3318 pmap_pteg_cnt = PTEGCOUNT; 3319 #else /* PTEGCOUNT */ 3320 3321 pmap_pteg_cnt = 0x1000; 3322 3323 while (pmap_pteg_cnt < physmem) 3324 pmap_pteg_cnt <<= 1; 3325 3326 pmap_pteg_cnt >>= 1; 3327 #endif /* PTEGCOUNT */ 3328 3329 #ifdef DEBUG 3330 DPRINTFN(BOOT, 3331 ("pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt)); 3332 #endif 3333 3334 /* 3335 * Find suitably aligned memory for PTEG hash table. 3336 */ 3337 size = pmap_pteg_cnt * sizeof(struct pteg); 3338 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3339 3340 #ifdef DEBUG 3341 DPRINTFN(BOOT, 3342 ("PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table)); 3343 #endif 3344 3345 3346 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3347 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3348 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3349 pmap_pteg_table, size); 3350 #endif 3351 3352 memset(__UNVOLATILE(pmap_pteg_table), 0, 3353 pmap_pteg_cnt * sizeof(struct pteg)); 3354 pmap_pteg_mask = pmap_pteg_cnt - 1; 3355 3356 /* 3357 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3358 * with pages. So we just steal them before giving them to UVM. 3359 */ 3360 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3361 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3362 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3363 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3364 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3365 pmap_pvo_table, size); 3366 #endif 3367 3368 for (i = 0; i < pmap_pteg_cnt; i++) 3369 TAILQ_INIT(&pmap_pvo_table[i]); 3370 3371 #ifndef MSGBUFADDR 3372 /* 3373 * Allocate msgbuf in high memory. 3374 */ 3375 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3376 #endif 3377 3378 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3379 paddr_t pfstart = atop(mp->start); 3380 paddr_t pfend = atop(mp->start + mp->size); 3381 if (mp->size == 0) 3382 continue; 3383 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3384 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3385 VM_FREELIST_FIRST256); 3386 } else if (mp->start >= SEGMENT_LENGTH) { 3387 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3388 VM_FREELIST_DEFAULT); 3389 } else { 3390 pfend = atop(SEGMENT_LENGTH); 3391 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3392 VM_FREELIST_FIRST256); 3393 pfstart = atop(SEGMENT_LENGTH); 3394 pfend = atop(mp->start + mp->size); 3395 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3396 VM_FREELIST_DEFAULT); 3397 } 3398 } 3399 3400 /* 3401 * Make sure kernel vsid is allocated as well as VSID 0. 3402 */ 3403 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3404 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3405 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3406 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3407 pmap_vsid_bitmap[0] |= 1; 3408 3409 /* 3410 * Initialize kernel pmap and hardware. 3411 */ 3412 3413 /* PMAP_OEA64_BRIDGE does support these instructions */ 3414 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3415 for (i = 0; i < 16; i++) { 3416 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3417 __asm volatile ("mtsrin %0,%1" 3418 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3419 } 3420 3421 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3422 __asm volatile ("mtsr %0,%1" 3423 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3424 #ifdef KERNEL2_SR 3425 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3426 __asm volatile ("mtsr %0,%1" 3427 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3428 #endif 3429 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3430 #if defined (PMAP_OEA) 3431 for (i = 0; i < 16; i++) { 3432 if (iosrtable[i] & SR601_T) { 3433 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3434 __asm volatile ("mtsrin %0,%1" 3435 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3436 } 3437 } 3438 __asm volatile ("sync; mtsdr1 %0; isync" 3439 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3440 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3441 __asm __volatile ("sync; mtsdr1 %0; isync" 3442 :: "r"((uintptr_t)pmap_pteg_table | (32 - cntlzw(pmap_pteg_mask >> 11)))); 3443 #endif 3444 tlbia(); 3445 3446 #ifdef ALTIVEC 3447 pmap_use_altivec = cpu_altivec; 3448 #endif 3449 3450 #ifdef DEBUG 3451 if (pmapdebug & PMAPDEBUG_BOOT) { 3452 u_int cnt; 3453 int bank; 3454 char pbuf[9]; 3455 for (cnt = 0, bank = 0; bank < vm_nphysseg; bank++) { 3456 cnt += vm_physmem[bank].avail_end - vm_physmem[bank].avail_start; 3457 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3458 bank, 3459 ptoa(vm_physmem[bank].avail_start), 3460 ptoa(vm_physmem[bank].avail_end), 3461 ptoa(vm_physmem[bank].avail_end - vm_physmem[bank].avail_start)); 3462 } 3463 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3464 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3465 pbuf, cnt); 3466 } 3467 #endif 3468 3469 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3470 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3471 &pmap_pool_uallocator, IPL_NONE); 3472 3473 pool_setlowat(&pmap_upvo_pool, 252); 3474 3475 pool_init(&pmap_pool, sizeof(struct pmap), 3476 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3477 IPL_NONE); 3478 3479 #if defined(PMAP_NEED_MAPKERNEL) || 1 3480 { 3481 struct pmap *pm = pmap_kernel(); 3482 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3483 extern int etext[], kernel_text[]; 3484 vaddr_t va, va_etext = (paddr_t) etext; 3485 #endif 3486 paddr_t pa, pa_end; 3487 register_t sr; 3488 struct pte pt; 3489 unsigned int ptegidx; 3490 int bank; 3491 3492 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3493 pm->pm_sr[0] = sr; 3494 3495 for (bank = 0; bank < vm_nphysseg; bank++) { 3496 pa_end = ptoa(vm_physmem[bank].avail_end); 3497 pa = ptoa(vm_physmem[bank].avail_start); 3498 for (; pa < pa_end; pa += PAGE_SIZE) { 3499 ptegidx = va_to_pteg(pm, pa); 3500 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3501 pmap_pte_insert(ptegidx, &pt); 3502 } 3503 } 3504 3505 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3506 va = (vaddr_t) kernel_text; 3507 3508 for (pa = kernelstart; va < va_etext; 3509 pa += PAGE_SIZE, va += PAGE_SIZE) { 3510 ptegidx = va_to_pteg(pm, va); 3511 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3512 pmap_pte_insert(ptegidx, &pt); 3513 } 3514 3515 for (; pa < kernelend; 3516 pa += PAGE_SIZE, va += PAGE_SIZE) { 3517 ptegidx = va_to_pteg(pm, va); 3518 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3519 pmap_pte_insert(ptegidx, &pt); 3520 } 3521 3522 for (va = 0, pa = 0; va < kernelstart; 3523 pa += PAGE_SIZE, va += PAGE_SIZE) { 3524 ptegidx = va_to_pteg(pm, va); 3525 if (va < 0x3000) 3526 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3527 else 3528 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3529 pmap_pte_insert(ptegidx, &pt); 3530 } 3531 for (va = kernelend, pa = kernelend; va < SEGMENT_LENGTH; 3532 pa += PAGE_SIZE, va += PAGE_SIZE) { 3533 ptegidx = va_to_pteg(pm, va); 3534 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3535 pmap_pte_insert(ptegidx, &pt); 3536 } 3537 #endif 3538 3539 __asm volatile ("mtsrin %0,%1" 3540 :: "r"(sr), "r"(kernelstart)); 3541 } 3542 #endif 3543 } 3544
Indexes created Tue Sep 30 07:10:03 GMT 2025