pmap.c revision 1.61.12.2
1 /* $NetBSD: pmap.c,v 1.61.12.2 2011/01/17 07:45:59 matt Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 36 * Copyright (C) 1995, 1996 TooLs GmbH. 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by TooLs GmbH. 50 * 4. The name of TooLs GmbH may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 58 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 59 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 60 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 61 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 62 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.61.12.2 2011/01/17 07:45:59 matt Exp $"); 67 68 #define PMAP_NOOPNAMES 69 70 #include "opt_ppcarch.h" 71 #include "opt_altivec.h" 72 #include "opt_multiprocessor.h" 73 #include "opt_pmap.h" 74 75 #include <sys/param.h> 76 #include <sys/malloc.h> 77 #include <sys/proc.h> 78 #include <sys/user.h> 79 #include <sys/pool.h> 80 #include <sys/queue.h> 81 #include <sys/device.h> /* for evcnt */ 82 #include <sys/systm.h> 83 #include <sys/atomic.h> 84 85 #include <uvm/uvm.h> 86 87 #include <machine/pcb.h> 88 #include <machine/powerpc.h> 89 #include <powerpc/spr.h> 90 #include <powerpc/oea/spr.h> 91 #include <powerpc/oea/sr_601.h> 92 #include <powerpc/bat.h> 93 #include <powerpc/stdarg.h> 94 95 #ifdef ALTIVEC 96 int pmap_use_altivec; 97 #endif 98 99 volatile struct pteg *pmap_pteg_table; 100 unsigned int pmap_pteg_cnt; 101 unsigned int pmap_pteg_mask; 102 #ifdef PMAP_MEMLIMIT 103 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 104 #else 105 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 106 #endif 107 108 struct pmap kernel_pmap_; 109 unsigned int pmap_pages_stolen; 110 u_long pmap_pte_valid; 111 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 112 u_long pmap_pvo_enter_depth; 113 u_long pmap_pvo_remove_depth; 114 #endif 115 116 int physmem; 117 #ifndef MSGBUFADDR 118 extern paddr_t msgbuf_paddr; 119 #endif 120 121 static struct mem_region *mem, *avail; 122 static u_int mem_cnt, avail_cnt; 123 124 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 125 # define PMAP_OEA 1 126 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA64) && !defined(PPC_OEA64_BRIDGE) 127 # define PMAPNAME(name) pmap_##name 128 # endif 129 #endif 130 131 #if defined(PMAP_OEA64) 132 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64_BRIDGE) 133 # define PMAPNAME(name) pmap_##name 134 # endif 135 #endif 136 137 #if defined(PMAP_OEA64_BRIDGE) 138 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64) 139 # define PMAPNAME(name) pmap_##name 140 # endif 141 #endif 142 143 #if defined(PMAP_OEA) 144 #define _PRIxpte "lx" 145 #else 146 #define _PRIxpte PRIx64 147 #endif 148 #define _PRIxpa "lx" 149 #define _PRIxva "lx" 150 #define _PRIsr "lx" 151 152 #if defined(PMAP_EXCLUDE_DECLS) && !defined(PMAPNAME) 153 #if defined(PMAP_OEA) 154 #define PMAPNAME(name) pmap32_##name 155 #elif defined(PMAP_OEA64) 156 #define PMAPNAME(name) pmap64_##name 157 #elif defined(PMAP_OEA64_BRIDGE) 158 #define PMAPNAME(name) pmap64bridge_##name 159 #else 160 #error unknown variant for pmap 161 #endif 162 #endif /* PMAP_EXLCUDE_DECLS && !PMAPNAME */ 163 164 #if defined(PMAPNAME) 165 #define STATIC static 166 #define pmap_pte_spill PMAPNAME(pte_spill) 167 #define pmap_real_memory PMAPNAME(real_memory) 168 #define pmap_init PMAPNAME(init) 169 #define pmap_virtual_space PMAPNAME(virtual_space) 170 #define pmap_create PMAPNAME(create) 171 #define pmap_reference PMAPNAME(reference) 172 #define pmap_destroy PMAPNAME(destroy) 173 #define pmap_copy PMAPNAME(copy) 174 #define pmap_update PMAPNAME(update) 175 #define pmap_collect PMAPNAME(collect) 176 #define pmap_enter PMAPNAME(enter) 177 #define pmap_remove PMAPNAME(remove) 178 #define pmap_kenter_pa PMAPNAME(kenter_pa) 179 #define pmap_kremove PMAPNAME(kremove) 180 #define pmap_extract PMAPNAME(extract) 181 #define pmap_protect PMAPNAME(protect) 182 #define pmap_unwire PMAPNAME(unwire) 183 #define pmap_page_protect PMAPNAME(page_protect) 184 #define pmap_query_bit PMAPNAME(query_bit) 185 #define pmap_clear_bit PMAPNAME(clear_bit) 186 187 #define pmap_activate PMAPNAME(activate) 188 #define pmap_deactivate PMAPNAME(deactivate) 189 190 #define pmap_pinit PMAPNAME(pinit) 191 #define pmap_procwr PMAPNAME(procwr) 192 193 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 194 #define pmap_pte_print PMAPNAME(pte_print) 195 #define pmap_pteg_check PMAPNAME(pteg_check) 196 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 197 #define pmap_print_pte PMAPNAME(print_pte) 198 #define pmap_pteg_dist PMAPNAME(pteg_dist) 199 #endif 200 #if defined(DEBUG) || defined(PMAPCHECK) 201 #define pmap_pvo_verify PMAPNAME(pvo_verify) 202 #define pmapcheck PMAPNAME(check) 203 #endif 204 #if defined(DEBUG) || defined(PMAPDEBUG) 205 #define pmapdebug PMAPNAME(debug) 206 #endif 207 #define pmap_steal_memory PMAPNAME(steal_memory) 208 #define pmap_bootstrap PMAPNAME(bootstrap) 209 #else 210 #define STATIC /* nothing */ 211 #endif /* PMAPNAME */ 212 213 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 214 STATIC void pmap_real_memory(paddr_t *, psize_t *); 215 STATIC void pmap_init(void); 216 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 217 STATIC pmap_t pmap_create(void); 218 STATIC void pmap_reference(pmap_t); 219 STATIC void pmap_destroy(pmap_t); 220 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 221 STATIC void pmap_update(pmap_t); 222 STATIC void pmap_collect(pmap_t); 223 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, int); 224 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 225 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t); 226 STATIC void pmap_kremove(vaddr_t, vsize_t); 227 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 228 229 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 230 STATIC void pmap_unwire(pmap_t, vaddr_t); 231 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 232 STATIC bool pmap_query_bit(struct vm_page *, int); 233 STATIC bool pmap_clear_bit(struct vm_page *, int); 234 235 STATIC void pmap_activate(struct lwp *); 236 STATIC void pmap_deactivate(struct lwp *); 237 238 STATIC void pmap_pinit(pmap_t pm); 239 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 240 241 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 242 STATIC void pmap_pte_print(volatile struct pte *); 243 STATIC void pmap_pteg_check(void); 244 STATIC void pmap_print_mmuregs(void); 245 STATIC void pmap_print_pte(pmap_t, vaddr_t); 246 STATIC void pmap_pteg_dist(void); 247 #endif 248 #if defined(DEBUG) || defined(PMAPCHECK) 249 STATIC void pmap_pvo_verify(void); 250 #endif 251 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 252 STATIC void pmap_bootstrap(paddr_t, paddr_t); 253 254 #ifdef PMAPNAME 255 const struct pmap_ops PMAPNAME(ops) = { 256 .pmapop_pte_spill = pmap_pte_spill, 257 .pmapop_real_memory = pmap_real_memory, 258 .pmapop_init = pmap_init, 259 .pmapop_virtual_space = pmap_virtual_space, 260 .pmapop_create = pmap_create, 261 .pmapop_reference = pmap_reference, 262 .pmapop_destroy = pmap_destroy, 263 .pmapop_copy = pmap_copy, 264 .pmapop_update = pmap_update, 265 .pmapop_collect = pmap_collect, 266 .pmapop_enter = pmap_enter, 267 .pmapop_remove = pmap_remove, 268 .pmapop_kenter_pa = pmap_kenter_pa, 269 .pmapop_kremove = pmap_kremove, 270 .pmapop_extract = pmap_extract, 271 .pmapop_protect = pmap_protect, 272 .pmapop_unwire = pmap_unwire, 273 .pmapop_page_protect = pmap_page_protect, 274 .pmapop_query_bit = pmap_query_bit, 275 .pmapop_clear_bit = pmap_clear_bit, 276 .pmapop_activate = pmap_activate, 277 .pmapop_deactivate = pmap_deactivate, 278 .pmapop_pinit = pmap_pinit, 279 .pmapop_procwr = pmap_procwr, 280 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 281 .pmapop_pte_print = pmap_pte_print, 282 .pmapop_pteg_check = pmap_pteg_check, 283 .pmapop_print_mmuregs = pmap_print_mmuregs, 284 .pmapop_print_pte = pmap_print_pte, 285 .pmapop_pteg_dist = pmap_pteg_dist, 286 #else 287 .pmapop_pte_print = NULL, 288 .pmapop_pteg_check = NULL, 289 .pmapop_print_mmuregs = NULL, 290 .pmapop_print_pte = NULL, 291 .pmapop_pteg_dist = NULL, 292 #endif 293 #if defined(DEBUG) || defined(PMAPCHECK) 294 .pmapop_pvo_verify = pmap_pvo_verify, 295 #else 296 .pmapop_pvo_verify = NULL, 297 #endif 298 .pmapop_steal_memory = pmap_steal_memory, 299 .pmapop_bootstrap = pmap_bootstrap, 300 }; 301 #endif /* !PMAPNAME */ 302 303 /* 304 * The following structure is aligned to 32 bytes 305 */ 306 struct pvo_entry { 307 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 308 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 309 struct pte pvo_pte; /* Prebuilt PTE */ 310 pmap_t pvo_pmap; /* ptr to owning pmap */ 311 vaddr_t pvo_vaddr; /* VA of entry */ 312 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 313 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 314 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 315 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 316 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 317 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 318 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 319 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 320 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 321 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 322 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 323 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 324 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 325 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 326 #define PVO_REMOVE 6 /* PVO has been removed */ 327 #define PVO_WHERE_MASK 15 328 #define PVO_WHERE_SHFT 8 329 } __attribute__ ((aligned (32))); 330 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 331 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 332 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 333 #define PVO_PTEGIDX_CLR(pvo) \ 334 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 335 #define PVO_PTEGIDX_SET(pvo,i) \ 336 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 337 #define PVO_WHERE(pvo,w) \ 338 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 339 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 340 341 TAILQ_HEAD(pvo_tqhead, pvo_entry); 342 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 343 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 344 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 345 346 struct pool pmap_pool; /* pool for pmap structures */ 347 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 348 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 349 350 /* 351 * We keep a cache of unmanaged pages to be used for pvo entries for 352 * unmanaged pages. 353 */ 354 struct pvo_page { 355 SIMPLEQ_ENTRY(pvo_page) pvop_link; 356 }; 357 SIMPLEQ_HEAD(pvop_head, pvo_page); 358 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 359 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 360 u_long pmap_upvop_free; 361 u_long pmap_upvop_maxfree; 362 u_long pmap_mpvop_free; 363 u_long pmap_mpvop_maxfree; 364 365 static void *pmap_pool_ualloc(struct pool *, int); 366 static void *pmap_pool_malloc(struct pool *, int); 367 368 static void pmap_pool_ufree(struct pool *, void *); 369 static void pmap_pool_mfree(struct pool *, void *); 370 371 static struct pool_allocator pmap_pool_mallocator = { 372 .pa_alloc = pmap_pool_malloc, 373 .pa_free = pmap_pool_mfree, 374 .pa_pagesz = 0, 375 }; 376 377 static struct pool_allocator pmap_pool_uallocator = { 378 .pa_alloc = pmap_pool_ualloc, 379 .pa_free = pmap_pool_ufree, 380 .pa_pagesz = 0, 381 }; 382 383 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 384 void pmap_pte_print(volatile struct pte *); 385 void pmap_pteg_check(void); 386 void pmap_pteg_dist(void); 387 void pmap_print_pte(pmap_t, vaddr_t); 388 void pmap_print_mmuregs(void); 389 #endif 390 391 #if defined(DEBUG) || defined(PMAPCHECK) 392 #ifdef PMAPCHECK 393 int pmapcheck = 1; 394 #else 395 int pmapcheck = 0; 396 #endif 397 void pmap_pvo_verify(void); 398 static void pmap_pvo_check(const struct pvo_entry *); 399 #define PMAP_PVO_CHECK(pvo) \ 400 do { \ 401 if (pmapcheck) \ 402 pmap_pvo_check(pvo); \ 403 } while (0) 404 #else 405 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 406 #endif 407 static int pmap_pte_insert(int, struct pte *); 408 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 409 vaddr_t, paddr_t, register_t, int); 410 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 411 static void pmap_pvo_free(struct pvo_entry *); 412 static void pmap_pvo_free_list(struct pvo_head *); 413 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 414 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 415 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 416 static void pvo_set_exec(struct pvo_entry *); 417 static void pvo_clear_exec(struct pvo_entry *); 418 419 static void tlbia(void); 420 421 static void pmap_release(pmap_t); 422 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 423 424 static uint32_t pmap_pvo_reclaim_nextidx; 425 #ifdef DEBUG 426 static int pmap_pvo_reclaim_debugctr; 427 #endif 428 429 #define VSID_NBPW (sizeof(uint32_t) * 8) 430 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 431 432 static int pmap_initialized; 433 434 #if defined(DEBUG) || defined(PMAPDEBUG) 435 #define PMAPDEBUG_BOOT 0x0001 436 #define PMAPDEBUG_PTE 0x0002 437 #define PMAPDEBUG_EXEC 0x0008 438 #define PMAPDEBUG_PVOENTER 0x0010 439 #define PMAPDEBUG_PVOREMOVE 0x0020 440 #define PMAPDEBUG_ACTIVATE 0x0100 441 #define PMAPDEBUG_CREATE 0x0200 442 #define PMAPDEBUG_ENTER 0x1000 443 #define PMAPDEBUG_KENTER 0x2000 444 #define PMAPDEBUG_KREMOVE 0x4000 445 #define PMAPDEBUG_REMOVE 0x8000 446 447 unsigned int pmapdebug = 0; 448 449 # define DPRINTF(x) printf x 450 # define DPRINTFN(n, x) if (pmapdebug & PMAPDEBUG_ ## n) printf x 451 #else 452 # define DPRINTF(x) 453 # define DPRINTFN(n, x) 454 #endif 455 456 457 #ifdef PMAPCOUNTERS 458 /* 459 * From pmap_subr.c 460 */ 461 extern struct evcnt pmap_evcnt_mappings; 462 extern struct evcnt pmap_evcnt_unmappings; 463 464 extern struct evcnt pmap_evcnt_kernel_mappings; 465 extern struct evcnt pmap_evcnt_kernel_unmappings; 466 467 extern struct evcnt pmap_evcnt_mappings_replaced; 468 469 extern struct evcnt pmap_evcnt_exec_mappings; 470 extern struct evcnt pmap_evcnt_exec_cached; 471 472 extern struct evcnt pmap_evcnt_exec_synced; 473 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 474 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 475 476 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 477 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 478 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 479 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 480 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 481 482 extern struct evcnt pmap_evcnt_updates; 483 extern struct evcnt pmap_evcnt_collects; 484 extern struct evcnt pmap_evcnt_copies; 485 486 extern struct evcnt pmap_evcnt_ptes_spilled; 487 extern struct evcnt pmap_evcnt_ptes_unspilled; 488 extern struct evcnt pmap_evcnt_ptes_evicted; 489 490 extern struct evcnt pmap_evcnt_ptes_primary[8]; 491 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 492 extern struct evcnt pmap_evcnt_ptes_removed; 493 extern struct evcnt pmap_evcnt_ptes_changed; 494 extern struct evcnt pmap_evcnt_pvos_reclaimed; 495 extern struct evcnt pmap_evcnt_pvos_failed; 496 497 extern struct evcnt pmap_evcnt_zeroed_pages; 498 extern struct evcnt pmap_evcnt_copied_pages; 499 extern struct evcnt pmap_evcnt_idlezeroed_pages; 500 501 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 502 #define PMAPCOUNT2(ev) ((ev).ev_count++) 503 #else 504 #define PMAPCOUNT(ev) ((void) 0) 505 #define PMAPCOUNT2(ev) ((void) 0) 506 #endif 507 508 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 509 510 /* XXXSL: this needs to be moved to assembler */ 511 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 512 513 #define TLBSYNC() __asm volatile("tlbsync") 514 #define SYNC() __asm volatile("sync") 515 #define EIEIO() __asm volatile("eieio") 516 #define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va)) 517 #define MFMSR() mfmsr() 518 #define MTMSR(psl) mtmsr(psl) 519 #define MFPVR() mfpvr() 520 #define MFSRIN(va) mfsrin(va) 521 #define MFTB() mfrtcltbl() 522 523 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 524 static inline register_t 525 mfsrin(vaddr_t va) 526 { 527 register_t sr; 528 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 529 return sr; 530 } 531 #endif /* PMAP_OEA*/ 532 533 #if defined (PMAP_OEA64_BRIDGE) 534 extern void mfmsr64 (register64_t *result); 535 #endif /* PMAP_OEA64_BRIDGE */ 536 537 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 538 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 539 540 static inline register_t 541 pmap_interrupts_off(void) 542 { 543 register_t msr = MFMSR(); 544 if (msr & PSL_EE) 545 MTMSR(msr & ~PSL_EE); 546 return msr; 547 } 548 549 static void 550 pmap_interrupts_restore(register_t msr) 551 { 552 if (msr & PSL_EE) 553 MTMSR(msr); 554 } 555 556 static inline u_int32_t 557 mfrtcltbl(void) 558 { 559 #ifdef PPC_OEA601 560 if ((MFPVR() >> 16) == MPC601) 561 return (mfrtcl() >> 7); 562 else 563 #endif 564 return (mftbl()); 565 } 566 567 /* 568 * These small routines may have to be replaced, 569 * if/when we support processors other that the 604. 570 */ 571 572 void 573 tlbia(void) 574 { 575 char *i; 576 577 SYNC(); 578 #if defined(PMAP_OEA) 579 /* 580 * Why not use "tlbia"? Because not all processors implement it. 581 * 582 * This needs to be a per-CPU callback to do the appropriate thing 583 * for the CPU. XXX 584 */ 585 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 586 TLBIE(i); 587 EIEIO(); 588 SYNC(); 589 } 590 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 591 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 592 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 593 TLBIEL(i); 594 EIEIO(); 595 SYNC(); 596 } 597 #endif 598 TLBSYNC(); 599 SYNC(); 600 } 601 602 static inline register_t 603 va_to_vsid(const struct pmap *pm, vaddr_t addr) 604 { 605 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 606 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 607 #else /* PMAP_OEA64 */ 608 #if 0 609 const struct ste *ste; 610 register_t hash; 611 int i; 612 613 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 614 615 /* 616 * Try the primary group first 617 */ 618 ste = pm->pm_stes[hash].stes; 619 for (i = 0; i < 8; i++, ste++) { 620 if (ste->ste_hi & STE_V) && 621 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 622 return ste; 623 } 624 625 /* 626 * Then the secondary group. 627 */ 628 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 629 for (i = 0; i < 8; i++, ste++) { 630 if (ste->ste_hi & STE_V) && 631 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 632 return addr; 633 } 634 635 return NULL; 636 #else 637 /* 638 * Rather than searching the STE groups for the VSID, we know 639 * how we generate that from the ESID and so do that. 640 */ 641 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 642 #endif 643 #endif /* PMAP_OEA */ 644 } 645 646 static inline register_t 647 va_to_pteg(const struct pmap *pm, vaddr_t addr) 648 { 649 register_t hash; 650 651 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 652 return hash & pmap_pteg_mask; 653 } 654 655 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 656 /* 657 * Given a PTE in the page table, calculate the VADDR that hashes to it. 658 * The only bit of magic is that the top 4 bits of the address doesn't 659 * technically exist in the PTE. But we know we reserved 4 bits of the 660 * VSID for it so that's how we get it. 661 */ 662 static vaddr_t 663 pmap_pte_to_va(volatile const struct pte *pt) 664 { 665 vaddr_t va; 666 uintptr_t ptaddr = (uintptr_t) pt; 667 668 if (pt->pte_hi & PTE_HID) 669 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 670 671 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 672 #if defined(PMAP_OEA) 673 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 674 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 675 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 676 #endif 677 va <<= ADDR_PIDX_SHFT; 678 679 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 680 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 681 682 #if defined(PMAP_OEA64) 683 /* PPC63 Bits 0-35 */ 684 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 685 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 686 /* PPC Bits 0-3 */ 687 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 688 #endif 689 690 return va; 691 } 692 #endif 693 694 static inline struct pvo_head * 695 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 696 { 697 struct vm_page *pg; 698 699 pg = PHYS_TO_VM_PAGE(pa); 700 if (pg_p != NULL) 701 *pg_p = pg; 702 if (pg == NULL) 703 return &pmap_pvo_unmanaged; 704 return &pg->mdpage.mdpg_pvoh; 705 } 706 707 static inline struct pvo_head * 708 vm_page_to_pvoh(struct vm_page *pg) 709 { 710 return &pg->mdpage.mdpg_pvoh; 711 } 712 713 714 static inline void 715 pmap_attr_clear(struct vm_page *pg, int ptebit) 716 { 717 pg->mdpage.mdpg_attrs &= ~ptebit; 718 } 719 720 static inline int 721 pmap_attr_fetch(struct vm_page *pg) 722 { 723 return pg->mdpage.mdpg_attrs; 724 } 725 726 static inline void 727 pmap_attr_save(struct vm_page *pg, int ptebit) 728 { 729 pg->mdpage.mdpg_attrs |= ptebit; 730 } 731 732 static inline int 733 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 734 { 735 if (pt->pte_hi == pvo_pt->pte_hi 736 #if 0 737 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 738 ~(PTE_REF|PTE_CHG)) == 0 739 #endif 740 ) 741 return 1; 742 return 0; 743 } 744 745 static inline void 746 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 747 { 748 /* 749 * Construct the PTE. Default to IMB initially. Valid bit 750 * only gets set when the real pte is set in memory. 751 * 752 * Note: Don't set the valid bit for correct operation of tlb update. 753 */ 754 #if defined(PMAP_OEA) 755 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 756 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 757 pt->pte_lo = pte_lo; 758 #elif defined (PMAP_OEA64_BRIDGE) 759 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 760 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 761 pt->pte_lo = (u_int64_t) pte_lo; 762 #elif defined (PMAP_OEA64) 763 #error PMAP_OEA64 not supported 764 #endif /* PMAP_OEA */ 765 } 766 767 static inline void 768 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 769 { 770 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 771 } 772 773 static inline void 774 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 775 { 776 /* 777 * As shown in Section 7.6.3.2.3 778 */ 779 pt->pte_lo &= ~ptebit; 780 TLBIE(va); 781 SYNC(); 782 EIEIO(); 783 TLBSYNC(); 784 SYNC(); 785 #ifdef MULTIPROCESSOR 786 DCBST(pt); 787 #endif 788 } 789 790 static inline void 791 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 792 { 793 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 794 if (pvo_pt->pte_hi & PTE_VALID) 795 panic("pte_set: setting an already valid pte %p", pvo_pt); 796 #endif 797 pvo_pt->pte_hi |= PTE_VALID; 798 799 /* 800 * Update the PTE as defined in section 7.6.3.1 801 * Note that the REF/CHG bits are from pvo_pt and thus should 802 * have been saved so this routine can restore them (if desired). 803 */ 804 pt->pte_lo = pvo_pt->pte_lo; 805 EIEIO(); 806 pt->pte_hi = pvo_pt->pte_hi; 807 TLBSYNC(); 808 SYNC(); 809 #ifdef MULTIPROCESSOR 810 DCBST(pt); 811 #endif 812 pmap_pte_valid++; 813 } 814 815 static inline void 816 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 817 { 818 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 819 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 820 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 821 if ((pt->pte_hi & PTE_VALID) == 0) 822 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 823 #endif 824 825 pvo_pt->pte_hi &= ~PTE_VALID; 826 /* 827 * Force the ref & chg bits back into the PTEs. 828 */ 829 SYNC(); 830 /* 831 * Invalidate the pte ... (Section 7.6.3.3) 832 */ 833 pt->pte_hi &= ~PTE_VALID; 834 SYNC(); 835 TLBIE(va); 836 SYNC(); 837 EIEIO(); 838 TLBSYNC(); 839 SYNC(); 840 /* 841 * Save the ref & chg bits ... 842 */ 843 pmap_pte_synch(pt, pvo_pt); 844 pmap_pte_valid--; 845 } 846 847 static inline void 848 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 849 { 850 /* 851 * Invalidate the PTE 852 */ 853 pmap_pte_unset(pt, pvo_pt, va); 854 pmap_pte_set(pt, pvo_pt); 855 } 856 857 /* 858 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 859 * (either primary or secondary location). 860 * 861 * Note: both the destination and source PTEs must not have PTE_VALID set. 862 */ 863 864 static int 865 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 866 { 867 volatile struct pte *pt; 868 int i; 869 870 #if defined(DEBUG) 871 DPRINTFN(PTE, ("pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 872 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo)); 873 #endif 874 /* 875 * First try primary hash. 876 */ 877 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 878 if ((pt->pte_hi & PTE_VALID) == 0) { 879 pvo_pt->pte_hi &= ~PTE_HID; 880 pmap_pte_set(pt, pvo_pt); 881 return i; 882 } 883 } 884 885 /* 886 * Now try secondary hash. 887 */ 888 ptegidx ^= pmap_pteg_mask; 889 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 890 if ((pt->pte_hi & PTE_VALID) == 0) { 891 pvo_pt->pte_hi |= PTE_HID; 892 pmap_pte_set(pt, pvo_pt); 893 return i; 894 } 895 } 896 return -1; 897 } 898 899 /* 900 * Spill handler. 901 * 902 * Tries to spill a page table entry from the overflow area. 903 * This runs in either real mode (if dealing with a exception spill) 904 * or virtual mode when dealing with manually spilling one of the 905 * kernel's pte entries. In either case, interrupts are already 906 * disabled. 907 */ 908 909 int 910 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 911 { 912 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 913 struct pvo_entry *pvo; 914 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 915 struct pvo_tqhead *pvoh, *vpvoh = NULL; 916 int ptegidx, i, j; 917 volatile struct pteg *pteg; 918 volatile struct pte *pt; 919 920 PMAP_LOCK(); 921 922 ptegidx = va_to_pteg(pm, addr); 923 924 /* 925 * Have to substitute some entry. Use the primary hash for this. 926 * Use low bits of timebase as random generator. Make sure we are 927 * not picking a kernel pte for replacement. 928 */ 929 pteg = &pmap_pteg_table[ptegidx]; 930 i = MFTB() & 7; 931 for (j = 0; j < 8; j++) { 932 pt = &pteg->pt[i]; 933 if ((pt->pte_hi & PTE_VALID) == 0) 934 break; 935 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 936 < PHYSMAP_VSIDBITS) 937 break; 938 i = (i + 1) & 7; 939 } 940 KASSERT(j < 8); 941 942 source_pvo = NULL; 943 victim_pvo = NULL; 944 pvoh = &pmap_pvo_table[ptegidx]; 945 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 946 947 /* 948 * We need to find pvo entry for this address... 949 */ 950 PMAP_PVO_CHECK(pvo); /* sanity check */ 951 952 /* 953 * If we haven't found the source and we come to a PVO with 954 * a valid PTE, then we know we can't find it because all 955 * evicted PVOs always are first in the list. 956 */ 957 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 958 break; 959 if (source_pvo == NULL && pm == pvo->pvo_pmap && 960 addr == PVO_VADDR(pvo)) { 961 962 /* 963 * Now we have found the entry to be spilled into the 964 * pteg. Attempt to insert it into the page table. 965 */ 966 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 967 if (j >= 0) { 968 PVO_PTEGIDX_SET(pvo, j); 969 PMAP_PVO_CHECK(pvo); /* sanity check */ 970 PVO_WHERE(pvo, SPILL_INSERT); 971 pvo->pvo_pmap->pm_evictions--; 972 PMAPCOUNT(ptes_spilled); 973 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 974 ? pmap_evcnt_ptes_secondary 975 : pmap_evcnt_ptes_primary)[j]); 976 977 /* 978 * Since we keep the evicted entries at the 979 * from of the PVO list, we need move this 980 * (now resident) PVO after the evicted 981 * entries. 982 */ 983 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 984 985 /* 986 * If we don't have to move (either we were the 987 * last entry or the next entry was valid), 988 * don't change our position. Otherwise 989 * move ourselves to the tail of the queue. 990 */ 991 if (next_pvo != NULL && 992 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 993 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 994 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 995 } 996 PMAP_UNLOCK(); 997 return 1; 998 } 999 source_pvo = pvo; 1000 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 1001 return 0; 1002 } 1003 if (victim_pvo != NULL) 1004 break; 1005 } 1006 1007 /* 1008 * We also need the pvo entry of the victim we are replacing 1009 * so save the R & C bits of the PTE. 1010 */ 1011 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1012 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1013 vpvoh = pvoh; /* *1* */ 1014 victim_pvo = pvo; 1015 if (source_pvo != NULL) 1016 break; 1017 } 1018 } 1019 1020 if (source_pvo == NULL) { 1021 PMAPCOUNT(ptes_unspilled); 1022 PMAP_UNLOCK(); 1023 return 0; 1024 } 1025 1026 if (victim_pvo == NULL) { 1027 if ((pt->pte_hi & PTE_HID) == 0) 1028 panic("pmap_pte_spill: victim p-pte (%p) has " 1029 "no pvo entry!", pt); 1030 1031 /* 1032 * If this is a secondary PTE, we need to search 1033 * its primary pvo bucket for the matching PVO. 1034 */ 1035 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1036 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1037 PMAP_PVO_CHECK(pvo); /* sanity check */ 1038 1039 /* 1040 * We also need the pvo entry of the victim we are 1041 * replacing so save the R & C bits of the PTE. 1042 */ 1043 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1044 victim_pvo = pvo; 1045 break; 1046 } 1047 } 1048 if (victim_pvo == NULL) 1049 panic("pmap_pte_spill: victim s-pte (%p) has " 1050 "no pvo entry!", pt); 1051 } 1052 1053 /* 1054 * The victim should be not be a kernel PVO/PTE entry. 1055 */ 1056 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1057 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1058 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1059 1060 /* 1061 * We are invalidating the TLB entry for the EA for the 1062 * we are replacing even though its valid; If we don't 1063 * we lose any ref/chg bit changes contained in the TLB 1064 * entry. 1065 */ 1066 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1067 1068 /* 1069 * To enforce the PVO list ordering constraint that all 1070 * evicted entries should come before all valid entries, 1071 * move the source PVO to the tail of its list and the 1072 * victim PVO to the head of its list (which might not be 1073 * the same list, if the victim was using the secondary hash). 1074 */ 1075 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1076 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1077 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1078 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1079 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1080 pmap_pte_set(pt, &source_pvo->pvo_pte); 1081 victim_pvo->pvo_pmap->pm_evictions++; 1082 source_pvo->pvo_pmap->pm_evictions--; 1083 PVO_WHERE(victim_pvo, SPILL_UNSET); 1084 PVO_WHERE(source_pvo, SPILL_SET); 1085 1086 PVO_PTEGIDX_CLR(victim_pvo); 1087 PVO_PTEGIDX_SET(source_pvo, i); 1088 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1089 PMAPCOUNT(ptes_spilled); 1090 PMAPCOUNT(ptes_evicted); 1091 PMAPCOUNT(ptes_removed); 1092 1093 PMAP_PVO_CHECK(victim_pvo); 1094 PMAP_PVO_CHECK(source_pvo); 1095 1096 PMAP_UNLOCK(); 1097 return 1; 1098 } 1099 1100 /* 1101 * Restrict given range to physical memory 1102 */ 1103 void 1104 pmap_real_memory(paddr_t *start, psize_t *size) 1105 { 1106 struct mem_region *mp; 1107 1108 for (mp = mem; mp->size; mp++) { 1109 if (*start + *size > mp->start 1110 && *start < mp->start + mp->size) { 1111 if (*start < mp->start) { 1112 *size -= mp->start - *start; 1113 *start = mp->start; 1114 } 1115 if (*start + *size > mp->start + mp->size) 1116 *size = mp->start + mp->size - *start; 1117 return; 1118 } 1119 } 1120 *size = 0; 1121 } 1122 1123 /* 1124 * Initialize anything else for pmap handling. 1125 * Called during vm_init(). 1126 */ 1127 void 1128 pmap_init(void) 1129 { 1130 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1131 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1132 &pmap_pool_mallocator, IPL_NONE); 1133 1134 pool_setlowat(&pmap_mpvo_pool, 1008); 1135 1136 pmap_initialized = 1; 1137 1138 } 1139 1140 /* 1141 * How much virtual space does the kernel get? 1142 */ 1143 void 1144 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1145 { 1146 /* 1147 * For now, reserve one segment (minus some overhead) for kernel 1148 * virtual memory 1149 */ 1150 *start = VM_MIN_KERNEL_ADDRESS; 1151 *end = VM_MAX_KERNEL_ADDRESS; 1152 } 1153 1154 /* 1155 * Allocate, initialize, and return a new physical map. 1156 */ 1157 pmap_t 1158 pmap_create(void) 1159 { 1160 pmap_t pm; 1161 1162 pm = pool_get(&pmap_pool, PR_WAITOK); 1163 memset((void *)pm, 0, sizeof *pm); 1164 pmap_pinit(pm); 1165 1166 DPRINTFN(CREATE,("pmap_create: pm %p:\n" 1167 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1168 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1169 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1170 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1171 pm, 1172 pm->pm_sr[0], pm->pm_sr[1], 1173 pm->pm_sr[2], pm->pm_sr[3], 1174 pm->pm_sr[4], pm->pm_sr[5], 1175 pm->pm_sr[6], pm->pm_sr[7], 1176 pm->pm_sr[8], pm->pm_sr[9], 1177 pm->pm_sr[10], pm->pm_sr[11], 1178 pm->pm_sr[12], pm->pm_sr[13], 1179 pm->pm_sr[14], pm->pm_sr[15])); 1180 return pm; 1181 } 1182 1183 /* 1184 * Initialize a preallocated and zeroed pmap structure. 1185 */ 1186 void 1187 pmap_pinit(pmap_t pm) 1188 { 1189 register_t entropy = MFTB(); 1190 register_t mask; 1191 int i; 1192 1193 /* 1194 * Allocate some segment registers for this pmap. 1195 */ 1196 pm->pm_refs = 1; 1197 PMAP_LOCK(); 1198 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1199 static register_t pmap_vsidcontext; 1200 register_t hash; 1201 unsigned int n; 1202 1203 /* Create a new value by multiplying by a prime adding in 1204 * entropy from the timebase register. This is to make the 1205 * VSID more random so that the PT Hash function collides 1206 * less often. (note that the prime causes gcc to do shifts 1207 * instead of a multiply) 1208 */ 1209 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1210 hash = pmap_vsidcontext & (NPMAPS - 1); 1211 if (hash == 0) { /* 0 is special, avoid it */ 1212 entropy += 0xbadf00d; 1213 continue; 1214 } 1215 n = hash >> 5; 1216 mask = 1L << (hash & (VSID_NBPW-1)); 1217 hash = pmap_vsidcontext; 1218 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1219 /* anything free in this bucket? */ 1220 if (~pmap_vsid_bitmap[n] == 0) { 1221 entropy = hash ^ (hash >> 16); 1222 continue; 1223 } 1224 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1225 mask = 1L << i; 1226 hash &= ~(VSID_NBPW-1); 1227 hash |= i; 1228 } 1229 hash &= PTE_VSID >> PTE_VSID_SHFT; 1230 pmap_vsid_bitmap[n] |= mask; 1231 pm->pm_vsid = hash; 1232 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1233 for (i = 0; i < 16; i++) 1234 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1235 SR_NOEXEC; 1236 #endif 1237 PMAP_UNLOCK(); 1238 return; 1239 } 1240 PMAP_UNLOCK(); 1241 panic("pmap_pinit: out of segments"); 1242 } 1243 1244 /* 1245 * Add a reference to the given pmap. 1246 */ 1247 void 1248 pmap_reference(pmap_t pm) 1249 { 1250 atomic_inc_uint(&pm->pm_refs); 1251 } 1252 1253 /* 1254 * Retire the given pmap from service. 1255 * Should only be called if the map contains no valid mappings. 1256 */ 1257 void 1258 pmap_destroy(pmap_t pm) 1259 { 1260 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1261 pmap_release(pm); 1262 pool_put(&pmap_pool, pm); 1263 } 1264 } 1265 1266 /* 1267 * Release any resources held by the given physical map. 1268 * Called when a pmap initialized by pmap_pinit is being released. 1269 */ 1270 void 1271 pmap_release(pmap_t pm) 1272 { 1273 int idx, mask; 1274 1275 KASSERT(pm->pm_stats.resident_count == 0); 1276 KASSERT(pm->pm_stats.wired_count == 0); 1277 1278 PMAP_LOCK(); 1279 if (pm->pm_sr[0] == 0) 1280 panic("pmap_release"); 1281 idx = pm->pm_vsid & (NPMAPS-1); 1282 mask = 1 << (idx % VSID_NBPW); 1283 idx /= VSID_NBPW; 1284 1285 KASSERT(pmap_vsid_bitmap[idx] & mask); 1286 pmap_vsid_bitmap[idx] &= ~mask; 1287 PMAP_UNLOCK(); 1288 } 1289 1290 /* 1291 * Copy the range specified by src_addr/len 1292 * from the source map to the range dst_addr/len 1293 * in the destination map. 1294 * 1295 * This routine is only advisory and need not do anything. 1296 */ 1297 void 1298 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1299 vsize_t len, vaddr_t src_addr) 1300 { 1301 PMAPCOUNT(copies); 1302 } 1303 1304 /* 1305 * Require that all active physical maps contain no 1306 * incorrect entries NOW. 1307 */ 1308 void 1309 pmap_update(struct pmap *pmap) 1310 { 1311 PMAPCOUNT(updates); 1312 TLBSYNC(); 1313 } 1314 1315 /* 1316 * Garbage collects the physical map system for 1317 * pages which are no longer used. 1318 * Success need not be guaranteed -- that is, there 1319 * may well be pages which are not referenced, but 1320 * others may be collected. 1321 * Called by the pageout daemon when pages are scarce. 1322 */ 1323 void 1324 pmap_collect(pmap_t pm) 1325 { 1326 PMAPCOUNT(collects); 1327 } 1328 1329 static inline int 1330 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1331 { 1332 int pteidx; 1333 /* 1334 * We can find the actual pte entry without searching by 1335 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1336 * and by noticing the HID bit. 1337 */ 1338 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1339 if (pvo->pvo_pte.pte_hi & PTE_HID) 1340 pteidx ^= pmap_pteg_mask * 8; 1341 return pteidx; 1342 } 1343 1344 volatile struct pte * 1345 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1346 { 1347 volatile struct pte *pt; 1348 1349 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1350 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1351 return NULL; 1352 #endif 1353 1354 /* 1355 * If we haven't been supplied the ptegidx, calculate it. 1356 */ 1357 if (pteidx == -1) { 1358 int ptegidx; 1359 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1360 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1361 } 1362 1363 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1364 1365 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1366 return pt; 1367 #else 1368 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1369 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1370 "pvo but no valid pte index", pvo); 1371 } 1372 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1373 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1374 "pvo but no valid pte", pvo); 1375 } 1376 1377 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1378 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1379 #if defined(DEBUG) || defined(PMAPCHECK) 1380 pmap_pte_print(pt); 1381 #endif 1382 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1383 "pmap_pteg_table %p but invalid in pvo", 1384 pvo, pt); 1385 } 1386 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1387 #if defined(DEBUG) || defined(PMAPCHECK) 1388 pmap_pte_print(pt); 1389 #endif 1390 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1391 "not match pte %p in pmap_pteg_table", 1392 pvo, pt); 1393 } 1394 return pt; 1395 } 1396 1397 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1398 #if defined(DEBUG) || defined(PMAPCHECK) 1399 pmap_pte_print(pt); 1400 #endif 1401 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1402 "pmap_pteg_table but valid in pvo", pvo, pt); 1403 } 1404 return NULL; 1405 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1406 } 1407 1408 struct pvo_entry * 1409 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1410 { 1411 struct pvo_entry *pvo; 1412 int ptegidx; 1413 1414 va &= ~ADDR_POFF; 1415 ptegidx = va_to_pteg(pm, va); 1416 1417 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1418 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1419 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1420 panic("pmap_pvo_find_va: invalid pvo %p on " 1421 "list %#x (%p)", pvo, ptegidx, 1422 &pmap_pvo_table[ptegidx]); 1423 #endif 1424 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1425 if (pteidx_p) 1426 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1427 return pvo; 1428 } 1429 } 1430 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1431 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1432 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1433 return NULL; 1434 } 1435 1436 #if defined(DEBUG) || defined(PMAPCHECK) 1437 void 1438 pmap_pvo_check(const struct pvo_entry *pvo) 1439 { 1440 struct pvo_head *pvo_head; 1441 struct pvo_entry *pvo0; 1442 volatile struct pte *pt; 1443 int failed = 0; 1444 1445 PMAP_LOCK(); 1446 1447 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1448 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1449 1450 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1451 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1452 pvo, pvo->pvo_pmap); 1453 failed = 1; 1454 } 1455 1456 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1457 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1458 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1459 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1460 failed = 1; 1461 } 1462 1463 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1464 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1465 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1466 pvo, LIST_NEXT(pvo, pvo_vlink)); 1467 failed = 1; 1468 } 1469 1470 if (PVO_MANAGED_P(pvo)) { 1471 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1472 } else { 1473 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1474 printf("pmap_pvo_check: pvo %p: non kernel address " 1475 "on kernel unmanaged list\n", pvo); 1476 failed = 1; 1477 } 1478 pvo_head = &pmap_pvo_kunmanaged; 1479 } 1480 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1481 if (pvo0 == pvo) 1482 break; 1483 } 1484 if (pvo0 == NULL) { 1485 printf("pmap_pvo_check: pvo %p: not present " 1486 "on its vlist head %p\n", pvo, pvo_head); 1487 failed = 1; 1488 } 1489 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1490 printf("pmap_pvo_check: pvo %p: not present " 1491 "on its olist head\n", pvo); 1492 failed = 1; 1493 } 1494 pt = pmap_pvo_to_pte(pvo, -1); 1495 if (pt == NULL) { 1496 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1497 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1498 "no PTE\n", pvo); 1499 failed = 1; 1500 } 1501 } else { 1502 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1503 (uintptr_t) pt >= 1504 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1505 printf("pmap_pvo_check: pvo %p: pte %p not in " 1506 "pteg table\n", pvo, pt); 1507 failed = 1; 1508 } 1509 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1510 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1511 "no PTE\n", pvo); 1512 failed = 1; 1513 } 1514 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1515 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1516 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1517 pvo->pvo_pte.pte_hi, 1518 pt->pte_hi); 1519 failed = 1; 1520 } 1521 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1522 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1523 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1524 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1525 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1526 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1527 failed = 1; 1528 } 1529 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1530 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1531 " doesn't not match PVO's VA %#" _PRIxva "\n", 1532 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1533 failed = 1; 1534 } 1535 if (failed) 1536 pmap_pte_print(pt); 1537 } 1538 if (failed) 1539 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1540 pvo->pvo_pmap); 1541 1542 PMAP_UNLOCK(); 1543 } 1544 #endif /* DEBUG || PMAPCHECK */ 1545 1546 /* 1547 * Search the PVO table looking for a non-wired entry. 1548 * If we find one, remove it and return it. 1549 */ 1550 1551 struct pvo_entry * 1552 pmap_pvo_reclaim(struct pmap *pm) 1553 { 1554 struct pvo_tqhead *pvoh; 1555 struct pvo_entry *pvo; 1556 uint32_t idx, endidx; 1557 1558 endidx = pmap_pvo_reclaim_nextidx; 1559 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1560 idx = (idx + 1) & pmap_pteg_mask) { 1561 pvoh = &pmap_pvo_table[idx]; 1562 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1563 if (!PVO_WIRED_P(pvo)) { 1564 pmap_pvo_remove(pvo, -1, NULL); 1565 pmap_pvo_reclaim_nextidx = idx; 1566 PMAPCOUNT(pvos_reclaimed); 1567 return pvo; 1568 } 1569 } 1570 } 1571 return NULL; 1572 } 1573 1574 /* 1575 * This returns whether this is the first mapping of a page. 1576 */ 1577 int 1578 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1579 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1580 { 1581 struct pvo_entry *pvo; 1582 struct pvo_tqhead *pvoh; 1583 register_t msr; 1584 int ptegidx; 1585 int i; 1586 int poolflags = PR_NOWAIT; 1587 1588 /* 1589 * Compute the PTE Group index. 1590 */ 1591 va &= ~ADDR_POFF; 1592 ptegidx = va_to_pteg(pm, va); 1593 1594 msr = pmap_interrupts_off(); 1595 1596 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1597 if (pmap_pvo_remove_depth > 0) 1598 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1599 if (++pmap_pvo_enter_depth > 1) 1600 panic("pmap_pvo_enter: called recursively!"); 1601 #endif 1602 1603 /* 1604 * Remove any existing mapping for this page. Reuse the 1605 * pvo entry if there a mapping. 1606 */ 1607 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1608 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1609 #ifdef DEBUG 1610 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1611 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1612 ~(PTE_REF|PTE_CHG)) == 0 && 1613 va < VM_MIN_KERNEL_ADDRESS) { 1614 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n", 1615 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1616 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n", 1617 pvo->pvo_pte.pte_hi, 1618 pm->pm_sr[va >> ADDR_SR_SHFT]); 1619 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1620 #ifdef DDBX 1621 Debugger(); 1622 #endif 1623 } 1624 #endif 1625 PMAPCOUNT(mappings_replaced); 1626 pmap_pvo_remove(pvo, -1, NULL); 1627 break; 1628 } 1629 } 1630 1631 /* 1632 * If we aren't overwriting an mapping, try to allocate 1633 */ 1634 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1635 --pmap_pvo_enter_depth; 1636 #endif 1637 pmap_interrupts_restore(msr); 1638 if (pvo) { 1639 pmap_pvo_free(pvo); 1640 } 1641 pvo = pool_get(pl, poolflags); 1642 1643 #ifdef DEBUG 1644 /* 1645 * Exercise pmap_pvo_reclaim() a little. 1646 */ 1647 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1648 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1649 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1650 pool_put(pl, pvo); 1651 pvo = NULL; 1652 } 1653 #endif 1654 1655 msr = pmap_interrupts_off(); 1656 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1657 ++pmap_pvo_enter_depth; 1658 #endif 1659 if (pvo == NULL) { 1660 pvo = pmap_pvo_reclaim(pm); 1661 if (pvo == NULL) { 1662 if ((flags & PMAP_CANFAIL) == 0) 1663 panic("pmap_pvo_enter: failed"); 1664 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1665 pmap_pvo_enter_depth--; 1666 #endif 1667 PMAPCOUNT(pvos_failed); 1668 pmap_interrupts_restore(msr); 1669 return ENOMEM; 1670 } 1671 } 1672 1673 pvo->pvo_vaddr = va; 1674 pvo->pvo_pmap = pm; 1675 pvo->pvo_vaddr &= ~ADDR_POFF; 1676 if (flags & VM_PROT_EXECUTE) { 1677 PMAPCOUNT(exec_mappings); 1678 pvo_set_exec(pvo); 1679 } 1680 if (flags & PMAP_WIRED) 1681 pvo->pvo_vaddr |= PVO_WIRED; 1682 if (pvo_head != &pmap_pvo_kunmanaged) { 1683 pvo->pvo_vaddr |= PVO_MANAGED; 1684 PMAPCOUNT(mappings); 1685 } else { 1686 PMAPCOUNT(kernel_mappings); 1687 } 1688 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1689 1690 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1691 if (PVO_WIRED_P(pvo)) 1692 pvo->pvo_pmap->pm_stats.wired_count++; 1693 pvo->pvo_pmap->pm_stats.resident_count++; 1694 #if defined(DEBUG) 1695 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1696 DPRINTFN(PVOENTER, 1697 ("pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1698 pvo, pm, va, pa)); 1699 #endif 1700 1701 /* 1702 * We hope this succeeds but it isn't required. 1703 */ 1704 pvoh = &pmap_pvo_table[ptegidx]; 1705 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1706 if (i >= 0) { 1707 PVO_PTEGIDX_SET(pvo, i); 1708 PVO_WHERE(pvo, ENTER_INSERT); 1709 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1710 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1711 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1712 1713 } else { 1714 /* 1715 * Since we didn't have room for this entry (which makes it 1716 * and evicted entry), place it at the head of the list. 1717 */ 1718 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1719 PMAPCOUNT(ptes_evicted); 1720 pm->pm_evictions++; 1721 /* 1722 * If this is a kernel page, make sure it's active. 1723 */ 1724 if (pm == pmap_kernel()) { 1725 i = pmap_pte_spill(pm, va, false); 1726 KASSERT(i); 1727 } 1728 } 1729 PMAP_PVO_CHECK(pvo); /* sanity check */ 1730 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1731 pmap_pvo_enter_depth--; 1732 #endif 1733 pmap_interrupts_restore(msr); 1734 return 0; 1735 } 1736 1737 static void 1738 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1739 { 1740 volatile struct pte *pt; 1741 int ptegidx; 1742 1743 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1744 if (++pmap_pvo_remove_depth > 1) 1745 panic("pmap_pvo_remove: called recursively!"); 1746 #endif 1747 1748 /* 1749 * If we haven't been supplied the ptegidx, calculate it. 1750 */ 1751 if (pteidx == -1) { 1752 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1753 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1754 } else { 1755 ptegidx = pteidx >> 3; 1756 if (pvo->pvo_pte.pte_hi & PTE_HID) 1757 ptegidx ^= pmap_pteg_mask; 1758 } 1759 PMAP_PVO_CHECK(pvo); /* sanity check */ 1760 1761 /* 1762 * If there is an active pte entry, we need to deactivate it 1763 * (and save the ref & chg bits). 1764 */ 1765 pt = pmap_pvo_to_pte(pvo, pteidx); 1766 if (pt != NULL) { 1767 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1768 PVO_WHERE(pvo, REMOVE); 1769 PVO_PTEGIDX_CLR(pvo); 1770 PMAPCOUNT(ptes_removed); 1771 } else { 1772 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1773 pvo->pvo_pmap->pm_evictions--; 1774 } 1775 1776 /* 1777 * Account for executable mappings. 1778 */ 1779 if (PVO_EXECUTABLE_P(pvo)) 1780 pvo_clear_exec(pvo); 1781 1782 /* 1783 * Update our statistics. 1784 */ 1785 pvo->pvo_pmap->pm_stats.resident_count--; 1786 if (PVO_WIRED_P(pvo)) 1787 pvo->pvo_pmap->pm_stats.wired_count--; 1788 1789 /* 1790 * Save the REF/CHG bits into their cache if the page is managed. 1791 */ 1792 if (PVO_MANAGED_P(pvo)) { 1793 register_t ptelo = pvo->pvo_pte.pte_lo; 1794 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1795 1796 if (pg != NULL) { 1797 /* 1798 * If this page was changed and it is mapped exec, 1799 * invalidate it. 1800 */ 1801 if ((ptelo & PTE_CHG) && 1802 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1803 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1804 if (LIST_EMPTY(pvoh)) { 1805 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1806 "%#" _PRIxpa ": clear-exec]\n", 1807 VM_PAGE_TO_PHYS(pg))); 1808 pmap_attr_clear(pg, PTE_EXEC); 1809 PMAPCOUNT(exec_uncached_pvo_remove); 1810 } else { 1811 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1812 "%#" _PRIxpa ": syncicache]\n", 1813 VM_PAGE_TO_PHYS(pg))); 1814 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1815 PAGE_SIZE); 1816 PMAPCOUNT(exec_synced_pvo_remove); 1817 } 1818 } 1819 1820 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1821 } 1822 PMAPCOUNT(unmappings); 1823 } else { 1824 PMAPCOUNT(kernel_unmappings); 1825 } 1826 1827 /* 1828 * Remove the PVO from its lists and return it to the pool. 1829 */ 1830 LIST_REMOVE(pvo, pvo_vlink); 1831 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1832 if (pvol) { 1833 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1834 } 1835 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1836 pmap_pvo_remove_depth--; 1837 #endif 1838 } 1839 1840 void 1841 pmap_pvo_free(struct pvo_entry *pvo) 1842 { 1843 1844 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1845 } 1846 1847 void 1848 pmap_pvo_free_list(struct pvo_head *pvol) 1849 { 1850 struct pvo_entry *pvo, *npvo; 1851 1852 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1853 npvo = LIST_NEXT(pvo, pvo_vlink); 1854 LIST_REMOVE(pvo, pvo_vlink); 1855 pmap_pvo_free(pvo); 1856 } 1857 } 1858 1859 /* 1860 * Mark a mapping as executable. 1861 * If this is the first executable mapping in the segment, 1862 * clear the noexec flag. 1863 */ 1864 static void 1865 pvo_set_exec(struct pvo_entry *pvo) 1866 { 1867 struct pmap *pm = pvo->pvo_pmap; 1868 1869 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1870 return; 1871 } 1872 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1873 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1874 { 1875 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1876 if (pm->pm_exec[sr]++ == 0) { 1877 pm->pm_sr[sr] &= ~SR_NOEXEC; 1878 } 1879 } 1880 #endif 1881 } 1882 1883 /* 1884 * Mark a mapping as non-executable. 1885 * If this was the last executable mapping in the segment, 1886 * set the noexec flag. 1887 */ 1888 static void 1889 pvo_clear_exec(struct pvo_entry *pvo) 1890 { 1891 struct pmap *pm = pvo->pvo_pmap; 1892 1893 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1894 return; 1895 } 1896 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1897 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1898 { 1899 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1900 if (--pm->pm_exec[sr] == 0) { 1901 pm->pm_sr[sr] |= SR_NOEXEC; 1902 } 1903 } 1904 #endif 1905 } 1906 1907 /* 1908 * Insert physical page at pa into the given pmap at virtual address va. 1909 */ 1910 int 1911 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags) 1912 { 1913 struct mem_region *mp; 1914 struct pvo_head *pvo_head; 1915 struct vm_page *pg; 1916 struct pool *pl; 1917 register_t pte_lo; 1918 int error; 1919 u_int pvo_flags; 1920 u_int was_exec = 0; 1921 1922 PMAP_LOCK(); 1923 1924 if (__predict_false(!pmap_initialized)) { 1925 pvo_head = &pmap_pvo_kunmanaged; 1926 pl = &pmap_upvo_pool; 1927 pvo_flags = 0; 1928 pg = NULL; 1929 was_exec = PTE_EXEC; 1930 } else { 1931 pvo_head = pa_to_pvoh(pa, &pg); 1932 pl = &pmap_mpvo_pool; 1933 pvo_flags = PVO_MANAGED; 1934 } 1935 1936 DPRINTFN(ENTER, 1937 ("pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1938 pm, va, pa, prot, flags)); 1939 1940 /* 1941 * If this is a managed page, and it's the first reference to the 1942 * page clear the execness of the page. Otherwise fetch the execness. 1943 */ 1944 if (pg != NULL) 1945 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1946 1947 DPRINTFN(ENTER, (" was_exec=%d", was_exec)); 1948 1949 /* 1950 * Assume the page is cache inhibited and access is guarded unless 1951 * it's in our available memory array. If it is in the memory array, 1952 * asssume it's in memory coherent memory. 1953 */ 1954 pte_lo = PTE_IG; 1955 if ((flags & PMAP_NOCACHE) == 0) { 1956 for (mp = mem; mp->size; mp++) { 1957 if (pa >= mp->start && pa < mp->start + mp->size) { 1958 pte_lo = PTE_M; 1959 break; 1960 } 1961 } 1962 } 1963 1964 if (prot & VM_PROT_WRITE) 1965 pte_lo |= PTE_BW; 1966 else 1967 pte_lo |= PTE_BR; 1968 1969 /* 1970 * If this was in response to a fault, "pre-fault" the PTE's 1971 * changed/referenced bit appropriately. 1972 */ 1973 if (flags & VM_PROT_WRITE) 1974 pte_lo |= PTE_CHG; 1975 if (flags & VM_PROT_ALL) 1976 pte_lo |= PTE_REF; 1977 1978 /* 1979 * We need to know if this page can be executable 1980 */ 1981 flags |= (prot & VM_PROT_EXECUTE); 1982 1983 /* 1984 * Record mapping for later back-translation and pte spilling. 1985 * This will overwrite any existing mapping. 1986 */ 1987 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1988 1989 /* 1990 * Flush the real page from the instruction cache if this page is 1991 * mapped executable and cacheable and has not been flushed since 1992 * the last time it was modified. 1993 */ 1994 if (error == 0 && 1995 (flags & VM_PROT_EXECUTE) && 1996 (pte_lo & PTE_I) == 0 && 1997 was_exec == 0) { 1998 DPRINTFN(ENTER, (" syncicache")); 1999 PMAPCOUNT(exec_synced); 2000 pmap_syncicache(pa, PAGE_SIZE); 2001 if (pg != NULL) { 2002 pmap_attr_save(pg, PTE_EXEC); 2003 PMAPCOUNT(exec_cached); 2004 #if defined(DEBUG) || defined(PMAPDEBUG) 2005 if (pmapdebug & PMAPDEBUG_ENTER) 2006 printf(" marked-as-exec"); 2007 else if (pmapdebug & PMAPDEBUG_EXEC) 2008 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 2009 VM_PAGE_TO_PHYS(pg)); 2010 2011 #endif 2012 } 2013 } 2014 2015 DPRINTFN(ENTER, (": error=%d\n", error)); 2016 2017 PMAP_UNLOCK(); 2018 2019 return error; 2020 } 2021 2022 void 2023 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot) 2024 { 2025 struct mem_region *mp; 2026 register_t pte_lo; 2027 int error; 2028 2029 #if defined (PMAP_OEA64_BRIDGE) 2030 if (va < VM_MIN_KERNEL_ADDRESS) 2031 panic("pmap_kenter_pa: attempt to enter " 2032 "non-kernel address %#" _PRIxva "!", va); 2033 #endif 2034 2035 DPRINTFN(KENTER, 2036 ("pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot)); 2037 2038 PMAP_LOCK(); 2039 2040 /* 2041 * Assume the page is cache inhibited and access is guarded unless 2042 * it's in our available memory array. If it is in the memory array, 2043 * asssume it's in memory coherent memory. 2044 */ 2045 pte_lo = PTE_IG; 2046 if ((prot & PMAP_NOCACHE) == 0) { 2047 for (mp = mem; mp->size; mp++) { 2048 if (pa >= mp->start && pa < mp->start + mp->size) { 2049 pte_lo = PTE_M; 2050 break; 2051 } 2052 } 2053 } 2054 2055 if (prot & VM_PROT_WRITE) 2056 pte_lo |= PTE_BW; 2057 else 2058 pte_lo |= PTE_BR; 2059 2060 /* 2061 * We don't care about REF/CHG on PVOs on the unmanaged list. 2062 */ 2063 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2064 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2065 2066 if (error != 0) 2067 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2068 va, pa, error); 2069 2070 PMAP_UNLOCK(); 2071 } 2072 2073 void 2074 pmap_kremove(vaddr_t va, vsize_t len) 2075 { 2076 if (va < VM_MIN_KERNEL_ADDRESS) 2077 panic("pmap_kremove: attempt to remove " 2078 "non-kernel address %#" _PRIxva "!", va); 2079 2080 DPRINTFN(KREMOVE,("pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len)); 2081 pmap_remove(pmap_kernel(), va, va + len); 2082 } 2083 2084 /* 2085 * Remove the given range of mapping entries. 2086 */ 2087 void 2088 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2089 { 2090 struct pvo_head pvol; 2091 struct pvo_entry *pvo; 2092 register_t msr; 2093 int pteidx; 2094 2095 PMAP_LOCK(); 2096 LIST_INIT(&pvol); 2097 msr = pmap_interrupts_off(); 2098 for (; va < endva; va += PAGE_SIZE) { 2099 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2100 if (pvo != NULL) { 2101 pmap_pvo_remove(pvo, pteidx, &pvol); 2102 } 2103 } 2104 pmap_interrupts_restore(msr); 2105 pmap_pvo_free_list(&pvol); 2106 PMAP_UNLOCK(); 2107 } 2108 2109 /* 2110 * Get the physical page address for the given pmap/virtual address. 2111 */ 2112 bool 2113 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2114 { 2115 struct pvo_entry *pvo; 2116 register_t msr; 2117 2118 PMAP_LOCK(); 2119 2120 /* 2121 * If this is a kernel pmap lookup, also check the battable 2122 * and if we get a hit, translate the VA to a PA using the 2123 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2124 * that will wrap back to 0. 2125 */ 2126 if (pm == pmap_kernel() && 2127 (va < VM_MIN_KERNEL_ADDRESS || 2128 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2129 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2130 #if defined (PMAP_OEA) 2131 #ifdef PPC_OEA601 2132 if ((MFPVR() >> 16) == MPC601) { 2133 register_t batu = battable[va >> 23].batu; 2134 register_t batl = battable[va >> 23].batl; 2135 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2136 if (BAT601_VALID_P(batl) && 2137 BAT601_VA_MATCH_P(batu, batl, va)) { 2138 register_t mask = 2139 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2140 if (pap) 2141 *pap = (batl & mask) | (va & ~mask); 2142 PMAP_UNLOCK(); 2143 return true; 2144 } else if (SR601_VALID_P(sr) && 2145 SR601_PA_MATCH_P(sr, va)) { 2146 if (pap) 2147 *pap = va; 2148 PMAP_UNLOCK(); 2149 return true; 2150 } 2151 } else 2152 #endif /* PPC_OEA601 */ 2153 { 2154 register_t batu = battable[va >> ADDR_SR_SHFT].batu; 2155 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2156 register_t batl = 2157 battable[va >> ADDR_SR_SHFT].batl; 2158 register_t mask = 2159 (~(batu & BAT_BL) << 15) & ~0x1ffffL; 2160 if (pap) 2161 *pap = (batl & mask) | (va & ~mask); 2162 PMAP_UNLOCK(); 2163 return true; 2164 } 2165 } 2166 return false; 2167 #elif defined (PMAP_OEA64_BRIDGE) 2168 if (va >= SEGMENT_LENGTH) 2169 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2170 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2171 else { 2172 if (pap) 2173 *pap = va; 2174 PMAP_UNLOCK(); 2175 return true; 2176 } 2177 #elif defined (PMAP_OEA64) 2178 #error PPC_OEA64 not supported 2179 #endif /* PPC_OEA */ 2180 } 2181 2182 msr = pmap_interrupts_off(); 2183 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2184 if (pvo != NULL) { 2185 PMAP_PVO_CHECK(pvo); /* sanity check */ 2186 if (pap) 2187 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2188 | (va & ADDR_POFF); 2189 } 2190 pmap_interrupts_restore(msr); 2191 PMAP_UNLOCK(); 2192 return pvo != NULL; 2193 } 2194 2195 /* 2196 * Lower the protection on the specified range of this pmap. 2197 */ 2198 void 2199 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2200 { 2201 struct pvo_entry *pvo; 2202 volatile struct pte *pt; 2203 register_t msr; 2204 int pteidx; 2205 2206 /* 2207 * Since this routine only downgrades protection, we should 2208 * always be called with at least one bit not set. 2209 */ 2210 KASSERT(prot != VM_PROT_ALL); 2211 2212 /* 2213 * If there is no protection, this is equivalent to 2214 * remove the pmap from the pmap. 2215 */ 2216 if ((prot & VM_PROT_READ) == 0) { 2217 pmap_remove(pm, va, endva); 2218 return; 2219 } 2220 2221 PMAP_LOCK(); 2222 2223 msr = pmap_interrupts_off(); 2224 for (; va < endva; va += PAGE_SIZE) { 2225 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2226 if (pvo == NULL) 2227 continue; 2228 PMAP_PVO_CHECK(pvo); /* sanity check */ 2229 2230 /* 2231 * Revoke executable if asked to do so. 2232 */ 2233 if ((prot & VM_PROT_EXECUTE) == 0) 2234 pvo_clear_exec(pvo); 2235 2236 #if 0 2237 /* 2238 * If the page is already read-only, no change 2239 * needs to be made. 2240 */ 2241 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2242 continue; 2243 #endif 2244 /* 2245 * Grab the PTE pointer before we diddle with 2246 * the cached PTE copy. 2247 */ 2248 pt = pmap_pvo_to_pte(pvo, pteidx); 2249 /* 2250 * Change the protection of the page. 2251 */ 2252 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2253 pvo->pvo_pte.pte_lo |= PTE_BR; 2254 2255 /* 2256 * If the PVO is in the page table, update 2257 * that pte at well. 2258 */ 2259 if (pt != NULL) { 2260 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2261 PVO_WHERE(pvo, PMAP_PROTECT); 2262 PMAPCOUNT(ptes_changed); 2263 } 2264 2265 PMAP_PVO_CHECK(pvo); /* sanity check */ 2266 } 2267 pmap_interrupts_restore(msr); 2268 PMAP_UNLOCK(); 2269 } 2270 2271 void 2272 pmap_unwire(pmap_t pm, vaddr_t va) 2273 { 2274 struct pvo_entry *pvo; 2275 register_t msr; 2276 2277 PMAP_LOCK(); 2278 msr = pmap_interrupts_off(); 2279 pvo = pmap_pvo_find_va(pm, va, NULL); 2280 if (pvo != NULL) { 2281 if (PVO_WIRED_P(pvo)) { 2282 pvo->pvo_vaddr &= ~PVO_WIRED; 2283 pm->pm_stats.wired_count--; 2284 } 2285 PMAP_PVO_CHECK(pvo); /* sanity check */ 2286 } 2287 pmap_interrupts_restore(msr); 2288 PMAP_UNLOCK(); 2289 } 2290 2291 /* 2292 * Lower the protection on the specified physical page. 2293 */ 2294 void 2295 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2296 { 2297 struct pvo_head *pvo_head, pvol; 2298 struct pvo_entry *pvo, *next_pvo; 2299 volatile struct pte *pt; 2300 register_t msr; 2301 2302 PMAP_LOCK(); 2303 2304 KASSERT(prot != VM_PROT_ALL); 2305 LIST_INIT(&pvol); 2306 msr = pmap_interrupts_off(); 2307 2308 /* 2309 * When UVM reuses a page, it does a pmap_page_protect with 2310 * VM_PROT_NONE. At that point, we can clear the exec flag 2311 * since we know the page will have different contents. 2312 */ 2313 if ((prot & VM_PROT_READ) == 0) { 2314 DPRINTFN(EXEC, ("[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2315 VM_PAGE_TO_PHYS(pg))); 2316 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2317 PMAPCOUNT(exec_uncached_page_protect); 2318 pmap_attr_clear(pg, PTE_EXEC); 2319 } 2320 } 2321 2322 pvo_head = vm_page_to_pvoh(pg); 2323 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2324 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2325 PMAP_PVO_CHECK(pvo); /* sanity check */ 2326 2327 /* 2328 * Downgrading to no mapping at all, we just remove the entry. 2329 */ 2330 if ((prot & VM_PROT_READ) == 0) { 2331 pmap_pvo_remove(pvo, -1, &pvol); 2332 continue; 2333 } 2334 2335 /* 2336 * If EXEC permission is being revoked, just clear the 2337 * flag in the PVO. 2338 */ 2339 if ((prot & VM_PROT_EXECUTE) == 0) 2340 pvo_clear_exec(pvo); 2341 2342 /* 2343 * If this entry is already RO, don't diddle with the 2344 * page table. 2345 */ 2346 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2347 PMAP_PVO_CHECK(pvo); 2348 continue; 2349 } 2350 2351 /* 2352 * Grab the PTE before the we diddle the bits so 2353 * pvo_to_pte can verify the pte contents are as 2354 * expected. 2355 */ 2356 pt = pmap_pvo_to_pte(pvo, -1); 2357 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2358 pvo->pvo_pte.pte_lo |= PTE_BR; 2359 if (pt != NULL) { 2360 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2361 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2362 PMAPCOUNT(ptes_changed); 2363 } 2364 PMAP_PVO_CHECK(pvo); /* sanity check */ 2365 } 2366 pmap_interrupts_restore(msr); 2367 pmap_pvo_free_list(&pvol); 2368 2369 PMAP_UNLOCK(); 2370 } 2371 2372 /* 2373 * Activate the address space for the specified process. If the process 2374 * is the current process, load the new MMU context. 2375 */ 2376 void 2377 pmap_activate(struct lwp *l) 2378 { 2379 struct pcb *pcb = lwp_getpcb(l); 2380 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2381 2382 DPRINTFN(ACTIVATE, 2383 ("pmap_activate: lwp %p (curlwp %p)\n", l, curlwp)); 2384 2385 /* 2386 * XXX Normally performed in cpu_fork(). 2387 */ 2388 pcb->pcb_pm = pmap; 2389 2390 /* 2391 * In theory, the SR registers need only be valid on return 2392 * to user space wait to do them there. 2393 */ 2394 if (l == curlwp) { 2395 /* Store pointer to new current pmap. */ 2396 curpm = pmap; 2397 } 2398 } 2399 2400 /* 2401 * Deactivate the specified process's address space. 2402 */ 2403 void 2404 pmap_deactivate(struct lwp *l) 2405 { 2406 } 2407 2408 bool 2409 pmap_query_bit(struct vm_page *pg, int ptebit) 2410 { 2411 struct pvo_entry *pvo; 2412 volatile struct pte *pt; 2413 register_t msr; 2414 2415 PMAP_LOCK(); 2416 2417 if (pmap_attr_fetch(pg) & ptebit) { 2418 PMAP_UNLOCK(); 2419 return true; 2420 } 2421 2422 msr = pmap_interrupts_off(); 2423 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2424 PMAP_PVO_CHECK(pvo); /* sanity check */ 2425 /* 2426 * See if we saved the bit off. If so cache, it and return 2427 * success. 2428 */ 2429 if (pvo->pvo_pte.pte_lo & ptebit) { 2430 pmap_attr_save(pg, ptebit); 2431 PMAP_PVO_CHECK(pvo); /* sanity check */ 2432 pmap_interrupts_restore(msr); 2433 PMAP_UNLOCK(); 2434 return true; 2435 } 2436 } 2437 /* 2438 * No luck, now go thru the hard part of looking at the ptes 2439 * themselves. Sync so any pending REF/CHG bits are flushed 2440 * to the PTEs. 2441 */ 2442 SYNC(); 2443 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2444 PMAP_PVO_CHECK(pvo); /* sanity check */ 2445 /* 2446 * See if this pvo have a valid PTE. If so, fetch the 2447 * REF/CHG bits from the valid PTE. If the appropriate 2448 * ptebit is set, cache, it and return success. 2449 */ 2450 pt = pmap_pvo_to_pte(pvo, -1); 2451 if (pt != NULL) { 2452 pmap_pte_synch(pt, &pvo->pvo_pte); 2453 if (pvo->pvo_pte.pte_lo & ptebit) { 2454 pmap_attr_save(pg, ptebit); 2455 PMAP_PVO_CHECK(pvo); /* sanity check */ 2456 pmap_interrupts_restore(msr); 2457 PMAP_UNLOCK(); 2458 return true; 2459 } 2460 } 2461 } 2462 pmap_interrupts_restore(msr); 2463 PMAP_UNLOCK(); 2464 return false; 2465 } 2466 2467 bool 2468 pmap_clear_bit(struct vm_page *pg, int ptebit) 2469 { 2470 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2471 struct pvo_entry *pvo; 2472 volatile struct pte *pt; 2473 register_t msr; 2474 int rv = 0; 2475 2476 PMAP_LOCK(); 2477 msr = pmap_interrupts_off(); 2478 2479 /* 2480 * Fetch the cache value 2481 */ 2482 rv |= pmap_attr_fetch(pg); 2483 2484 /* 2485 * Clear the cached value. 2486 */ 2487 pmap_attr_clear(pg, ptebit); 2488 2489 /* 2490 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2491 * can reset the right ones). Note that since the pvo entries and 2492 * list heads are accessed via BAT0 and are never placed in the 2493 * page table, we don't have to worry about further accesses setting 2494 * the REF/CHG bits. 2495 */ 2496 SYNC(); 2497 2498 /* 2499 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2500 * valid PTE. If so, clear the ptebit from the valid PTE. 2501 */ 2502 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2503 PMAP_PVO_CHECK(pvo); /* sanity check */ 2504 pt = pmap_pvo_to_pte(pvo, -1); 2505 if (pt != NULL) { 2506 /* 2507 * Only sync the PTE if the bit we are looking 2508 * for is not already set. 2509 */ 2510 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2511 pmap_pte_synch(pt, &pvo->pvo_pte); 2512 /* 2513 * If the bit we are looking for was already set, 2514 * clear that bit in the pte. 2515 */ 2516 if (pvo->pvo_pte.pte_lo & ptebit) 2517 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2518 } 2519 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2520 pvo->pvo_pte.pte_lo &= ~ptebit; 2521 PMAP_PVO_CHECK(pvo); /* sanity check */ 2522 } 2523 pmap_interrupts_restore(msr); 2524 2525 /* 2526 * If we are clearing the modify bit and this page was marked EXEC 2527 * and the user of the page thinks the page was modified, then we 2528 * need to clean it from the icache if it's mapped or clear the EXEC 2529 * bit if it's not mapped. The page itself might not have the CHG 2530 * bit set if the modification was done via DMA to the page. 2531 */ 2532 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2533 if (LIST_EMPTY(pvoh)) { 2534 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2535 VM_PAGE_TO_PHYS(pg))); 2536 pmap_attr_clear(pg, PTE_EXEC); 2537 PMAPCOUNT(exec_uncached_clear_modify); 2538 } else { 2539 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2540 VM_PAGE_TO_PHYS(pg))); 2541 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2542 PMAPCOUNT(exec_synced_clear_modify); 2543 } 2544 } 2545 PMAP_UNLOCK(); 2546 return (rv & ptebit) != 0; 2547 } 2548 2549 void 2550 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2551 { 2552 struct pvo_entry *pvo; 2553 size_t offset = va & ADDR_POFF; 2554 int s; 2555 2556 PMAP_LOCK(); 2557 s = splvm(); 2558 while (len > 0) { 2559 size_t seglen = PAGE_SIZE - offset; 2560 if (seglen > len) 2561 seglen = len; 2562 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2563 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2564 pmap_syncicache( 2565 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2566 PMAP_PVO_CHECK(pvo); 2567 } 2568 va += seglen; 2569 len -= seglen; 2570 offset = 0; 2571 } 2572 splx(s); 2573 PMAP_UNLOCK(); 2574 } 2575 2576 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2577 void 2578 pmap_pte_print(volatile struct pte *pt) 2579 { 2580 printf("PTE %p: ", pt); 2581 2582 #if defined(PMAP_OEA) 2583 /* High word: */ 2584 printf("%#" _PRIxpte ": [", pt->pte_hi); 2585 #else 2586 printf("%#" _PRIxpte ": [", pt->pte_hi); 2587 #endif /* PMAP_OEA */ 2588 2589 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2590 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2591 2592 printf("%#" _PRIxpte " %#" _PRIxpte "", 2593 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2594 pt->pte_hi & PTE_API); 2595 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2596 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2597 #else 2598 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2599 #endif /* PMAP_OEA */ 2600 2601 /* Low word: */ 2602 #if defined (PMAP_OEA) 2603 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2604 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2605 #else 2606 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2607 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2608 #endif 2609 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2610 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2611 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2612 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2613 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2614 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2615 switch (pt->pte_lo & PTE_PP) { 2616 case PTE_BR: printf("br]\n"); break; 2617 case PTE_BW: printf("bw]\n"); break; 2618 case PTE_SO: printf("so]\n"); break; 2619 case PTE_SW: printf("sw]\n"); break; 2620 } 2621 } 2622 #endif 2623 2624 #if defined(DDB) 2625 void 2626 pmap_pteg_check(void) 2627 { 2628 volatile struct pte *pt; 2629 int i; 2630 int ptegidx; 2631 u_int p_valid = 0; 2632 u_int s_valid = 0; 2633 u_int invalid = 0; 2634 2635 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2636 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2637 if (pt->pte_hi & PTE_VALID) { 2638 if (pt->pte_hi & PTE_HID) 2639 s_valid++; 2640 else 2641 { 2642 p_valid++; 2643 } 2644 } else 2645 invalid++; 2646 } 2647 } 2648 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2649 p_valid, p_valid, s_valid, s_valid, 2650 invalid, invalid); 2651 } 2652 2653 void 2654 pmap_print_mmuregs(void) 2655 { 2656 int i; 2657 u_int cpuvers; 2658 #ifndef PMAP_OEA64 2659 vaddr_t addr; 2660 register_t soft_sr[16]; 2661 #endif 2662 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2663 struct bat soft_ibat[4]; 2664 struct bat soft_dbat[4]; 2665 #endif 2666 paddr_t sdr1; 2667 2668 cpuvers = MFPVR() >> 16; 2669 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2670 #ifndef PMAP_OEA64 2671 addr = 0; 2672 for (i = 0; i < 16; i++) { 2673 soft_sr[i] = MFSRIN(addr); 2674 addr += (1 << ADDR_SR_SHFT); 2675 } 2676 #endif 2677 2678 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2679 /* read iBAT (601: uBAT) registers */ 2680 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2681 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2682 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2683 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2684 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2685 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2686 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2687 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2688 2689 2690 if (cpuvers != MPC601) { 2691 /* read dBAT registers */ 2692 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2693 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2694 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2695 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2696 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2697 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2698 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2699 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2700 } 2701 #endif 2702 2703 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2704 #ifndef PMAP_OEA64 2705 printf("SR[]:\t"); 2706 for (i = 0; i < 4; i++) 2707 printf("0x%08lx, ", soft_sr[i]); 2708 printf("\n\t"); 2709 for ( ; i < 8; i++) 2710 printf("0x%08lx, ", soft_sr[i]); 2711 printf("\n\t"); 2712 for ( ; i < 12; i++) 2713 printf("0x%08lx, ", soft_sr[i]); 2714 printf("\n\t"); 2715 for ( ; i < 16; i++) 2716 printf("0x%08lx, ", soft_sr[i]); 2717 printf("\n"); 2718 #endif 2719 2720 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2721 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2722 for (i = 0; i < 4; i++) { 2723 printf("0x%08lx 0x%08lx, ", 2724 soft_ibat[i].batu, soft_ibat[i].batl); 2725 if (i == 1) 2726 printf("\n\t"); 2727 } 2728 if (cpuvers != MPC601) { 2729 printf("\ndBAT[]:\t"); 2730 for (i = 0; i < 4; i++) { 2731 printf("0x%08lx 0x%08lx, ", 2732 soft_dbat[i].batu, soft_dbat[i].batl); 2733 if (i == 1) 2734 printf("\n\t"); 2735 } 2736 } 2737 printf("\n"); 2738 #endif /* PMAP_OEA... */ 2739 } 2740 2741 void 2742 pmap_print_pte(pmap_t pm, vaddr_t va) 2743 { 2744 struct pvo_entry *pvo; 2745 volatile struct pte *pt; 2746 int pteidx; 2747 2748 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2749 if (pvo != NULL) { 2750 pt = pmap_pvo_to_pte(pvo, pteidx); 2751 if (pt != NULL) { 2752 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2753 va, pt, 2754 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2755 pt->pte_hi, pt->pte_lo); 2756 } else { 2757 printf("No valid PTE found\n"); 2758 } 2759 } else { 2760 printf("Address not in pmap\n"); 2761 } 2762 } 2763 2764 void 2765 pmap_pteg_dist(void) 2766 { 2767 struct pvo_entry *pvo; 2768 int ptegidx; 2769 int depth; 2770 int max_depth = 0; 2771 unsigned int depths[64]; 2772 2773 memset(depths, 0, sizeof(depths)); 2774 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2775 depth = 0; 2776 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2777 depth++; 2778 } 2779 if (depth > max_depth) 2780 max_depth = depth; 2781 if (depth > 63) 2782 depth = 63; 2783 depths[depth]++; 2784 } 2785 2786 for (depth = 0; depth < 64; depth++) { 2787 printf(" [%2d]: %8u", depth, depths[depth]); 2788 if ((depth & 3) == 3) 2789 printf("\n"); 2790 if (depth == max_depth) 2791 break; 2792 } 2793 if ((depth & 3) != 3) 2794 printf("\n"); 2795 printf("Max depth found was %d\n", max_depth); 2796 } 2797 #endif /* DEBUG */ 2798 2799 #if defined(PMAPCHECK) || defined(DEBUG) 2800 void 2801 pmap_pvo_verify(void) 2802 { 2803 int ptegidx; 2804 int s; 2805 2806 s = splvm(); 2807 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2808 struct pvo_entry *pvo; 2809 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2810 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2811 panic("pmap_pvo_verify: invalid pvo %p " 2812 "on list %#x", pvo, ptegidx); 2813 pmap_pvo_check(pvo); 2814 } 2815 } 2816 splx(s); 2817 } 2818 #endif /* PMAPCHECK */ 2819 2820 2821 void * 2822 pmap_pool_ualloc(struct pool *pp, int flags) 2823 { 2824 struct pvo_page *pvop; 2825 2826 if (uvm.page_init_done != true) { 2827 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2828 } 2829 2830 PMAP_LOCK(); 2831 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2832 if (pvop != NULL) { 2833 pmap_upvop_free--; 2834 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2835 PMAP_UNLOCK(); 2836 return pvop; 2837 } 2838 PMAP_UNLOCK(); 2839 return pmap_pool_malloc(pp, flags); 2840 } 2841 2842 void * 2843 pmap_pool_malloc(struct pool *pp, int flags) 2844 { 2845 struct pvo_page *pvop; 2846 struct vm_page *pg; 2847 2848 PMAP_LOCK(); 2849 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2850 if (pvop != NULL) { 2851 pmap_mpvop_free--; 2852 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2853 PMAP_UNLOCK(); 2854 return pvop; 2855 } 2856 PMAP_UNLOCK(); 2857 again: 2858 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2859 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2860 if (__predict_false(pg == NULL)) { 2861 if (flags & PR_WAITOK) { 2862 uvm_wait("plpg"); 2863 goto again; 2864 } else { 2865 return (0); 2866 } 2867 } 2868 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2869 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2870 } 2871 2872 void 2873 pmap_pool_ufree(struct pool *pp, void *va) 2874 { 2875 struct pvo_page *pvop; 2876 #if 0 2877 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2878 pmap_pool_mfree(va, size, tag); 2879 return; 2880 } 2881 #endif 2882 PMAP_LOCK(); 2883 pvop = va; 2884 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2885 pmap_upvop_free++; 2886 if (pmap_upvop_free > pmap_upvop_maxfree) 2887 pmap_upvop_maxfree = pmap_upvop_free; 2888 PMAP_UNLOCK(); 2889 } 2890 2891 void 2892 pmap_pool_mfree(struct pool *pp, void *va) 2893 { 2894 struct pvo_page *pvop; 2895 2896 PMAP_LOCK(); 2897 pvop = va; 2898 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2899 pmap_mpvop_free++; 2900 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2901 pmap_mpvop_maxfree = pmap_mpvop_free; 2902 PMAP_UNLOCK(); 2903 #if 0 2904 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2905 #endif 2906 } 2907 2908 /* 2909 * This routine in bootstraping to steal to-be-managed memory (which will 2910 * then be unmanaged). We use it to grab from the first 256MB for our 2911 * pmap needs and above 256MB for other stuff. 2912 */ 2913 vaddr_t 2914 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2915 { 2916 vsize_t size; 2917 vaddr_t va; 2918 paddr_t pa = 0; 2919 int npgs, bank; 2920 struct vm_physseg *ps; 2921 2922 if (uvm.page_init_done == true) 2923 panic("pmap_steal_memory: called _after_ bootstrap"); 2924 2925 *vstartp = VM_MIN_KERNEL_ADDRESS; 2926 *vendp = VM_MAX_KERNEL_ADDRESS; 2927 2928 size = round_page(vsize); 2929 npgs = atop(size); 2930 2931 /* 2932 * PA 0 will never be among those given to UVM so we can use it 2933 * to indicate we couldn't steal any memory. 2934 */ 2935 for (ps = vm_physmem, bank = 0; bank < vm_nphysseg; bank++, ps++) { 2936 if (ps->free_list == VM_FREELIST_FIRST256 && 2937 ps->avail_end - ps->avail_start >= npgs) { 2938 pa = ptoa(ps->avail_start); 2939 break; 2940 } 2941 } 2942 2943 if (pa == 0) 2944 panic("pmap_steal_memory: no approriate memory to steal!"); 2945 2946 ps->avail_start += npgs; 2947 ps->start += npgs; 2948 2949 /* 2950 * If we've used up all the pages in the segment, remove it and 2951 * compact the list. 2952 */ 2953 if (ps->avail_start == ps->end) { 2954 /* 2955 * If this was the last one, then a very bad thing has occurred 2956 */ 2957 if (--vm_nphysseg == 0) 2958 panic("pmap_steal_memory: out of memory!"); 2959 2960 printf("pmap_steal_memory: consumed bank %d\n", bank); 2961 for (; bank < vm_nphysseg; bank++, ps++) { 2962 ps[0] = ps[1]; 2963 } 2964 } 2965 2966 va = (vaddr_t) pa; 2967 memset((void *) va, 0, size); 2968 pmap_pages_stolen += npgs; 2969 #ifdef DEBUG 2970 if (pmapdebug && npgs > 1) { 2971 u_int cnt = 0; 2972 for (bank = 0, ps = vm_physmem; bank < vm_nphysseg; bank++, ps++) 2973 cnt += ps->avail_end - ps->avail_start; 2974 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2975 npgs, pmap_pages_stolen, cnt); 2976 } 2977 #endif 2978 2979 return va; 2980 } 2981 2982 /* 2983 * Find a chuck of memory with right size and alignment. 2984 */ 2985 paddr_t 2986 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2987 { 2988 struct mem_region *mp; 2989 paddr_t s, e; 2990 int i, j; 2991 2992 size = round_page(size); 2993 2994 DPRINTFN(BOOT, 2995 ("pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 2996 size, alignment, at_end)); 2997 2998 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2999 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 3000 alignment); 3001 3002 if (at_end) { 3003 if (alignment != PAGE_SIZE) 3004 panic("pmap_boot_find_memory: invalid ending " 3005 "alignment %#" _PRIxpa, alignment); 3006 3007 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 3008 s = mp->start + mp->size - size; 3009 if (s >= mp->start && mp->size >= size) { 3010 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3011 DPRINTFN(BOOT, 3012 ("pmap_boot_find_memory: b-avail[%d] start " 3013 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3014 mp->start, mp->size)); 3015 mp->size -= size; 3016 DPRINTFN(BOOT, 3017 ("pmap_boot_find_memory: a-avail[%d] start " 3018 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3019 mp->start, mp->size)); 3020 return s; 3021 } 3022 } 3023 panic("pmap_boot_find_memory: no available memory"); 3024 } 3025 3026 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3027 s = (mp->start + alignment - 1) & ~(alignment-1); 3028 e = s + size; 3029 3030 /* 3031 * Is the calculated region entirely within the region? 3032 */ 3033 if (s < mp->start || e > mp->start + mp->size) 3034 continue; 3035 3036 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3037 if (s == mp->start) { 3038 /* 3039 * If the block starts at the beginning of region, 3040 * adjust the size & start. (the region may now be 3041 * zero in length) 3042 */ 3043 DPRINTFN(BOOT, 3044 ("pmap_boot_find_memory: b-avail[%d] start " 3045 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3046 mp->start += size; 3047 mp->size -= size; 3048 DPRINTFN(BOOT, 3049 ("pmap_boot_find_memory: a-avail[%d] start " 3050 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3051 } else if (e == mp->start + mp->size) { 3052 /* 3053 * If the block starts at the beginning of region, 3054 * adjust only the size. 3055 */ 3056 DPRINTFN(BOOT, 3057 ("pmap_boot_find_memory: b-avail[%d] start " 3058 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3059 mp->size -= size; 3060 DPRINTFN(BOOT, 3061 ("pmap_boot_find_memory: a-avail[%d] start " 3062 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3063 } else { 3064 /* 3065 * Block is in the middle of the region, so we 3066 * have to split it in two. 3067 */ 3068 for (j = avail_cnt; j > i + 1; j--) { 3069 avail[j] = avail[j-1]; 3070 } 3071 DPRINTFN(BOOT, 3072 ("pmap_boot_find_memory: b-avail[%d] start " 3073 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3074 mp[1].start = e; 3075 mp[1].size = mp[0].start + mp[0].size - e; 3076 mp[0].size = s - mp[0].start; 3077 avail_cnt++; 3078 for (; i < avail_cnt; i++) { 3079 DPRINTFN(BOOT, 3080 ("pmap_boot_find_memory: a-avail[%d] " 3081 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3082 avail[i].start, avail[i].size)); 3083 } 3084 } 3085 KASSERT(s == (uintptr_t) s); 3086 return s; 3087 } 3088 panic("pmap_boot_find_memory: not enough memory for " 3089 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3090 } 3091 3092 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3093 #if defined (PMAP_OEA64_BRIDGE) 3094 int 3095 pmap_setup_segment0_map(int use_large_pages, ...) 3096 { 3097 vaddr_t va; 3098 3099 register_t pte_lo = 0x0; 3100 int ptegidx = 0, i = 0; 3101 struct pte pte; 3102 va_list ap; 3103 3104 /* Coherent + Supervisor RW, no user access */ 3105 pte_lo = PTE_M; 3106 3107 /* XXXSL 3108 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3109 * these have to take priority. 3110 */ 3111 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3112 ptegidx = va_to_pteg(pmap_kernel(), va); 3113 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3114 i = pmap_pte_insert(ptegidx, &pte); 3115 } 3116 3117 va_start(ap, use_large_pages); 3118 while (1) { 3119 paddr_t pa; 3120 size_t size; 3121 3122 va = va_arg(ap, vaddr_t); 3123 3124 if (va == 0) 3125 break; 3126 3127 pa = va_arg(ap, paddr_t); 3128 size = va_arg(ap, size_t); 3129 3130 for (; va < (va + size); va += 0x1000, pa += 0x1000) { 3131 #if 0 3132 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3133 #endif 3134 ptegidx = va_to_pteg(pmap_kernel(), va); 3135 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3136 i = pmap_pte_insert(ptegidx, &pte); 3137 } 3138 } 3139 3140 TLBSYNC(); 3141 SYNC(); 3142 return (0); 3143 } 3144 #endif /* PMAP_OEA64_BRIDGE */ 3145 3146 /* 3147 * This is not part of the defined PMAP interface and is specific to the 3148 * PowerPC architecture. This is called during initppc, before the system 3149 * is really initialized. 3150 */ 3151 void 3152 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3153 { 3154 struct mem_region *mp, tmp; 3155 paddr_t s, e; 3156 psize_t size; 3157 int i, j; 3158 3159 /* 3160 * Get memory. 3161 */ 3162 mem_regions(&mem, &avail); 3163 #if defined(DEBUG) 3164 if (pmapdebug & PMAPDEBUG_BOOT) { 3165 printf("pmap_bootstrap: memory configuration:\n"); 3166 for (mp = mem; mp->size; mp++) { 3167 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3168 mp->start, mp->size); 3169 } 3170 for (mp = avail; mp->size; mp++) { 3171 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3172 mp->start, mp->size); 3173 } 3174 } 3175 #endif 3176 3177 /* 3178 * Find out how much physical memory we have and in how many chunks. 3179 */ 3180 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3181 if (mp->start >= pmap_memlimit) 3182 continue; 3183 if (mp->start + mp->size > pmap_memlimit) { 3184 size = pmap_memlimit - mp->start; 3185 physmem += btoc(size); 3186 } else { 3187 physmem += btoc(mp->size); 3188 } 3189 mem_cnt++; 3190 } 3191 3192 /* 3193 * Count the number of available entries. 3194 */ 3195 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3196 avail_cnt++; 3197 3198 /* 3199 * Page align all regions. 3200 */ 3201 kernelstart = trunc_page(kernelstart); 3202 kernelend = round_page(kernelend); 3203 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3204 s = round_page(mp->start); 3205 mp->size -= (s - mp->start); 3206 mp->size = trunc_page(mp->size); 3207 mp->start = s; 3208 e = mp->start + mp->size; 3209 3210 DPRINTFN(BOOT, 3211 ("pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3212 i, mp->start, mp->size)); 3213 3214 /* 3215 * Don't allow the end to run beyond our artificial limit 3216 */ 3217 if (e > pmap_memlimit) 3218 e = pmap_memlimit; 3219 3220 /* 3221 * Is this region empty or strange? skip it. 3222 */ 3223 if (e <= s) { 3224 mp->start = 0; 3225 mp->size = 0; 3226 continue; 3227 } 3228 3229 /* 3230 * Does this overlap the beginning of kernel? 3231 * Does extend past the end of the kernel? 3232 */ 3233 else if (s < kernelstart && e > kernelstart) { 3234 if (e > kernelend) { 3235 avail[avail_cnt].start = kernelend; 3236 avail[avail_cnt].size = e - kernelend; 3237 avail_cnt++; 3238 } 3239 mp->size = kernelstart - s; 3240 } 3241 /* 3242 * Check whether this region overlaps the end of the kernel. 3243 */ 3244 else if (s < kernelend && e > kernelend) { 3245 mp->start = kernelend; 3246 mp->size = e - kernelend; 3247 } 3248 /* 3249 * Look whether this regions is completely inside the kernel. 3250 * Nuke it if it does. 3251 */ 3252 else if (s >= kernelstart && e <= kernelend) { 3253 mp->start = 0; 3254 mp->size = 0; 3255 } 3256 /* 3257 * If the user imposed a memory limit, enforce it. 3258 */ 3259 else if (s >= pmap_memlimit) { 3260 mp->start = -PAGE_SIZE; /* let's know why */ 3261 mp->size = 0; 3262 } 3263 else { 3264 mp->start = s; 3265 mp->size = e - s; 3266 } 3267 DPRINTFN(BOOT, 3268 ("pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3269 i, mp->start, mp->size)); 3270 } 3271 3272 /* 3273 * Move (and uncount) all the null return to the end. 3274 */ 3275 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3276 if (mp->size == 0) { 3277 tmp = avail[i]; 3278 avail[i] = avail[--avail_cnt]; 3279 avail[avail_cnt] = avail[i]; 3280 } 3281 } 3282 3283 /* 3284 * (Bubble)sort them into ascending order. 3285 */ 3286 for (i = 0; i < avail_cnt; i++) { 3287 for (j = i + 1; j < avail_cnt; j++) { 3288 if (avail[i].start > avail[j].start) { 3289 tmp = avail[i]; 3290 avail[i] = avail[j]; 3291 avail[j] = tmp; 3292 } 3293 } 3294 } 3295 3296 /* 3297 * Make sure they don't overlap. 3298 */ 3299 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3300 if (mp[0].start + mp[0].size > mp[1].start) { 3301 mp[0].size = mp[1].start - mp[0].start; 3302 } 3303 DPRINTFN(BOOT, 3304 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3305 i, mp->start, mp->size)); 3306 } 3307 DPRINTFN(BOOT, 3308 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3309 i, mp->start, mp->size)); 3310 3311 #ifdef PTEGCOUNT 3312 pmap_pteg_cnt = PTEGCOUNT; 3313 #else /* PTEGCOUNT */ 3314 3315 pmap_pteg_cnt = 0x1000; 3316 3317 while (pmap_pteg_cnt < physmem) 3318 pmap_pteg_cnt <<= 1; 3319 3320 pmap_pteg_cnt >>= 1; 3321 #endif /* PTEGCOUNT */ 3322 3323 #ifdef DEBUG 3324 DPRINTFN(BOOT, 3325 ("pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt)); 3326 #endif 3327 3328 /* 3329 * Find suitably aligned memory for PTEG hash table. 3330 */ 3331 size = pmap_pteg_cnt * sizeof(struct pteg); 3332 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3333 3334 #ifdef DEBUG 3335 DPRINTFN(BOOT, 3336 ("PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table)); 3337 #endif 3338 3339 3340 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3341 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3342 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3343 pmap_pteg_table, size); 3344 #endif 3345 3346 memset(__UNVOLATILE(pmap_pteg_table), 0, 3347 pmap_pteg_cnt * sizeof(struct pteg)); 3348 pmap_pteg_mask = pmap_pteg_cnt - 1; 3349 3350 /* 3351 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3352 * with pages. So we just steal them before giving them to UVM. 3353 */ 3354 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3355 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3356 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3357 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3358 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3359 pmap_pvo_table, size); 3360 #endif 3361 3362 for (i = 0; i < pmap_pteg_cnt; i++) 3363 TAILQ_INIT(&pmap_pvo_table[i]); 3364 3365 #ifndef MSGBUFADDR 3366 /* 3367 * Allocate msgbuf in high memory. 3368 */ 3369 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3370 #endif 3371 3372 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3373 paddr_t pfstart = atop(mp->start); 3374 paddr_t pfend = atop(mp->start + mp->size); 3375 if (mp->size == 0) 3376 continue; 3377 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3378 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3379 VM_FREELIST_FIRST256); 3380 } else if (mp->start >= SEGMENT_LENGTH) { 3381 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3382 VM_FREELIST_DEFAULT); 3383 } else { 3384 pfend = atop(SEGMENT_LENGTH); 3385 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3386 VM_FREELIST_FIRST256); 3387 pfstart = atop(SEGMENT_LENGTH); 3388 pfend = atop(mp->start + mp->size); 3389 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3390 VM_FREELIST_DEFAULT); 3391 } 3392 } 3393 3394 /* 3395 * Make sure kernel vsid is allocated as well as VSID 0. 3396 */ 3397 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3398 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3399 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3400 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3401 pmap_vsid_bitmap[0] |= 1; 3402 3403 /* 3404 * Initialize kernel pmap and hardware. 3405 */ 3406 3407 /* PMAP_OEA64_BRIDGE does support these instructions */ 3408 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3409 for (i = 0; i < 16; i++) { 3410 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3411 __asm volatile ("mtsrin %0,%1" 3412 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3413 } 3414 3415 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3416 __asm volatile ("mtsr %0,%1" 3417 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3418 #ifdef KERNEL2_SR 3419 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3420 __asm volatile ("mtsr %0,%1" 3421 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3422 #endif 3423 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3424 #if defined (PMAP_OEA) 3425 for (i = 0; i < 16; i++) { 3426 if (iosrtable[i] & SR601_T) { 3427 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3428 __asm volatile ("mtsrin %0,%1" 3429 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3430 } 3431 } 3432 __asm volatile ("sync; mtsdr1 %0; isync" 3433 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3434 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3435 __asm __volatile ("sync; mtsdr1 %0; isync" 3436 :: "r"((uintptr_t)pmap_pteg_table | (32 - cntlzw(pmap_pteg_mask >> 11)))); 3437 #endif 3438 tlbia(); 3439 3440 #ifdef ALTIVEC 3441 pmap_use_altivec = cpu_altivec; 3442 #endif 3443 3444 #ifdef DEBUG 3445 if (pmapdebug & PMAPDEBUG_BOOT) { 3446 u_int cnt; 3447 int bank; 3448 char pbuf[9]; 3449 for (cnt = 0, bank = 0; bank < vm_nphysseg; bank++) { 3450 cnt += vm_physmem[bank].avail_end - vm_physmem[bank].avail_start; 3451 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3452 bank, 3453 ptoa(vm_physmem[bank].avail_start), 3454 ptoa(vm_physmem[bank].avail_end), 3455 ptoa(vm_physmem[bank].avail_end - vm_physmem[bank].avail_start)); 3456 } 3457 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3458 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3459 pbuf, cnt); 3460 } 3461 #endif 3462 3463 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3464 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3465 &pmap_pool_uallocator, IPL_VM); 3466 3467 pool_setlowat(&pmap_upvo_pool, 252); 3468 3469 pool_init(&pmap_pool, sizeof(struct pmap), 3470 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3471 IPL_NONE); 3472 3473 #if defined(PMAP_NEED_MAPKERNEL) || 1 3474 { 3475 struct pmap *pm = pmap_kernel(); 3476 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3477 extern int etext[], kernel_text[]; 3478 vaddr_t va, va_etext = (paddr_t) etext; 3479 #endif 3480 paddr_t pa, pa_end; 3481 register_t sr; 3482 struct pte pt; 3483 unsigned int ptegidx; 3484 int bank; 3485 3486 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3487 pm->pm_sr[0] = sr; 3488 3489 for (bank = 0; bank < vm_nphysseg; bank++) { 3490 pa_end = ptoa(vm_physmem[bank].avail_end); 3491 pa = ptoa(vm_physmem[bank].avail_start); 3492 for (; pa < pa_end; pa += PAGE_SIZE) { 3493 ptegidx = va_to_pteg(pm, pa); 3494 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3495 pmap_pte_insert(ptegidx, &pt); 3496 } 3497 } 3498 3499 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3500 va = (vaddr_t) kernel_text; 3501 3502 for (pa = kernelstart; va < va_etext; 3503 pa += PAGE_SIZE, va += PAGE_SIZE) { 3504 ptegidx = va_to_pteg(pm, va); 3505 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3506 pmap_pte_insert(ptegidx, &pt); 3507 } 3508 3509 for (; pa < kernelend; 3510 pa += PAGE_SIZE, va += PAGE_SIZE) { 3511 ptegidx = va_to_pteg(pm, va); 3512 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3513 pmap_pte_insert(ptegidx, &pt); 3514 } 3515 3516 for (va = 0, pa = 0; va < kernelstart; 3517 pa += PAGE_SIZE, va += PAGE_SIZE) { 3518 ptegidx = va_to_pteg(pm, va); 3519 if (va < 0x3000) 3520 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3521 else 3522 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3523 pmap_pte_insert(ptegidx, &pt); 3524 } 3525 for (va = kernelend, pa = kernelend; va < SEGMENT_LENGTH; 3526 pa += PAGE_SIZE, va += PAGE_SIZE) { 3527 ptegidx = va_to_pteg(pm, va); 3528 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3529 pmap_pte_insert(ptegidx, &pt); 3530 } 3531 #endif 3532 3533 __asm volatile ("mtsrin %0,%1" 3534 :: "r"(sr), "r"(kernelstart)); 3535 } 3536 #endif 3537 } 3538
Indexes created Sat Oct 25 16:10:12 GMT 2025