pmap.c revision 1.68
1 /* $NetBSD: pmap.c,v 1.68 2009/11/07 07:27:46 cegger Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 36 * Copyright (C) 1995, 1996 TooLs GmbH. 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by TooLs GmbH. 50 * 4. The name of TooLs GmbH may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 58 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 59 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 60 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 61 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 62 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.68 2009/11/07 07:27:46 cegger Exp $"); 67 68 #define PMAP_NOOPNAMES 69 70 #include "opt_ppcarch.h" 71 #include "opt_altivec.h" 72 #include "opt_multiprocessor.h" 73 #include "opt_pmap.h" 74 75 #include <sys/param.h> 76 #include <sys/malloc.h> 77 #include <sys/proc.h> 78 #include <sys/user.h> 79 #include <sys/pool.h> 80 #include <sys/queue.h> 81 #include <sys/device.h> /* for evcnt */ 82 #include <sys/systm.h> 83 #include <sys/atomic.h> 84 85 #include <uvm/uvm.h> 86 87 #include <machine/pcb.h> 88 #include <machine/powerpc.h> 89 #include <powerpc/spr.h> 90 #include <powerpc/oea/sr_601.h> 91 #include <powerpc/bat.h> 92 #include <powerpc/stdarg.h> 93 94 #ifdef ALTIVEC 95 int pmap_use_altivec; 96 #endif 97 98 volatile struct pteg *pmap_pteg_table; 99 unsigned int pmap_pteg_cnt; 100 unsigned int pmap_pteg_mask; 101 #ifdef PMAP_MEMLIMIT 102 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 103 #else 104 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 105 #endif 106 107 struct pmap kernel_pmap_; 108 unsigned int pmap_pages_stolen; 109 u_long pmap_pte_valid; 110 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 111 u_long pmap_pvo_enter_depth; 112 u_long pmap_pvo_remove_depth; 113 #endif 114 115 #ifndef MSGBUFADDR 116 extern paddr_t msgbuf_paddr; 117 #endif 118 119 static struct mem_region *mem, *avail; 120 static u_int mem_cnt, avail_cnt; 121 122 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 123 # define PMAP_OEA 1 124 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA64) && !defined(PPC_OEA64_BRIDGE) 125 # define PMAPNAME(name) pmap_##name 126 # endif 127 #endif 128 129 #if defined(PMAP_OEA64) 130 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64_BRIDGE) 131 # define PMAPNAME(name) pmap_##name 132 # endif 133 #endif 134 135 #if defined(PMAP_OEA64_BRIDGE) 136 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64) 137 # define PMAPNAME(name) pmap_##name 138 # endif 139 #endif 140 141 #if defined(PMAP_OEA) 142 #define _PRIxpte "lx" 143 #else 144 #define _PRIxpte PRIx64 145 #endif 146 #define _PRIxpa "lx" 147 #define _PRIxva "lx" 148 #define _PRIsr "lx" 149 150 #if defined(PMAP_EXCLUDE_DECLS) && !defined(PMAPNAME) 151 #if defined(PMAP_OEA) 152 #define PMAPNAME(name) pmap32_##name 153 #elif defined(PMAP_OEA64) 154 #define PMAPNAME(name) pmap64_##name 155 #elif defined(PMAP_OEA64_BRIDGE) 156 #define PMAPNAME(name) pmap64bridge_##name 157 #else 158 #error unknown variant for pmap 159 #endif 160 #endif /* PMAP_EXLCUDE_DECLS && !PMAPNAME */ 161 162 #if defined(PMAPNAME) 163 #define STATIC static 164 #define pmap_pte_spill PMAPNAME(pte_spill) 165 #define pmap_real_memory PMAPNAME(real_memory) 166 #define pmap_init PMAPNAME(init) 167 #define pmap_virtual_space PMAPNAME(virtual_space) 168 #define pmap_create PMAPNAME(create) 169 #define pmap_reference PMAPNAME(reference) 170 #define pmap_destroy PMAPNAME(destroy) 171 #define pmap_copy PMAPNAME(copy) 172 #define pmap_update PMAPNAME(update) 173 #define pmap_enter PMAPNAME(enter) 174 #define pmap_remove PMAPNAME(remove) 175 #define pmap_kenter_pa PMAPNAME(kenter_pa) 176 #define pmap_kremove PMAPNAME(kremove) 177 #define pmap_extract PMAPNAME(extract) 178 #define pmap_protect PMAPNAME(protect) 179 #define pmap_unwire PMAPNAME(unwire) 180 #define pmap_page_protect PMAPNAME(page_protect) 181 #define pmap_query_bit PMAPNAME(query_bit) 182 #define pmap_clear_bit PMAPNAME(clear_bit) 183 184 #define pmap_activate PMAPNAME(activate) 185 #define pmap_deactivate PMAPNAME(deactivate) 186 187 #define pmap_pinit PMAPNAME(pinit) 188 #define pmap_procwr PMAPNAME(procwr) 189 190 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 191 #define pmap_pte_print PMAPNAME(pte_print) 192 #define pmap_pteg_check PMAPNAME(pteg_check) 193 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 194 #define pmap_print_pte PMAPNAME(print_pte) 195 #define pmap_pteg_dist PMAPNAME(pteg_dist) 196 #endif 197 #if defined(DEBUG) || defined(PMAPCHECK) 198 #define pmap_pvo_verify PMAPNAME(pvo_verify) 199 #define pmapcheck PMAPNAME(check) 200 #endif 201 #if defined(DEBUG) || defined(PMAPDEBUG) 202 #define pmapdebug PMAPNAME(debug) 203 #endif 204 #define pmap_steal_memory PMAPNAME(steal_memory) 205 #define pmap_bootstrap PMAPNAME(bootstrap) 206 #else 207 #define STATIC /* nothing */ 208 #endif /* PMAPNAME */ 209 210 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 211 STATIC void pmap_real_memory(paddr_t *, psize_t *); 212 STATIC void pmap_init(void); 213 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 214 STATIC pmap_t pmap_create(void); 215 STATIC void pmap_reference(pmap_t); 216 STATIC void pmap_destroy(pmap_t); 217 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 218 STATIC void pmap_update(pmap_t); 219 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); 220 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 221 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t, u_int); 222 STATIC void pmap_kremove(vaddr_t, vsize_t); 223 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 224 225 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 226 STATIC void pmap_unwire(pmap_t, vaddr_t); 227 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 228 STATIC bool pmap_query_bit(struct vm_page *, int); 229 STATIC bool pmap_clear_bit(struct vm_page *, int); 230 231 STATIC void pmap_activate(struct lwp *); 232 STATIC void pmap_deactivate(struct lwp *); 233 234 STATIC void pmap_pinit(pmap_t pm); 235 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 236 237 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 238 STATIC void pmap_pte_print(volatile struct pte *); 239 STATIC void pmap_pteg_check(void); 240 STATIC void pmap_print_mmuregs(void); 241 STATIC void pmap_print_pte(pmap_t, vaddr_t); 242 STATIC void pmap_pteg_dist(void); 243 #endif 244 #if defined(DEBUG) || defined(PMAPCHECK) 245 STATIC void pmap_pvo_verify(void); 246 #endif 247 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 248 STATIC void pmap_bootstrap(paddr_t, paddr_t); 249 250 #ifdef PMAPNAME 251 const struct pmap_ops PMAPNAME(ops) = { 252 .pmapop_pte_spill = pmap_pte_spill, 253 .pmapop_real_memory = pmap_real_memory, 254 .pmapop_init = pmap_init, 255 .pmapop_virtual_space = pmap_virtual_space, 256 .pmapop_create = pmap_create, 257 .pmapop_reference = pmap_reference, 258 .pmapop_destroy = pmap_destroy, 259 .pmapop_copy = pmap_copy, 260 .pmapop_update = pmap_update, 261 .pmapop_enter = pmap_enter, 262 .pmapop_remove = pmap_remove, 263 .pmapop_kenter_pa = pmap_kenter_pa, 264 .pmapop_kremove = pmap_kremove, 265 .pmapop_extract = pmap_extract, 266 .pmapop_protect = pmap_protect, 267 .pmapop_unwire = pmap_unwire, 268 .pmapop_page_protect = pmap_page_protect, 269 .pmapop_query_bit = pmap_query_bit, 270 .pmapop_clear_bit = pmap_clear_bit, 271 .pmapop_activate = pmap_activate, 272 .pmapop_deactivate = pmap_deactivate, 273 .pmapop_pinit = pmap_pinit, 274 .pmapop_procwr = pmap_procwr, 275 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 276 .pmapop_pte_print = pmap_pte_print, 277 .pmapop_pteg_check = pmap_pteg_check, 278 .pmapop_print_mmuregs = pmap_print_mmuregs, 279 .pmapop_print_pte = pmap_print_pte, 280 .pmapop_pteg_dist = pmap_pteg_dist, 281 #else 282 .pmapop_pte_print = NULL, 283 .pmapop_pteg_check = NULL, 284 .pmapop_print_mmuregs = NULL, 285 .pmapop_print_pte = NULL, 286 .pmapop_pteg_dist = NULL, 287 #endif 288 #if defined(DEBUG) || defined(PMAPCHECK) 289 .pmapop_pvo_verify = pmap_pvo_verify, 290 #else 291 .pmapop_pvo_verify = NULL, 292 #endif 293 .pmapop_steal_memory = pmap_steal_memory, 294 .pmapop_bootstrap = pmap_bootstrap, 295 }; 296 #endif /* !PMAPNAME */ 297 298 /* 299 * The following structure is aligned to 32 bytes 300 */ 301 struct pvo_entry { 302 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 303 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 304 struct pte pvo_pte; /* Prebuilt PTE */ 305 pmap_t pvo_pmap; /* ptr to owning pmap */ 306 vaddr_t pvo_vaddr; /* VA of entry */ 307 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 308 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 309 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 310 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 311 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 312 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 313 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 314 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 315 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 316 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 317 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 318 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 319 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 320 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 321 #define PVO_REMOVE 6 /* PVO has been removed */ 322 #define PVO_WHERE_MASK 15 323 #define PVO_WHERE_SHFT 8 324 } __attribute__ ((aligned (32))); 325 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 326 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 327 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 328 #define PVO_PTEGIDX_CLR(pvo) \ 329 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 330 #define PVO_PTEGIDX_SET(pvo,i) \ 331 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 332 #define PVO_WHERE(pvo,w) \ 333 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 334 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 335 336 TAILQ_HEAD(pvo_tqhead, pvo_entry); 337 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 338 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 339 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 340 341 struct pool pmap_pool; /* pool for pmap structures */ 342 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 343 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 344 345 /* 346 * We keep a cache of unmanaged pages to be used for pvo entries for 347 * unmanaged pages. 348 */ 349 struct pvo_page { 350 SIMPLEQ_ENTRY(pvo_page) pvop_link; 351 }; 352 SIMPLEQ_HEAD(pvop_head, pvo_page); 353 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 354 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 355 u_long pmap_upvop_free; 356 u_long pmap_upvop_maxfree; 357 u_long pmap_mpvop_free; 358 u_long pmap_mpvop_maxfree; 359 360 static void *pmap_pool_ualloc(struct pool *, int); 361 static void *pmap_pool_malloc(struct pool *, int); 362 363 static void pmap_pool_ufree(struct pool *, void *); 364 static void pmap_pool_mfree(struct pool *, void *); 365 366 static struct pool_allocator pmap_pool_mallocator = { 367 .pa_alloc = pmap_pool_malloc, 368 .pa_free = pmap_pool_mfree, 369 .pa_pagesz = 0, 370 }; 371 372 static struct pool_allocator pmap_pool_uallocator = { 373 .pa_alloc = pmap_pool_ualloc, 374 .pa_free = pmap_pool_ufree, 375 .pa_pagesz = 0, 376 }; 377 378 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 379 void pmap_pte_print(volatile struct pte *); 380 void pmap_pteg_check(void); 381 void pmap_pteg_dist(void); 382 void pmap_print_pte(pmap_t, vaddr_t); 383 void pmap_print_mmuregs(void); 384 #endif 385 386 #if defined(DEBUG) || defined(PMAPCHECK) 387 #ifdef PMAPCHECK 388 int pmapcheck = 1; 389 #else 390 int pmapcheck = 0; 391 #endif 392 void pmap_pvo_verify(void); 393 static void pmap_pvo_check(const struct pvo_entry *); 394 #define PMAP_PVO_CHECK(pvo) \ 395 do { \ 396 if (pmapcheck) \ 397 pmap_pvo_check(pvo); \ 398 } while (0) 399 #else 400 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 401 #endif 402 static int pmap_pte_insert(int, struct pte *); 403 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 404 vaddr_t, paddr_t, register_t, int); 405 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 406 static void pmap_pvo_free(struct pvo_entry *); 407 static void pmap_pvo_free_list(struct pvo_head *); 408 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 409 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 410 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 411 static void pvo_set_exec(struct pvo_entry *); 412 static void pvo_clear_exec(struct pvo_entry *); 413 414 static void tlbia(void); 415 416 static void pmap_release(pmap_t); 417 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 418 419 static uint32_t pmap_pvo_reclaim_nextidx; 420 #ifdef DEBUG 421 static int pmap_pvo_reclaim_debugctr; 422 #endif 423 424 #define VSID_NBPW (sizeof(uint32_t) * 8) 425 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 426 427 static int pmap_initialized; 428 429 #if defined(DEBUG) || defined(PMAPDEBUG) 430 #define PMAPDEBUG_BOOT 0x0001 431 #define PMAPDEBUG_PTE 0x0002 432 #define PMAPDEBUG_EXEC 0x0008 433 #define PMAPDEBUG_PVOENTER 0x0010 434 #define PMAPDEBUG_PVOREMOVE 0x0020 435 #define PMAPDEBUG_ACTIVATE 0x0100 436 #define PMAPDEBUG_CREATE 0x0200 437 #define PMAPDEBUG_ENTER 0x1000 438 #define PMAPDEBUG_KENTER 0x2000 439 #define PMAPDEBUG_KREMOVE 0x4000 440 #define PMAPDEBUG_REMOVE 0x8000 441 442 unsigned int pmapdebug = 0; 443 444 # define DPRINTF(x) printf x 445 # define DPRINTFN(n, x) if (pmapdebug & PMAPDEBUG_ ## n) printf x 446 #else 447 # define DPRINTF(x) 448 # define DPRINTFN(n, x) 449 #endif 450 451 452 #ifdef PMAPCOUNTERS 453 /* 454 * From pmap_subr.c 455 */ 456 extern struct evcnt pmap_evcnt_mappings; 457 extern struct evcnt pmap_evcnt_unmappings; 458 459 extern struct evcnt pmap_evcnt_kernel_mappings; 460 extern struct evcnt pmap_evcnt_kernel_unmappings; 461 462 extern struct evcnt pmap_evcnt_mappings_replaced; 463 464 extern struct evcnt pmap_evcnt_exec_mappings; 465 extern struct evcnt pmap_evcnt_exec_cached; 466 467 extern struct evcnt pmap_evcnt_exec_synced; 468 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 469 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 470 471 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 472 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 473 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 474 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 475 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 476 477 extern struct evcnt pmap_evcnt_updates; 478 extern struct evcnt pmap_evcnt_collects; 479 extern struct evcnt pmap_evcnt_copies; 480 481 extern struct evcnt pmap_evcnt_ptes_spilled; 482 extern struct evcnt pmap_evcnt_ptes_unspilled; 483 extern struct evcnt pmap_evcnt_ptes_evicted; 484 485 extern struct evcnt pmap_evcnt_ptes_primary[8]; 486 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 487 extern struct evcnt pmap_evcnt_ptes_removed; 488 extern struct evcnt pmap_evcnt_ptes_changed; 489 extern struct evcnt pmap_evcnt_pvos_reclaimed; 490 extern struct evcnt pmap_evcnt_pvos_failed; 491 492 extern struct evcnt pmap_evcnt_zeroed_pages; 493 extern struct evcnt pmap_evcnt_copied_pages; 494 extern struct evcnt pmap_evcnt_idlezeroed_pages; 495 496 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 497 #define PMAPCOUNT2(ev) ((ev).ev_count++) 498 #else 499 #define PMAPCOUNT(ev) ((void) 0) 500 #define PMAPCOUNT2(ev) ((void) 0) 501 #endif 502 503 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 504 505 /* XXXSL: this needs to be moved to assembler */ 506 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 507 508 #define TLBSYNC() __asm volatile("tlbsync") 509 #define SYNC() __asm volatile("sync") 510 #define EIEIO() __asm volatile("eieio") 511 #define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va)) 512 #define MFMSR() mfmsr() 513 #define MTMSR(psl) mtmsr(psl) 514 #define MFPVR() mfpvr() 515 #define MFSRIN(va) mfsrin(va) 516 #define MFTB() mfrtcltbl() 517 518 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 519 static inline register_t 520 mfsrin(vaddr_t va) 521 { 522 register_t sr; 523 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 524 return sr; 525 } 526 #endif /* PMAP_OEA*/ 527 528 #if defined (PMAP_OEA64_BRIDGE) 529 extern void mfmsr64 (register64_t *result); 530 #endif /* PMAP_OEA64_BRIDGE */ 531 532 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 533 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 534 535 static inline register_t 536 pmap_interrupts_off(void) 537 { 538 register_t msr = MFMSR(); 539 if (msr & PSL_EE) 540 MTMSR(msr & ~PSL_EE); 541 return msr; 542 } 543 544 static void 545 pmap_interrupts_restore(register_t msr) 546 { 547 if (msr & PSL_EE) 548 MTMSR(msr); 549 } 550 551 static inline u_int32_t 552 mfrtcltbl(void) 553 { 554 #ifdef PPC_OEA601 555 if ((MFPVR() >> 16) == MPC601) 556 return (mfrtcl() >> 7); 557 else 558 #endif 559 return (mftbl()); 560 } 561 562 /* 563 * These small routines may have to be replaced, 564 * if/when we support processors other that the 604. 565 */ 566 567 void 568 tlbia(void) 569 { 570 char *i; 571 572 SYNC(); 573 #if defined(PMAP_OEA) 574 /* 575 * Why not use "tlbia"? Because not all processors implement it. 576 * 577 * This needs to be a per-CPU callback to do the appropriate thing 578 * for the CPU. XXX 579 */ 580 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 581 TLBIE(i); 582 EIEIO(); 583 SYNC(); 584 } 585 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 586 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 587 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 588 TLBIEL(i); 589 EIEIO(); 590 SYNC(); 591 } 592 #endif 593 TLBSYNC(); 594 SYNC(); 595 } 596 597 static inline register_t 598 va_to_vsid(const struct pmap *pm, vaddr_t addr) 599 { 600 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 601 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 602 #else /* PMAP_OEA64 */ 603 #if 0 604 const struct ste *ste; 605 register_t hash; 606 int i; 607 608 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 609 610 /* 611 * Try the primary group first 612 */ 613 ste = pm->pm_stes[hash].stes; 614 for (i = 0; i < 8; i++, ste++) { 615 if (ste->ste_hi & STE_V) && 616 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 617 return ste; 618 } 619 620 /* 621 * Then the secondary group. 622 */ 623 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 624 for (i = 0; i < 8; i++, ste++) { 625 if (ste->ste_hi & STE_V) && 626 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 627 return addr; 628 } 629 630 return NULL; 631 #else 632 /* 633 * Rather than searching the STE groups for the VSID, we know 634 * how we generate that from the ESID and so do that. 635 */ 636 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 637 #endif 638 #endif /* PMAP_OEA */ 639 } 640 641 static inline register_t 642 va_to_pteg(const struct pmap *pm, vaddr_t addr) 643 { 644 register_t hash; 645 646 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 647 return hash & pmap_pteg_mask; 648 } 649 650 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 651 /* 652 * Given a PTE in the page table, calculate the VADDR that hashes to it. 653 * The only bit of magic is that the top 4 bits of the address doesn't 654 * technically exist in the PTE. But we know we reserved 4 bits of the 655 * VSID for it so that's how we get it. 656 */ 657 static vaddr_t 658 pmap_pte_to_va(volatile const struct pte *pt) 659 { 660 vaddr_t va; 661 uintptr_t ptaddr = (uintptr_t) pt; 662 663 if (pt->pte_hi & PTE_HID) 664 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 665 666 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 667 #if defined(PMAP_OEA) 668 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 669 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 670 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 671 #endif 672 va <<= ADDR_PIDX_SHFT; 673 674 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 675 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 676 677 #if defined(PMAP_OEA64) 678 /* PPC63 Bits 0-35 */ 679 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 680 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 681 /* PPC Bits 0-3 */ 682 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 683 #endif 684 685 return va; 686 } 687 #endif 688 689 static inline struct pvo_head * 690 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 691 { 692 struct vm_page *pg; 693 694 pg = PHYS_TO_VM_PAGE(pa); 695 if (pg_p != NULL) 696 *pg_p = pg; 697 if (pg == NULL) 698 return &pmap_pvo_unmanaged; 699 return &pg->mdpage.mdpg_pvoh; 700 } 701 702 static inline struct pvo_head * 703 vm_page_to_pvoh(struct vm_page *pg) 704 { 705 return &pg->mdpage.mdpg_pvoh; 706 } 707 708 709 static inline void 710 pmap_attr_clear(struct vm_page *pg, int ptebit) 711 { 712 pg->mdpage.mdpg_attrs &= ~ptebit; 713 } 714 715 static inline int 716 pmap_attr_fetch(struct vm_page *pg) 717 { 718 return pg->mdpage.mdpg_attrs; 719 } 720 721 static inline void 722 pmap_attr_save(struct vm_page *pg, int ptebit) 723 { 724 pg->mdpage.mdpg_attrs |= ptebit; 725 } 726 727 static inline int 728 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 729 { 730 if (pt->pte_hi == pvo_pt->pte_hi 731 #if 0 732 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 733 ~(PTE_REF|PTE_CHG)) == 0 734 #endif 735 ) 736 return 1; 737 return 0; 738 } 739 740 static inline void 741 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 742 { 743 /* 744 * Construct the PTE. Default to IMB initially. Valid bit 745 * only gets set when the real pte is set in memory. 746 * 747 * Note: Don't set the valid bit for correct operation of tlb update. 748 */ 749 #if defined(PMAP_OEA) 750 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 751 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 752 pt->pte_lo = pte_lo; 753 #elif defined (PMAP_OEA64_BRIDGE) 754 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 755 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 756 pt->pte_lo = (u_int64_t) pte_lo; 757 #elif defined (PMAP_OEA64) 758 #error PMAP_OEA64 not supported 759 #endif /* PMAP_OEA */ 760 } 761 762 static inline void 763 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 764 { 765 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 766 } 767 768 static inline void 769 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 770 { 771 /* 772 * As shown in Section 7.6.3.2.3 773 */ 774 pt->pte_lo &= ~ptebit; 775 TLBIE(va); 776 SYNC(); 777 EIEIO(); 778 TLBSYNC(); 779 SYNC(); 780 #ifdef MULTIPROCESSOR 781 DCBST(pt); 782 #endif 783 } 784 785 static inline void 786 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 787 { 788 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 789 if (pvo_pt->pte_hi & PTE_VALID) 790 panic("pte_set: setting an already valid pte %p", pvo_pt); 791 #endif 792 pvo_pt->pte_hi |= PTE_VALID; 793 794 /* 795 * Update the PTE as defined in section 7.6.3.1 796 * Note that the REF/CHG bits are from pvo_pt and thus should 797 * have been saved so this routine can restore them (if desired). 798 */ 799 pt->pte_lo = pvo_pt->pte_lo; 800 EIEIO(); 801 pt->pte_hi = pvo_pt->pte_hi; 802 TLBSYNC(); 803 SYNC(); 804 #ifdef MULTIPROCESSOR 805 DCBST(pt); 806 #endif 807 pmap_pte_valid++; 808 } 809 810 static inline void 811 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 812 { 813 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 814 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 815 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 816 if ((pt->pte_hi & PTE_VALID) == 0) 817 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 818 #endif 819 820 pvo_pt->pte_hi &= ~PTE_VALID; 821 /* 822 * Force the ref & chg bits back into the PTEs. 823 */ 824 SYNC(); 825 /* 826 * Invalidate the pte ... (Section 7.6.3.3) 827 */ 828 pt->pte_hi &= ~PTE_VALID; 829 SYNC(); 830 TLBIE(va); 831 SYNC(); 832 EIEIO(); 833 TLBSYNC(); 834 SYNC(); 835 /* 836 * Save the ref & chg bits ... 837 */ 838 pmap_pte_synch(pt, pvo_pt); 839 pmap_pte_valid--; 840 } 841 842 static inline void 843 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 844 { 845 /* 846 * Invalidate the PTE 847 */ 848 pmap_pte_unset(pt, pvo_pt, va); 849 pmap_pte_set(pt, pvo_pt); 850 } 851 852 /* 853 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 854 * (either primary or secondary location). 855 * 856 * Note: both the destination and source PTEs must not have PTE_VALID set. 857 */ 858 859 static int 860 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 861 { 862 volatile struct pte *pt; 863 int i; 864 865 #if defined(DEBUG) 866 DPRINTFN(PTE, ("pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 867 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo)); 868 #endif 869 /* 870 * First try primary hash. 871 */ 872 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 873 if ((pt->pte_hi & PTE_VALID) == 0) { 874 pvo_pt->pte_hi &= ~PTE_HID; 875 pmap_pte_set(pt, pvo_pt); 876 return i; 877 } 878 } 879 880 /* 881 * Now try secondary hash. 882 */ 883 ptegidx ^= pmap_pteg_mask; 884 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 885 if ((pt->pte_hi & PTE_VALID) == 0) { 886 pvo_pt->pte_hi |= PTE_HID; 887 pmap_pte_set(pt, pvo_pt); 888 return i; 889 } 890 } 891 return -1; 892 } 893 894 /* 895 * Spill handler. 896 * 897 * Tries to spill a page table entry from the overflow area. 898 * This runs in either real mode (if dealing with a exception spill) 899 * or virtual mode when dealing with manually spilling one of the 900 * kernel's pte entries. In either case, interrupts are already 901 * disabled. 902 */ 903 904 int 905 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 906 { 907 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 908 struct pvo_entry *pvo; 909 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 910 struct pvo_tqhead *pvoh, *vpvoh = NULL; 911 int ptegidx, i, j; 912 volatile struct pteg *pteg; 913 volatile struct pte *pt; 914 915 PMAP_LOCK(); 916 917 ptegidx = va_to_pteg(pm, addr); 918 919 /* 920 * Have to substitute some entry. Use the primary hash for this. 921 * Use low bits of timebase as random generator. Make sure we are 922 * not picking a kernel pte for replacement. 923 */ 924 pteg = &pmap_pteg_table[ptegidx]; 925 i = MFTB() & 7; 926 for (j = 0; j < 8; j++) { 927 pt = &pteg->pt[i]; 928 if ((pt->pte_hi & PTE_VALID) == 0) 929 break; 930 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 931 < PHYSMAP_VSIDBITS) 932 break; 933 i = (i + 1) & 7; 934 } 935 KASSERT(j < 8); 936 937 source_pvo = NULL; 938 victim_pvo = NULL; 939 pvoh = &pmap_pvo_table[ptegidx]; 940 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 941 942 /* 943 * We need to find pvo entry for this address... 944 */ 945 PMAP_PVO_CHECK(pvo); /* sanity check */ 946 947 /* 948 * If we haven't found the source and we come to a PVO with 949 * a valid PTE, then we know we can't find it because all 950 * evicted PVOs always are first in the list. 951 */ 952 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 953 break; 954 if (source_pvo == NULL && pm == pvo->pvo_pmap && 955 addr == PVO_VADDR(pvo)) { 956 957 /* 958 * Now we have found the entry to be spilled into the 959 * pteg. Attempt to insert it into the page table. 960 */ 961 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 962 if (j >= 0) { 963 PVO_PTEGIDX_SET(pvo, j); 964 PMAP_PVO_CHECK(pvo); /* sanity check */ 965 PVO_WHERE(pvo, SPILL_INSERT); 966 pvo->pvo_pmap->pm_evictions--; 967 PMAPCOUNT(ptes_spilled); 968 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 969 ? pmap_evcnt_ptes_secondary 970 : pmap_evcnt_ptes_primary)[j]); 971 972 /* 973 * Since we keep the evicted entries at the 974 * from of the PVO list, we need move this 975 * (now resident) PVO after the evicted 976 * entries. 977 */ 978 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 979 980 /* 981 * If we don't have to move (either we were the 982 * last entry or the next entry was valid), 983 * don't change our position. Otherwise 984 * move ourselves to the tail of the queue. 985 */ 986 if (next_pvo != NULL && 987 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 988 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 989 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 990 } 991 PMAP_UNLOCK(); 992 return 1; 993 } 994 source_pvo = pvo; 995 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 996 return 0; 997 } 998 if (victim_pvo != NULL) 999 break; 1000 } 1001 1002 /* 1003 * We also need the pvo entry of the victim we are replacing 1004 * so save the R & C bits of the PTE. 1005 */ 1006 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1007 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1008 vpvoh = pvoh; /* *1* */ 1009 victim_pvo = pvo; 1010 if (source_pvo != NULL) 1011 break; 1012 } 1013 } 1014 1015 if (source_pvo == NULL) { 1016 PMAPCOUNT(ptes_unspilled); 1017 PMAP_UNLOCK(); 1018 return 0; 1019 } 1020 1021 if (victim_pvo == NULL) { 1022 if ((pt->pte_hi & PTE_HID) == 0) 1023 panic("pmap_pte_spill: victim p-pte (%p) has " 1024 "no pvo entry!", pt); 1025 1026 /* 1027 * If this is a secondary PTE, we need to search 1028 * its primary pvo bucket for the matching PVO. 1029 */ 1030 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1031 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1032 PMAP_PVO_CHECK(pvo); /* sanity check */ 1033 1034 /* 1035 * We also need the pvo entry of the victim we are 1036 * replacing so save the R & C bits of the PTE. 1037 */ 1038 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1039 victim_pvo = pvo; 1040 break; 1041 } 1042 } 1043 if (victim_pvo == NULL) 1044 panic("pmap_pte_spill: victim s-pte (%p) has " 1045 "no pvo entry!", pt); 1046 } 1047 1048 /* 1049 * The victim should be not be a kernel PVO/PTE entry. 1050 */ 1051 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1052 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1053 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1054 1055 /* 1056 * We are invalidating the TLB entry for the EA for the 1057 * we are replacing even though its valid; If we don't 1058 * we lose any ref/chg bit changes contained in the TLB 1059 * entry. 1060 */ 1061 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1062 1063 /* 1064 * To enforce the PVO list ordering constraint that all 1065 * evicted entries should come before all valid entries, 1066 * move the source PVO to the tail of its list and the 1067 * victim PVO to the head of its list (which might not be 1068 * the same list, if the victim was using the secondary hash). 1069 */ 1070 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1071 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1072 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1073 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1074 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1075 pmap_pte_set(pt, &source_pvo->pvo_pte); 1076 victim_pvo->pvo_pmap->pm_evictions++; 1077 source_pvo->pvo_pmap->pm_evictions--; 1078 PVO_WHERE(victim_pvo, SPILL_UNSET); 1079 PVO_WHERE(source_pvo, SPILL_SET); 1080 1081 PVO_PTEGIDX_CLR(victim_pvo); 1082 PVO_PTEGIDX_SET(source_pvo, i); 1083 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1084 PMAPCOUNT(ptes_spilled); 1085 PMAPCOUNT(ptes_evicted); 1086 PMAPCOUNT(ptes_removed); 1087 1088 PMAP_PVO_CHECK(victim_pvo); 1089 PMAP_PVO_CHECK(source_pvo); 1090 1091 PMAP_UNLOCK(); 1092 return 1; 1093 } 1094 1095 /* 1096 * Restrict given range to physical memory 1097 */ 1098 void 1099 pmap_real_memory(paddr_t *start, psize_t *size) 1100 { 1101 struct mem_region *mp; 1102 1103 for (mp = mem; mp->size; mp++) { 1104 if (*start + *size > mp->start 1105 && *start < mp->start + mp->size) { 1106 if (*start < mp->start) { 1107 *size -= mp->start - *start; 1108 *start = mp->start; 1109 } 1110 if (*start + *size > mp->start + mp->size) 1111 *size = mp->start + mp->size - *start; 1112 return; 1113 } 1114 } 1115 *size = 0; 1116 } 1117 1118 /* 1119 * Initialize anything else for pmap handling. 1120 * Called during vm_init(). 1121 */ 1122 void 1123 pmap_init(void) 1124 { 1125 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1126 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1127 &pmap_pool_mallocator, IPL_NONE); 1128 1129 pool_setlowat(&pmap_mpvo_pool, 1008); 1130 1131 pmap_initialized = 1; 1132 1133 } 1134 1135 /* 1136 * How much virtual space does the kernel get? 1137 */ 1138 void 1139 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1140 { 1141 /* 1142 * For now, reserve one segment (minus some overhead) for kernel 1143 * virtual memory 1144 */ 1145 *start = VM_MIN_KERNEL_ADDRESS; 1146 *end = VM_MAX_KERNEL_ADDRESS; 1147 } 1148 1149 /* 1150 * Allocate, initialize, and return a new physical map. 1151 */ 1152 pmap_t 1153 pmap_create(void) 1154 { 1155 pmap_t pm; 1156 1157 pm = pool_get(&pmap_pool, PR_WAITOK); 1158 memset((void *)pm, 0, sizeof *pm); 1159 pmap_pinit(pm); 1160 1161 DPRINTFN(CREATE,("pmap_create: pm %p:\n" 1162 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1163 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1164 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1165 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1166 pm, 1167 pm->pm_sr[0], pm->pm_sr[1], 1168 pm->pm_sr[2], pm->pm_sr[3], 1169 pm->pm_sr[4], pm->pm_sr[5], 1170 pm->pm_sr[6], pm->pm_sr[7], 1171 pm->pm_sr[8], pm->pm_sr[9], 1172 pm->pm_sr[10], pm->pm_sr[11], 1173 pm->pm_sr[12], pm->pm_sr[13], 1174 pm->pm_sr[14], pm->pm_sr[15])); 1175 return pm; 1176 } 1177 1178 /* 1179 * Initialize a preallocated and zeroed pmap structure. 1180 */ 1181 void 1182 pmap_pinit(pmap_t pm) 1183 { 1184 register_t entropy = MFTB(); 1185 register_t mask; 1186 int i; 1187 1188 /* 1189 * Allocate some segment registers for this pmap. 1190 */ 1191 pm->pm_refs = 1; 1192 PMAP_LOCK(); 1193 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1194 static register_t pmap_vsidcontext; 1195 register_t hash; 1196 unsigned int n; 1197 1198 /* Create a new value by multiplying by a prime adding in 1199 * entropy from the timebase register. This is to make the 1200 * VSID more random so that the PT Hash function collides 1201 * less often. (note that the prime causes gcc to do shifts 1202 * instead of a multiply) 1203 */ 1204 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1205 hash = pmap_vsidcontext & (NPMAPS - 1); 1206 if (hash == 0) { /* 0 is special, avoid it */ 1207 entropy += 0xbadf00d; 1208 continue; 1209 } 1210 n = hash >> 5; 1211 mask = 1L << (hash & (VSID_NBPW-1)); 1212 hash = pmap_vsidcontext; 1213 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1214 /* anything free in this bucket? */ 1215 if (~pmap_vsid_bitmap[n] == 0) { 1216 entropy = hash ^ (hash >> 16); 1217 continue; 1218 } 1219 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1220 mask = 1L << i; 1221 hash &= ~(VSID_NBPW-1); 1222 hash |= i; 1223 } 1224 hash &= PTE_VSID >> PTE_VSID_SHFT; 1225 pmap_vsid_bitmap[n] |= mask; 1226 pm->pm_vsid = hash; 1227 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1228 for (i = 0; i < 16; i++) 1229 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1230 SR_NOEXEC; 1231 #endif 1232 PMAP_UNLOCK(); 1233 return; 1234 } 1235 PMAP_UNLOCK(); 1236 panic("pmap_pinit: out of segments"); 1237 } 1238 1239 /* 1240 * Add a reference to the given pmap. 1241 */ 1242 void 1243 pmap_reference(pmap_t pm) 1244 { 1245 atomic_inc_uint(&pm->pm_refs); 1246 } 1247 1248 /* 1249 * Retire the given pmap from service. 1250 * Should only be called if the map contains no valid mappings. 1251 */ 1252 void 1253 pmap_destroy(pmap_t pm) 1254 { 1255 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1256 pmap_release(pm); 1257 pool_put(&pmap_pool, pm); 1258 } 1259 } 1260 1261 /* 1262 * Release any resources held by the given physical map. 1263 * Called when a pmap initialized by pmap_pinit is being released. 1264 */ 1265 void 1266 pmap_release(pmap_t pm) 1267 { 1268 int idx, mask; 1269 1270 KASSERT(pm->pm_stats.resident_count == 0); 1271 KASSERT(pm->pm_stats.wired_count == 0); 1272 1273 PMAP_LOCK(); 1274 if (pm->pm_sr[0] == 0) 1275 panic("pmap_release"); 1276 idx = pm->pm_vsid & (NPMAPS-1); 1277 mask = 1 << (idx % VSID_NBPW); 1278 idx /= VSID_NBPW; 1279 1280 KASSERT(pmap_vsid_bitmap[idx] & mask); 1281 pmap_vsid_bitmap[idx] &= ~mask; 1282 PMAP_UNLOCK(); 1283 } 1284 1285 /* 1286 * Copy the range specified by src_addr/len 1287 * from the source map to the range dst_addr/len 1288 * in the destination map. 1289 * 1290 * This routine is only advisory and need not do anything. 1291 */ 1292 void 1293 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1294 vsize_t len, vaddr_t src_addr) 1295 { 1296 PMAPCOUNT(copies); 1297 } 1298 1299 /* 1300 * Require that all active physical maps contain no 1301 * incorrect entries NOW. 1302 */ 1303 void 1304 pmap_update(struct pmap *pmap) 1305 { 1306 PMAPCOUNT(updates); 1307 TLBSYNC(); 1308 } 1309 1310 static inline int 1311 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1312 { 1313 int pteidx; 1314 /* 1315 * We can find the actual pte entry without searching by 1316 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1317 * and by noticing the HID bit. 1318 */ 1319 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1320 if (pvo->pvo_pte.pte_hi & PTE_HID) 1321 pteidx ^= pmap_pteg_mask * 8; 1322 return pteidx; 1323 } 1324 1325 volatile struct pte * 1326 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1327 { 1328 volatile struct pte *pt; 1329 1330 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1331 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1332 return NULL; 1333 #endif 1334 1335 /* 1336 * If we haven't been supplied the ptegidx, calculate it. 1337 */ 1338 if (pteidx == -1) { 1339 int ptegidx; 1340 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1341 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1342 } 1343 1344 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1345 1346 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1347 return pt; 1348 #else 1349 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1350 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1351 "pvo but no valid pte index", pvo); 1352 } 1353 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1354 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1355 "pvo but no valid pte", pvo); 1356 } 1357 1358 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1359 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1360 #if defined(DEBUG) || defined(PMAPCHECK) 1361 pmap_pte_print(pt); 1362 #endif 1363 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1364 "pmap_pteg_table %p but invalid in pvo", 1365 pvo, pt); 1366 } 1367 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1368 #if defined(DEBUG) || defined(PMAPCHECK) 1369 pmap_pte_print(pt); 1370 #endif 1371 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1372 "not match pte %p in pmap_pteg_table", 1373 pvo, pt); 1374 } 1375 return pt; 1376 } 1377 1378 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1379 #if defined(DEBUG) || defined(PMAPCHECK) 1380 pmap_pte_print(pt); 1381 #endif 1382 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1383 "pmap_pteg_table but valid in pvo", pvo, pt); 1384 } 1385 return NULL; 1386 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1387 } 1388 1389 struct pvo_entry * 1390 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1391 { 1392 struct pvo_entry *pvo; 1393 int ptegidx; 1394 1395 va &= ~ADDR_POFF; 1396 ptegidx = va_to_pteg(pm, va); 1397 1398 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1399 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1400 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1401 panic("pmap_pvo_find_va: invalid pvo %p on " 1402 "list %#x (%p)", pvo, ptegidx, 1403 &pmap_pvo_table[ptegidx]); 1404 #endif 1405 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1406 if (pteidx_p) 1407 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1408 return pvo; 1409 } 1410 } 1411 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1412 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1413 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1414 return NULL; 1415 } 1416 1417 #if defined(DEBUG) || defined(PMAPCHECK) 1418 void 1419 pmap_pvo_check(const struct pvo_entry *pvo) 1420 { 1421 struct pvo_head *pvo_head; 1422 struct pvo_entry *pvo0; 1423 volatile struct pte *pt; 1424 int failed = 0; 1425 1426 PMAP_LOCK(); 1427 1428 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1429 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1430 1431 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1432 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1433 pvo, pvo->pvo_pmap); 1434 failed = 1; 1435 } 1436 1437 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1438 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1439 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1440 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1441 failed = 1; 1442 } 1443 1444 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1445 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1446 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1447 pvo, LIST_NEXT(pvo, pvo_vlink)); 1448 failed = 1; 1449 } 1450 1451 if (PVO_MANAGED_P(pvo)) { 1452 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1453 } else { 1454 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1455 printf("pmap_pvo_check: pvo %p: non kernel address " 1456 "on kernel unmanaged list\n", pvo); 1457 failed = 1; 1458 } 1459 pvo_head = &pmap_pvo_kunmanaged; 1460 } 1461 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1462 if (pvo0 == pvo) 1463 break; 1464 } 1465 if (pvo0 == NULL) { 1466 printf("pmap_pvo_check: pvo %p: not present " 1467 "on its vlist head %p\n", pvo, pvo_head); 1468 failed = 1; 1469 } 1470 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1471 printf("pmap_pvo_check: pvo %p: not present " 1472 "on its olist head\n", pvo); 1473 failed = 1; 1474 } 1475 pt = pmap_pvo_to_pte(pvo, -1); 1476 if (pt == NULL) { 1477 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1478 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1479 "no PTE\n", pvo); 1480 failed = 1; 1481 } 1482 } else { 1483 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1484 (uintptr_t) pt >= 1485 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1486 printf("pmap_pvo_check: pvo %p: pte %p not in " 1487 "pteg table\n", pvo, pt); 1488 failed = 1; 1489 } 1490 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1491 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1492 "no PTE\n", pvo); 1493 failed = 1; 1494 } 1495 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1496 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1497 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1498 pvo->pvo_pte.pte_hi, 1499 pt->pte_hi); 1500 failed = 1; 1501 } 1502 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1503 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1504 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1505 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1506 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1507 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1508 failed = 1; 1509 } 1510 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1511 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1512 " doesn't not match PVO's VA %#" _PRIxva "\n", 1513 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1514 failed = 1; 1515 } 1516 if (failed) 1517 pmap_pte_print(pt); 1518 } 1519 if (failed) 1520 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1521 pvo->pvo_pmap); 1522 1523 PMAP_UNLOCK(); 1524 } 1525 #endif /* DEBUG || PMAPCHECK */ 1526 1527 /* 1528 * Search the PVO table looking for a non-wired entry. 1529 * If we find one, remove it and return it. 1530 */ 1531 1532 struct pvo_entry * 1533 pmap_pvo_reclaim(struct pmap *pm) 1534 { 1535 struct pvo_tqhead *pvoh; 1536 struct pvo_entry *pvo; 1537 uint32_t idx, endidx; 1538 1539 endidx = pmap_pvo_reclaim_nextidx; 1540 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1541 idx = (idx + 1) & pmap_pteg_mask) { 1542 pvoh = &pmap_pvo_table[idx]; 1543 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1544 if (!PVO_WIRED_P(pvo)) { 1545 pmap_pvo_remove(pvo, -1, NULL); 1546 pmap_pvo_reclaim_nextidx = idx; 1547 PMAPCOUNT(pvos_reclaimed); 1548 return pvo; 1549 } 1550 } 1551 } 1552 return NULL; 1553 } 1554 1555 /* 1556 * This returns whether this is the first mapping of a page. 1557 */ 1558 int 1559 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1560 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1561 { 1562 struct pvo_entry *pvo; 1563 struct pvo_tqhead *pvoh; 1564 register_t msr; 1565 int ptegidx; 1566 int i; 1567 int poolflags = PR_NOWAIT; 1568 1569 /* 1570 * Compute the PTE Group index. 1571 */ 1572 va &= ~ADDR_POFF; 1573 ptegidx = va_to_pteg(pm, va); 1574 1575 msr = pmap_interrupts_off(); 1576 1577 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1578 if (pmap_pvo_remove_depth > 0) 1579 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1580 if (++pmap_pvo_enter_depth > 1) 1581 panic("pmap_pvo_enter: called recursively!"); 1582 #endif 1583 1584 /* 1585 * Remove any existing mapping for this page. Reuse the 1586 * pvo entry if there a mapping. 1587 */ 1588 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1589 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1590 #ifdef DEBUG 1591 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1592 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1593 ~(PTE_REF|PTE_CHG)) == 0 && 1594 va < VM_MIN_KERNEL_ADDRESS) { 1595 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n", 1596 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1597 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n", 1598 pvo->pvo_pte.pte_hi, 1599 pm->pm_sr[va >> ADDR_SR_SHFT]); 1600 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1601 #ifdef DDBX 1602 Debugger(); 1603 #endif 1604 } 1605 #endif 1606 PMAPCOUNT(mappings_replaced); 1607 pmap_pvo_remove(pvo, -1, NULL); 1608 break; 1609 } 1610 } 1611 1612 /* 1613 * If we aren't overwriting an mapping, try to allocate 1614 */ 1615 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1616 --pmap_pvo_enter_depth; 1617 #endif 1618 pmap_interrupts_restore(msr); 1619 if (pvo) { 1620 pmap_pvo_free(pvo); 1621 } 1622 pvo = pool_get(pl, poolflags); 1623 1624 #ifdef DEBUG 1625 /* 1626 * Exercise pmap_pvo_reclaim() a little. 1627 */ 1628 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1629 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1630 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1631 pool_put(pl, pvo); 1632 pvo = NULL; 1633 } 1634 #endif 1635 1636 msr = pmap_interrupts_off(); 1637 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1638 ++pmap_pvo_enter_depth; 1639 #endif 1640 if (pvo == NULL) { 1641 pvo = pmap_pvo_reclaim(pm); 1642 if (pvo == NULL) { 1643 if ((flags & PMAP_CANFAIL) == 0) 1644 panic("pmap_pvo_enter: failed"); 1645 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1646 pmap_pvo_enter_depth--; 1647 #endif 1648 PMAPCOUNT(pvos_failed); 1649 pmap_interrupts_restore(msr); 1650 return ENOMEM; 1651 } 1652 } 1653 1654 pvo->pvo_vaddr = va; 1655 pvo->pvo_pmap = pm; 1656 pvo->pvo_vaddr &= ~ADDR_POFF; 1657 if (flags & VM_PROT_EXECUTE) { 1658 PMAPCOUNT(exec_mappings); 1659 pvo_set_exec(pvo); 1660 } 1661 if (flags & PMAP_WIRED) 1662 pvo->pvo_vaddr |= PVO_WIRED; 1663 if (pvo_head != &pmap_pvo_kunmanaged) { 1664 pvo->pvo_vaddr |= PVO_MANAGED; 1665 PMAPCOUNT(mappings); 1666 } else { 1667 PMAPCOUNT(kernel_mappings); 1668 } 1669 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1670 1671 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1672 if (PVO_WIRED_P(pvo)) 1673 pvo->pvo_pmap->pm_stats.wired_count++; 1674 pvo->pvo_pmap->pm_stats.resident_count++; 1675 #if defined(DEBUG) 1676 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1677 DPRINTFN(PVOENTER, 1678 ("pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1679 pvo, pm, va, pa)); 1680 #endif 1681 1682 /* 1683 * We hope this succeeds but it isn't required. 1684 */ 1685 pvoh = &pmap_pvo_table[ptegidx]; 1686 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1687 if (i >= 0) { 1688 PVO_PTEGIDX_SET(pvo, i); 1689 PVO_WHERE(pvo, ENTER_INSERT); 1690 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1691 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1692 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1693 1694 } else { 1695 /* 1696 * Since we didn't have room for this entry (which makes it 1697 * and evicted entry), place it at the head of the list. 1698 */ 1699 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1700 PMAPCOUNT(ptes_evicted); 1701 pm->pm_evictions++; 1702 /* 1703 * If this is a kernel page, make sure it's active. 1704 */ 1705 if (pm == pmap_kernel()) { 1706 i = pmap_pte_spill(pm, va, false); 1707 KASSERT(i); 1708 } 1709 } 1710 PMAP_PVO_CHECK(pvo); /* sanity check */ 1711 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1712 pmap_pvo_enter_depth--; 1713 #endif 1714 pmap_interrupts_restore(msr); 1715 return 0; 1716 } 1717 1718 static void 1719 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1720 { 1721 volatile struct pte *pt; 1722 int ptegidx; 1723 1724 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1725 if (++pmap_pvo_remove_depth > 1) 1726 panic("pmap_pvo_remove: called recursively!"); 1727 #endif 1728 1729 /* 1730 * If we haven't been supplied the ptegidx, calculate it. 1731 */ 1732 if (pteidx == -1) { 1733 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1734 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1735 } else { 1736 ptegidx = pteidx >> 3; 1737 if (pvo->pvo_pte.pte_hi & PTE_HID) 1738 ptegidx ^= pmap_pteg_mask; 1739 } 1740 PMAP_PVO_CHECK(pvo); /* sanity check */ 1741 1742 /* 1743 * If there is an active pte entry, we need to deactivate it 1744 * (and save the ref & chg bits). 1745 */ 1746 pt = pmap_pvo_to_pte(pvo, pteidx); 1747 if (pt != NULL) { 1748 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1749 PVO_WHERE(pvo, REMOVE); 1750 PVO_PTEGIDX_CLR(pvo); 1751 PMAPCOUNT(ptes_removed); 1752 } else { 1753 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1754 pvo->pvo_pmap->pm_evictions--; 1755 } 1756 1757 /* 1758 * Account for executable mappings. 1759 */ 1760 if (PVO_EXECUTABLE_P(pvo)) 1761 pvo_clear_exec(pvo); 1762 1763 /* 1764 * Update our statistics. 1765 */ 1766 pvo->pvo_pmap->pm_stats.resident_count--; 1767 if (PVO_WIRED_P(pvo)) 1768 pvo->pvo_pmap->pm_stats.wired_count--; 1769 1770 /* 1771 * Save the REF/CHG bits into their cache if the page is managed. 1772 */ 1773 if (PVO_MANAGED_P(pvo)) { 1774 register_t ptelo = pvo->pvo_pte.pte_lo; 1775 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1776 1777 if (pg != NULL) { 1778 /* 1779 * If this page was changed and it is mapped exec, 1780 * invalidate it. 1781 */ 1782 if ((ptelo & PTE_CHG) && 1783 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1784 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1785 if (LIST_EMPTY(pvoh)) { 1786 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1787 "%#" _PRIxpa ": clear-exec]\n", 1788 VM_PAGE_TO_PHYS(pg))); 1789 pmap_attr_clear(pg, PTE_EXEC); 1790 PMAPCOUNT(exec_uncached_pvo_remove); 1791 } else { 1792 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1793 "%#" _PRIxpa ": syncicache]\n", 1794 VM_PAGE_TO_PHYS(pg))); 1795 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1796 PAGE_SIZE); 1797 PMAPCOUNT(exec_synced_pvo_remove); 1798 } 1799 } 1800 1801 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1802 } 1803 PMAPCOUNT(unmappings); 1804 } else { 1805 PMAPCOUNT(kernel_unmappings); 1806 } 1807 1808 /* 1809 * Remove the PVO from its lists and return it to the pool. 1810 */ 1811 LIST_REMOVE(pvo, pvo_vlink); 1812 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1813 if (pvol) { 1814 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1815 } 1816 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1817 pmap_pvo_remove_depth--; 1818 #endif 1819 } 1820 1821 void 1822 pmap_pvo_free(struct pvo_entry *pvo) 1823 { 1824 1825 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1826 } 1827 1828 void 1829 pmap_pvo_free_list(struct pvo_head *pvol) 1830 { 1831 struct pvo_entry *pvo, *npvo; 1832 1833 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1834 npvo = LIST_NEXT(pvo, pvo_vlink); 1835 LIST_REMOVE(pvo, pvo_vlink); 1836 pmap_pvo_free(pvo); 1837 } 1838 } 1839 1840 /* 1841 * Mark a mapping as executable. 1842 * If this is the first executable mapping in the segment, 1843 * clear the noexec flag. 1844 */ 1845 static void 1846 pvo_set_exec(struct pvo_entry *pvo) 1847 { 1848 struct pmap *pm = pvo->pvo_pmap; 1849 1850 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1851 return; 1852 } 1853 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1854 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1855 { 1856 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1857 if (pm->pm_exec[sr]++ == 0) { 1858 pm->pm_sr[sr] &= ~SR_NOEXEC; 1859 } 1860 } 1861 #endif 1862 } 1863 1864 /* 1865 * Mark a mapping as non-executable. 1866 * If this was the last executable mapping in the segment, 1867 * set the noexec flag. 1868 */ 1869 static void 1870 pvo_clear_exec(struct pvo_entry *pvo) 1871 { 1872 struct pmap *pm = pvo->pvo_pmap; 1873 1874 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1875 return; 1876 } 1877 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1878 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1879 { 1880 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1881 if (--pm->pm_exec[sr] == 0) { 1882 pm->pm_sr[sr] |= SR_NOEXEC; 1883 } 1884 } 1885 #endif 1886 } 1887 1888 /* 1889 * Insert physical page at pa into the given pmap at virtual address va. 1890 */ 1891 int 1892 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 1893 { 1894 struct mem_region *mp; 1895 struct pvo_head *pvo_head; 1896 struct vm_page *pg; 1897 struct pool *pl; 1898 register_t pte_lo; 1899 int error; 1900 u_int pvo_flags; 1901 u_int was_exec = 0; 1902 1903 PMAP_LOCK(); 1904 1905 if (__predict_false(!pmap_initialized)) { 1906 pvo_head = &pmap_pvo_kunmanaged; 1907 pl = &pmap_upvo_pool; 1908 pvo_flags = 0; 1909 pg = NULL; 1910 was_exec = PTE_EXEC; 1911 } else { 1912 pvo_head = pa_to_pvoh(pa, &pg); 1913 pl = &pmap_mpvo_pool; 1914 pvo_flags = PVO_MANAGED; 1915 } 1916 1917 DPRINTFN(ENTER, 1918 ("pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1919 pm, va, pa, prot, flags)); 1920 1921 /* 1922 * If this is a managed page, and it's the first reference to the 1923 * page clear the execness of the page. Otherwise fetch the execness. 1924 */ 1925 if (pg != NULL) 1926 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1927 1928 DPRINTFN(ENTER, (" was_exec=%d", was_exec)); 1929 1930 /* 1931 * Assume the page is cache inhibited and access is guarded unless 1932 * it's in our available memory array. If it is in the memory array, 1933 * asssume it's in memory coherent memory. 1934 */ 1935 pte_lo = PTE_IG; 1936 if ((flags & PMAP_NC) == 0) { 1937 for (mp = mem; mp->size; mp++) { 1938 if (pa >= mp->start && pa < mp->start + mp->size) { 1939 pte_lo = PTE_M; 1940 break; 1941 } 1942 } 1943 } 1944 1945 if (prot & VM_PROT_WRITE) 1946 pte_lo |= PTE_BW; 1947 else 1948 pte_lo |= PTE_BR; 1949 1950 /* 1951 * If this was in response to a fault, "pre-fault" the PTE's 1952 * changed/referenced bit appropriately. 1953 */ 1954 if (flags & VM_PROT_WRITE) 1955 pte_lo |= PTE_CHG; 1956 if (flags & VM_PROT_ALL) 1957 pte_lo |= PTE_REF; 1958 1959 /* 1960 * We need to know if this page can be executable 1961 */ 1962 flags |= (prot & VM_PROT_EXECUTE); 1963 1964 /* 1965 * Record mapping for later back-translation and pte spilling. 1966 * This will overwrite any existing mapping. 1967 */ 1968 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1969 1970 /* 1971 * Flush the real page from the instruction cache if this page is 1972 * mapped executable and cacheable and has not been flushed since 1973 * the last time it was modified. 1974 */ 1975 if (error == 0 && 1976 (flags & VM_PROT_EXECUTE) && 1977 (pte_lo & PTE_I) == 0 && 1978 was_exec == 0) { 1979 DPRINTFN(ENTER, (" syncicache")); 1980 PMAPCOUNT(exec_synced); 1981 pmap_syncicache(pa, PAGE_SIZE); 1982 if (pg != NULL) { 1983 pmap_attr_save(pg, PTE_EXEC); 1984 PMAPCOUNT(exec_cached); 1985 #if defined(DEBUG) || defined(PMAPDEBUG) 1986 if (pmapdebug & PMAPDEBUG_ENTER) 1987 printf(" marked-as-exec"); 1988 else if (pmapdebug & PMAPDEBUG_EXEC) 1989 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 1990 VM_PAGE_TO_PHYS(pg)); 1991 1992 #endif 1993 } 1994 } 1995 1996 DPRINTFN(ENTER, (": error=%d\n", error)); 1997 1998 PMAP_UNLOCK(); 1999 2000 return error; 2001 } 2002 2003 void 2004 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 2005 { 2006 struct mem_region *mp; 2007 register_t pte_lo; 2008 int error; 2009 2010 #if defined (PMAP_OEA64_BRIDGE) 2011 if (va < VM_MIN_KERNEL_ADDRESS) 2012 panic("pmap_kenter_pa: attempt to enter " 2013 "non-kernel address %#" _PRIxva "!", va); 2014 #endif 2015 2016 DPRINTFN(KENTER, 2017 ("pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot)); 2018 2019 PMAP_LOCK(); 2020 2021 /* 2022 * Assume the page is cache inhibited and access is guarded unless 2023 * it's in our available memory array. If it is in the memory array, 2024 * asssume it's in memory coherent memory. 2025 */ 2026 pte_lo = PTE_IG; 2027 if ((prot & PMAP_NC) == 0) { 2028 for (mp = mem; mp->size; mp++) { 2029 if (pa >= mp->start && pa < mp->start + mp->size) { 2030 pte_lo = PTE_M; 2031 break; 2032 } 2033 } 2034 } 2035 2036 if (prot & VM_PROT_WRITE) 2037 pte_lo |= PTE_BW; 2038 else 2039 pte_lo |= PTE_BR; 2040 2041 /* 2042 * We don't care about REF/CHG on PVOs on the unmanaged list. 2043 */ 2044 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2045 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2046 2047 if (error != 0) 2048 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2049 va, pa, error); 2050 2051 PMAP_UNLOCK(); 2052 } 2053 2054 void 2055 pmap_kremove(vaddr_t va, vsize_t len) 2056 { 2057 if (va < VM_MIN_KERNEL_ADDRESS) 2058 panic("pmap_kremove: attempt to remove " 2059 "non-kernel address %#" _PRIxva "!", va); 2060 2061 DPRINTFN(KREMOVE,("pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len)); 2062 pmap_remove(pmap_kernel(), va, va + len); 2063 } 2064 2065 /* 2066 * Remove the given range of mapping entries. 2067 */ 2068 void 2069 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2070 { 2071 struct pvo_head pvol; 2072 struct pvo_entry *pvo; 2073 register_t msr; 2074 int pteidx; 2075 2076 PMAP_LOCK(); 2077 LIST_INIT(&pvol); 2078 msr = pmap_interrupts_off(); 2079 for (; va < endva; va += PAGE_SIZE) { 2080 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2081 if (pvo != NULL) { 2082 pmap_pvo_remove(pvo, pteidx, &pvol); 2083 } 2084 } 2085 pmap_interrupts_restore(msr); 2086 pmap_pvo_free_list(&pvol); 2087 PMAP_UNLOCK(); 2088 } 2089 2090 /* 2091 * Get the physical page address for the given pmap/virtual address. 2092 */ 2093 bool 2094 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2095 { 2096 struct pvo_entry *pvo; 2097 register_t msr; 2098 2099 PMAP_LOCK(); 2100 2101 /* 2102 * If this is a kernel pmap lookup, also check the battable 2103 * and if we get a hit, translate the VA to a PA using the 2104 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2105 * that will wrap back to 0. 2106 */ 2107 if (pm == pmap_kernel() && 2108 (va < VM_MIN_KERNEL_ADDRESS || 2109 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2110 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2111 #if defined (PMAP_OEA) 2112 #ifdef PPC_OEA601 2113 if ((MFPVR() >> 16) == MPC601) { 2114 register_t batu = battable[va >> 23].batu; 2115 register_t batl = battable[va >> 23].batl; 2116 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2117 if (BAT601_VALID_P(batl) && 2118 BAT601_VA_MATCH_P(batu, batl, va)) { 2119 register_t mask = 2120 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2121 if (pap) 2122 *pap = (batl & mask) | (va & ~mask); 2123 PMAP_UNLOCK(); 2124 return true; 2125 } else if (SR601_VALID_P(sr) && 2126 SR601_PA_MATCH_P(sr, va)) { 2127 if (pap) 2128 *pap = va; 2129 PMAP_UNLOCK(); 2130 return true; 2131 } 2132 } else 2133 #endif /* PPC_OEA601 */ 2134 { 2135 register_t batu = battable[va >> ADDR_SR_SHFT].batu; 2136 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2137 register_t batl = 2138 battable[va >> ADDR_SR_SHFT].batl; 2139 register_t mask = 2140 (~(batu & BAT_BL) << 15) & ~0x1ffffL; 2141 if (pap) 2142 *pap = (batl & mask) | (va & ~mask); 2143 PMAP_UNLOCK(); 2144 return true; 2145 } 2146 } 2147 return false; 2148 #elif defined (PMAP_OEA64_BRIDGE) 2149 if (va >= SEGMENT_LENGTH) 2150 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2151 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2152 else { 2153 if (pap) 2154 *pap = va; 2155 PMAP_UNLOCK(); 2156 return true; 2157 } 2158 #elif defined (PMAP_OEA64) 2159 #error PPC_OEA64 not supported 2160 #endif /* PPC_OEA */ 2161 } 2162 2163 msr = pmap_interrupts_off(); 2164 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2165 if (pvo != NULL) { 2166 PMAP_PVO_CHECK(pvo); /* sanity check */ 2167 if (pap) 2168 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2169 | (va & ADDR_POFF); 2170 } 2171 pmap_interrupts_restore(msr); 2172 PMAP_UNLOCK(); 2173 return pvo != NULL; 2174 } 2175 2176 /* 2177 * Lower the protection on the specified range of this pmap. 2178 */ 2179 void 2180 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2181 { 2182 struct pvo_entry *pvo; 2183 volatile struct pte *pt; 2184 register_t msr; 2185 int pteidx; 2186 2187 /* 2188 * Since this routine only downgrades protection, we should 2189 * always be called with at least one bit not set. 2190 */ 2191 KASSERT(prot != VM_PROT_ALL); 2192 2193 /* 2194 * If there is no protection, this is equivalent to 2195 * remove the pmap from the pmap. 2196 */ 2197 if ((prot & VM_PROT_READ) == 0) { 2198 pmap_remove(pm, va, endva); 2199 return; 2200 } 2201 2202 PMAP_LOCK(); 2203 2204 msr = pmap_interrupts_off(); 2205 for (; va < endva; va += PAGE_SIZE) { 2206 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2207 if (pvo == NULL) 2208 continue; 2209 PMAP_PVO_CHECK(pvo); /* sanity check */ 2210 2211 /* 2212 * Revoke executable if asked to do so. 2213 */ 2214 if ((prot & VM_PROT_EXECUTE) == 0) 2215 pvo_clear_exec(pvo); 2216 2217 #if 0 2218 /* 2219 * If the page is already read-only, no change 2220 * needs to be made. 2221 */ 2222 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2223 continue; 2224 #endif 2225 /* 2226 * Grab the PTE pointer before we diddle with 2227 * the cached PTE copy. 2228 */ 2229 pt = pmap_pvo_to_pte(pvo, pteidx); 2230 /* 2231 * Change the protection of the page. 2232 */ 2233 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2234 pvo->pvo_pte.pte_lo |= PTE_BR; 2235 2236 /* 2237 * If the PVO is in the page table, update 2238 * that pte at well. 2239 */ 2240 if (pt != NULL) { 2241 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2242 PVO_WHERE(pvo, PMAP_PROTECT); 2243 PMAPCOUNT(ptes_changed); 2244 } 2245 2246 PMAP_PVO_CHECK(pvo); /* sanity check */ 2247 } 2248 pmap_interrupts_restore(msr); 2249 PMAP_UNLOCK(); 2250 } 2251 2252 void 2253 pmap_unwire(pmap_t pm, vaddr_t va) 2254 { 2255 struct pvo_entry *pvo; 2256 register_t msr; 2257 2258 PMAP_LOCK(); 2259 msr = pmap_interrupts_off(); 2260 pvo = pmap_pvo_find_va(pm, va, NULL); 2261 if (pvo != NULL) { 2262 if (PVO_WIRED_P(pvo)) { 2263 pvo->pvo_vaddr &= ~PVO_WIRED; 2264 pm->pm_stats.wired_count--; 2265 } 2266 PMAP_PVO_CHECK(pvo); /* sanity check */ 2267 } 2268 pmap_interrupts_restore(msr); 2269 PMAP_UNLOCK(); 2270 } 2271 2272 /* 2273 * Lower the protection on the specified physical page. 2274 */ 2275 void 2276 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2277 { 2278 struct pvo_head *pvo_head, pvol; 2279 struct pvo_entry *pvo, *next_pvo; 2280 volatile struct pte *pt; 2281 register_t msr; 2282 2283 PMAP_LOCK(); 2284 2285 KASSERT(prot != VM_PROT_ALL); 2286 LIST_INIT(&pvol); 2287 msr = pmap_interrupts_off(); 2288 2289 /* 2290 * When UVM reuses a page, it does a pmap_page_protect with 2291 * VM_PROT_NONE. At that point, we can clear the exec flag 2292 * since we know the page will have different contents. 2293 */ 2294 if ((prot & VM_PROT_READ) == 0) { 2295 DPRINTFN(EXEC, ("[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2296 VM_PAGE_TO_PHYS(pg))); 2297 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2298 PMAPCOUNT(exec_uncached_page_protect); 2299 pmap_attr_clear(pg, PTE_EXEC); 2300 } 2301 } 2302 2303 pvo_head = vm_page_to_pvoh(pg); 2304 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2305 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2306 PMAP_PVO_CHECK(pvo); /* sanity check */ 2307 2308 /* 2309 * Downgrading to no mapping at all, we just remove the entry. 2310 */ 2311 if ((prot & VM_PROT_READ) == 0) { 2312 pmap_pvo_remove(pvo, -1, &pvol); 2313 continue; 2314 } 2315 2316 /* 2317 * If EXEC permission is being revoked, just clear the 2318 * flag in the PVO. 2319 */ 2320 if ((prot & VM_PROT_EXECUTE) == 0) 2321 pvo_clear_exec(pvo); 2322 2323 /* 2324 * If this entry is already RO, don't diddle with the 2325 * page table. 2326 */ 2327 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2328 PMAP_PVO_CHECK(pvo); 2329 continue; 2330 } 2331 2332 /* 2333 * Grab the PTE before the we diddle the bits so 2334 * pvo_to_pte can verify the pte contents are as 2335 * expected. 2336 */ 2337 pt = pmap_pvo_to_pte(pvo, -1); 2338 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2339 pvo->pvo_pte.pte_lo |= PTE_BR; 2340 if (pt != NULL) { 2341 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2342 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2343 PMAPCOUNT(ptes_changed); 2344 } 2345 PMAP_PVO_CHECK(pvo); /* sanity check */ 2346 } 2347 pmap_interrupts_restore(msr); 2348 pmap_pvo_free_list(&pvol); 2349 2350 PMAP_UNLOCK(); 2351 } 2352 2353 /* 2354 * Activate the address space for the specified process. If the process 2355 * is the current process, load the new MMU context. 2356 */ 2357 void 2358 pmap_activate(struct lwp *l) 2359 { 2360 struct pcb *pcb = &l->l_addr->u_pcb; 2361 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2362 2363 DPRINTFN(ACTIVATE, 2364 ("pmap_activate: lwp %p (curlwp %p)\n", l, curlwp)); 2365 2366 /* 2367 * XXX Normally performed in cpu_fork(). 2368 */ 2369 pcb->pcb_pm = pmap; 2370 2371 /* 2372 * In theory, the SR registers need only be valid on return 2373 * to user space wait to do them there. 2374 */ 2375 if (l == curlwp) { 2376 /* Store pointer to new current pmap. */ 2377 curpm = pmap; 2378 } 2379 } 2380 2381 /* 2382 * Deactivate the specified process's address space. 2383 */ 2384 void 2385 pmap_deactivate(struct lwp *l) 2386 { 2387 } 2388 2389 bool 2390 pmap_query_bit(struct vm_page *pg, int ptebit) 2391 { 2392 struct pvo_entry *pvo; 2393 volatile struct pte *pt; 2394 register_t msr; 2395 2396 PMAP_LOCK(); 2397 2398 if (pmap_attr_fetch(pg) & ptebit) { 2399 PMAP_UNLOCK(); 2400 return true; 2401 } 2402 2403 msr = pmap_interrupts_off(); 2404 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2405 PMAP_PVO_CHECK(pvo); /* sanity check */ 2406 /* 2407 * See if we saved the bit off. If so cache, it and return 2408 * success. 2409 */ 2410 if (pvo->pvo_pte.pte_lo & ptebit) { 2411 pmap_attr_save(pg, ptebit); 2412 PMAP_PVO_CHECK(pvo); /* sanity check */ 2413 pmap_interrupts_restore(msr); 2414 PMAP_UNLOCK(); 2415 return true; 2416 } 2417 } 2418 /* 2419 * No luck, now go thru the hard part of looking at the ptes 2420 * themselves. Sync so any pending REF/CHG bits are flushed 2421 * to the PTEs. 2422 */ 2423 SYNC(); 2424 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2425 PMAP_PVO_CHECK(pvo); /* sanity check */ 2426 /* 2427 * See if this pvo have a valid PTE. If so, fetch the 2428 * REF/CHG bits from the valid PTE. If the appropriate 2429 * ptebit is set, cache, it and return success. 2430 */ 2431 pt = pmap_pvo_to_pte(pvo, -1); 2432 if (pt != NULL) { 2433 pmap_pte_synch(pt, &pvo->pvo_pte); 2434 if (pvo->pvo_pte.pte_lo & ptebit) { 2435 pmap_attr_save(pg, ptebit); 2436 PMAP_PVO_CHECK(pvo); /* sanity check */ 2437 pmap_interrupts_restore(msr); 2438 PMAP_UNLOCK(); 2439 return true; 2440 } 2441 } 2442 } 2443 pmap_interrupts_restore(msr); 2444 PMAP_UNLOCK(); 2445 return false; 2446 } 2447 2448 bool 2449 pmap_clear_bit(struct vm_page *pg, int ptebit) 2450 { 2451 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2452 struct pvo_entry *pvo; 2453 volatile struct pte *pt; 2454 register_t msr; 2455 int rv = 0; 2456 2457 PMAP_LOCK(); 2458 msr = pmap_interrupts_off(); 2459 2460 /* 2461 * Fetch the cache value 2462 */ 2463 rv |= pmap_attr_fetch(pg); 2464 2465 /* 2466 * Clear the cached value. 2467 */ 2468 pmap_attr_clear(pg, ptebit); 2469 2470 /* 2471 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2472 * can reset the right ones). Note that since the pvo entries and 2473 * list heads are accessed via BAT0 and are never placed in the 2474 * page table, we don't have to worry about further accesses setting 2475 * the REF/CHG bits. 2476 */ 2477 SYNC(); 2478 2479 /* 2480 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2481 * valid PTE. If so, clear the ptebit from the valid PTE. 2482 */ 2483 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2484 PMAP_PVO_CHECK(pvo); /* sanity check */ 2485 pt = pmap_pvo_to_pte(pvo, -1); 2486 if (pt != NULL) { 2487 /* 2488 * Only sync the PTE if the bit we are looking 2489 * for is not already set. 2490 */ 2491 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2492 pmap_pte_synch(pt, &pvo->pvo_pte); 2493 /* 2494 * If the bit we are looking for was already set, 2495 * clear that bit in the pte. 2496 */ 2497 if (pvo->pvo_pte.pte_lo & ptebit) 2498 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2499 } 2500 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2501 pvo->pvo_pte.pte_lo &= ~ptebit; 2502 PMAP_PVO_CHECK(pvo); /* sanity check */ 2503 } 2504 pmap_interrupts_restore(msr); 2505 2506 /* 2507 * If we are clearing the modify bit and this page was marked EXEC 2508 * and the user of the page thinks the page was modified, then we 2509 * need to clean it from the icache if it's mapped or clear the EXEC 2510 * bit if it's not mapped. The page itself might not have the CHG 2511 * bit set if the modification was done via DMA to the page. 2512 */ 2513 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2514 if (LIST_EMPTY(pvoh)) { 2515 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2516 VM_PAGE_TO_PHYS(pg))); 2517 pmap_attr_clear(pg, PTE_EXEC); 2518 PMAPCOUNT(exec_uncached_clear_modify); 2519 } else { 2520 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2521 VM_PAGE_TO_PHYS(pg))); 2522 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2523 PMAPCOUNT(exec_synced_clear_modify); 2524 } 2525 } 2526 PMAP_UNLOCK(); 2527 return (rv & ptebit) != 0; 2528 } 2529 2530 void 2531 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2532 { 2533 struct pvo_entry *pvo; 2534 size_t offset = va & ADDR_POFF; 2535 int s; 2536 2537 PMAP_LOCK(); 2538 s = splvm(); 2539 while (len > 0) { 2540 size_t seglen = PAGE_SIZE - offset; 2541 if (seglen > len) 2542 seglen = len; 2543 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2544 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2545 pmap_syncicache( 2546 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2547 PMAP_PVO_CHECK(pvo); 2548 } 2549 va += seglen; 2550 len -= seglen; 2551 offset = 0; 2552 } 2553 splx(s); 2554 PMAP_UNLOCK(); 2555 } 2556 2557 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2558 void 2559 pmap_pte_print(volatile struct pte *pt) 2560 { 2561 printf("PTE %p: ", pt); 2562 2563 #if defined(PMAP_OEA) 2564 /* High word: */ 2565 printf("%#" _PRIxpte ": [", pt->pte_hi); 2566 #else 2567 printf("%#" _PRIxpte ": [", pt->pte_hi); 2568 #endif /* PMAP_OEA */ 2569 2570 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2571 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2572 2573 printf("%#" _PRIxpte " %#" _PRIxpte "", 2574 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2575 pt->pte_hi & PTE_API); 2576 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2577 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2578 #else 2579 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2580 #endif /* PMAP_OEA */ 2581 2582 /* Low word: */ 2583 #if defined (PMAP_OEA) 2584 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2585 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2586 #else 2587 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2588 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2589 #endif 2590 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2591 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2592 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2593 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2594 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2595 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2596 switch (pt->pte_lo & PTE_PP) { 2597 case PTE_BR: printf("br]\n"); break; 2598 case PTE_BW: printf("bw]\n"); break; 2599 case PTE_SO: printf("so]\n"); break; 2600 case PTE_SW: printf("sw]\n"); break; 2601 } 2602 } 2603 #endif 2604 2605 #if defined(DDB) 2606 void 2607 pmap_pteg_check(void) 2608 { 2609 volatile struct pte *pt; 2610 int i; 2611 int ptegidx; 2612 u_int p_valid = 0; 2613 u_int s_valid = 0; 2614 u_int invalid = 0; 2615 2616 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2617 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2618 if (pt->pte_hi & PTE_VALID) { 2619 if (pt->pte_hi & PTE_HID) 2620 s_valid++; 2621 else 2622 { 2623 p_valid++; 2624 } 2625 } else 2626 invalid++; 2627 } 2628 } 2629 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2630 p_valid, p_valid, s_valid, s_valid, 2631 invalid, invalid); 2632 } 2633 2634 void 2635 pmap_print_mmuregs(void) 2636 { 2637 int i; 2638 u_int cpuvers; 2639 #ifndef PMAP_OEA64 2640 vaddr_t addr; 2641 register_t soft_sr[16]; 2642 #endif 2643 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2644 struct bat soft_ibat[4]; 2645 struct bat soft_dbat[4]; 2646 #endif 2647 paddr_t sdr1; 2648 2649 cpuvers = MFPVR() >> 16; 2650 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2651 #ifndef PMAP_OEA64 2652 addr = 0; 2653 for (i = 0; i < 16; i++) { 2654 soft_sr[i] = MFSRIN(addr); 2655 addr += (1 << ADDR_SR_SHFT); 2656 } 2657 #endif 2658 2659 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2660 /* read iBAT (601: uBAT) registers */ 2661 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2662 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2663 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2664 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2665 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2666 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2667 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2668 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2669 2670 2671 if (cpuvers != MPC601) { 2672 /* read dBAT registers */ 2673 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2674 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2675 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2676 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2677 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2678 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2679 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2680 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2681 } 2682 #endif 2683 2684 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2685 #ifndef PMAP_OEA64 2686 printf("SR[]:\t"); 2687 for (i = 0; i < 4; i++) 2688 printf("0x%08lx, ", soft_sr[i]); 2689 printf("\n\t"); 2690 for ( ; i < 8; i++) 2691 printf("0x%08lx, ", soft_sr[i]); 2692 printf("\n\t"); 2693 for ( ; i < 12; i++) 2694 printf("0x%08lx, ", soft_sr[i]); 2695 printf("\n\t"); 2696 for ( ; i < 16; i++) 2697 printf("0x%08lx, ", soft_sr[i]); 2698 printf("\n"); 2699 #endif 2700 2701 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2702 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2703 for (i = 0; i < 4; i++) { 2704 printf("0x%08lx 0x%08lx, ", 2705 soft_ibat[i].batu, soft_ibat[i].batl); 2706 if (i == 1) 2707 printf("\n\t"); 2708 } 2709 if (cpuvers != MPC601) { 2710 printf("\ndBAT[]:\t"); 2711 for (i = 0; i < 4; i++) { 2712 printf("0x%08lx 0x%08lx, ", 2713 soft_dbat[i].batu, soft_dbat[i].batl); 2714 if (i == 1) 2715 printf("\n\t"); 2716 } 2717 } 2718 printf("\n"); 2719 #endif /* PMAP_OEA... */ 2720 } 2721 2722 void 2723 pmap_print_pte(pmap_t pm, vaddr_t va) 2724 { 2725 struct pvo_entry *pvo; 2726 volatile struct pte *pt; 2727 int pteidx; 2728 2729 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2730 if (pvo != NULL) { 2731 pt = pmap_pvo_to_pte(pvo, pteidx); 2732 if (pt != NULL) { 2733 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2734 va, pt, 2735 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2736 pt->pte_hi, pt->pte_lo); 2737 } else { 2738 printf("No valid PTE found\n"); 2739 } 2740 } else { 2741 printf("Address not in pmap\n"); 2742 } 2743 } 2744 2745 void 2746 pmap_pteg_dist(void) 2747 { 2748 struct pvo_entry *pvo; 2749 int ptegidx; 2750 int depth; 2751 int max_depth = 0; 2752 unsigned int depths[64]; 2753 2754 memset(depths, 0, sizeof(depths)); 2755 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2756 depth = 0; 2757 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2758 depth++; 2759 } 2760 if (depth > max_depth) 2761 max_depth = depth; 2762 if (depth > 63) 2763 depth = 63; 2764 depths[depth]++; 2765 } 2766 2767 for (depth = 0; depth < 64; depth++) { 2768 printf(" [%2d]: %8u", depth, depths[depth]); 2769 if ((depth & 3) == 3) 2770 printf("\n"); 2771 if (depth == max_depth) 2772 break; 2773 } 2774 if ((depth & 3) != 3) 2775 printf("\n"); 2776 printf("Max depth found was %d\n", max_depth); 2777 } 2778 #endif /* DEBUG */ 2779 2780 #if defined(PMAPCHECK) || defined(DEBUG) 2781 void 2782 pmap_pvo_verify(void) 2783 { 2784 int ptegidx; 2785 int s; 2786 2787 s = splvm(); 2788 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2789 struct pvo_entry *pvo; 2790 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2791 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2792 panic("pmap_pvo_verify: invalid pvo %p " 2793 "on list %#x", pvo, ptegidx); 2794 pmap_pvo_check(pvo); 2795 } 2796 } 2797 splx(s); 2798 } 2799 #endif /* PMAPCHECK */ 2800 2801 2802 void * 2803 pmap_pool_ualloc(struct pool *pp, int flags) 2804 { 2805 struct pvo_page *pvop; 2806 2807 if (uvm.page_init_done != true) { 2808 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2809 } 2810 2811 PMAP_LOCK(); 2812 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2813 if (pvop != NULL) { 2814 pmap_upvop_free--; 2815 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2816 PMAP_UNLOCK(); 2817 return pvop; 2818 } 2819 PMAP_UNLOCK(); 2820 return pmap_pool_malloc(pp, flags); 2821 } 2822 2823 void * 2824 pmap_pool_malloc(struct pool *pp, int flags) 2825 { 2826 struct pvo_page *pvop; 2827 struct vm_page *pg; 2828 2829 PMAP_LOCK(); 2830 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2831 if (pvop != NULL) { 2832 pmap_mpvop_free--; 2833 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2834 PMAP_UNLOCK(); 2835 return pvop; 2836 } 2837 PMAP_UNLOCK(); 2838 again: 2839 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2840 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2841 if (__predict_false(pg == NULL)) { 2842 if (flags & PR_WAITOK) { 2843 uvm_wait("plpg"); 2844 goto again; 2845 } else { 2846 return (0); 2847 } 2848 } 2849 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2850 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2851 } 2852 2853 void 2854 pmap_pool_ufree(struct pool *pp, void *va) 2855 { 2856 struct pvo_page *pvop; 2857 #if 0 2858 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2859 pmap_pool_mfree(va, size, tag); 2860 return; 2861 } 2862 #endif 2863 PMAP_LOCK(); 2864 pvop = va; 2865 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2866 pmap_upvop_free++; 2867 if (pmap_upvop_free > pmap_upvop_maxfree) 2868 pmap_upvop_maxfree = pmap_upvop_free; 2869 PMAP_UNLOCK(); 2870 } 2871 2872 void 2873 pmap_pool_mfree(struct pool *pp, void *va) 2874 { 2875 struct pvo_page *pvop; 2876 2877 PMAP_LOCK(); 2878 pvop = va; 2879 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2880 pmap_mpvop_free++; 2881 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2882 pmap_mpvop_maxfree = pmap_mpvop_free; 2883 PMAP_UNLOCK(); 2884 #if 0 2885 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2886 #endif 2887 } 2888 2889 /* 2890 * This routine in bootstraping to steal to-be-managed memory (which will 2891 * then be unmanaged). We use it to grab from the first 256MB for our 2892 * pmap needs and above 256MB for other stuff. 2893 */ 2894 vaddr_t 2895 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2896 { 2897 vsize_t size; 2898 vaddr_t va; 2899 paddr_t pa = 0; 2900 int npgs, bank; 2901 struct vm_physseg *ps; 2902 2903 if (uvm.page_init_done == true) 2904 panic("pmap_steal_memory: called _after_ bootstrap"); 2905 2906 *vstartp = VM_MIN_KERNEL_ADDRESS; 2907 *vendp = VM_MAX_KERNEL_ADDRESS; 2908 2909 size = round_page(vsize); 2910 npgs = atop(size); 2911 2912 /* 2913 * PA 0 will never be among those given to UVM so we can use it 2914 * to indicate we couldn't steal any memory. 2915 */ 2916 for (ps = vm_physmem, bank = 0; bank < vm_nphysseg; bank++, ps++) { 2917 if (ps->free_list == VM_FREELIST_FIRST256 && 2918 ps->avail_end - ps->avail_start >= npgs) { 2919 pa = ptoa(ps->avail_start); 2920 break; 2921 } 2922 } 2923 2924 if (pa == 0) 2925 panic("pmap_steal_memory: no approriate memory to steal!"); 2926 2927 ps->avail_start += npgs; 2928 ps->start += npgs; 2929 2930 /* 2931 * If we've used up all the pages in the segment, remove it and 2932 * compact the list. 2933 */ 2934 if (ps->avail_start == ps->end) { 2935 /* 2936 * If this was the last one, then a very bad thing has occurred 2937 */ 2938 if (--vm_nphysseg == 0) 2939 panic("pmap_steal_memory: out of memory!"); 2940 2941 printf("pmap_steal_memory: consumed bank %d\n", bank); 2942 for (; bank < vm_nphysseg; bank++, ps++) { 2943 ps[0] = ps[1]; 2944 } 2945 } 2946 2947 va = (vaddr_t) pa; 2948 memset((void *) va, 0, size); 2949 pmap_pages_stolen += npgs; 2950 #ifdef DEBUG 2951 if (pmapdebug && npgs > 1) { 2952 u_int cnt = 0; 2953 for (bank = 0, ps = vm_physmem; bank < vm_nphysseg; bank++, ps++) 2954 cnt += ps->avail_end - ps->avail_start; 2955 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2956 npgs, pmap_pages_stolen, cnt); 2957 } 2958 #endif 2959 2960 return va; 2961 } 2962 2963 /* 2964 * Find a chuck of memory with right size and alignment. 2965 */ 2966 paddr_t 2967 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2968 { 2969 struct mem_region *mp; 2970 paddr_t s, e; 2971 int i, j; 2972 2973 size = round_page(size); 2974 2975 DPRINTFN(BOOT, 2976 ("pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 2977 size, alignment, at_end)); 2978 2979 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2980 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 2981 alignment); 2982 2983 if (at_end) { 2984 if (alignment != PAGE_SIZE) 2985 panic("pmap_boot_find_memory: invalid ending " 2986 "alignment %#" _PRIxpa, alignment); 2987 2988 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 2989 s = mp->start + mp->size - size; 2990 if (s >= mp->start && mp->size >= size) { 2991 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 2992 DPRINTFN(BOOT, 2993 ("pmap_boot_find_memory: b-avail[%d] start " 2994 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 2995 mp->start, mp->size)); 2996 mp->size -= size; 2997 DPRINTFN(BOOT, 2998 ("pmap_boot_find_memory: a-avail[%d] start " 2999 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3000 mp->start, mp->size)); 3001 return s; 3002 } 3003 } 3004 panic("pmap_boot_find_memory: no available memory"); 3005 } 3006 3007 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3008 s = (mp->start + alignment - 1) & ~(alignment-1); 3009 e = s + size; 3010 3011 /* 3012 * Is the calculated region entirely within the region? 3013 */ 3014 if (s < mp->start || e > mp->start + mp->size) 3015 continue; 3016 3017 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3018 if (s == mp->start) { 3019 /* 3020 * If the block starts at the beginning of region, 3021 * adjust the size & start. (the region may now be 3022 * zero in length) 3023 */ 3024 DPRINTFN(BOOT, 3025 ("pmap_boot_find_memory: b-avail[%d] start " 3026 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3027 mp->start += size; 3028 mp->size -= size; 3029 DPRINTFN(BOOT, 3030 ("pmap_boot_find_memory: a-avail[%d] start " 3031 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3032 } else if (e == mp->start + mp->size) { 3033 /* 3034 * If the block starts at the beginning of region, 3035 * adjust only the size. 3036 */ 3037 DPRINTFN(BOOT, 3038 ("pmap_boot_find_memory: b-avail[%d] start " 3039 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3040 mp->size -= size; 3041 DPRINTFN(BOOT, 3042 ("pmap_boot_find_memory: a-avail[%d] start " 3043 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3044 } else { 3045 /* 3046 * Block is in the middle of the region, so we 3047 * have to split it in two. 3048 */ 3049 for (j = avail_cnt; j > i + 1; j--) { 3050 avail[j] = avail[j-1]; 3051 } 3052 DPRINTFN(BOOT, 3053 ("pmap_boot_find_memory: b-avail[%d] start " 3054 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3055 mp[1].start = e; 3056 mp[1].size = mp[0].start + mp[0].size - e; 3057 mp[0].size = s - mp[0].start; 3058 avail_cnt++; 3059 for (; i < avail_cnt; i++) { 3060 DPRINTFN(BOOT, 3061 ("pmap_boot_find_memory: a-avail[%d] " 3062 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3063 avail[i].start, avail[i].size)); 3064 } 3065 } 3066 KASSERT(s == (uintptr_t) s); 3067 return s; 3068 } 3069 panic("pmap_boot_find_memory: not enough memory for " 3070 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3071 } 3072 3073 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3074 #if defined (PMAP_OEA64_BRIDGE) 3075 int 3076 pmap_setup_segment0_map(int use_large_pages, ...) 3077 { 3078 vaddr_t va; 3079 3080 register_t pte_lo = 0x0; 3081 int ptegidx = 0, i = 0; 3082 struct pte pte; 3083 va_list ap; 3084 3085 /* Coherent + Supervisor RW, no user access */ 3086 pte_lo = PTE_M; 3087 3088 /* XXXSL 3089 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3090 * these have to take priority. 3091 */ 3092 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3093 ptegidx = va_to_pteg(pmap_kernel(), va); 3094 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3095 i = pmap_pte_insert(ptegidx, &pte); 3096 } 3097 3098 va_start(ap, use_large_pages); 3099 while (1) { 3100 paddr_t pa; 3101 size_t size; 3102 3103 va = va_arg(ap, vaddr_t); 3104 3105 if (va == 0) 3106 break; 3107 3108 pa = va_arg(ap, paddr_t); 3109 size = va_arg(ap, size_t); 3110 3111 for (; va < (va + size); va += 0x1000, pa += 0x1000) { 3112 #if 0 3113 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3114 #endif 3115 ptegidx = va_to_pteg(pmap_kernel(), va); 3116 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3117 i = pmap_pte_insert(ptegidx, &pte); 3118 } 3119 } 3120 3121 TLBSYNC(); 3122 SYNC(); 3123 return (0); 3124 } 3125 #endif /* PMAP_OEA64_BRIDGE */ 3126 3127 /* 3128 * This is not part of the defined PMAP interface and is specific to the 3129 * PowerPC architecture. This is called during initppc, before the system 3130 * is really initialized. 3131 */ 3132 void 3133 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3134 { 3135 struct mem_region *mp, tmp; 3136 paddr_t s, e; 3137 psize_t size; 3138 int i, j; 3139 3140 /* 3141 * Get memory. 3142 */ 3143 mem_regions(&mem, &avail); 3144 #if defined(DEBUG) 3145 if (pmapdebug & PMAPDEBUG_BOOT) { 3146 printf("pmap_bootstrap: memory configuration:\n"); 3147 for (mp = mem; mp->size; mp++) { 3148 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3149 mp->start, mp->size); 3150 } 3151 for (mp = avail; mp->size; mp++) { 3152 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3153 mp->start, mp->size); 3154 } 3155 } 3156 #endif 3157 3158 /* 3159 * Find out how much physical memory we have and in how many chunks. 3160 */ 3161 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3162 if (mp->start >= pmap_memlimit) 3163 continue; 3164 if (mp->start + mp->size > pmap_memlimit) { 3165 size = pmap_memlimit - mp->start; 3166 physmem += btoc(size); 3167 } else { 3168 physmem += btoc(mp->size); 3169 } 3170 mem_cnt++; 3171 } 3172 3173 /* 3174 * Count the number of available entries. 3175 */ 3176 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3177 avail_cnt++; 3178 3179 /* 3180 * Page align all regions. 3181 */ 3182 kernelstart = trunc_page(kernelstart); 3183 kernelend = round_page(kernelend); 3184 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3185 s = round_page(mp->start); 3186 mp->size -= (s - mp->start); 3187 mp->size = trunc_page(mp->size); 3188 mp->start = s; 3189 e = mp->start + mp->size; 3190 3191 DPRINTFN(BOOT, 3192 ("pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3193 i, mp->start, mp->size)); 3194 3195 /* 3196 * Don't allow the end to run beyond our artificial limit 3197 */ 3198 if (e > pmap_memlimit) 3199 e = pmap_memlimit; 3200 3201 /* 3202 * Is this region empty or strange? skip it. 3203 */ 3204 if (e <= s) { 3205 mp->start = 0; 3206 mp->size = 0; 3207 continue; 3208 } 3209 3210 /* 3211 * Does this overlap the beginning of kernel? 3212 * Does extend past the end of the kernel? 3213 */ 3214 else if (s < kernelstart && e > kernelstart) { 3215 if (e > kernelend) { 3216 avail[avail_cnt].start = kernelend; 3217 avail[avail_cnt].size = e - kernelend; 3218 avail_cnt++; 3219 } 3220 mp->size = kernelstart - s; 3221 } 3222 /* 3223 * Check whether this region overlaps the end of the kernel. 3224 */ 3225 else if (s < kernelend && e > kernelend) { 3226 mp->start = kernelend; 3227 mp->size = e - kernelend; 3228 } 3229 /* 3230 * Look whether this regions is completely inside the kernel. 3231 * Nuke it if it does. 3232 */ 3233 else if (s >= kernelstart && e <= kernelend) { 3234 mp->start = 0; 3235 mp->size = 0; 3236 } 3237 /* 3238 * If the user imposed a memory limit, enforce it. 3239 */ 3240 else if (s >= pmap_memlimit) { 3241 mp->start = -PAGE_SIZE; /* let's know why */ 3242 mp->size = 0; 3243 } 3244 else { 3245 mp->start = s; 3246 mp->size = e - s; 3247 } 3248 DPRINTFN(BOOT, 3249 ("pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3250 i, mp->start, mp->size)); 3251 } 3252 3253 /* 3254 * Move (and uncount) all the null return to the end. 3255 */ 3256 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3257 if (mp->size == 0) { 3258 tmp = avail[i]; 3259 avail[i] = avail[--avail_cnt]; 3260 avail[avail_cnt] = avail[i]; 3261 } 3262 } 3263 3264 /* 3265 * (Bubble)sort them into ascending order. 3266 */ 3267 for (i = 0; i < avail_cnt; i++) { 3268 for (j = i + 1; j < avail_cnt; j++) { 3269 if (avail[i].start > avail[j].start) { 3270 tmp = avail[i]; 3271 avail[i] = avail[j]; 3272 avail[j] = tmp; 3273 } 3274 } 3275 } 3276 3277 /* 3278 * Make sure they don't overlap. 3279 */ 3280 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3281 if (mp[0].start + mp[0].size > mp[1].start) { 3282 mp[0].size = mp[1].start - mp[0].start; 3283 } 3284 DPRINTFN(BOOT, 3285 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3286 i, mp->start, mp->size)); 3287 } 3288 DPRINTFN(BOOT, 3289 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3290 i, mp->start, mp->size)); 3291 3292 #ifdef PTEGCOUNT 3293 pmap_pteg_cnt = PTEGCOUNT; 3294 #else /* PTEGCOUNT */ 3295 3296 pmap_pteg_cnt = 0x1000; 3297 3298 while (pmap_pteg_cnt < physmem) 3299 pmap_pteg_cnt <<= 1; 3300 3301 pmap_pteg_cnt >>= 1; 3302 #endif /* PTEGCOUNT */ 3303 3304 #ifdef DEBUG 3305 DPRINTFN(BOOT, 3306 ("pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt)); 3307 #endif 3308 3309 /* 3310 * Find suitably aligned memory for PTEG hash table. 3311 */ 3312 size = pmap_pteg_cnt * sizeof(struct pteg); 3313 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3314 3315 #ifdef DEBUG 3316 DPRINTFN(BOOT, 3317 ("PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table)); 3318 #endif 3319 3320 3321 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3322 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3323 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3324 pmap_pteg_table, size); 3325 #endif 3326 3327 memset(__UNVOLATILE(pmap_pteg_table), 0, 3328 pmap_pteg_cnt * sizeof(struct pteg)); 3329 pmap_pteg_mask = pmap_pteg_cnt - 1; 3330 3331 /* 3332 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3333 * with pages. So we just steal them before giving them to UVM. 3334 */ 3335 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3336 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3337 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3338 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3339 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3340 pmap_pvo_table, size); 3341 #endif 3342 3343 for (i = 0; i < pmap_pteg_cnt; i++) 3344 TAILQ_INIT(&pmap_pvo_table[i]); 3345 3346 #ifndef MSGBUFADDR 3347 /* 3348 * Allocate msgbuf in high memory. 3349 */ 3350 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3351 #endif 3352 3353 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3354 paddr_t pfstart = atop(mp->start); 3355 paddr_t pfend = atop(mp->start + mp->size); 3356 if (mp->size == 0) 3357 continue; 3358 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3359 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3360 VM_FREELIST_FIRST256); 3361 } else if (mp->start >= SEGMENT_LENGTH) { 3362 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3363 VM_FREELIST_DEFAULT); 3364 } else { 3365 pfend = atop(SEGMENT_LENGTH); 3366 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3367 VM_FREELIST_FIRST256); 3368 pfstart = atop(SEGMENT_LENGTH); 3369 pfend = atop(mp->start + mp->size); 3370 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3371 VM_FREELIST_DEFAULT); 3372 } 3373 } 3374 3375 /* 3376 * Make sure kernel vsid is allocated as well as VSID 0. 3377 */ 3378 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3379 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3380 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3381 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3382 pmap_vsid_bitmap[0] |= 1; 3383 3384 /* 3385 * Initialize kernel pmap and hardware. 3386 */ 3387 3388 /* PMAP_OEA64_BRIDGE does support these instructions */ 3389 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3390 for (i = 0; i < 16; i++) { 3391 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3392 __asm volatile ("mtsrin %0,%1" 3393 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3394 } 3395 3396 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3397 __asm volatile ("mtsr %0,%1" 3398 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3399 #ifdef KERNEL2_SR 3400 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3401 __asm volatile ("mtsr %0,%1" 3402 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3403 #endif 3404 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3405 #if defined (PMAP_OEA) 3406 for (i = 0; i < 16; i++) { 3407 if (iosrtable[i] & SR601_T) { 3408 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3409 __asm volatile ("mtsrin %0,%1" 3410 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3411 } 3412 } 3413 __asm volatile ("sync; mtsdr1 %0; isync" 3414 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3415 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3416 __asm __volatile ("sync; mtsdr1 %0; isync" 3417 :: "r"((uintptr_t)pmap_pteg_table | (32 - cntlzw(pmap_pteg_mask >> 11)))); 3418 #endif 3419 tlbia(); 3420 3421 #ifdef ALTIVEC 3422 pmap_use_altivec = cpu_altivec; 3423 #endif 3424 3425 #ifdef DEBUG 3426 if (pmapdebug & PMAPDEBUG_BOOT) { 3427 u_int cnt; 3428 int bank; 3429 char pbuf[9]; 3430 for (cnt = 0, bank = 0; bank < vm_nphysseg; bank++) { 3431 cnt += vm_physmem[bank].avail_end - vm_physmem[bank].avail_start; 3432 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3433 bank, 3434 ptoa(vm_physmem[bank].avail_start), 3435 ptoa(vm_physmem[bank].avail_end), 3436 ptoa(vm_physmem[bank].avail_end - vm_physmem[bank].avail_start)); 3437 } 3438 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3439 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3440 pbuf, cnt); 3441 } 3442 #endif 3443 3444 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3445 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3446 &pmap_pool_uallocator, IPL_VM); 3447 3448 pool_setlowat(&pmap_upvo_pool, 252); 3449 3450 pool_init(&pmap_pool, sizeof(struct pmap), 3451 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3452 IPL_NONE); 3453 3454 #if defined(PMAP_NEED_MAPKERNEL) || 1 3455 { 3456 struct pmap *pm = pmap_kernel(); 3457 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3458 extern int etext[], kernel_text[]; 3459 vaddr_t va, va_etext = (paddr_t) etext; 3460 #endif 3461 paddr_t pa, pa_end; 3462 register_t sr; 3463 struct pte pt; 3464 unsigned int ptegidx; 3465 int bank; 3466 3467 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3468 pm->pm_sr[0] = sr; 3469 3470 for (bank = 0; bank < vm_nphysseg; bank++) { 3471 pa_end = ptoa(vm_physmem[bank].avail_end); 3472 pa = ptoa(vm_physmem[bank].avail_start); 3473 for (; pa < pa_end; pa += PAGE_SIZE) { 3474 ptegidx = va_to_pteg(pm, pa); 3475 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3476 pmap_pte_insert(ptegidx, &pt); 3477 } 3478 } 3479 3480 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3481 va = (vaddr_t) kernel_text; 3482 3483 for (pa = kernelstart; va < va_etext; 3484 pa += PAGE_SIZE, va += PAGE_SIZE) { 3485 ptegidx = va_to_pteg(pm, va); 3486 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3487 pmap_pte_insert(ptegidx, &pt); 3488 } 3489 3490 for (; pa < kernelend; 3491 pa += PAGE_SIZE, va += PAGE_SIZE) { 3492 ptegidx = va_to_pteg(pm, va); 3493 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3494 pmap_pte_insert(ptegidx, &pt); 3495 } 3496 3497 for (va = 0, pa = 0; va < kernelstart; 3498 pa += PAGE_SIZE, va += PAGE_SIZE) { 3499 ptegidx = va_to_pteg(pm, va); 3500 if (va < 0x3000) 3501 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3502 else 3503 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3504 pmap_pte_insert(ptegidx, &pt); 3505 } 3506 for (va = kernelend, pa = kernelend; va < SEGMENT_LENGTH; 3507 pa += PAGE_SIZE, va += PAGE_SIZE) { 3508 ptegidx = va_to_pteg(pm, va); 3509 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3510 pmap_pte_insert(ptegidx, &pt); 3511 } 3512 #endif 3513 3514 __asm volatile ("mtsrin %0,%1" 3515 :: "r"(sr), "r"(kernelstart)); 3516 } 3517 #endif 3518 } 3519
Indexes created Sun Sep 28 16:09:52 GMT 2025