pmap.c revision 1.69.2.1
1 /* $NetBSD: pmap.c,v 1.69.2.1 2010/02/26 14:40:23 uebayasi Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 36 * Copyright (C) 1995, 1996 TooLs GmbH. 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by TooLs GmbH. 50 * 4. The name of TooLs GmbH may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 58 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 59 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 60 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 61 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 62 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.69.2.1 2010/02/26 14:40:23 uebayasi Exp $"); 67 68 #define PMAP_NOOPNAMES 69 70 #include "opt_ppcarch.h" 71 #include "opt_altivec.h" 72 #include "opt_multiprocessor.h" 73 #include "opt_pmap.h" 74 75 #include <sys/param.h> 76 #include <sys/malloc.h> 77 #include <sys/proc.h> 78 #include <sys/pool.h> 79 #include <sys/queue.h> 80 #include <sys/device.h> /* for evcnt */ 81 #include <sys/systm.h> 82 #include <sys/atomic.h> 83 84 #include <uvm/uvm.h> 85 86 #include <machine/pcb.h> 87 #include <machine/powerpc.h> 88 #include <powerpc/spr.h> 89 #include <powerpc/oea/sr_601.h> 90 #include <powerpc/bat.h> 91 #include <powerpc/stdarg.h> 92 93 #ifdef ALTIVEC 94 int pmap_use_altivec; 95 #endif 96 97 volatile struct pteg *pmap_pteg_table; 98 unsigned int pmap_pteg_cnt; 99 unsigned int pmap_pteg_mask; 100 #ifdef PMAP_MEMLIMIT 101 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 102 #else 103 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 104 #endif 105 106 struct pmap kernel_pmap_; 107 unsigned int pmap_pages_stolen; 108 u_long pmap_pte_valid; 109 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 110 u_long pmap_pvo_enter_depth; 111 u_long pmap_pvo_remove_depth; 112 #endif 113 114 #ifndef MSGBUFADDR 115 extern paddr_t msgbuf_paddr; 116 #endif 117 118 static struct mem_region *mem, *avail; 119 static u_int mem_cnt, avail_cnt; 120 121 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 122 # define PMAP_OEA 1 123 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA64) && !defined(PPC_OEA64_BRIDGE) 124 # define PMAPNAME(name) pmap_##name 125 # endif 126 #endif 127 128 #if defined(PMAP_OEA64) 129 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64_BRIDGE) 130 # define PMAPNAME(name) pmap_##name 131 # endif 132 #endif 133 134 #if defined(PMAP_OEA64_BRIDGE) 135 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64) 136 # define PMAPNAME(name) pmap_##name 137 # endif 138 #endif 139 140 #if defined(PMAP_OEA) 141 #define _PRIxpte "lx" 142 #else 143 #define _PRIxpte PRIx64 144 #endif 145 #define _PRIxpa "lx" 146 #define _PRIxva "lx" 147 #define _PRIsr "lx" 148 149 #if defined(PMAP_EXCLUDE_DECLS) && !defined(PMAPNAME) 150 #if defined(PMAP_OEA) 151 #define PMAPNAME(name) pmap32_##name 152 #elif defined(PMAP_OEA64) 153 #define PMAPNAME(name) pmap64_##name 154 #elif defined(PMAP_OEA64_BRIDGE) 155 #define PMAPNAME(name) pmap64bridge_##name 156 #else 157 #error unknown variant for pmap 158 #endif 159 #endif /* PMAP_EXLCUDE_DECLS && !PMAPNAME */ 160 161 #if defined(PMAPNAME) 162 #define STATIC static 163 #define pmap_pte_spill PMAPNAME(pte_spill) 164 #define pmap_real_memory PMAPNAME(real_memory) 165 #define pmap_init PMAPNAME(init) 166 #define pmap_virtual_space PMAPNAME(virtual_space) 167 #define pmap_create PMAPNAME(create) 168 #define pmap_reference PMAPNAME(reference) 169 #define pmap_destroy PMAPNAME(destroy) 170 #define pmap_copy PMAPNAME(copy) 171 #define pmap_update PMAPNAME(update) 172 #define pmap_enter PMAPNAME(enter) 173 #define pmap_remove PMAPNAME(remove) 174 #define pmap_kenter_pa PMAPNAME(kenter_pa) 175 #define pmap_kremove PMAPNAME(kremove) 176 #define pmap_extract PMAPNAME(extract) 177 #define pmap_protect PMAPNAME(protect) 178 #define pmap_unwire PMAPNAME(unwire) 179 #define pmap_page_protect PMAPNAME(page_protect) 180 #define pmap_query_bit PMAPNAME(query_bit) 181 #define pmap_clear_bit PMAPNAME(clear_bit) 182 183 #define pmap_activate PMAPNAME(activate) 184 #define pmap_deactivate PMAPNAME(deactivate) 185 186 #define pmap_pinit PMAPNAME(pinit) 187 #define pmap_procwr PMAPNAME(procwr) 188 189 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 190 #define pmap_pte_print PMAPNAME(pte_print) 191 #define pmap_pteg_check PMAPNAME(pteg_check) 192 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 193 #define pmap_print_pte PMAPNAME(print_pte) 194 #define pmap_pteg_dist PMAPNAME(pteg_dist) 195 #endif 196 #if defined(DEBUG) || defined(PMAPCHECK) 197 #define pmap_pvo_verify PMAPNAME(pvo_verify) 198 #define pmapcheck PMAPNAME(check) 199 #endif 200 #if defined(DEBUG) || defined(PMAPDEBUG) 201 #define pmapdebug PMAPNAME(debug) 202 #endif 203 #define pmap_steal_memory PMAPNAME(steal_memory) 204 #define pmap_bootstrap PMAPNAME(bootstrap) 205 #else 206 #define STATIC /* nothing */ 207 #endif /* PMAPNAME */ 208 209 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 210 STATIC void pmap_real_memory(paddr_t *, psize_t *); 211 STATIC void pmap_init(void); 212 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 213 STATIC pmap_t pmap_create(void); 214 STATIC void pmap_reference(pmap_t); 215 STATIC void pmap_destroy(pmap_t); 216 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 217 STATIC void pmap_update(pmap_t); 218 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); 219 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 220 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t, u_int); 221 STATIC void pmap_kremove(vaddr_t, vsize_t); 222 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 223 224 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 225 STATIC void pmap_unwire(pmap_t, vaddr_t); 226 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 227 STATIC bool pmap_query_bit(struct vm_page *, int); 228 STATIC bool pmap_clear_bit(struct vm_page *, int); 229 230 STATIC void pmap_activate(struct lwp *); 231 STATIC void pmap_deactivate(struct lwp *); 232 233 STATIC void pmap_pinit(pmap_t pm); 234 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 235 236 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 237 STATIC void pmap_pte_print(volatile struct pte *); 238 STATIC void pmap_pteg_check(void); 239 STATIC void pmap_print_mmuregs(void); 240 STATIC void pmap_print_pte(pmap_t, vaddr_t); 241 STATIC void pmap_pteg_dist(void); 242 #endif 243 #if defined(DEBUG) || defined(PMAPCHECK) 244 STATIC void pmap_pvo_verify(void); 245 #endif 246 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 247 STATIC void pmap_bootstrap(paddr_t, paddr_t); 248 249 #ifdef PMAPNAME 250 const struct pmap_ops PMAPNAME(ops) = { 251 .pmapop_pte_spill = pmap_pte_spill, 252 .pmapop_real_memory = pmap_real_memory, 253 .pmapop_init = pmap_init, 254 .pmapop_virtual_space = pmap_virtual_space, 255 .pmapop_create = pmap_create, 256 .pmapop_reference = pmap_reference, 257 .pmapop_destroy = pmap_destroy, 258 .pmapop_copy = pmap_copy, 259 .pmapop_update = pmap_update, 260 .pmapop_enter = pmap_enter, 261 .pmapop_remove = pmap_remove, 262 .pmapop_kenter_pa = pmap_kenter_pa, 263 .pmapop_kremove = pmap_kremove, 264 .pmapop_extract = pmap_extract, 265 .pmapop_protect = pmap_protect, 266 .pmapop_unwire = pmap_unwire, 267 .pmapop_page_protect = pmap_page_protect, 268 .pmapop_query_bit = pmap_query_bit, 269 .pmapop_clear_bit = pmap_clear_bit, 270 .pmapop_activate = pmap_activate, 271 .pmapop_deactivate = pmap_deactivate, 272 .pmapop_pinit = pmap_pinit, 273 .pmapop_procwr = pmap_procwr, 274 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 275 .pmapop_pte_print = pmap_pte_print, 276 .pmapop_pteg_check = pmap_pteg_check, 277 .pmapop_print_mmuregs = pmap_print_mmuregs, 278 .pmapop_print_pte = pmap_print_pte, 279 .pmapop_pteg_dist = pmap_pteg_dist, 280 #else 281 .pmapop_pte_print = NULL, 282 .pmapop_pteg_check = NULL, 283 .pmapop_print_mmuregs = NULL, 284 .pmapop_print_pte = NULL, 285 .pmapop_pteg_dist = NULL, 286 #endif 287 #if defined(DEBUG) || defined(PMAPCHECK) 288 .pmapop_pvo_verify = pmap_pvo_verify, 289 #else 290 .pmapop_pvo_verify = NULL, 291 #endif 292 .pmapop_steal_memory = pmap_steal_memory, 293 .pmapop_bootstrap = pmap_bootstrap, 294 }; 295 #endif /* !PMAPNAME */ 296 297 /* 298 * The following structure is aligned to 32 bytes 299 */ 300 struct pvo_entry { 301 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 302 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 303 struct pte pvo_pte; /* Prebuilt PTE */ 304 pmap_t pvo_pmap; /* ptr to owning pmap */ 305 vaddr_t pvo_vaddr; /* VA of entry */ 306 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 307 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 308 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 309 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 310 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 311 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 312 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 313 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 314 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 315 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 316 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 317 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 318 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 319 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 320 #define PVO_REMOVE 6 /* PVO has been removed */ 321 #define PVO_WHERE_MASK 15 322 #define PVO_WHERE_SHFT 8 323 } __attribute__ ((aligned (32))); 324 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 325 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 326 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 327 #define PVO_PTEGIDX_CLR(pvo) \ 328 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 329 #define PVO_PTEGIDX_SET(pvo,i) \ 330 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 331 #define PVO_WHERE(pvo,w) \ 332 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 333 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 334 335 TAILQ_HEAD(pvo_tqhead, pvo_entry); 336 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 337 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 338 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 339 340 struct pool pmap_pool; /* pool for pmap structures */ 341 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 342 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 343 344 /* 345 * We keep a cache of unmanaged pages to be used for pvo entries for 346 * unmanaged pages. 347 */ 348 struct pvo_page { 349 SIMPLEQ_ENTRY(pvo_page) pvop_link; 350 }; 351 SIMPLEQ_HEAD(pvop_head, pvo_page); 352 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 353 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 354 u_long pmap_upvop_free; 355 u_long pmap_upvop_maxfree; 356 u_long pmap_mpvop_free; 357 u_long pmap_mpvop_maxfree; 358 359 static void *pmap_pool_ualloc(struct pool *, int); 360 static void *pmap_pool_malloc(struct pool *, int); 361 362 static void pmap_pool_ufree(struct pool *, void *); 363 static void pmap_pool_mfree(struct pool *, void *); 364 365 static struct pool_allocator pmap_pool_mallocator = { 366 .pa_alloc = pmap_pool_malloc, 367 .pa_free = pmap_pool_mfree, 368 .pa_pagesz = 0, 369 }; 370 371 static struct pool_allocator pmap_pool_uallocator = { 372 .pa_alloc = pmap_pool_ualloc, 373 .pa_free = pmap_pool_ufree, 374 .pa_pagesz = 0, 375 }; 376 377 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 378 void pmap_pte_print(volatile struct pte *); 379 void pmap_pteg_check(void); 380 void pmap_pteg_dist(void); 381 void pmap_print_pte(pmap_t, vaddr_t); 382 void pmap_print_mmuregs(void); 383 #endif 384 385 #if defined(DEBUG) || defined(PMAPCHECK) 386 #ifdef PMAPCHECK 387 int pmapcheck = 1; 388 #else 389 int pmapcheck = 0; 390 #endif 391 void pmap_pvo_verify(void); 392 static void pmap_pvo_check(const struct pvo_entry *); 393 #define PMAP_PVO_CHECK(pvo) \ 394 do { \ 395 if (pmapcheck) \ 396 pmap_pvo_check(pvo); \ 397 } while (0) 398 #else 399 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 400 #endif 401 static int pmap_pte_insert(int, struct pte *); 402 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 403 vaddr_t, paddr_t, register_t, int); 404 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 405 static void pmap_pvo_free(struct pvo_entry *); 406 static void pmap_pvo_free_list(struct pvo_head *); 407 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 408 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 409 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 410 static void pvo_set_exec(struct pvo_entry *); 411 static void pvo_clear_exec(struct pvo_entry *); 412 413 static void tlbia(void); 414 415 static void pmap_release(pmap_t); 416 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 417 418 static uint32_t pmap_pvo_reclaim_nextidx; 419 #ifdef DEBUG 420 static int pmap_pvo_reclaim_debugctr; 421 #endif 422 423 #define VSID_NBPW (sizeof(uint32_t) * 8) 424 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 425 426 static int pmap_initialized; 427 428 #if defined(DEBUG) || defined(PMAPDEBUG) 429 #define PMAPDEBUG_BOOT 0x0001 430 #define PMAPDEBUG_PTE 0x0002 431 #define PMAPDEBUG_EXEC 0x0008 432 #define PMAPDEBUG_PVOENTER 0x0010 433 #define PMAPDEBUG_PVOREMOVE 0x0020 434 #define PMAPDEBUG_ACTIVATE 0x0100 435 #define PMAPDEBUG_CREATE 0x0200 436 #define PMAPDEBUG_ENTER 0x1000 437 #define PMAPDEBUG_KENTER 0x2000 438 #define PMAPDEBUG_KREMOVE 0x4000 439 #define PMAPDEBUG_REMOVE 0x8000 440 441 unsigned int pmapdebug = 0; 442 443 # define DPRINTF(x) printf x 444 # define DPRINTFN(n, x) if (pmapdebug & PMAPDEBUG_ ## n) printf x 445 #else 446 # define DPRINTF(x) 447 # define DPRINTFN(n, x) 448 #endif 449 450 451 #ifdef PMAPCOUNTERS 452 /* 453 * From pmap_subr.c 454 */ 455 extern struct evcnt pmap_evcnt_mappings; 456 extern struct evcnt pmap_evcnt_unmappings; 457 458 extern struct evcnt pmap_evcnt_kernel_mappings; 459 extern struct evcnt pmap_evcnt_kernel_unmappings; 460 461 extern struct evcnt pmap_evcnt_mappings_replaced; 462 463 extern struct evcnt pmap_evcnt_exec_mappings; 464 extern struct evcnt pmap_evcnt_exec_cached; 465 466 extern struct evcnt pmap_evcnt_exec_synced; 467 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 468 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 469 470 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 471 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 472 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 473 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 474 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 475 476 extern struct evcnt pmap_evcnt_updates; 477 extern struct evcnt pmap_evcnt_collects; 478 extern struct evcnt pmap_evcnt_copies; 479 480 extern struct evcnt pmap_evcnt_ptes_spilled; 481 extern struct evcnt pmap_evcnt_ptes_unspilled; 482 extern struct evcnt pmap_evcnt_ptes_evicted; 483 484 extern struct evcnt pmap_evcnt_ptes_primary[8]; 485 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 486 extern struct evcnt pmap_evcnt_ptes_removed; 487 extern struct evcnt pmap_evcnt_ptes_changed; 488 extern struct evcnt pmap_evcnt_pvos_reclaimed; 489 extern struct evcnt pmap_evcnt_pvos_failed; 490 491 extern struct evcnt pmap_evcnt_zeroed_pages; 492 extern struct evcnt pmap_evcnt_copied_pages; 493 extern struct evcnt pmap_evcnt_idlezeroed_pages; 494 495 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 496 #define PMAPCOUNT2(ev) ((ev).ev_count++) 497 #else 498 #define PMAPCOUNT(ev) ((void) 0) 499 #define PMAPCOUNT2(ev) ((void) 0) 500 #endif 501 502 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 503 504 /* XXXSL: this needs to be moved to assembler */ 505 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 506 507 #define TLBSYNC() __asm volatile("tlbsync") 508 #define SYNC() __asm volatile("sync") 509 #define EIEIO() __asm volatile("eieio") 510 #define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va)) 511 #define MFMSR() mfmsr() 512 #define MTMSR(psl) mtmsr(psl) 513 #define MFPVR() mfpvr() 514 #define MFSRIN(va) mfsrin(va) 515 #define MFTB() mfrtcltbl() 516 517 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 518 static inline register_t 519 mfsrin(vaddr_t va) 520 { 521 register_t sr; 522 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 523 return sr; 524 } 525 #endif /* PMAP_OEA*/ 526 527 #if defined (PMAP_OEA64_BRIDGE) 528 extern void mfmsr64 (register64_t *result); 529 #endif /* PMAP_OEA64_BRIDGE */ 530 531 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 532 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 533 534 static inline register_t 535 pmap_interrupts_off(void) 536 { 537 register_t msr = MFMSR(); 538 if (msr & PSL_EE) 539 MTMSR(msr & ~PSL_EE); 540 return msr; 541 } 542 543 static void 544 pmap_interrupts_restore(register_t msr) 545 { 546 if (msr & PSL_EE) 547 MTMSR(msr); 548 } 549 550 static inline u_int32_t 551 mfrtcltbl(void) 552 { 553 #ifdef PPC_OEA601 554 if ((MFPVR() >> 16) == MPC601) 555 return (mfrtcl() >> 7); 556 else 557 #endif 558 return (mftbl()); 559 } 560 561 /* 562 * These small routines may have to be replaced, 563 * if/when we support processors other that the 604. 564 */ 565 566 void 567 tlbia(void) 568 { 569 char *i; 570 571 SYNC(); 572 #if defined(PMAP_OEA) 573 /* 574 * Why not use "tlbia"? Because not all processors implement it. 575 * 576 * This needs to be a per-CPU callback to do the appropriate thing 577 * for the CPU. XXX 578 */ 579 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 580 TLBIE(i); 581 EIEIO(); 582 SYNC(); 583 } 584 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 585 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 586 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 587 TLBIEL(i); 588 EIEIO(); 589 SYNC(); 590 } 591 #endif 592 TLBSYNC(); 593 SYNC(); 594 } 595 596 static inline register_t 597 va_to_vsid(const struct pmap *pm, vaddr_t addr) 598 { 599 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 600 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 601 #else /* PMAP_OEA64 */ 602 #if 0 603 const struct ste *ste; 604 register_t hash; 605 int i; 606 607 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 608 609 /* 610 * Try the primary group first 611 */ 612 ste = pm->pm_stes[hash].stes; 613 for (i = 0; i < 8; i++, ste++) { 614 if (ste->ste_hi & STE_V) && 615 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 616 return ste; 617 } 618 619 /* 620 * Then the secondary group. 621 */ 622 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 623 for (i = 0; i < 8; i++, ste++) { 624 if (ste->ste_hi & STE_V) && 625 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 626 return addr; 627 } 628 629 return NULL; 630 #else 631 /* 632 * Rather than searching the STE groups for the VSID, we know 633 * how we generate that from the ESID and so do that. 634 */ 635 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 636 #endif 637 #endif /* PMAP_OEA */ 638 } 639 640 static inline register_t 641 va_to_pteg(const struct pmap *pm, vaddr_t addr) 642 { 643 register_t hash; 644 645 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 646 return hash & pmap_pteg_mask; 647 } 648 649 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 650 /* 651 * Given a PTE in the page table, calculate the VADDR that hashes to it. 652 * The only bit of magic is that the top 4 bits of the address doesn't 653 * technically exist in the PTE. But we know we reserved 4 bits of the 654 * VSID for it so that's how we get it. 655 */ 656 static vaddr_t 657 pmap_pte_to_va(volatile const struct pte *pt) 658 { 659 vaddr_t va; 660 uintptr_t ptaddr = (uintptr_t) pt; 661 662 if (pt->pte_hi & PTE_HID) 663 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 664 665 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 666 #if defined(PMAP_OEA) 667 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 668 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 669 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 670 #endif 671 va <<= ADDR_PIDX_SHFT; 672 673 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 674 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 675 676 #if defined(PMAP_OEA64) 677 /* PPC63 Bits 0-35 */ 678 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 679 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 680 /* PPC Bits 0-3 */ 681 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 682 #endif 683 684 return va; 685 } 686 #endif 687 688 static inline struct pvo_head * 689 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 690 { 691 struct vm_page *pg; 692 struct vm_page_md *md; 693 694 pg = PHYS_TO_VM_PAGE(pa); 695 if (pg_p != NULL) 696 *pg_p = pg; 697 if (pg == NULL) 698 return &pmap_pvo_unmanaged; 699 md = VM_PAGE_TO_MD(pg); 700 return &md->mdpg_pvoh; 701 } 702 703 static inline struct pvo_head * 704 vm_page_to_pvoh(struct vm_page *pg) 705 { 706 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 707 708 return &md->mdpg_pvoh; 709 } 710 711 712 static inline void 713 pmap_attr_clear(struct vm_page *pg, int ptebit) 714 { 715 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 716 717 md->mdpg_attrs &= ~ptebit; 718 } 719 720 static inline int 721 pmap_attr_fetch(struct vm_page *pg) 722 { 723 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 724 725 return md->mdpg_attrs; 726 } 727 728 static inline void 729 pmap_attr_save(struct vm_page *pg, int ptebit) 730 { 731 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 732 733 md->mdpg_attrs |= ptebit; 734 } 735 736 static inline int 737 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 738 { 739 if (pt->pte_hi == pvo_pt->pte_hi 740 #if 0 741 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 742 ~(PTE_REF|PTE_CHG)) == 0 743 #endif 744 ) 745 return 1; 746 return 0; 747 } 748 749 static inline void 750 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 751 { 752 /* 753 * Construct the PTE. Default to IMB initially. Valid bit 754 * only gets set when the real pte is set in memory. 755 * 756 * Note: Don't set the valid bit for correct operation of tlb update. 757 */ 758 #if defined(PMAP_OEA) 759 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 760 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 761 pt->pte_lo = pte_lo; 762 #elif defined (PMAP_OEA64_BRIDGE) 763 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 764 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 765 pt->pte_lo = (u_int64_t) pte_lo; 766 #elif defined (PMAP_OEA64) 767 #error PMAP_OEA64 not supported 768 #endif /* PMAP_OEA */ 769 } 770 771 static inline void 772 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 773 { 774 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 775 } 776 777 static inline void 778 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 779 { 780 /* 781 * As shown in Section 7.6.3.2.3 782 */ 783 pt->pte_lo &= ~ptebit; 784 TLBIE(va); 785 SYNC(); 786 EIEIO(); 787 TLBSYNC(); 788 SYNC(); 789 #ifdef MULTIPROCESSOR 790 DCBST(pt); 791 #endif 792 } 793 794 static inline void 795 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 796 { 797 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 798 if (pvo_pt->pte_hi & PTE_VALID) 799 panic("pte_set: setting an already valid pte %p", pvo_pt); 800 #endif 801 pvo_pt->pte_hi |= PTE_VALID; 802 803 /* 804 * Update the PTE as defined in section 7.6.3.1 805 * Note that the REF/CHG bits are from pvo_pt and thus should 806 * have been saved so this routine can restore them (if desired). 807 */ 808 pt->pte_lo = pvo_pt->pte_lo; 809 EIEIO(); 810 pt->pte_hi = pvo_pt->pte_hi; 811 TLBSYNC(); 812 SYNC(); 813 #ifdef MULTIPROCESSOR 814 DCBST(pt); 815 #endif 816 pmap_pte_valid++; 817 } 818 819 static inline void 820 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 821 { 822 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 823 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 824 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 825 if ((pt->pte_hi & PTE_VALID) == 0) 826 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 827 #endif 828 829 pvo_pt->pte_hi &= ~PTE_VALID; 830 /* 831 * Force the ref & chg bits back into the PTEs. 832 */ 833 SYNC(); 834 /* 835 * Invalidate the pte ... (Section 7.6.3.3) 836 */ 837 pt->pte_hi &= ~PTE_VALID; 838 SYNC(); 839 TLBIE(va); 840 SYNC(); 841 EIEIO(); 842 TLBSYNC(); 843 SYNC(); 844 /* 845 * Save the ref & chg bits ... 846 */ 847 pmap_pte_synch(pt, pvo_pt); 848 pmap_pte_valid--; 849 } 850 851 static inline void 852 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 853 { 854 /* 855 * Invalidate the PTE 856 */ 857 pmap_pte_unset(pt, pvo_pt, va); 858 pmap_pte_set(pt, pvo_pt); 859 } 860 861 /* 862 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 863 * (either primary or secondary location). 864 * 865 * Note: both the destination and source PTEs must not have PTE_VALID set. 866 */ 867 868 static int 869 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 870 { 871 volatile struct pte *pt; 872 int i; 873 874 #if defined(DEBUG) 875 DPRINTFN(PTE, ("pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 876 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo)); 877 #endif 878 /* 879 * First try primary hash. 880 */ 881 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 882 if ((pt->pte_hi & PTE_VALID) == 0) { 883 pvo_pt->pte_hi &= ~PTE_HID; 884 pmap_pte_set(pt, pvo_pt); 885 return i; 886 } 887 } 888 889 /* 890 * Now try secondary hash. 891 */ 892 ptegidx ^= pmap_pteg_mask; 893 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 894 if ((pt->pte_hi & PTE_VALID) == 0) { 895 pvo_pt->pte_hi |= PTE_HID; 896 pmap_pte_set(pt, pvo_pt); 897 return i; 898 } 899 } 900 return -1; 901 } 902 903 /* 904 * Spill handler. 905 * 906 * Tries to spill a page table entry from the overflow area. 907 * This runs in either real mode (if dealing with a exception spill) 908 * or virtual mode when dealing with manually spilling one of the 909 * kernel's pte entries. In either case, interrupts are already 910 * disabled. 911 */ 912 913 int 914 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 915 { 916 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 917 struct pvo_entry *pvo; 918 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 919 struct pvo_tqhead *pvoh, *vpvoh = NULL; 920 int ptegidx, i, j; 921 volatile struct pteg *pteg; 922 volatile struct pte *pt; 923 924 PMAP_LOCK(); 925 926 ptegidx = va_to_pteg(pm, addr); 927 928 /* 929 * Have to substitute some entry. Use the primary hash for this. 930 * Use low bits of timebase as random generator. Make sure we are 931 * not picking a kernel pte for replacement. 932 */ 933 pteg = &pmap_pteg_table[ptegidx]; 934 i = MFTB() & 7; 935 for (j = 0; j < 8; j++) { 936 pt = &pteg->pt[i]; 937 if ((pt->pte_hi & PTE_VALID) == 0) 938 break; 939 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 940 < PHYSMAP_VSIDBITS) 941 break; 942 i = (i + 1) & 7; 943 } 944 KASSERT(j < 8); 945 946 source_pvo = NULL; 947 victim_pvo = NULL; 948 pvoh = &pmap_pvo_table[ptegidx]; 949 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 950 951 /* 952 * We need to find pvo entry for this address... 953 */ 954 PMAP_PVO_CHECK(pvo); /* sanity check */ 955 956 /* 957 * If we haven't found the source and we come to a PVO with 958 * a valid PTE, then we know we can't find it because all 959 * evicted PVOs always are first in the list. 960 */ 961 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 962 break; 963 if (source_pvo == NULL && pm == pvo->pvo_pmap && 964 addr == PVO_VADDR(pvo)) { 965 966 /* 967 * Now we have found the entry to be spilled into the 968 * pteg. Attempt to insert it into the page table. 969 */ 970 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 971 if (j >= 0) { 972 PVO_PTEGIDX_SET(pvo, j); 973 PMAP_PVO_CHECK(pvo); /* sanity check */ 974 PVO_WHERE(pvo, SPILL_INSERT); 975 pvo->pvo_pmap->pm_evictions--; 976 PMAPCOUNT(ptes_spilled); 977 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 978 ? pmap_evcnt_ptes_secondary 979 : pmap_evcnt_ptes_primary)[j]); 980 981 /* 982 * Since we keep the evicted entries at the 983 * from of the PVO list, we need move this 984 * (now resident) PVO after the evicted 985 * entries. 986 */ 987 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 988 989 /* 990 * If we don't have to move (either we were the 991 * last entry or the next entry was valid), 992 * don't change our position. Otherwise 993 * move ourselves to the tail of the queue. 994 */ 995 if (next_pvo != NULL && 996 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 997 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 998 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 999 } 1000 PMAP_UNLOCK(); 1001 return 1; 1002 } 1003 source_pvo = pvo; 1004 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 1005 return 0; 1006 } 1007 if (victim_pvo != NULL) 1008 break; 1009 } 1010 1011 /* 1012 * We also need the pvo entry of the victim we are replacing 1013 * so save the R & C bits of the PTE. 1014 */ 1015 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1016 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1017 vpvoh = pvoh; /* *1* */ 1018 victim_pvo = pvo; 1019 if (source_pvo != NULL) 1020 break; 1021 } 1022 } 1023 1024 if (source_pvo == NULL) { 1025 PMAPCOUNT(ptes_unspilled); 1026 PMAP_UNLOCK(); 1027 return 0; 1028 } 1029 1030 if (victim_pvo == NULL) { 1031 if ((pt->pte_hi & PTE_HID) == 0) 1032 panic("pmap_pte_spill: victim p-pte (%p) has " 1033 "no pvo entry!", pt); 1034 1035 /* 1036 * If this is a secondary PTE, we need to search 1037 * its primary pvo bucket for the matching PVO. 1038 */ 1039 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1040 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1041 PMAP_PVO_CHECK(pvo); /* sanity check */ 1042 1043 /* 1044 * We also need the pvo entry of the victim we are 1045 * replacing so save the R & C bits of the PTE. 1046 */ 1047 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1048 victim_pvo = pvo; 1049 break; 1050 } 1051 } 1052 if (victim_pvo == NULL) 1053 panic("pmap_pte_spill: victim s-pte (%p) has " 1054 "no pvo entry!", pt); 1055 } 1056 1057 /* 1058 * The victim should be not be a kernel PVO/PTE entry. 1059 */ 1060 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1061 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1062 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1063 1064 /* 1065 * We are invalidating the TLB entry for the EA for the 1066 * we are replacing even though its valid; If we don't 1067 * we lose any ref/chg bit changes contained in the TLB 1068 * entry. 1069 */ 1070 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1071 1072 /* 1073 * To enforce the PVO list ordering constraint that all 1074 * evicted entries should come before all valid entries, 1075 * move the source PVO to the tail of its list and the 1076 * victim PVO to the head of its list (which might not be 1077 * the same list, if the victim was using the secondary hash). 1078 */ 1079 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1080 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1081 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1082 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1083 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1084 pmap_pte_set(pt, &source_pvo->pvo_pte); 1085 victim_pvo->pvo_pmap->pm_evictions++; 1086 source_pvo->pvo_pmap->pm_evictions--; 1087 PVO_WHERE(victim_pvo, SPILL_UNSET); 1088 PVO_WHERE(source_pvo, SPILL_SET); 1089 1090 PVO_PTEGIDX_CLR(victim_pvo); 1091 PVO_PTEGIDX_SET(source_pvo, i); 1092 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1093 PMAPCOUNT(ptes_spilled); 1094 PMAPCOUNT(ptes_evicted); 1095 PMAPCOUNT(ptes_removed); 1096 1097 PMAP_PVO_CHECK(victim_pvo); 1098 PMAP_PVO_CHECK(source_pvo); 1099 1100 PMAP_UNLOCK(); 1101 return 1; 1102 } 1103 1104 /* 1105 * Restrict given range to physical memory 1106 */ 1107 void 1108 pmap_real_memory(paddr_t *start, psize_t *size) 1109 { 1110 struct mem_region *mp; 1111 1112 for (mp = mem; mp->size; mp++) { 1113 if (*start + *size > mp->start 1114 && *start < mp->start + mp->size) { 1115 if (*start < mp->start) { 1116 *size -= mp->start - *start; 1117 *start = mp->start; 1118 } 1119 if (*start + *size > mp->start + mp->size) 1120 *size = mp->start + mp->size - *start; 1121 return; 1122 } 1123 } 1124 *size = 0; 1125 } 1126 1127 /* 1128 * Initialize anything else for pmap handling. 1129 * Called during vm_init(). 1130 */ 1131 void 1132 pmap_init(void) 1133 { 1134 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1135 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1136 &pmap_pool_mallocator, IPL_NONE); 1137 1138 pool_setlowat(&pmap_mpvo_pool, 1008); 1139 1140 pmap_initialized = 1; 1141 1142 } 1143 1144 /* 1145 * How much virtual space does the kernel get? 1146 */ 1147 void 1148 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1149 { 1150 /* 1151 * For now, reserve one segment (minus some overhead) for kernel 1152 * virtual memory 1153 */ 1154 *start = VM_MIN_KERNEL_ADDRESS; 1155 *end = VM_MAX_KERNEL_ADDRESS; 1156 } 1157 1158 /* 1159 * Allocate, initialize, and return a new physical map. 1160 */ 1161 pmap_t 1162 pmap_create(void) 1163 { 1164 pmap_t pm; 1165 1166 pm = pool_get(&pmap_pool, PR_WAITOK); 1167 memset((void *)pm, 0, sizeof *pm); 1168 pmap_pinit(pm); 1169 1170 DPRINTFN(CREATE,("pmap_create: pm %p:\n" 1171 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1172 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1173 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1174 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1175 pm, 1176 pm->pm_sr[0], pm->pm_sr[1], 1177 pm->pm_sr[2], pm->pm_sr[3], 1178 pm->pm_sr[4], pm->pm_sr[5], 1179 pm->pm_sr[6], pm->pm_sr[7], 1180 pm->pm_sr[8], pm->pm_sr[9], 1181 pm->pm_sr[10], pm->pm_sr[11], 1182 pm->pm_sr[12], pm->pm_sr[13], 1183 pm->pm_sr[14], pm->pm_sr[15])); 1184 return pm; 1185 } 1186 1187 /* 1188 * Initialize a preallocated and zeroed pmap structure. 1189 */ 1190 void 1191 pmap_pinit(pmap_t pm) 1192 { 1193 register_t entropy = MFTB(); 1194 register_t mask; 1195 int i; 1196 1197 /* 1198 * Allocate some segment registers for this pmap. 1199 */ 1200 pm->pm_refs = 1; 1201 PMAP_LOCK(); 1202 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1203 static register_t pmap_vsidcontext; 1204 register_t hash; 1205 unsigned int n; 1206 1207 /* Create a new value by multiplying by a prime adding in 1208 * entropy from the timebase register. This is to make the 1209 * VSID more random so that the PT Hash function collides 1210 * less often. (note that the prime causes gcc to do shifts 1211 * instead of a multiply) 1212 */ 1213 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1214 hash = pmap_vsidcontext & (NPMAPS - 1); 1215 if (hash == 0) { /* 0 is special, avoid it */ 1216 entropy += 0xbadf00d; 1217 continue; 1218 } 1219 n = hash >> 5; 1220 mask = 1L << (hash & (VSID_NBPW-1)); 1221 hash = pmap_vsidcontext; 1222 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1223 /* anything free in this bucket? */ 1224 if (~pmap_vsid_bitmap[n] == 0) { 1225 entropy = hash ^ (hash >> 16); 1226 continue; 1227 } 1228 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1229 mask = 1L << i; 1230 hash &= ~(VSID_NBPW-1); 1231 hash |= i; 1232 } 1233 hash &= PTE_VSID >> PTE_VSID_SHFT; 1234 pmap_vsid_bitmap[n] |= mask; 1235 pm->pm_vsid = hash; 1236 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1237 for (i = 0; i < 16; i++) 1238 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1239 SR_NOEXEC; 1240 #endif 1241 PMAP_UNLOCK(); 1242 return; 1243 } 1244 PMAP_UNLOCK(); 1245 panic("pmap_pinit: out of segments"); 1246 } 1247 1248 /* 1249 * Add a reference to the given pmap. 1250 */ 1251 void 1252 pmap_reference(pmap_t pm) 1253 { 1254 atomic_inc_uint(&pm->pm_refs); 1255 } 1256 1257 /* 1258 * Retire the given pmap from service. 1259 * Should only be called if the map contains no valid mappings. 1260 */ 1261 void 1262 pmap_destroy(pmap_t pm) 1263 { 1264 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1265 pmap_release(pm); 1266 pool_put(&pmap_pool, pm); 1267 } 1268 } 1269 1270 /* 1271 * Release any resources held by the given physical map. 1272 * Called when a pmap initialized by pmap_pinit is being released. 1273 */ 1274 void 1275 pmap_release(pmap_t pm) 1276 { 1277 int idx, mask; 1278 1279 KASSERT(pm->pm_stats.resident_count == 0); 1280 KASSERT(pm->pm_stats.wired_count == 0); 1281 1282 PMAP_LOCK(); 1283 if (pm->pm_sr[0] == 0) 1284 panic("pmap_release"); 1285 idx = pm->pm_vsid & (NPMAPS-1); 1286 mask = 1 << (idx % VSID_NBPW); 1287 idx /= VSID_NBPW; 1288 1289 KASSERT(pmap_vsid_bitmap[idx] & mask); 1290 pmap_vsid_bitmap[idx] &= ~mask; 1291 PMAP_UNLOCK(); 1292 } 1293 1294 /* 1295 * Copy the range specified by src_addr/len 1296 * from the source map to the range dst_addr/len 1297 * in the destination map. 1298 * 1299 * This routine is only advisory and need not do anything. 1300 */ 1301 void 1302 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1303 vsize_t len, vaddr_t src_addr) 1304 { 1305 PMAPCOUNT(copies); 1306 } 1307 1308 /* 1309 * Require that all active physical maps contain no 1310 * incorrect entries NOW. 1311 */ 1312 void 1313 pmap_update(struct pmap *pmap) 1314 { 1315 PMAPCOUNT(updates); 1316 TLBSYNC(); 1317 } 1318 1319 static inline int 1320 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1321 { 1322 int pteidx; 1323 /* 1324 * We can find the actual pte entry without searching by 1325 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1326 * and by noticing the HID bit. 1327 */ 1328 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1329 if (pvo->pvo_pte.pte_hi & PTE_HID) 1330 pteidx ^= pmap_pteg_mask * 8; 1331 return pteidx; 1332 } 1333 1334 volatile struct pte * 1335 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1336 { 1337 volatile struct pte *pt; 1338 1339 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1340 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1341 return NULL; 1342 #endif 1343 1344 /* 1345 * If we haven't been supplied the ptegidx, calculate it. 1346 */ 1347 if (pteidx == -1) { 1348 int ptegidx; 1349 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1350 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1351 } 1352 1353 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1354 1355 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1356 return pt; 1357 #else 1358 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1359 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1360 "pvo but no valid pte index", pvo); 1361 } 1362 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1363 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1364 "pvo but no valid pte", pvo); 1365 } 1366 1367 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1368 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1369 #if defined(DEBUG) || defined(PMAPCHECK) 1370 pmap_pte_print(pt); 1371 #endif 1372 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1373 "pmap_pteg_table %p but invalid in pvo", 1374 pvo, pt); 1375 } 1376 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1377 #if defined(DEBUG) || defined(PMAPCHECK) 1378 pmap_pte_print(pt); 1379 #endif 1380 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1381 "not match pte %p in pmap_pteg_table", 1382 pvo, pt); 1383 } 1384 return pt; 1385 } 1386 1387 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1388 #if defined(DEBUG) || defined(PMAPCHECK) 1389 pmap_pte_print(pt); 1390 #endif 1391 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1392 "pmap_pteg_table but valid in pvo", pvo, pt); 1393 } 1394 return NULL; 1395 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1396 } 1397 1398 struct pvo_entry * 1399 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1400 { 1401 struct pvo_entry *pvo; 1402 int ptegidx; 1403 1404 va &= ~ADDR_POFF; 1405 ptegidx = va_to_pteg(pm, va); 1406 1407 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1408 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1409 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1410 panic("pmap_pvo_find_va: invalid pvo %p on " 1411 "list %#x (%p)", pvo, ptegidx, 1412 &pmap_pvo_table[ptegidx]); 1413 #endif 1414 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1415 if (pteidx_p) 1416 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1417 return pvo; 1418 } 1419 } 1420 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1421 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1422 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1423 return NULL; 1424 } 1425 1426 #if defined(DEBUG) || defined(PMAPCHECK) 1427 void 1428 pmap_pvo_check(const struct pvo_entry *pvo) 1429 { 1430 struct pvo_head *pvo_head; 1431 struct pvo_entry *pvo0; 1432 volatile struct pte *pt; 1433 int failed = 0; 1434 1435 PMAP_LOCK(); 1436 1437 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1438 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1439 1440 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1441 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1442 pvo, pvo->pvo_pmap); 1443 failed = 1; 1444 } 1445 1446 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1447 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1448 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1449 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1450 failed = 1; 1451 } 1452 1453 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1454 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1455 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1456 pvo, LIST_NEXT(pvo, pvo_vlink)); 1457 failed = 1; 1458 } 1459 1460 if (PVO_MANAGED_P(pvo)) { 1461 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1462 } else { 1463 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1464 printf("pmap_pvo_check: pvo %p: non kernel address " 1465 "on kernel unmanaged list\n", pvo); 1466 failed = 1; 1467 } 1468 pvo_head = &pmap_pvo_kunmanaged; 1469 } 1470 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1471 if (pvo0 == pvo) 1472 break; 1473 } 1474 if (pvo0 == NULL) { 1475 printf("pmap_pvo_check: pvo %p: not present " 1476 "on its vlist head %p\n", pvo, pvo_head); 1477 failed = 1; 1478 } 1479 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1480 printf("pmap_pvo_check: pvo %p: not present " 1481 "on its olist head\n", pvo); 1482 failed = 1; 1483 } 1484 pt = pmap_pvo_to_pte(pvo, -1); 1485 if (pt == NULL) { 1486 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1487 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1488 "no PTE\n", pvo); 1489 failed = 1; 1490 } 1491 } else { 1492 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1493 (uintptr_t) pt >= 1494 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1495 printf("pmap_pvo_check: pvo %p: pte %p not in " 1496 "pteg table\n", pvo, pt); 1497 failed = 1; 1498 } 1499 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1500 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1501 "no PTE\n", pvo); 1502 failed = 1; 1503 } 1504 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1505 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1506 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1507 pvo->pvo_pte.pte_hi, 1508 pt->pte_hi); 1509 failed = 1; 1510 } 1511 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1512 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1513 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1514 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1515 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1516 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1517 failed = 1; 1518 } 1519 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1520 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1521 " doesn't not match PVO's VA %#" _PRIxva "\n", 1522 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1523 failed = 1; 1524 } 1525 if (failed) 1526 pmap_pte_print(pt); 1527 } 1528 if (failed) 1529 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1530 pvo->pvo_pmap); 1531 1532 PMAP_UNLOCK(); 1533 } 1534 #endif /* DEBUG || PMAPCHECK */ 1535 1536 /* 1537 * Search the PVO table looking for a non-wired entry. 1538 * If we find one, remove it and return it. 1539 */ 1540 1541 struct pvo_entry * 1542 pmap_pvo_reclaim(struct pmap *pm) 1543 { 1544 struct pvo_tqhead *pvoh; 1545 struct pvo_entry *pvo; 1546 uint32_t idx, endidx; 1547 1548 endidx = pmap_pvo_reclaim_nextidx; 1549 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1550 idx = (idx + 1) & pmap_pteg_mask) { 1551 pvoh = &pmap_pvo_table[idx]; 1552 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1553 if (!PVO_WIRED_P(pvo)) { 1554 pmap_pvo_remove(pvo, -1, NULL); 1555 pmap_pvo_reclaim_nextidx = idx; 1556 PMAPCOUNT(pvos_reclaimed); 1557 return pvo; 1558 } 1559 } 1560 } 1561 return NULL; 1562 } 1563 1564 /* 1565 * This returns whether this is the first mapping of a page. 1566 */ 1567 int 1568 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1569 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1570 { 1571 struct pvo_entry *pvo; 1572 struct pvo_tqhead *pvoh; 1573 register_t msr; 1574 int ptegidx; 1575 int i; 1576 int poolflags = PR_NOWAIT; 1577 1578 /* 1579 * Compute the PTE Group index. 1580 */ 1581 va &= ~ADDR_POFF; 1582 ptegidx = va_to_pteg(pm, va); 1583 1584 msr = pmap_interrupts_off(); 1585 1586 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1587 if (pmap_pvo_remove_depth > 0) 1588 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1589 if (++pmap_pvo_enter_depth > 1) 1590 panic("pmap_pvo_enter: called recursively!"); 1591 #endif 1592 1593 /* 1594 * Remove any existing mapping for this page. Reuse the 1595 * pvo entry if there a mapping. 1596 */ 1597 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1598 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1599 #ifdef DEBUG 1600 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1601 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1602 ~(PTE_REF|PTE_CHG)) == 0 && 1603 va < VM_MIN_KERNEL_ADDRESS) { 1604 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n", 1605 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1606 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n", 1607 pvo->pvo_pte.pte_hi, 1608 pm->pm_sr[va >> ADDR_SR_SHFT]); 1609 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1610 #ifdef DDBX 1611 Debugger(); 1612 #endif 1613 } 1614 #endif 1615 PMAPCOUNT(mappings_replaced); 1616 pmap_pvo_remove(pvo, -1, NULL); 1617 break; 1618 } 1619 } 1620 1621 /* 1622 * If we aren't overwriting an mapping, try to allocate 1623 */ 1624 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1625 --pmap_pvo_enter_depth; 1626 #endif 1627 pmap_interrupts_restore(msr); 1628 if (pvo) { 1629 pmap_pvo_free(pvo); 1630 } 1631 pvo = pool_get(pl, poolflags); 1632 1633 #ifdef DEBUG 1634 /* 1635 * Exercise pmap_pvo_reclaim() a little. 1636 */ 1637 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1638 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1639 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1640 pool_put(pl, pvo); 1641 pvo = NULL; 1642 } 1643 #endif 1644 1645 msr = pmap_interrupts_off(); 1646 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1647 ++pmap_pvo_enter_depth; 1648 #endif 1649 if (pvo == NULL) { 1650 pvo = pmap_pvo_reclaim(pm); 1651 if (pvo == NULL) { 1652 if ((flags & PMAP_CANFAIL) == 0) 1653 panic("pmap_pvo_enter: failed"); 1654 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1655 pmap_pvo_enter_depth--; 1656 #endif 1657 PMAPCOUNT(pvos_failed); 1658 pmap_interrupts_restore(msr); 1659 return ENOMEM; 1660 } 1661 } 1662 1663 pvo->pvo_vaddr = va; 1664 pvo->pvo_pmap = pm; 1665 pvo->pvo_vaddr &= ~ADDR_POFF; 1666 if (flags & VM_PROT_EXECUTE) { 1667 PMAPCOUNT(exec_mappings); 1668 pvo_set_exec(pvo); 1669 } 1670 if (flags & PMAP_WIRED) 1671 pvo->pvo_vaddr |= PVO_WIRED; 1672 if (pvo_head != &pmap_pvo_kunmanaged) { 1673 pvo->pvo_vaddr |= PVO_MANAGED; 1674 PMAPCOUNT(mappings); 1675 } else { 1676 PMAPCOUNT(kernel_mappings); 1677 } 1678 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1679 1680 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1681 if (PVO_WIRED_P(pvo)) 1682 pvo->pvo_pmap->pm_stats.wired_count++; 1683 pvo->pvo_pmap->pm_stats.resident_count++; 1684 #if defined(DEBUG) 1685 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1686 DPRINTFN(PVOENTER, 1687 ("pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1688 pvo, pm, va, pa)); 1689 #endif 1690 1691 /* 1692 * We hope this succeeds but it isn't required. 1693 */ 1694 pvoh = &pmap_pvo_table[ptegidx]; 1695 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1696 if (i >= 0) { 1697 PVO_PTEGIDX_SET(pvo, i); 1698 PVO_WHERE(pvo, ENTER_INSERT); 1699 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1700 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1701 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1702 1703 } else { 1704 /* 1705 * Since we didn't have room for this entry (which makes it 1706 * and evicted entry), place it at the head of the list. 1707 */ 1708 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1709 PMAPCOUNT(ptes_evicted); 1710 pm->pm_evictions++; 1711 /* 1712 * If this is a kernel page, make sure it's active. 1713 */ 1714 if (pm == pmap_kernel()) { 1715 i = pmap_pte_spill(pm, va, false); 1716 KASSERT(i); 1717 } 1718 } 1719 PMAP_PVO_CHECK(pvo); /* sanity check */ 1720 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1721 pmap_pvo_enter_depth--; 1722 #endif 1723 pmap_interrupts_restore(msr); 1724 return 0; 1725 } 1726 1727 static void 1728 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1729 { 1730 volatile struct pte *pt; 1731 int ptegidx; 1732 1733 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1734 if (++pmap_pvo_remove_depth > 1) 1735 panic("pmap_pvo_remove: called recursively!"); 1736 #endif 1737 1738 /* 1739 * If we haven't been supplied the ptegidx, calculate it. 1740 */ 1741 if (pteidx == -1) { 1742 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1743 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1744 } else { 1745 ptegidx = pteidx >> 3; 1746 if (pvo->pvo_pte.pte_hi & PTE_HID) 1747 ptegidx ^= pmap_pteg_mask; 1748 } 1749 PMAP_PVO_CHECK(pvo); /* sanity check */ 1750 1751 /* 1752 * If there is an active pte entry, we need to deactivate it 1753 * (and save the ref & chg bits). 1754 */ 1755 pt = pmap_pvo_to_pte(pvo, pteidx); 1756 if (pt != NULL) { 1757 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1758 PVO_WHERE(pvo, REMOVE); 1759 PVO_PTEGIDX_CLR(pvo); 1760 PMAPCOUNT(ptes_removed); 1761 } else { 1762 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1763 pvo->pvo_pmap->pm_evictions--; 1764 } 1765 1766 /* 1767 * Account for executable mappings. 1768 */ 1769 if (PVO_EXECUTABLE_P(pvo)) 1770 pvo_clear_exec(pvo); 1771 1772 /* 1773 * Update our statistics. 1774 */ 1775 pvo->pvo_pmap->pm_stats.resident_count--; 1776 if (PVO_WIRED_P(pvo)) 1777 pvo->pvo_pmap->pm_stats.wired_count--; 1778 1779 /* 1780 * Save the REF/CHG bits into their cache if the page is managed. 1781 */ 1782 if (PVO_MANAGED_P(pvo)) { 1783 register_t ptelo = pvo->pvo_pte.pte_lo; 1784 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1785 1786 if (pg != NULL) { 1787 /* 1788 * If this page was changed and it is mapped exec, 1789 * invalidate it. 1790 */ 1791 if ((ptelo & PTE_CHG) && 1792 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1793 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1794 if (LIST_EMPTY(pvoh)) { 1795 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1796 "%#" _PRIxpa ": clear-exec]\n", 1797 VM_PAGE_TO_PHYS(pg))); 1798 pmap_attr_clear(pg, PTE_EXEC); 1799 PMAPCOUNT(exec_uncached_pvo_remove); 1800 } else { 1801 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1802 "%#" _PRIxpa ": syncicache]\n", 1803 VM_PAGE_TO_PHYS(pg))); 1804 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1805 PAGE_SIZE); 1806 PMAPCOUNT(exec_synced_pvo_remove); 1807 } 1808 } 1809 1810 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1811 } 1812 PMAPCOUNT(unmappings); 1813 } else { 1814 PMAPCOUNT(kernel_unmappings); 1815 } 1816 1817 /* 1818 * Remove the PVO from its lists and return it to the pool. 1819 */ 1820 LIST_REMOVE(pvo, pvo_vlink); 1821 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1822 if (pvol) { 1823 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1824 } 1825 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1826 pmap_pvo_remove_depth--; 1827 #endif 1828 } 1829 1830 void 1831 pmap_pvo_free(struct pvo_entry *pvo) 1832 { 1833 1834 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1835 } 1836 1837 void 1838 pmap_pvo_free_list(struct pvo_head *pvol) 1839 { 1840 struct pvo_entry *pvo, *npvo; 1841 1842 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1843 npvo = LIST_NEXT(pvo, pvo_vlink); 1844 LIST_REMOVE(pvo, pvo_vlink); 1845 pmap_pvo_free(pvo); 1846 } 1847 } 1848 1849 /* 1850 * Mark a mapping as executable. 1851 * If this is the first executable mapping in the segment, 1852 * clear the noexec flag. 1853 */ 1854 static void 1855 pvo_set_exec(struct pvo_entry *pvo) 1856 { 1857 struct pmap *pm = pvo->pvo_pmap; 1858 1859 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1860 return; 1861 } 1862 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1863 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1864 { 1865 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1866 if (pm->pm_exec[sr]++ == 0) { 1867 pm->pm_sr[sr] &= ~SR_NOEXEC; 1868 } 1869 } 1870 #endif 1871 } 1872 1873 /* 1874 * Mark a mapping as non-executable. 1875 * If this was the last executable mapping in the segment, 1876 * set the noexec flag. 1877 */ 1878 static void 1879 pvo_clear_exec(struct pvo_entry *pvo) 1880 { 1881 struct pmap *pm = pvo->pvo_pmap; 1882 1883 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1884 return; 1885 } 1886 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1887 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1888 { 1889 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1890 if (--pm->pm_exec[sr] == 0) { 1891 pm->pm_sr[sr] |= SR_NOEXEC; 1892 } 1893 } 1894 #endif 1895 } 1896 1897 /* 1898 * Insert physical page at pa into the given pmap at virtual address va. 1899 */ 1900 int 1901 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 1902 { 1903 struct mem_region *mp; 1904 struct pvo_head *pvo_head; 1905 struct vm_page *pg; 1906 struct pool *pl; 1907 register_t pte_lo; 1908 int error; 1909 u_int pvo_flags; 1910 u_int was_exec = 0; 1911 1912 PMAP_LOCK(); 1913 1914 if (__predict_false(!pmap_initialized)) { 1915 pvo_head = &pmap_pvo_kunmanaged; 1916 pl = &pmap_upvo_pool; 1917 pvo_flags = 0; 1918 pg = NULL; 1919 was_exec = PTE_EXEC; 1920 } else { 1921 pvo_head = pa_to_pvoh(pa, &pg); 1922 pl = &pmap_mpvo_pool; 1923 pvo_flags = PVO_MANAGED; 1924 } 1925 1926 DPRINTFN(ENTER, 1927 ("pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1928 pm, va, pa, prot, flags)); 1929 1930 /* 1931 * If this is a managed page, and it's the first reference to the 1932 * page clear the execness of the page. Otherwise fetch the execness. 1933 */ 1934 if (pg != NULL) 1935 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1936 1937 DPRINTFN(ENTER, (" was_exec=%d", was_exec)); 1938 1939 /* 1940 * Assume the page is cache inhibited and access is guarded unless 1941 * it's in our available memory array. If it is in the memory array, 1942 * asssume it's in memory coherent memory. 1943 */ 1944 pte_lo = PTE_IG; 1945 if ((flags & PMAP_NC) == 0) { 1946 for (mp = mem; mp->size; mp++) { 1947 if (pa >= mp->start && pa < mp->start + mp->size) { 1948 pte_lo = PTE_M; 1949 break; 1950 } 1951 } 1952 } 1953 1954 if (prot & VM_PROT_WRITE) 1955 pte_lo |= PTE_BW; 1956 else 1957 pte_lo |= PTE_BR; 1958 1959 /* 1960 * If this was in response to a fault, "pre-fault" the PTE's 1961 * changed/referenced bit appropriately. 1962 */ 1963 if (flags & VM_PROT_WRITE) 1964 pte_lo |= PTE_CHG; 1965 if (flags & VM_PROT_ALL) 1966 pte_lo |= PTE_REF; 1967 1968 /* 1969 * We need to know if this page can be executable 1970 */ 1971 flags |= (prot & VM_PROT_EXECUTE); 1972 1973 /* 1974 * Record mapping for later back-translation and pte spilling. 1975 * This will overwrite any existing mapping. 1976 */ 1977 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1978 1979 /* 1980 * Flush the real page from the instruction cache if this page is 1981 * mapped executable and cacheable and has not been flushed since 1982 * the last time it was modified. 1983 */ 1984 if (error == 0 && 1985 (flags & VM_PROT_EXECUTE) && 1986 (pte_lo & PTE_I) == 0 && 1987 was_exec == 0) { 1988 DPRINTFN(ENTER, (" syncicache")); 1989 PMAPCOUNT(exec_synced); 1990 pmap_syncicache(pa, PAGE_SIZE); 1991 if (pg != NULL) { 1992 pmap_attr_save(pg, PTE_EXEC); 1993 PMAPCOUNT(exec_cached); 1994 #if defined(DEBUG) || defined(PMAPDEBUG) 1995 if (pmapdebug & PMAPDEBUG_ENTER) 1996 printf(" marked-as-exec"); 1997 else if (pmapdebug & PMAPDEBUG_EXEC) 1998 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 1999 VM_PAGE_TO_PHYS(pg)); 2000 2001 #endif 2002 } 2003 } 2004 2005 DPRINTFN(ENTER, (": error=%d\n", error)); 2006 2007 PMAP_UNLOCK(); 2008 2009 return error; 2010 } 2011 2012 void 2013 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 2014 { 2015 struct mem_region *mp; 2016 register_t pte_lo; 2017 int error; 2018 2019 #if defined (PMAP_OEA64_BRIDGE) 2020 if (va < VM_MIN_KERNEL_ADDRESS) 2021 panic("pmap_kenter_pa: attempt to enter " 2022 "non-kernel address %#" _PRIxva "!", va); 2023 #endif 2024 2025 DPRINTFN(KENTER, 2026 ("pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot)); 2027 2028 PMAP_LOCK(); 2029 2030 /* 2031 * Assume the page is cache inhibited and access is guarded unless 2032 * it's in our available memory array. If it is in the memory array, 2033 * asssume it's in memory coherent memory. 2034 */ 2035 pte_lo = PTE_IG; 2036 if ((prot & PMAP_NC) == 0) { 2037 for (mp = mem; mp->size; mp++) { 2038 if (pa >= mp->start && pa < mp->start + mp->size) { 2039 pte_lo = PTE_M; 2040 break; 2041 } 2042 } 2043 } 2044 2045 if (prot & VM_PROT_WRITE) 2046 pte_lo |= PTE_BW; 2047 else 2048 pte_lo |= PTE_BR; 2049 2050 /* 2051 * We don't care about REF/CHG on PVOs on the unmanaged list. 2052 */ 2053 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2054 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2055 2056 if (error != 0) 2057 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2058 va, pa, error); 2059 2060 PMAP_UNLOCK(); 2061 } 2062 2063 void 2064 pmap_kremove(vaddr_t va, vsize_t len) 2065 { 2066 if (va < VM_MIN_KERNEL_ADDRESS) 2067 panic("pmap_kremove: attempt to remove " 2068 "non-kernel address %#" _PRIxva "!", va); 2069 2070 DPRINTFN(KREMOVE,("pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len)); 2071 pmap_remove(pmap_kernel(), va, va + len); 2072 } 2073 2074 /* 2075 * Remove the given range of mapping entries. 2076 */ 2077 void 2078 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2079 { 2080 struct pvo_head pvol; 2081 struct pvo_entry *pvo; 2082 register_t msr; 2083 int pteidx; 2084 2085 PMAP_LOCK(); 2086 LIST_INIT(&pvol); 2087 msr = pmap_interrupts_off(); 2088 for (; va < endva; va += PAGE_SIZE) { 2089 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2090 if (pvo != NULL) { 2091 pmap_pvo_remove(pvo, pteidx, &pvol); 2092 } 2093 } 2094 pmap_interrupts_restore(msr); 2095 pmap_pvo_free_list(&pvol); 2096 PMAP_UNLOCK(); 2097 } 2098 2099 /* 2100 * Get the physical page address for the given pmap/virtual address. 2101 */ 2102 bool 2103 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2104 { 2105 struct pvo_entry *pvo; 2106 register_t msr; 2107 2108 PMAP_LOCK(); 2109 2110 /* 2111 * If this is a kernel pmap lookup, also check the battable 2112 * and if we get a hit, translate the VA to a PA using the 2113 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2114 * that will wrap back to 0. 2115 */ 2116 if (pm == pmap_kernel() && 2117 (va < VM_MIN_KERNEL_ADDRESS || 2118 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2119 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2120 #if defined (PMAP_OEA) 2121 #ifdef PPC_OEA601 2122 if ((MFPVR() >> 16) == MPC601) { 2123 register_t batu = battable[va >> 23].batu; 2124 register_t batl = battable[va >> 23].batl; 2125 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2126 if (BAT601_VALID_P(batl) && 2127 BAT601_VA_MATCH_P(batu, batl, va)) { 2128 register_t mask = 2129 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2130 if (pap) 2131 *pap = (batl & mask) | (va & ~mask); 2132 PMAP_UNLOCK(); 2133 return true; 2134 } else if (SR601_VALID_P(sr) && 2135 SR601_PA_MATCH_P(sr, va)) { 2136 if (pap) 2137 *pap = va; 2138 PMAP_UNLOCK(); 2139 return true; 2140 } 2141 } else 2142 #endif /* PPC_OEA601 */ 2143 { 2144 register_t batu = battable[va >> ADDR_SR_SHFT].batu; 2145 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2146 register_t batl = 2147 battable[va >> ADDR_SR_SHFT].batl; 2148 register_t mask = 2149 (~(batu & BAT_BL) << 15) & ~0x1ffffL; 2150 if (pap) 2151 *pap = (batl & mask) | (va & ~mask); 2152 PMAP_UNLOCK(); 2153 return true; 2154 } 2155 } 2156 return false; 2157 #elif defined (PMAP_OEA64_BRIDGE) 2158 if (va >= SEGMENT_LENGTH) 2159 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2160 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2161 else { 2162 if (pap) 2163 *pap = va; 2164 PMAP_UNLOCK(); 2165 return true; 2166 } 2167 #elif defined (PMAP_OEA64) 2168 #error PPC_OEA64 not supported 2169 #endif /* PPC_OEA */ 2170 } 2171 2172 msr = pmap_interrupts_off(); 2173 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2174 if (pvo != NULL) { 2175 PMAP_PVO_CHECK(pvo); /* sanity check */ 2176 if (pap) 2177 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2178 | (va & ADDR_POFF); 2179 } 2180 pmap_interrupts_restore(msr); 2181 PMAP_UNLOCK(); 2182 return pvo != NULL; 2183 } 2184 2185 /* 2186 * Lower the protection on the specified range of this pmap. 2187 */ 2188 void 2189 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2190 { 2191 struct pvo_entry *pvo; 2192 volatile struct pte *pt; 2193 register_t msr; 2194 int pteidx; 2195 2196 /* 2197 * Since this routine only downgrades protection, we should 2198 * always be called with at least one bit not set. 2199 */ 2200 KASSERT(prot != VM_PROT_ALL); 2201 2202 /* 2203 * If there is no protection, this is equivalent to 2204 * remove the pmap from the pmap. 2205 */ 2206 if ((prot & VM_PROT_READ) == 0) { 2207 pmap_remove(pm, va, endva); 2208 return; 2209 } 2210 2211 PMAP_LOCK(); 2212 2213 msr = pmap_interrupts_off(); 2214 for (; va < endva; va += PAGE_SIZE) { 2215 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2216 if (pvo == NULL) 2217 continue; 2218 PMAP_PVO_CHECK(pvo); /* sanity check */ 2219 2220 /* 2221 * Revoke executable if asked to do so. 2222 */ 2223 if ((prot & VM_PROT_EXECUTE) == 0) 2224 pvo_clear_exec(pvo); 2225 2226 #if 0 2227 /* 2228 * If the page is already read-only, no change 2229 * needs to be made. 2230 */ 2231 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2232 continue; 2233 #endif 2234 /* 2235 * Grab the PTE pointer before we diddle with 2236 * the cached PTE copy. 2237 */ 2238 pt = pmap_pvo_to_pte(pvo, pteidx); 2239 /* 2240 * Change the protection of the page. 2241 */ 2242 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2243 pvo->pvo_pte.pte_lo |= PTE_BR; 2244 2245 /* 2246 * If the PVO is in the page table, update 2247 * that pte at well. 2248 */ 2249 if (pt != NULL) { 2250 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2251 PVO_WHERE(pvo, PMAP_PROTECT); 2252 PMAPCOUNT(ptes_changed); 2253 } 2254 2255 PMAP_PVO_CHECK(pvo); /* sanity check */ 2256 } 2257 pmap_interrupts_restore(msr); 2258 PMAP_UNLOCK(); 2259 } 2260 2261 void 2262 pmap_unwire(pmap_t pm, vaddr_t va) 2263 { 2264 struct pvo_entry *pvo; 2265 register_t msr; 2266 2267 PMAP_LOCK(); 2268 msr = pmap_interrupts_off(); 2269 pvo = pmap_pvo_find_va(pm, va, NULL); 2270 if (pvo != NULL) { 2271 if (PVO_WIRED_P(pvo)) { 2272 pvo->pvo_vaddr &= ~PVO_WIRED; 2273 pm->pm_stats.wired_count--; 2274 } 2275 PMAP_PVO_CHECK(pvo); /* sanity check */ 2276 } 2277 pmap_interrupts_restore(msr); 2278 PMAP_UNLOCK(); 2279 } 2280 2281 /* 2282 * Lower the protection on the specified physical page. 2283 */ 2284 void 2285 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2286 { 2287 struct pvo_head *pvo_head, pvol; 2288 struct pvo_entry *pvo, *next_pvo; 2289 volatile struct pte *pt; 2290 register_t msr; 2291 2292 PMAP_LOCK(); 2293 2294 KASSERT(prot != VM_PROT_ALL); 2295 LIST_INIT(&pvol); 2296 msr = pmap_interrupts_off(); 2297 2298 /* 2299 * When UVM reuses a page, it does a pmap_page_protect with 2300 * VM_PROT_NONE. At that point, we can clear the exec flag 2301 * since we know the page will have different contents. 2302 */ 2303 if ((prot & VM_PROT_READ) == 0) { 2304 DPRINTFN(EXEC, ("[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2305 VM_PAGE_TO_PHYS(pg))); 2306 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2307 PMAPCOUNT(exec_uncached_page_protect); 2308 pmap_attr_clear(pg, PTE_EXEC); 2309 } 2310 } 2311 2312 pvo_head = vm_page_to_pvoh(pg); 2313 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2314 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2315 PMAP_PVO_CHECK(pvo); /* sanity check */ 2316 2317 /* 2318 * Downgrading to no mapping at all, we just remove the entry. 2319 */ 2320 if ((prot & VM_PROT_READ) == 0) { 2321 pmap_pvo_remove(pvo, -1, &pvol); 2322 continue; 2323 } 2324 2325 /* 2326 * If EXEC permission is being revoked, just clear the 2327 * flag in the PVO. 2328 */ 2329 if ((prot & VM_PROT_EXECUTE) == 0) 2330 pvo_clear_exec(pvo); 2331 2332 /* 2333 * If this entry is already RO, don't diddle with the 2334 * page table. 2335 */ 2336 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2337 PMAP_PVO_CHECK(pvo); 2338 continue; 2339 } 2340 2341 /* 2342 * Grab the PTE before the we diddle the bits so 2343 * pvo_to_pte can verify the pte contents are as 2344 * expected. 2345 */ 2346 pt = pmap_pvo_to_pte(pvo, -1); 2347 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2348 pvo->pvo_pte.pte_lo |= PTE_BR; 2349 if (pt != NULL) { 2350 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2351 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2352 PMAPCOUNT(ptes_changed); 2353 } 2354 PMAP_PVO_CHECK(pvo); /* sanity check */ 2355 } 2356 pmap_interrupts_restore(msr); 2357 pmap_pvo_free_list(&pvol); 2358 2359 PMAP_UNLOCK(); 2360 } 2361 2362 /* 2363 * Activate the address space for the specified process. If the process 2364 * is the current process, load the new MMU context. 2365 */ 2366 void 2367 pmap_activate(struct lwp *l) 2368 { 2369 struct pcb *pcb = lwp_getpcb(l); 2370 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2371 2372 DPRINTFN(ACTIVATE, 2373 ("pmap_activate: lwp %p (curlwp %p)\n", l, curlwp)); 2374 2375 /* 2376 * XXX Normally performed in cpu_fork(). 2377 */ 2378 pcb->pcb_pm = pmap; 2379 2380 /* 2381 * In theory, the SR registers need only be valid on return 2382 * to user space wait to do them there. 2383 */ 2384 if (l == curlwp) { 2385 /* Store pointer to new current pmap. */ 2386 curpm = pmap; 2387 } 2388 } 2389 2390 /* 2391 * Deactivate the specified process's address space. 2392 */ 2393 void 2394 pmap_deactivate(struct lwp *l) 2395 { 2396 } 2397 2398 bool 2399 pmap_query_bit(struct vm_page *pg, int ptebit) 2400 { 2401 struct pvo_entry *pvo; 2402 volatile struct pte *pt; 2403 register_t msr; 2404 2405 PMAP_LOCK(); 2406 2407 if (pmap_attr_fetch(pg) & ptebit) { 2408 PMAP_UNLOCK(); 2409 return true; 2410 } 2411 2412 msr = pmap_interrupts_off(); 2413 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2414 PMAP_PVO_CHECK(pvo); /* sanity check */ 2415 /* 2416 * See if we saved the bit off. If so cache, it and return 2417 * success. 2418 */ 2419 if (pvo->pvo_pte.pte_lo & ptebit) { 2420 pmap_attr_save(pg, ptebit); 2421 PMAP_PVO_CHECK(pvo); /* sanity check */ 2422 pmap_interrupts_restore(msr); 2423 PMAP_UNLOCK(); 2424 return true; 2425 } 2426 } 2427 /* 2428 * No luck, now go thru the hard part of looking at the ptes 2429 * themselves. Sync so any pending REF/CHG bits are flushed 2430 * to the PTEs. 2431 */ 2432 SYNC(); 2433 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2434 PMAP_PVO_CHECK(pvo); /* sanity check */ 2435 /* 2436 * See if this pvo have a valid PTE. If so, fetch the 2437 * REF/CHG bits from the valid PTE. If the appropriate 2438 * ptebit is set, cache, it and return success. 2439 */ 2440 pt = pmap_pvo_to_pte(pvo, -1); 2441 if (pt != NULL) { 2442 pmap_pte_synch(pt, &pvo->pvo_pte); 2443 if (pvo->pvo_pte.pte_lo & ptebit) { 2444 pmap_attr_save(pg, ptebit); 2445 PMAP_PVO_CHECK(pvo); /* sanity check */ 2446 pmap_interrupts_restore(msr); 2447 PMAP_UNLOCK(); 2448 return true; 2449 } 2450 } 2451 } 2452 pmap_interrupts_restore(msr); 2453 PMAP_UNLOCK(); 2454 return false; 2455 } 2456 2457 bool 2458 pmap_clear_bit(struct vm_page *pg, int ptebit) 2459 { 2460 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2461 struct pvo_entry *pvo; 2462 volatile struct pte *pt; 2463 register_t msr; 2464 int rv = 0; 2465 2466 PMAP_LOCK(); 2467 msr = pmap_interrupts_off(); 2468 2469 /* 2470 * Fetch the cache value 2471 */ 2472 rv |= pmap_attr_fetch(pg); 2473 2474 /* 2475 * Clear the cached value. 2476 */ 2477 pmap_attr_clear(pg, ptebit); 2478 2479 /* 2480 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2481 * can reset the right ones). Note that since the pvo entries and 2482 * list heads are accessed via BAT0 and are never placed in the 2483 * page table, we don't have to worry about further accesses setting 2484 * the REF/CHG bits. 2485 */ 2486 SYNC(); 2487 2488 /* 2489 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2490 * valid PTE. If so, clear the ptebit from the valid PTE. 2491 */ 2492 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2493 PMAP_PVO_CHECK(pvo); /* sanity check */ 2494 pt = pmap_pvo_to_pte(pvo, -1); 2495 if (pt != NULL) { 2496 /* 2497 * Only sync the PTE if the bit we are looking 2498 * for is not already set. 2499 */ 2500 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2501 pmap_pte_synch(pt, &pvo->pvo_pte); 2502 /* 2503 * If the bit we are looking for was already set, 2504 * clear that bit in the pte. 2505 */ 2506 if (pvo->pvo_pte.pte_lo & ptebit) 2507 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2508 } 2509 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2510 pvo->pvo_pte.pte_lo &= ~ptebit; 2511 PMAP_PVO_CHECK(pvo); /* sanity check */ 2512 } 2513 pmap_interrupts_restore(msr); 2514 2515 /* 2516 * If we are clearing the modify bit and this page was marked EXEC 2517 * and the user of the page thinks the page was modified, then we 2518 * need to clean it from the icache if it's mapped or clear the EXEC 2519 * bit if it's not mapped. The page itself might not have the CHG 2520 * bit set if the modification was done via DMA to the page. 2521 */ 2522 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2523 if (LIST_EMPTY(pvoh)) { 2524 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2525 VM_PAGE_TO_PHYS(pg))); 2526 pmap_attr_clear(pg, PTE_EXEC); 2527 PMAPCOUNT(exec_uncached_clear_modify); 2528 } else { 2529 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2530 VM_PAGE_TO_PHYS(pg))); 2531 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2532 PMAPCOUNT(exec_synced_clear_modify); 2533 } 2534 } 2535 PMAP_UNLOCK(); 2536 return (rv & ptebit) != 0; 2537 } 2538 2539 void 2540 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2541 { 2542 struct pvo_entry *pvo; 2543 size_t offset = va & ADDR_POFF; 2544 int s; 2545 2546 PMAP_LOCK(); 2547 s = splvm(); 2548 while (len > 0) { 2549 size_t seglen = PAGE_SIZE - offset; 2550 if (seglen > len) 2551 seglen = len; 2552 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2553 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2554 pmap_syncicache( 2555 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2556 PMAP_PVO_CHECK(pvo); 2557 } 2558 va += seglen; 2559 len -= seglen; 2560 offset = 0; 2561 } 2562 splx(s); 2563 PMAP_UNLOCK(); 2564 } 2565 2566 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2567 void 2568 pmap_pte_print(volatile struct pte *pt) 2569 { 2570 printf("PTE %p: ", pt); 2571 2572 #if defined(PMAP_OEA) 2573 /* High word: */ 2574 printf("%#" _PRIxpte ": [", pt->pte_hi); 2575 #else 2576 printf("%#" _PRIxpte ": [", pt->pte_hi); 2577 #endif /* PMAP_OEA */ 2578 2579 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2580 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2581 2582 printf("%#" _PRIxpte " %#" _PRIxpte "", 2583 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2584 pt->pte_hi & PTE_API); 2585 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2586 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2587 #else 2588 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2589 #endif /* PMAP_OEA */ 2590 2591 /* Low word: */ 2592 #if defined (PMAP_OEA) 2593 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2594 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2595 #else 2596 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2597 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2598 #endif 2599 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2600 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2601 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2602 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2603 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2604 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2605 switch (pt->pte_lo & PTE_PP) { 2606 case PTE_BR: printf("br]\n"); break; 2607 case PTE_BW: printf("bw]\n"); break; 2608 case PTE_SO: printf("so]\n"); break; 2609 case PTE_SW: printf("sw]\n"); break; 2610 } 2611 } 2612 #endif 2613 2614 #if defined(DDB) 2615 void 2616 pmap_pteg_check(void) 2617 { 2618 volatile struct pte *pt; 2619 int i; 2620 int ptegidx; 2621 u_int p_valid = 0; 2622 u_int s_valid = 0; 2623 u_int invalid = 0; 2624 2625 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2626 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2627 if (pt->pte_hi & PTE_VALID) { 2628 if (pt->pte_hi & PTE_HID) 2629 s_valid++; 2630 else 2631 { 2632 p_valid++; 2633 } 2634 } else 2635 invalid++; 2636 } 2637 } 2638 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2639 p_valid, p_valid, s_valid, s_valid, 2640 invalid, invalid); 2641 } 2642 2643 void 2644 pmap_print_mmuregs(void) 2645 { 2646 int i; 2647 u_int cpuvers; 2648 #ifndef PMAP_OEA64 2649 vaddr_t addr; 2650 register_t soft_sr[16]; 2651 #endif 2652 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2653 struct bat soft_ibat[4]; 2654 struct bat soft_dbat[4]; 2655 #endif 2656 paddr_t sdr1; 2657 2658 cpuvers = MFPVR() >> 16; 2659 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2660 #ifndef PMAP_OEA64 2661 addr = 0; 2662 for (i = 0; i < 16; i++) { 2663 soft_sr[i] = MFSRIN(addr); 2664 addr += (1 << ADDR_SR_SHFT); 2665 } 2666 #endif 2667 2668 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2669 /* read iBAT (601: uBAT) registers */ 2670 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2671 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2672 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2673 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2674 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2675 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2676 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2677 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2678 2679 2680 if (cpuvers != MPC601) { 2681 /* read dBAT registers */ 2682 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2683 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2684 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2685 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2686 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2687 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2688 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2689 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2690 } 2691 #endif 2692 2693 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2694 #ifndef PMAP_OEA64 2695 printf("SR[]:\t"); 2696 for (i = 0; i < 4; i++) 2697 printf("0x%08lx, ", soft_sr[i]); 2698 printf("\n\t"); 2699 for ( ; i < 8; i++) 2700 printf("0x%08lx, ", soft_sr[i]); 2701 printf("\n\t"); 2702 for ( ; i < 12; i++) 2703 printf("0x%08lx, ", soft_sr[i]); 2704 printf("\n\t"); 2705 for ( ; i < 16; i++) 2706 printf("0x%08lx, ", soft_sr[i]); 2707 printf("\n"); 2708 #endif 2709 2710 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2711 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2712 for (i = 0; i < 4; i++) { 2713 printf("0x%08lx 0x%08lx, ", 2714 soft_ibat[i].batu, soft_ibat[i].batl); 2715 if (i == 1) 2716 printf("\n\t"); 2717 } 2718 if (cpuvers != MPC601) { 2719 printf("\ndBAT[]:\t"); 2720 for (i = 0; i < 4; i++) { 2721 printf("0x%08lx 0x%08lx, ", 2722 soft_dbat[i].batu, soft_dbat[i].batl); 2723 if (i == 1) 2724 printf("\n\t"); 2725 } 2726 } 2727 printf("\n"); 2728 #endif /* PMAP_OEA... */ 2729 } 2730 2731 void 2732 pmap_print_pte(pmap_t pm, vaddr_t va) 2733 { 2734 struct pvo_entry *pvo; 2735 volatile struct pte *pt; 2736 int pteidx; 2737 2738 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2739 if (pvo != NULL) { 2740 pt = pmap_pvo_to_pte(pvo, pteidx); 2741 if (pt != NULL) { 2742 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2743 va, pt, 2744 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2745 pt->pte_hi, pt->pte_lo); 2746 } else { 2747 printf("No valid PTE found\n"); 2748 } 2749 } else { 2750 printf("Address not in pmap\n"); 2751 } 2752 } 2753 2754 void 2755 pmap_pteg_dist(void) 2756 { 2757 struct pvo_entry *pvo; 2758 int ptegidx; 2759 int depth; 2760 int max_depth = 0; 2761 unsigned int depths[64]; 2762 2763 memset(depths, 0, sizeof(depths)); 2764 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2765 depth = 0; 2766 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2767 depth++; 2768 } 2769 if (depth > max_depth) 2770 max_depth = depth; 2771 if (depth > 63) 2772 depth = 63; 2773 depths[depth]++; 2774 } 2775 2776 for (depth = 0; depth < 64; depth++) { 2777 printf(" [%2d]: %8u", depth, depths[depth]); 2778 if ((depth & 3) == 3) 2779 printf("\n"); 2780 if (depth == max_depth) 2781 break; 2782 } 2783 if ((depth & 3) != 3) 2784 printf("\n"); 2785 printf("Max depth found was %d\n", max_depth); 2786 } 2787 #endif /* DEBUG */ 2788 2789 #if defined(PMAPCHECK) || defined(DEBUG) 2790 void 2791 pmap_pvo_verify(void) 2792 { 2793 int ptegidx; 2794 int s; 2795 2796 s = splvm(); 2797 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2798 struct pvo_entry *pvo; 2799 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2800 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2801 panic("pmap_pvo_verify: invalid pvo %p " 2802 "on list %#x", pvo, ptegidx); 2803 pmap_pvo_check(pvo); 2804 } 2805 } 2806 splx(s); 2807 } 2808 #endif /* PMAPCHECK */ 2809 2810 2811 void * 2812 pmap_pool_ualloc(struct pool *pp, int flags) 2813 { 2814 struct pvo_page *pvop; 2815 2816 if (uvm.page_init_done != true) { 2817 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2818 } 2819 2820 PMAP_LOCK(); 2821 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2822 if (pvop != NULL) { 2823 pmap_upvop_free--; 2824 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2825 PMAP_UNLOCK(); 2826 return pvop; 2827 } 2828 PMAP_UNLOCK(); 2829 return pmap_pool_malloc(pp, flags); 2830 } 2831 2832 void * 2833 pmap_pool_malloc(struct pool *pp, int flags) 2834 { 2835 struct pvo_page *pvop; 2836 struct vm_page *pg; 2837 2838 PMAP_LOCK(); 2839 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2840 if (pvop != NULL) { 2841 pmap_mpvop_free--; 2842 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2843 PMAP_UNLOCK(); 2844 return pvop; 2845 } 2846 PMAP_UNLOCK(); 2847 again: 2848 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2849 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2850 if (__predict_false(pg == NULL)) { 2851 if (flags & PR_WAITOK) { 2852 uvm_wait("plpg"); 2853 goto again; 2854 } else { 2855 return (0); 2856 } 2857 } 2858 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2859 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2860 } 2861 2862 void 2863 pmap_pool_ufree(struct pool *pp, void *va) 2864 { 2865 struct pvo_page *pvop; 2866 #if 0 2867 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2868 pmap_pool_mfree(va, size, tag); 2869 return; 2870 } 2871 #endif 2872 PMAP_LOCK(); 2873 pvop = va; 2874 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2875 pmap_upvop_free++; 2876 if (pmap_upvop_free > pmap_upvop_maxfree) 2877 pmap_upvop_maxfree = pmap_upvop_free; 2878 PMAP_UNLOCK(); 2879 } 2880 2881 void 2882 pmap_pool_mfree(struct pool *pp, void *va) 2883 { 2884 struct pvo_page *pvop; 2885 2886 PMAP_LOCK(); 2887 pvop = va; 2888 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2889 pmap_mpvop_free++; 2890 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2891 pmap_mpvop_maxfree = pmap_mpvop_free; 2892 PMAP_UNLOCK(); 2893 #if 0 2894 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2895 #endif 2896 } 2897 2898 /* 2899 * This routine in bootstraping to steal to-be-managed memory (which will 2900 * then be unmanaged). We use it to grab from the first 256MB for our 2901 * pmap needs and above 256MB for other stuff. 2902 */ 2903 vaddr_t 2904 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2905 { 2906 vsize_t size; 2907 vaddr_t va; 2908 paddr_t pa = 0; 2909 int npgs, bank; 2910 struct vm_physseg *ps; 2911 2912 if (uvm.page_init_done == true) 2913 panic("pmap_steal_memory: called _after_ bootstrap"); 2914 2915 *vstartp = VM_MIN_KERNEL_ADDRESS; 2916 *vendp = VM_MAX_KERNEL_ADDRESS; 2917 2918 size = round_page(vsize); 2919 npgs = atop(size); 2920 2921 /* 2922 * PA 0 will never be among those given to UVM so we can use it 2923 * to indicate we couldn't steal any memory. 2924 */ 2925 for (ps = vm_physmem, bank = 0; bank < vm_nphysseg; bank++, ps++) { 2926 if (ps->free_list == VM_FREELIST_FIRST256 && 2927 ps->avail_end - ps->avail_start >= npgs) { 2928 pa = ptoa(ps->avail_start); 2929 break; 2930 } 2931 } 2932 2933 if (pa == 0) 2934 panic("pmap_steal_memory: no approriate memory to steal!"); 2935 2936 ps->avail_start += npgs; 2937 ps->start += npgs; 2938 2939 /* 2940 * If we've used up all the pages in the segment, remove it and 2941 * compact the list. 2942 */ 2943 if (ps->avail_start == ps->end) { 2944 /* 2945 * If this was the last one, then a very bad thing has occurred 2946 */ 2947 if (--vm_nphysseg == 0) 2948 panic("pmap_steal_memory: out of memory!"); 2949 2950 printf("pmap_steal_memory: consumed bank %d\n", bank); 2951 for (; bank < vm_nphysseg; bank++, ps++) { 2952 ps[0] = ps[1]; 2953 } 2954 } 2955 2956 va = (vaddr_t) pa; 2957 memset((void *) va, 0, size); 2958 pmap_pages_stolen += npgs; 2959 #ifdef DEBUG 2960 if (pmapdebug && npgs > 1) { 2961 u_int cnt = 0; 2962 for (bank = 0, ps = vm_physmem; bank < vm_nphysseg; bank++, ps++) 2963 cnt += ps->avail_end - ps->avail_start; 2964 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2965 npgs, pmap_pages_stolen, cnt); 2966 } 2967 #endif 2968 2969 return va; 2970 } 2971 2972 /* 2973 * Find a chuck of memory with right size and alignment. 2974 */ 2975 paddr_t 2976 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2977 { 2978 struct mem_region *mp; 2979 paddr_t s, e; 2980 int i, j; 2981 2982 size = round_page(size); 2983 2984 DPRINTFN(BOOT, 2985 ("pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 2986 size, alignment, at_end)); 2987 2988 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2989 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 2990 alignment); 2991 2992 if (at_end) { 2993 if (alignment != PAGE_SIZE) 2994 panic("pmap_boot_find_memory: invalid ending " 2995 "alignment %#" _PRIxpa, alignment); 2996 2997 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 2998 s = mp->start + mp->size - size; 2999 if (s >= mp->start && mp->size >= size) { 3000 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3001 DPRINTFN(BOOT, 3002 ("pmap_boot_find_memory: b-avail[%d] start " 3003 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3004 mp->start, mp->size)); 3005 mp->size -= size; 3006 DPRINTFN(BOOT, 3007 ("pmap_boot_find_memory: a-avail[%d] start " 3008 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3009 mp->start, mp->size)); 3010 return s; 3011 } 3012 } 3013 panic("pmap_boot_find_memory: no available memory"); 3014 } 3015 3016 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3017 s = (mp->start + alignment - 1) & ~(alignment-1); 3018 e = s + size; 3019 3020 /* 3021 * Is the calculated region entirely within the region? 3022 */ 3023 if (s < mp->start || e > mp->start + mp->size) 3024 continue; 3025 3026 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3027 if (s == mp->start) { 3028 /* 3029 * If the block starts at the beginning of region, 3030 * adjust the size & start. (the region may now be 3031 * zero in length) 3032 */ 3033 DPRINTFN(BOOT, 3034 ("pmap_boot_find_memory: b-avail[%d] start " 3035 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3036 mp->start += size; 3037 mp->size -= size; 3038 DPRINTFN(BOOT, 3039 ("pmap_boot_find_memory: a-avail[%d] start " 3040 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3041 } else if (e == mp->start + mp->size) { 3042 /* 3043 * If the block starts at the beginning of region, 3044 * adjust only the size. 3045 */ 3046 DPRINTFN(BOOT, 3047 ("pmap_boot_find_memory: b-avail[%d] start " 3048 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3049 mp->size -= size; 3050 DPRINTFN(BOOT, 3051 ("pmap_boot_find_memory: a-avail[%d] start " 3052 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3053 } else { 3054 /* 3055 * Block is in the middle of the region, so we 3056 * have to split it in two. 3057 */ 3058 for (j = avail_cnt; j > i + 1; j--) { 3059 avail[j] = avail[j-1]; 3060 } 3061 DPRINTFN(BOOT, 3062 ("pmap_boot_find_memory: b-avail[%d] start " 3063 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3064 mp[1].start = e; 3065 mp[1].size = mp[0].start + mp[0].size - e; 3066 mp[0].size = s - mp[0].start; 3067 avail_cnt++; 3068 for (; i < avail_cnt; i++) { 3069 DPRINTFN(BOOT, 3070 ("pmap_boot_find_memory: a-avail[%d] " 3071 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3072 avail[i].start, avail[i].size)); 3073 } 3074 } 3075 KASSERT(s == (uintptr_t) s); 3076 return s; 3077 } 3078 panic("pmap_boot_find_memory: not enough memory for " 3079 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3080 } 3081 3082 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3083 #if defined (PMAP_OEA64_BRIDGE) 3084 int 3085 pmap_setup_segment0_map(int use_large_pages, ...) 3086 { 3087 vaddr_t va; 3088 3089 register_t pte_lo = 0x0; 3090 int ptegidx = 0, i = 0; 3091 struct pte pte; 3092 va_list ap; 3093 3094 /* Coherent + Supervisor RW, no user access */ 3095 pte_lo = PTE_M; 3096 3097 /* XXXSL 3098 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3099 * these have to take priority. 3100 */ 3101 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3102 ptegidx = va_to_pteg(pmap_kernel(), va); 3103 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3104 i = pmap_pte_insert(ptegidx, &pte); 3105 } 3106 3107 va_start(ap, use_large_pages); 3108 while (1) { 3109 paddr_t pa; 3110 size_t size; 3111 3112 va = va_arg(ap, vaddr_t); 3113 3114 if (va == 0) 3115 break; 3116 3117 pa = va_arg(ap, paddr_t); 3118 size = va_arg(ap, size_t); 3119 3120 for (; va < (va + size); va += 0x1000, pa += 0x1000) { 3121 #if 0 3122 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3123 #endif 3124 ptegidx = va_to_pteg(pmap_kernel(), va); 3125 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3126 i = pmap_pte_insert(ptegidx, &pte); 3127 } 3128 } 3129 3130 TLBSYNC(); 3131 SYNC(); 3132 return (0); 3133 } 3134 #endif /* PMAP_OEA64_BRIDGE */ 3135 3136 /* 3137 * This is not part of the defined PMAP interface and is specific to the 3138 * PowerPC architecture. This is called during initppc, before the system 3139 * is really initialized. 3140 */ 3141 void 3142 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3143 { 3144 struct mem_region *mp, tmp; 3145 paddr_t s, e; 3146 psize_t size; 3147 int i, j; 3148 3149 /* 3150 * Get memory. 3151 */ 3152 mem_regions(&mem, &avail); 3153 #if defined(DEBUG) 3154 if (pmapdebug & PMAPDEBUG_BOOT) { 3155 printf("pmap_bootstrap: memory configuration:\n"); 3156 for (mp = mem; mp->size; mp++) { 3157 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3158 mp->start, mp->size); 3159 } 3160 for (mp = avail; mp->size; mp++) { 3161 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3162 mp->start, mp->size); 3163 } 3164 } 3165 #endif 3166 3167 /* 3168 * Find out how much physical memory we have and in how many chunks. 3169 */ 3170 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3171 if (mp->start >= pmap_memlimit) 3172 continue; 3173 if (mp->start + mp->size > pmap_memlimit) { 3174 size = pmap_memlimit - mp->start; 3175 physmem += btoc(size); 3176 } else { 3177 physmem += btoc(mp->size); 3178 } 3179 mem_cnt++; 3180 } 3181 3182 /* 3183 * Count the number of available entries. 3184 */ 3185 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3186 avail_cnt++; 3187 3188 /* 3189 * Page align all regions. 3190 */ 3191 kernelstart = trunc_page(kernelstart); 3192 kernelend = round_page(kernelend); 3193 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3194 s = round_page(mp->start); 3195 mp->size -= (s - mp->start); 3196 mp->size = trunc_page(mp->size); 3197 mp->start = s; 3198 e = mp->start + mp->size; 3199 3200 DPRINTFN(BOOT, 3201 ("pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3202 i, mp->start, mp->size)); 3203 3204 /* 3205 * Don't allow the end to run beyond our artificial limit 3206 */ 3207 if (e > pmap_memlimit) 3208 e = pmap_memlimit; 3209 3210 /* 3211 * Is this region empty or strange? skip it. 3212 */ 3213 if (e <= s) { 3214 mp->start = 0; 3215 mp->size = 0; 3216 continue; 3217 } 3218 3219 /* 3220 * Does this overlap the beginning of kernel? 3221 * Does extend past the end of the kernel? 3222 */ 3223 else if (s < kernelstart && e > kernelstart) { 3224 if (e > kernelend) { 3225 avail[avail_cnt].start = kernelend; 3226 avail[avail_cnt].size = e - kernelend; 3227 avail_cnt++; 3228 } 3229 mp->size = kernelstart - s; 3230 } 3231 /* 3232 * Check whether this region overlaps the end of the kernel. 3233 */ 3234 else if (s < kernelend && e > kernelend) { 3235 mp->start = kernelend; 3236 mp->size = e - kernelend; 3237 } 3238 /* 3239 * Look whether this regions is completely inside the kernel. 3240 * Nuke it if it does. 3241 */ 3242 else if (s >= kernelstart && e <= kernelend) { 3243 mp->start = 0; 3244 mp->size = 0; 3245 } 3246 /* 3247 * If the user imposed a memory limit, enforce it. 3248 */ 3249 else if (s >= pmap_memlimit) { 3250 mp->start = -PAGE_SIZE; /* let's know why */ 3251 mp->size = 0; 3252 } 3253 else { 3254 mp->start = s; 3255 mp->size = e - s; 3256 } 3257 DPRINTFN(BOOT, 3258 ("pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3259 i, mp->start, mp->size)); 3260 } 3261 3262 /* 3263 * Move (and uncount) all the null return to the end. 3264 */ 3265 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3266 if (mp->size == 0) { 3267 tmp = avail[i]; 3268 avail[i] = avail[--avail_cnt]; 3269 avail[avail_cnt] = avail[i]; 3270 } 3271 } 3272 3273 /* 3274 * (Bubble)sort them into ascending order. 3275 */ 3276 for (i = 0; i < avail_cnt; i++) { 3277 for (j = i + 1; j < avail_cnt; j++) { 3278 if (avail[i].start > avail[j].start) { 3279 tmp = avail[i]; 3280 avail[i] = avail[j]; 3281 avail[j] = tmp; 3282 } 3283 } 3284 } 3285 3286 /* 3287 * Make sure they don't overlap. 3288 */ 3289 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3290 if (mp[0].start + mp[0].size > mp[1].start) { 3291 mp[0].size = mp[1].start - mp[0].start; 3292 } 3293 DPRINTFN(BOOT, 3294 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3295 i, mp->start, mp->size)); 3296 } 3297 DPRINTFN(BOOT, 3298 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3299 i, mp->start, mp->size)); 3300 3301 #ifdef PTEGCOUNT 3302 pmap_pteg_cnt = PTEGCOUNT; 3303 #else /* PTEGCOUNT */ 3304 3305 pmap_pteg_cnt = 0x1000; 3306 3307 while (pmap_pteg_cnt < physmem) 3308 pmap_pteg_cnt <<= 1; 3309 3310 pmap_pteg_cnt >>= 1; 3311 #endif /* PTEGCOUNT */ 3312 3313 #ifdef DEBUG 3314 DPRINTFN(BOOT, 3315 ("pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt)); 3316 #endif 3317 3318 /* 3319 * Find suitably aligned memory for PTEG hash table. 3320 */ 3321 size = pmap_pteg_cnt * sizeof(struct pteg); 3322 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3323 3324 #ifdef DEBUG 3325 DPRINTFN(BOOT, 3326 ("PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table)); 3327 #endif 3328 3329 3330 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3331 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3332 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3333 pmap_pteg_table, size); 3334 #endif 3335 3336 memset(__UNVOLATILE(pmap_pteg_table), 0, 3337 pmap_pteg_cnt * sizeof(struct pteg)); 3338 pmap_pteg_mask = pmap_pteg_cnt - 1; 3339 3340 /* 3341 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3342 * with pages. So we just steal them before giving them to UVM. 3343 */ 3344 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3345 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3346 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3347 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3348 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3349 pmap_pvo_table, size); 3350 #endif 3351 3352 for (i = 0; i < pmap_pteg_cnt; i++) 3353 TAILQ_INIT(&pmap_pvo_table[i]); 3354 3355 #ifndef MSGBUFADDR 3356 /* 3357 * Allocate msgbuf in high memory. 3358 */ 3359 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3360 #endif 3361 3362 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3363 paddr_t pfstart = atop(mp->start); 3364 paddr_t pfend = atop(mp->start + mp->size); 3365 if (mp->size == 0) 3366 continue; 3367 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3368 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3369 VM_FREELIST_FIRST256); 3370 } else if (mp->start >= SEGMENT_LENGTH) { 3371 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3372 VM_FREELIST_DEFAULT); 3373 } else { 3374 pfend = atop(SEGMENT_LENGTH); 3375 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3376 VM_FREELIST_FIRST256); 3377 pfstart = atop(SEGMENT_LENGTH); 3378 pfend = atop(mp->start + mp->size); 3379 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3380 VM_FREELIST_DEFAULT); 3381 } 3382 } 3383 3384 /* 3385 * Make sure kernel vsid is allocated as well as VSID 0. 3386 */ 3387 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3388 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3389 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3390 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3391 pmap_vsid_bitmap[0] |= 1; 3392 3393 /* 3394 * Initialize kernel pmap and hardware. 3395 */ 3396 3397 /* PMAP_OEA64_BRIDGE does support these instructions */ 3398 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3399 for (i = 0; i < 16; i++) { 3400 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3401 __asm volatile ("mtsrin %0,%1" 3402 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3403 } 3404 3405 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3406 __asm volatile ("mtsr %0,%1" 3407 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3408 #ifdef KERNEL2_SR 3409 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3410 __asm volatile ("mtsr %0,%1" 3411 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3412 #endif 3413 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3414 #if defined (PMAP_OEA) 3415 for (i = 0; i < 16; i++) { 3416 if (iosrtable[i] & SR601_T) { 3417 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3418 __asm volatile ("mtsrin %0,%1" 3419 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3420 } 3421 } 3422 __asm volatile ("sync; mtsdr1 %0; isync" 3423 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3424 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3425 __asm __volatile ("sync; mtsdr1 %0; isync" 3426 :: "r"((uintptr_t)pmap_pteg_table | (32 - cntlzw(pmap_pteg_mask >> 11)))); 3427 #endif 3428 tlbia(); 3429 3430 #ifdef ALTIVEC 3431 pmap_use_altivec = cpu_altivec; 3432 #endif 3433 3434 #ifdef DEBUG 3435 if (pmapdebug & PMAPDEBUG_BOOT) { 3436 u_int cnt; 3437 int bank; 3438 char pbuf[9]; 3439 for (cnt = 0, bank = 0; bank < vm_nphysseg; bank++) { 3440 cnt += vm_physmem[bank].avail_end - vm_physmem[bank].avail_start; 3441 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3442 bank, 3443 ptoa(vm_physmem[bank].avail_start), 3444 ptoa(vm_physmem[bank].avail_end), 3445 ptoa(vm_physmem[bank].avail_end - vm_physmem[bank].avail_start)); 3446 } 3447 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3448 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3449 pbuf, cnt); 3450 } 3451 #endif 3452 3453 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3454 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3455 &pmap_pool_uallocator, IPL_VM); 3456 3457 pool_setlowat(&pmap_upvo_pool, 252); 3458 3459 pool_init(&pmap_pool, sizeof(struct pmap), 3460 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3461 IPL_NONE); 3462 3463 #if defined(PMAP_NEED_MAPKERNEL) || 1 3464 { 3465 struct pmap *pm = pmap_kernel(); 3466 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3467 extern int etext[], kernel_text[]; 3468 vaddr_t va, va_etext = (paddr_t) etext; 3469 #endif 3470 paddr_t pa, pa_end; 3471 register_t sr; 3472 struct pte pt; 3473 unsigned int ptegidx; 3474 int bank; 3475 3476 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3477 pm->pm_sr[0] = sr; 3478 3479 for (bank = 0; bank < vm_nphysseg; bank++) { 3480 pa_end = ptoa(vm_physmem[bank].avail_end); 3481 pa = ptoa(vm_physmem[bank].avail_start); 3482 for (; pa < pa_end; pa += PAGE_SIZE) { 3483 ptegidx = va_to_pteg(pm, pa); 3484 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3485 pmap_pte_insert(ptegidx, &pt); 3486 } 3487 } 3488 3489 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3490 va = (vaddr_t) kernel_text; 3491 3492 for (pa = kernelstart; va < va_etext; 3493 pa += PAGE_SIZE, va += PAGE_SIZE) { 3494 ptegidx = va_to_pteg(pm, va); 3495 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3496 pmap_pte_insert(ptegidx, &pt); 3497 } 3498 3499 for (; pa < kernelend; 3500 pa += PAGE_SIZE, va += PAGE_SIZE) { 3501 ptegidx = va_to_pteg(pm, va); 3502 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3503 pmap_pte_insert(ptegidx, &pt); 3504 } 3505 3506 for (va = 0, pa = 0; va < kernelstart; 3507 pa += PAGE_SIZE, va += PAGE_SIZE) { 3508 ptegidx = va_to_pteg(pm, va); 3509 if (va < 0x3000) 3510 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3511 else 3512 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3513 pmap_pte_insert(ptegidx, &pt); 3514 } 3515 for (va = kernelend, pa = kernelend; va < SEGMENT_LENGTH; 3516 pa += PAGE_SIZE, va += PAGE_SIZE) { 3517 ptegidx = va_to_pteg(pm, va); 3518 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3519 pmap_pte_insert(ptegidx, &pt); 3520 } 3521 #endif 3522 3523 __asm volatile ("mtsrin %0,%1" 3524 :: "r"(sr), "r"(kernelstart)); 3525 } 3526 #endif 3527 } 3528
Indexes created Sat Oct 25 10:09:55 GMT 2025