pmap.c revision 1.73
1 /* $NetBSD: pmap.c,v 1.73 2010/11/10 09:27:23 uebayasi Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 36 * Copyright (C) 1995, 1996 TooLs GmbH. 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by TooLs GmbH. 50 * 4. The name of TooLs GmbH may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 58 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 59 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 60 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 61 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 62 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.73 2010/11/10 09:27:23 uebayasi Exp $"); 67 68 #define PMAP_NOOPNAMES 69 70 #include "opt_ppcarch.h" 71 #include "opt_altivec.h" 72 #include "opt_multiprocessor.h" 73 #include "opt_pmap.h" 74 75 #include <sys/param.h> 76 #include <sys/malloc.h> 77 #include <sys/proc.h> 78 #include <sys/pool.h> 79 #include <sys/queue.h> 80 #include <sys/device.h> /* for evcnt */ 81 #include <sys/systm.h> 82 #include <sys/atomic.h> 83 84 #include <uvm/uvm.h> 85 86 #include <machine/pcb.h> 87 #include <machine/powerpc.h> 88 #include <powerpc/spr.h> 89 #include <powerpc/bat.h> 90 #include <powerpc/stdarg.h> 91 #include <powerpc/oea/spr.h> 92 #include <powerpc/oea/sr_601.h> 93 94 #define VM_PAGE_TO_MD(pg) (&(pg)->mdpage) 95 96 #ifdef ALTIVEC 97 int pmap_use_altivec; 98 #endif 99 100 volatile struct pteg *pmap_pteg_table; 101 unsigned int pmap_pteg_cnt; 102 unsigned int pmap_pteg_mask; 103 #ifdef PMAP_MEMLIMIT 104 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 105 #else 106 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 107 #endif 108 109 struct pmap kernel_pmap_; 110 unsigned int pmap_pages_stolen; 111 u_long pmap_pte_valid; 112 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 113 u_long pmap_pvo_enter_depth; 114 u_long pmap_pvo_remove_depth; 115 #endif 116 117 #ifndef MSGBUFADDR 118 extern paddr_t msgbuf_paddr; 119 #endif 120 121 static struct mem_region *mem, *avail; 122 static u_int mem_cnt, avail_cnt; 123 124 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 125 # define PMAP_OEA 1 126 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA64) && !defined(PPC_OEA64_BRIDGE) 127 # define PMAPNAME(name) pmap_##name 128 # endif 129 #endif 130 131 #if defined(PMAP_OEA64) 132 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64_BRIDGE) 133 # define PMAPNAME(name) pmap_##name 134 # endif 135 #endif 136 137 #if defined(PMAP_OEA64_BRIDGE) 138 # if defined(PMAP_EXCLUDE_DECLS) && !defined(PPC_OEA) && !defined(PPC_OEA64) 139 # define PMAPNAME(name) pmap_##name 140 # endif 141 #endif 142 143 #if defined(PMAP_OEA) 144 #define _PRIxpte "lx" 145 #else 146 #define _PRIxpte PRIx64 147 #endif 148 #define _PRIxpa "lx" 149 #define _PRIxva "lx" 150 #define _PRIsr "lx" 151 152 #if defined(PMAP_EXCLUDE_DECLS) && !defined(PMAPNAME) 153 #if defined(PMAP_OEA) 154 #define PMAPNAME(name) pmap32_##name 155 #elif defined(PMAP_OEA64) 156 #define PMAPNAME(name) pmap64_##name 157 #elif defined(PMAP_OEA64_BRIDGE) 158 #define PMAPNAME(name) pmap64bridge_##name 159 #else 160 #error unknown variant for pmap 161 #endif 162 #endif /* PMAP_EXLCUDE_DECLS && !PMAPNAME */ 163 164 #if defined(PMAPNAME) 165 #define STATIC static 166 #define pmap_pte_spill PMAPNAME(pte_spill) 167 #define pmap_real_memory PMAPNAME(real_memory) 168 #define pmap_init PMAPNAME(init) 169 #define pmap_virtual_space PMAPNAME(virtual_space) 170 #define pmap_create PMAPNAME(create) 171 #define pmap_reference PMAPNAME(reference) 172 #define pmap_destroy PMAPNAME(destroy) 173 #define pmap_copy PMAPNAME(copy) 174 #define pmap_update PMAPNAME(update) 175 #define pmap_enter PMAPNAME(enter) 176 #define pmap_remove PMAPNAME(remove) 177 #define pmap_kenter_pa PMAPNAME(kenter_pa) 178 #define pmap_kremove PMAPNAME(kremove) 179 #define pmap_extract PMAPNAME(extract) 180 #define pmap_protect PMAPNAME(protect) 181 #define pmap_unwire PMAPNAME(unwire) 182 #define pmap_page_protect PMAPNAME(page_protect) 183 #define pmap_query_bit PMAPNAME(query_bit) 184 #define pmap_clear_bit PMAPNAME(clear_bit) 185 186 #define pmap_activate PMAPNAME(activate) 187 #define pmap_deactivate PMAPNAME(deactivate) 188 189 #define pmap_pinit PMAPNAME(pinit) 190 #define pmap_procwr PMAPNAME(procwr) 191 192 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 193 #define pmap_pte_print PMAPNAME(pte_print) 194 #define pmap_pteg_check PMAPNAME(pteg_check) 195 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 196 #define pmap_print_pte PMAPNAME(print_pte) 197 #define pmap_pteg_dist PMAPNAME(pteg_dist) 198 #endif 199 #if defined(DEBUG) || defined(PMAPCHECK) 200 #define pmap_pvo_verify PMAPNAME(pvo_verify) 201 #define pmapcheck PMAPNAME(check) 202 #endif 203 #if defined(DEBUG) || defined(PMAPDEBUG) 204 #define pmapdebug PMAPNAME(debug) 205 #endif 206 #define pmap_steal_memory PMAPNAME(steal_memory) 207 #define pmap_bootstrap PMAPNAME(bootstrap) 208 #else 209 #define STATIC /* nothing */ 210 #endif /* PMAPNAME */ 211 212 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 213 STATIC void pmap_real_memory(paddr_t *, psize_t *); 214 STATIC void pmap_init(void); 215 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 216 STATIC pmap_t pmap_create(void); 217 STATIC void pmap_reference(pmap_t); 218 STATIC void pmap_destroy(pmap_t); 219 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 220 STATIC void pmap_update(pmap_t); 221 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); 222 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 223 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t, u_int); 224 STATIC void pmap_kremove(vaddr_t, vsize_t); 225 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 226 227 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 228 STATIC void pmap_unwire(pmap_t, vaddr_t); 229 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 230 STATIC bool pmap_query_bit(struct vm_page *, int); 231 STATIC bool pmap_clear_bit(struct vm_page *, int); 232 233 STATIC void pmap_activate(struct lwp *); 234 STATIC void pmap_deactivate(struct lwp *); 235 236 STATIC void pmap_pinit(pmap_t pm); 237 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 238 239 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 240 STATIC void pmap_pte_print(volatile struct pte *); 241 STATIC void pmap_pteg_check(void); 242 STATIC void pmap_print_mmuregs(void); 243 STATIC void pmap_print_pte(pmap_t, vaddr_t); 244 STATIC void pmap_pteg_dist(void); 245 #endif 246 #if defined(DEBUG) || defined(PMAPCHECK) 247 STATIC void pmap_pvo_verify(void); 248 #endif 249 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 250 STATIC void pmap_bootstrap(paddr_t, paddr_t); 251 252 #ifdef PMAPNAME 253 const struct pmap_ops PMAPNAME(ops) = { 254 .pmapop_pte_spill = pmap_pte_spill, 255 .pmapop_real_memory = pmap_real_memory, 256 .pmapop_init = pmap_init, 257 .pmapop_virtual_space = pmap_virtual_space, 258 .pmapop_create = pmap_create, 259 .pmapop_reference = pmap_reference, 260 .pmapop_destroy = pmap_destroy, 261 .pmapop_copy = pmap_copy, 262 .pmapop_update = pmap_update, 263 .pmapop_enter = pmap_enter, 264 .pmapop_remove = pmap_remove, 265 .pmapop_kenter_pa = pmap_kenter_pa, 266 .pmapop_kremove = pmap_kremove, 267 .pmapop_extract = pmap_extract, 268 .pmapop_protect = pmap_protect, 269 .pmapop_unwire = pmap_unwire, 270 .pmapop_page_protect = pmap_page_protect, 271 .pmapop_query_bit = pmap_query_bit, 272 .pmapop_clear_bit = pmap_clear_bit, 273 .pmapop_activate = pmap_activate, 274 .pmapop_deactivate = pmap_deactivate, 275 .pmapop_pinit = pmap_pinit, 276 .pmapop_procwr = pmap_procwr, 277 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 278 .pmapop_pte_print = pmap_pte_print, 279 .pmapop_pteg_check = pmap_pteg_check, 280 .pmapop_print_mmuregs = pmap_print_mmuregs, 281 .pmapop_print_pte = pmap_print_pte, 282 .pmapop_pteg_dist = pmap_pteg_dist, 283 #else 284 .pmapop_pte_print = NULL, 285 .pmapop_pteg_check = NULL, 286 .pmapop_print_mmuregs = NULL, 287 .pmapop_print_pte = NULL, 288 .pmapop_pteg_dist = NULL, 289 #endif 290 #if defined(DEBUG) || defined(PMAPCHECK) 291 .pmapop_pvo_verify = pmap_pvo_verify, 292 #else 293 .pmapop_pvo_verify = NULL, 294 #endif 295 .pmapop_steal_memory = pmap_steal_memory, 296 .pmapop_bootstrap = pmap_bootstrap, 297 }; 298 #endif /* !PMAPNAME */ 299 300 /* 301 * The following structure is aligned to 32 bytes 302 */ 303 struct pvo_entry { 304 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 305 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 306 struct pte pvo_pte; /* Prebuilt PTE */ 307 pmap_t pvo_pmap; /* ptr to owning pmap */ 308 vaddr_t pvo_vaddr; /* VA of entry */ 309 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 310 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 311 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 312 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 313 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 314 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 315 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 316 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 317 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 318 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 319 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 320 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 321 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 322 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 323 #define PVO_REMOVE 6 /* PVO has been removed */ 324 #define PVO_WHERE_MASK 15 325 #define PVO_WHERE_SHFT 8 326 } __attribute__ ((aligned (32))); 327 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 328 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 329 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 330 #define PVO_PTEGIDX_CLR(pvo) \ 331 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 332 #define PVO_PTEGIDX_SET(pvo,i) \ 333 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 334 #define PVO_WHERE(pvo,w) \ 335 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 336 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 337 338 TAILQ_HEAD(pvo_tqhead, pvo_entry); 339 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 340 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 341 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 342 343 struct pool pmap_pool; /* pool for pmap structures */ 344 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 345 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 346 347 /* 348 * We keep a cache of unmanaged pages to be used for pvo entries for 349 * unmanaged pages. 350 */ 351 struct pvo_page { 352 SIMPLEQ_ENTRY(pvo_page) pvop_link; 353 }; 354 SIMPLEQ_HEAD(pvop_head, pvo_page); 355 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 356 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 357 u_long pmap_upvop_free; 358 u_long pmap_upvop_maxfree; 359 u_long pmap_mpvop_free; 360 u_long pmap_mpvop_maxfree; 361 362 static void *pmap_pool_ualloc(struct pool *, int); 363 static void *pmap_pool_malloc(struct pool *, int); 364 365 static void pmap_pool_ufree(struct pool *, void *); 366 static void pmap_pool_mfree(struct pool *, void *); 367 368 static struct pool_allocator pmap_pool_mallocator = { 369 .pa_alloc = pmap_pool_malloc, 370 .pa_free = pmap_pool_mfree, 371 .pa_pagesz = 0, 372 }; 373 374 static struct pool_allocator pmap_pool_uallocator = { 375 .pa_alloc = pmap_pool_ualloc, 376 .pa_free = pmap_pool_ufree, 377 .pa_pagesz = 0, 378 }; 379 380 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 381 void pmap_pte_print(volatile struct pte *); 382 void pmap_pteg_check(void); 383 void pmap_pteg_dist(void); 384 void pmap_print_pte(pmap_t, vaddr_t); 385 void pmap_print_mmuregs(void); 386 #endif 387 388 #if defined(DEBUG) || defined(PMAPCHECK) 389 #ifdef PMAPCHECK 390 int pmapcheck = 1; 391 #else 392 int pmapcheck = 0; 393 #endif 394 void pmap_pvo_verify(void); 395 static void pmap_pvo_check(const struct pvo_entry *); 396 #define PMAP_PVO_CHECK(pvo) \ 397 do { \ 398 if (pmapcheck) \ 399 pmap_pvo_check(pvo); \ 400 } while (0) 401 #else 402 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 403 #endif 404 static int pmap_pte_insert(int, struct pte *); 405 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 406 vaddr_t, paddr_t, register_t, int); 407 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 408 static void pmap_pvo_free(struct pvo_entry *); 409 static void pmap_pvo_free_list(struct pvo_head *); 410 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 411 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 412 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 413 static void pvo_set_exec(struct pvo_entry *); 414 static void pvo_clear_exec(struct pvo_entry *); 415 416 static void tlbia(void); 417 418 static void pmap_release(pmap_t); 419 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 420 421 static uint32_t pmap_pvo_reclaim_nextidx; 422 #ifdef DEBUG 423 static int pmap_pvo_reclaim_debugctr; 424 #endif 425 426 #define VSID_NBPW (sizeof(uint32_t) * 8) 427 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 428 429 static int pmap_initialized; 430 431 #if defined(DEBUG) || defined(PMAPDEBUG) 432 #define PMAPDEBUG_BOOT 0x0001 433 #define PMAPDEBUG_PTE 0x0002 434 #define PMAPDEBUG_EXEC 0x0008 435 #define PMAPDEBUG_PVOENTER 0x0010 436 #define PMAPDEBUG_PVOREMOVE 0x0020 437 #define PMAPDEBUG_ACTIVATE 0x0100 438 #define PMAPDEBUG_CREATE 0x0200 439 #define PMAPDEBUG_ENTER 0x1000 440 #define PMAPDEBUG_KENTER 0x2000 441 #define PMAPDEBUG_KREMOVE 0x4000 442 #define PMAPDEBUG_REMOVE 0x8000 443 444 unsigned int pmapdebug = 0; 445 446 # define DPRINTF(x) printf x 447 # define DPRINTFN(n, x) if (pmapdebug & PMAPDEBUG_ ## n) printf x 448 #else 449 # define DPRINTF(x) 450 # define DPRINTFN(n, x) 451 #endif 452 453 454 #ifdef PMAPCOUNTERS 455 /* 456 * From pmap_subr.c 457 */ 458 extern struct evcnt pmap_evcnt_mappings; 459 extern struct evcnt pmap_evcnt_unmappings; 460 461 extern struct evcnt pmap_evcnt_kernel_mappings; 462 extern struct evcnt pmap_evcnt_kernel_unmappings; 463 464 extern struct evcnt pmap_evcnt_mappings_replaced; 465 466 extern struct evcnt pmap_evcnt_exec_mappings; 467 extern struct evcnt pmap_evcnt_exec_cached; 468 469 extern struct evcnt pmap_evcnt_exec_synced; 470 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 471 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 472 473 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 474 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 475 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 476 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 477 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 478 479 extern struct evcnt pmap_evcnt_updates; 480 extern struct evcnt pmap_evcnt_collects; 481 extern struct evcnt pmap_evcnt_copies; 482 483 extern struct evcnt pmap_evcnt_ptes_spilled; 484 extern struct evcnt pmap_evcnt_ptes_unspilled; 485 extern struct evcnt pmap_evcnt_ptes_evicted; 486 487 extern struct evcnt pmap_evcnt_ptes_primary[8]; 488 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 489 extern struct evcnt pmap_evcnt_ptes_removed; 490 extern struct evcnt pmap_evcnt_ptes_changed; 491 extern struct evcnt pmap_evcnt_pvos_reclaimed; 492 extern struct evcnt pmap_evcnt_pvos_failed; 493 494 extern struct evcnt pmap_evcnt_zeroed_pages; 495 extern struct evcnt pmap_evcnt_copied_pages; 496 extern struct evcnt pmap_evcnt_idlezeroed_pages; 497 498 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 499 #define PMAPCOUNT2(ev) ((ev).ev_count++) 500 #else 501 #define PMAPCOUNT(ev) ((void) 0) 502 #define PMAPCOUNT2(ev) ((void) 0) 503 #endif 504 505 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 506 507 /* XXXSL: this needs to be moved to assembler */ 508 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 509 510 #define TLBSYNC() __asm volatile("tlbsync") 511 #define SYNC() __asm volatile("sync") 512 #define EIEIO() __asm volatile("eieio") 513 #define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va)) 514 #define MFMSR() mfmsr() 515 #define MTMSR(psl) mtmsr(psl) 516 #define MFPVR() mfpvr() 517 #define MFSRIN(va) mfsrin(va) 518 #define MFTB() mfrtcltbl() 519 520 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 521 static inline register_t 522 mfsrin(vaddr_t va) 523 { 524 register_t sr; 525 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 526 return sr; 527 } 528 #endif /* PMAP_OEA*/ 529 530 #if defined (PMAP_OEA64_BRIDGE) 531 extern void mfmsr64 (register64_t *result); 532 #endif /* PMAP_OEA64_BRIDGE */ 533 534 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 535 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 536 537 static inline register_t 538 pmap_interrupts_off(void) 539 { 540 register_t msr = MFMSR(); 541 if (msr & PSL_EE) 542 MTMSR(msr & ~PSL_EE); 543 return msr; 544 } 545 546 static void 547 pmap_interrupts_restore(register_t msr) 548 { 549 if (msr & PSL_EE) 550 MTMSR(msr); 551 } 552 553 static inline u_int32_t 554 mfrtcltbl(void) 555 { 556 #ifdef PPC_OEA601 557 if ((MFPVR() >> 16) == MPC601) 558 return (mfrtcl() >> 7); 559 else 560 #endif 561 return (mftbl()); 562 } 563 564 /* 565 * These small routines may have to be replaced, 566 * if/when we support processors other that the 604. 567 */ 568 569 void 570 tlbia(void) 571 { 572 char *i; 573 574 SYNC(); 575 #if defined(PMAP_OEA) 576 /* 577 * Why not use "tlbia"? Because not all processors implement it. 578 * 579 * This needs to be a per-CPU callback to do the appropriate thing 580 * for the CPU. XXX 581 */ 582 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 583 TLBIE(i); 584 EIEIO(); 585 SYNC(); 586 } 587 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 588 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 589 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 590 TLBIEL(i); 591 EIEIO(); 592 SYNC(); 593 } 594 #endif 595 TLBSYNC(); 596 SYNC(); 597 } 598 599 static inline register_t 600 va_to_vsid(const struct pmap *pm, vaddr_t addr) 601 { 602 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 603 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 604 #else /* PMAP_OEA64 */ 605 #if 0 606 const struct ste *ste; 607 register_t hash; 608 int i; 609 610 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 611 612 /* 613 * Try the primary group first 614 */ 615 ste = pm->pm_stes[hash].stes; 616 for (i = 0; i < 8; i++, ste++) { 617 if (ste->ste_hi & STE_V) && 618 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 619 return ste; 620 } 621 622 /* 623 * Then the secondary group. 624 */ 625 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 626 for (i = 0; i < 8; i++, ste++) { 627 if (ste->ste_hi & STE_V) && 628 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 629 return addr; 630 } 631 632 return NULL; 633 #else 634 /* 635 * Rather than searching the STE groups for the VSID, we know 636 * how we generate that from the ESID and so do that. 637 */ 638 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 639 #endif 640 #endif /* PMAP_OEA */ 641 } 642 643 static inline register_t 644 va_to_pteg(const struct pmap *pm, vaddr_t addr) 645 { 646 register_t hash; 647 648 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 649 return hash & pmap_pteg_mask; 650 } 651 652 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 653 /* 654 * Given a PTE in the page table, calculate the VADDR that hashes to it. 655 * The only bit of magic is that the top 4 bits of the address doesn't 656 * technically exist in the PTE. But we know we reserved 4 bits of the 657 * VSID for it so that's how we get it. 658 */ 659 static vaddr_t 660 pmap_pte_to_va(volatile const struct pte *pt) 661 { 662 vaddr_t va; 663 uintptr_t ptaddr = (uintptr_t) pt; 664 665 if (pt->pte_hi & PTE_HID) 666 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 667 668 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 669 #if defined(PMAP_OEA) 670 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 671 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 672 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 673 #endif 674 va <<= ADDR_PIDX_SHFT; 675 676 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 677 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 678 679 #if defined(PMAP_OEA64) 680 /* PPC63 Bits 0-35 */ 681 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 682 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 683 /* PPC Bits 0-3 */ 684 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 685 #endif 686 687 return va; 688 } 689 #endif 690 691 static inline struct pvo_head * 692 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 693 { 694 struct vm_page *pg; 695 struct vm_page_md *md; 696 697 pg = PHYS_TO_VM_PAGE(pa); 698 if (pg_p != NULL) 699 *pg_p = pg; 700 if (pg == NULL) 701 return &pmap_pvo_unmanaged; 702 md = VM_PAGE_TO_MD(pg); 703 return &md->mdpg_pvoh; 704 } 705 706 static inline struct pvo_head * 707 vm_page_to_pvoh(struct vm_page *pg) 708 { 709 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 710 711 return &md->mdpg_pvoh; 712 } 713 714 715 static inline void 716 pmap_attr_clear(struct vm_page *pg, int ptebit) 717 { 718 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 719 720 md->mdpg_attrs &= ~ptebit; 721 } 722 723 static inline int 724 pmap_attr_fetch(struct vm_page *pg) 725 { 726 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 727 728 return md->mdpg_attrs; 729 } 730 731 static inline void 732 pmap_attr_save(struct vm_page *pg, int ptebit) 733 { 734 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 735 736 md->mdpg_attrs |= ptebit; 737 } 738 739 static inline int 740 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 741 { 742 if (pt->pte_hi == pvo_pt->pte_hi 743 #if 0 744 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 745 ~(PTE_REF|PTE_CHG)) == 0 746 #endif 747 ) 748 return 1; 749 return 0; 750 } 751 752 static inline void 753 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 754 { 755 /* 756 * Construct the PTE. Default to IMB initially. Valid bit 757 * only gets set when the real pte is set in memory. 758 * 759 * Note: Don't set the valid bit for correct operation of tlb update. 760 */ 761 #if defined(PMAP_OEA) 762 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 763 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 764 pt->pte_lo = pte_lo; 765 #elif defined (PMAP_OEA64_BRIDGE) 766 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 767 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 768 pt->pte_lo = (u_int64_t) pte_lo; 769 #elif defined (PMAP_OEA64) 770 #error PMAP_OEA64 not supported 771 #endif /* PMAP_OEA */ 772 } 773 774 static inline void 775 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 776 { 777 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 778 } 779 780 static inline void 781 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 782 { 783 /* 784 * As shown in Section 7.6.3.2.3 785 */ 786 pt->pte_lo &= ~ptebit; 787 TLBIE(va); 788 SYNC(); 789 EIEIO(); 790 TLBSYNC(); 791 SYNC(); 792 #ifdef MULTIPROCESSOR 793 DCBST(pt); 794 #endif 795 } 796 797 static inline void 798 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 799 { 800 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 801 if (pvo_pt->pte_hi & PTE_VALID) 802 panic("pte_set: setting an already valid pte %p", pvo_pt); 803 #endif 804 pvo_pt->pte_hi |= PTE_VALID; 805 806 /* 807 * Update the PTE as defined in section 7.6.3.1 808 * Note that the REF/CHG bits are from pvo_pt and thus should 809 * have been saved so this routine can restore them (if desired). 810 */ 811 pt->pte_lo = pvo_pt->pte_lo; 812 EIEIO(); 813 pt->pte_hi = pvo_pt->pte_hi; 814 TLBSYNC(); 815 SYNC(); 816 #ifdef MULTIPROCESSOR 817 DCBST(pt); 818 #endif 819 pmap_pte_valid++; 820 } 821 822 static inline void 823 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 824 { 825 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 826 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 827 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 828 if ((pt->pte_hi & PTE_VALID) == 0) 829 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 830 #endif 831 832 pvo_pt->pte_hi &= ~PTE_VALID; 833 /* 834 * Force the ref & chg bits back into the PTEs. 835 */ 836 SYNC(); 837 /* 838 * Invalidate the pte ... (Section 7.6.3.3) 839 */ 840 pt->pte_hi &= ~PTE_VALID; 841 SYNC(); 842 TLBIE(va); 843 SYNC(); 844 EIEIO(); 845 TLBSYNC(); 846 SYNC(); 847 /* 848 * Save the ref & chg bits ... 849 */ 850 pmap_pte_synch(pt, pvo_pt); 851 pmap_pte_valid--; 852 } 853 854 static inline void 855 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 856 { 857 /* 858 * Invalidate the PTE 859 */ 860 pmap_pte_unset(pt, pvo_pt, va); 861 pmap_pte_set(pt, pvo_pt); 862 } 863 864 /* 865 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 866 * (either primary or secondary location). 867 * 868 * Note: both the destination and source PTEs must not have PTE_VALID set. 869 */ 870 871 static int 872 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 873 { 874 volatile struct pte *pt; 875 int i; 876 877 #if defined(DEBUG) 878 DPRINTFN(PTE, ("pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 879 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo)); 880 #endif 881 /* 882 * First try primary hash. 883 */ 884 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 885 if ((pt->pte_hi & PTE_VALID) == 0) { 886 pvo_pt->pte_hi &= ~PTE_HID; 887 pmap_pte_set(pt, pvo_pt); 888 return i; 889 } 890 } 891 892 /* 893 * Now try secondary hash. 894 */ 895 ptegidx ^= pmap_pteg_mask; 896 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 897 if ((pt->pte_hi & PTE_VALID) == 0) { 898 pvo_pt->pte_hi |= PTE_HID; 899 pmap_pte_set(pt, pvo_pt); 900 return i; 901 } 902 } 903 return -1; 904 } 905 906 /* 907 * Spill handler. 908 * 909 * Tries to spill a page table entry from the overflow area. 910 * This runs in either real mode (if dealing with a exception spill) 911 * or virtual mode when dealing with manually spilling one of the 912 * kernel's pte entries. In either case, interrupts are already 913 * disabled. 914 */ 915 916 int 917 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 918 { 919 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 920 struct pvo_entry *pvo; 921 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 922 struct pvo_tqhead *pvoh, *vpvoh = NULL; 923 int ptegidx, i, j; 924 volatile struct pteg *pteg; 925 volatile struct pte *pt; 926 927 PMAP_LOCK(); 928 929 ptegidx = va_to_pteg(pm, addr); 930 931 /* 932 * Have to substitute some entry. Use the primary hash for this. 933 * Use low bits of timebase as random generator. Make sure we are 934 * not picking a kernel pte for replacement. 935 */ 936 pteg = &pmap_pteg_table[ptegidx]; 937 i = MFTB() & 7; 938 for (j = 0; j < 8; j++) { 939 pt = &pteg->pt[i]; 940 if ((pt->pte_hi & PTE_VALID) == 0) 941 break; 942 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 943 < PHYSMAP_VSIDBITS) 944 break; 945 i = (i + 1) & 7; 946 } 947 KASSERT(j < 8); 948 949 source_pvo = NULL; 950 victim_pvo = NULL; 951 pvoh = &pmap_pvo_table[ptegidx]; 952 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 953 954 /* 955 * We need to find pvo entry for this address... 956 */ 957 PMAP_PVO_CHECK(pvo); /* sanity check */ 958 959 /* 960 * If we haven't found the source and we come to a PVO with 961 * a valid PTE, then we know we can't find it because all 962 * evicted PVOs always are first in the list. 963 */ 964 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 965 break; 966 if (source_pvo == NULL && pm == pvo->pvo_pmap && 967 addr == PVO_VADDR(pvo)) { 968 969 /* 970 * Now we have found the entry to be spilled into the 971 * pteg. Attempt to insert it into the page table. 972 */ 973 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 974 if (j >= 0) { 975 PVO_PTEGIDX_SET(pvo, j); 976 PMAP_PVO_CHECK(pvo); /* sanity check */ 977 PVO_WHERE(pvo, SPILL_INSERT); 978 pvo->pvo_pmap->pm_evictions--; 979 PMAPCOUNT(ptes_spilled); 980 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 981 ? pmap_evcnt_ptes_secondary 982 : pmap_evcnt_ptes_primary)[j]); 983 984 /* 985 * Since we keep the evicted entries at the 986 * from of the PVO list, we need move this 987 * (now resident) PVO after the evicted 988 * entries. 989 */ 990 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 991 992 /* 993 * If we don't have to move (either we were the 994 * last entry or the next entry was valid), 995 * don't change our position. Otherwise 996 * move ourselves to the tail of the queue. 997 */ 998 if (next_pvo != NULL && 999 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 1000 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 1001 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1002 } 1003 PMAP_UNLOCK(); 1004 return 1; 1005 } 1006 source_pvo = pvo; 1007 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 1008 return 0; 1009 } 1010 if (victim_pvo != NULL) 1011 break; 1012 } 1013 1014 /* 1015 * We also need the pvo entry of the victim we are replacing 1016 * so save the R & C bits of the PTE. 1017 */ 1018 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1019 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1020 vpvoh = pvoh; /* *1* */ 1021 victim_pvo = pvo; 1022 if (source_pvo != NULL) 1023 break; 1024 } 1025 } 1026 1027 if (source_pvo == NULL) { 1028 PMAPCOUNT(ptes_unspilled); 1029 PMAP_UNLOCK(); 1030 return 0; 1031 } 1032 1033 if (victim_pvo == NULL) { 1034 if ((pt->pte_hi & PTE_HID) == 0) 1035 panic("pmap_pte_spill: victim p-pte (%p) has " 1036 "no pvo entry!", pt); 1037 1038 /* 1039 * If this is a secondary PTE, we need to search 1040 * its primary pvo bucket for the matching PVO. 1041 */ 1042 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1043 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1044 PMAP_PVO_CHECK(pvo); /* sanity check */ 1045 1046 /* 1047 * We also need the pvo entry of the victim we are 1048 * replacing so save the R & C bits of the PTE. 1049 */ 1050 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1051 victim_pvo = pvo; 1052 break; 1053 } 1054 } 1055 if (victim_pvo == NULL) 1056 panic("pmap_pte_spill: victim s-pte (%p) has " 1057 "no pvo entry!", pt); 1058 } 1059 1060 /* 1061 * The victim should be not be a kernel PVO/PTE entry. 1062 */ 1063 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1064 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1065 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1066 1067 /* 1068 * We are invalidating the TLB entry for the EA for the 1069 * we are replacing even though its valid; If we don't 1070 * we lose any ref/chg bit changes contained in the TLB 1071 * entry. 1072 */ 1073 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1074 1075 /* 1076 * To enforce the PVO list ordering constraint that all 1077 * evicted entries should come before all valid entries, 1078 * move the source PVO to the tail of its list and the 1079 * victim PVO to the head of its list (which might not be 1080 * the same list, if the victim was using the secondary hash). 1081 */ 1082 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1083 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1084 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1085 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1086 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1087 pmap_pte_set(pt, &source_pvo->pvo_pte); 1088 victim_pvo->pvo_pmap->pm_evictions++; 1089 source_pvo->pvo_pmap->pm_evictions--; 1090 PVO_WHERE(victim_pvo, SPILL_UNSET); 1091 PVO_WHERE(source_pvo, SPILL_SET); 1092 1093 PVO_PTEGIDX_CLR(victim_pvo); 1094 PVO_PTEGIDX_SET(source_pvo, i); 1095 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1096 PMAPCOUNT(ptes_spilled); 1097 PMAPCOUNT(ptes_evicted); 1098 PMAPCOUNT(ptes_removed); 1099 1100 PMAP_PVO_CHECK(victim_pvo); 1101 PMAP_PVO_CHECK(source_pvo); 1102 1103 PMAP_UNLOCK(); 1104 return 1; 1105 } 1106 1107 /* 1108 * Restrict given range to physical memory 1109 */ 1110 void 1111 pmap_real_memory(paddr_t *start, psize_t *size) 1112 { 1113 struct mem_region *mp; 1114 1115 for (mp = mem; mp->size; mp++) { 1116 if (*start + *size > mp->start 1117 && *start < mp->start + mp->size) { 1118 if (*start < mp->start) { 1119 *size -= mp->start - *start; 1120 *start = mp->start; 1121 } 1122 if (*start + *size > mp->start + mp->size) 1123 *size = mp->start + mp->size - *start; 1124 return; 1125 } 1126 } 1127 *size = 0; 1128 } 1129 1130 /* 1131 * Initialize anything else for pmap handling. 1132 * Called during vm_init(). 1133 */ 1134 void 1135 pmap_init(void) 1136 { 1137 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1138 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1139 &pmap_pool_mallocator, IPL_NONE); 1140 1141 pool_setlowat(&pmap_mpvo_pool, 1008); 1142 1143 pmap_initialized = 1; 1144 1145 } 1146 1147 /* 1148 * How much virtual space does the kernel get? 1149 */ 1150 void 1151 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1152 { 1153 /* 1154 * For now, reserve one segment (minus some overhead) for kernel 1155 * virtual memory 1156 */ 1157 *start = VM_MIN_KERNEL_ADDRESS; 1158 *end = VM_MAX_KERNEL_ADDRESS; 1159 } 1160 1161 /* 1162 * Allocate, initialize, and return a new physical map. 1163 */ 1164 pmap_t 1165 pmap_create(void) 1166 { 1167 pmap_t pm; 1168 1169 pm = pool_get(&pmap_pool, PR_WAITOK); 1170 memset((void *)pm, 0, sizeof *pm); 1171 pmap_pinit(pm); 1172 1173 DPRINTFN(CREATE,("pmap_create: pm %p:\n" 1174 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1175 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1176 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1177 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1178 pm, 1179 pm->pm_sr[0], pm->pm_sr[1], 1180 pm->pm_sr[2], pm->pm_sr[3], 1181 pm->pm_sr[4], pm->pm_sr[5], 1182 pm->pm_sr[6], pm->pm_sr[7], 1183 pm->pm_sr[8], pm->pm_sr[9], 1184 pm->pm_sr[10], pm->pm_sr[11], 1185 pm->pm_sr[12], pm->pm_sr[13], 1186 pm->pm_sr[14], pm->pm_sr[15])); 1187 return pm; 1188 } 1189 1190 /* 1191 * Initialize a preallocated and zeroed pmap structure. 1192 */ 1193 void 1194 pmap_pinit(pmap_t pm) 1195 { 1196 register_t entropy = MFTB(); 1197 register_t mask; 1198 int i; 1199 1200 /* 1201 * Allocate some segment registers for this pmap. 1202 */ 1203 pm->pm_refs = 1; 1204 PMAP_LOCK(); 1205 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1206 static register_t pmap_vsidcontext; 1207 register_t hash; 1208 unsigned int n; 1209 1210 /* Create a new value by multiplying by a prime adding in 1211 * entropy from the timebase register. This is to make the 1212 * VSID more random so that the PT Hash function collides 1213 * less often. (note that the prime causes gcc to do shifts 1214 * instead of a multiply) 1215 */ 1216 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1217 hash = pmap_vsidcontext & (NPMAPS - 1); 1218 if (hash == 0) { /* 0 is special, avoid it */ 1219 entropy += 0xbadf00d; 1220 continue; 1221 } 1222 n = hash >> 5; 1223 mask = 1L << (hash & (VSID_NBPW-1)); 1224 hash = pmap_vsidcontext; 1225 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1226 /* anything free in this bucket? */ 1227 if (~pmap_vsid_bitmap[n] == 0) { 1228 entropy = hash ^ (hash >> 16); 1229 continue; 1230 } 1231 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1232 mask = 1L << i; 1233 hash &= ~(VSID_NBPW-1); 1234 hash |= i; 1235 } 1236 hash &= PTE_VSID >> PTE_VSID_SHFT; 1237 pmap_vsid_bitmap[n] |= mask; 1238 pm->pm_vsid = hash; 1239 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1240 for (i = 0; i < 16; i++) 1241 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1242 SR_NOEXEC; 1243 #endif 1244 PMAP_UNLOCK(); 1245 return; 1246 } 1247 PMAP_UNLOCK(); 1248 panic("pmap_pinit: out of segments"); 1249 } 1250 1251 /* 1252 * Add a reference to the given pmap. 1253 */ 1254 void 1255 pmap_reference(pmap_t pm) 1256 { 1257 atomic_inc_uint(&pm->pm_refs); 1258 } 1259 1260 /* 1261 * Retire the given pmap from service. 1262 * Should only be called if the map contains no valid mappings. 1263 */ 1264 void 1265 pmap_destroy(pmap_t pm) 1266 { 1267 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1268 pmap_release(pm); 1269 pool_put(&pmap_pool, pm); 1270 } 1271 } 1272 1273 /* 1274 * Release any resources held by the given physical map. 1275 * Called when a pmap initialized by pmap_pinit is being released. 1276 */ 1277 void 1278 pmap_release(pmap_t pm) 1279 { 1280 int idx, mask; 1281 1282 KASSERT(pm->pm_stats.resident_count == 0); 1283 KASSERT(pm->pm_stats.wired_count == 0); 1284 1285 PMAP_LOCK(); 1286 if (pm->pm_sr[0] == 0) 1287 panic("pmap_release"); 1288 idx = pm->pm_vsid & (NPMAPS-1); 1289 mask = 1 << (idx % VSID_NBPW); 1290 idx /= VSID_NBPW; 1291 1292 KASSERT(pmap_vsid_bitmap[idx] & mask); 1293 pmap_vsid_bitmap[idx] &= ~mask; 1294 PMAP_UNLOCK(); 1295 } 1296 1297 /* 1298 * Copy the range specified by src_addr/len 1299 * from the source map to the range dst_addr/len 1300 * in the destination map. 1301 * 1302 * This routine is only advisory and need not do anything. 1303 */ 1304 void 1305 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1306 vsize_t len, vaddr_t src_addr) 1307 { 1308 PMAPCOUNT(copies); 1309 } 1310 1311 /* 1312 * Require that all active physical maps contain no 1313 * incorrect entries NOW. 1314 */ 1315 void 1316 pmap_update(struct pmap *pmap) 1317 { 1318 PMAPCOUNT(updates); 1319 TLBSYNC(); 1320 } 1321 1322 static inline int 1323 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1324 { 1325 int pteidx; 1326 /* 1327 * We can find the actual pte entry without searching by 1328 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1329 * and by noticing the HID bit. 1330 */ 1331 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1332 if (pvo->pvo_pte.pte_hi & PTE_HID) 1333 pteidx ^= pmap_pteg_mask * 8; 1334 return pteidx; 1335 } 1336 1337 volatile struct pte * 1338 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1339 { 1340 volatile struct pte *pt; 1341 1342 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1343 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1344 return NULL; 1345 #endif 1346 1347 /* 1348 * If we haven't been supplied the ptegidx, calculate it. 1349 */ 1350 if (pteidx == -1) { 1351 int ptegidx; 1352 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1353 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1354 } 1355 1356 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1357 1358 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1359 return pt; 1360 #else 1361 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1362 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1363 "pvo but no valid pte index", pvo); 1364 } 1365 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1366 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1367 "pvo but no valid pte", pvo); 1368 } 1369 1370 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1371 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1372 #if defined(DEBUG) || defined(PMAPCHECK) 1373 pmap_pte_print(pt); 1374 #endif 1375 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1376 "pmap_pteg_table %p but invalid in pvo", 1377 pvo, pt); 1378 } 1379 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1380 #if defined(DEBUG) || defined(PMAPCHECK) 1381 pmap_pte_print(pt); 1382 #endif 1383 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1384 "not match pte %p in pmap_pteg_table", 1385 pvo, pt); 1386 } 1387 return pt; 1388 } 1389 1390 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1391 #if defined(DEBUG) || defined(PMAPCHECK) 1392 pmap_pte_print(pt); 1393 #endif 1394 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1395 "pmap_pteg_table but valid in pvo", pvo, pt); 1396 } 1397 return NULL; 1398 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1399 } 1400 1401 struct pvo_entry * 1402 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1403 { 1404 struct pvo_entry *pvo; 1405 int ptegidx; 1406 1407 va &= ~ADDR_POFF; 1408 ptegidx = va_to_pteg(pm, va); 1409 1410 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1411 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1412 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1413 panic("pmap_pvo_find_va: invalid pvo %p on " 1414 "list %#x (%p)", pvo, ptegidx, 1415 &pmap_pvo_table[ptegidx]); 1416 #endif 1417 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1418 if (pteidx_p) 1419 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1420 return pvo; 1421 } 1422 } 1423 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1424 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1425 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1426 return NULL; 1427 } 1428 1429 #if defined(DEBUG) || defined(PMAPCHECK) 1430 void 1431 pmap_pvo_check(const struct pvo_entry *pvo) 1432 { 1433 struct pvo_head *pvo_head; 1434 struct pvo_entry *pvo0; 1435 volatile struct pte *pt; 1436 int failed = 0; 1437 1438 PMAP_LOCK(); 1439 1440 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1441 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1442 1443 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1444 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1445 pvo, pvo->pvo_pmap); 1446 failed = 1; 1447 } 1448 1449 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1450 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1451 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1452 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1453 failed = 1; 1454 } 1455 1456 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1457 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1458 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1459 pvo, LIST_NEXT(pvo, pvo_vlink)); 1460 failed = 1; 1461 } 1462 1463 if (PVO_MANAGED_P(pvo)) { 1464 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1465 } else { 1466 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1467 printf("pmap_pvo_check: pvo %p: non kernel address " 1468 "on kernel unmanaged list\n", pvo); 1469 failed = 1; 1470 } 1471 pvo_head = &pmap_pvo_kunmanaged; 1472 } 1473 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1474 if (pvo0 == pvo) 1475 break; 1476 } 1477 if (pvo0 == NULL) { 1478 printf("pmap_pvo_check: pvo %p: not present " 1479 "on its vlist head %p\n", pvo, pvo_head); 1480 failed = 1; 1481 } 1482 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1483 printf("pmap_pvo_check: pvo %p: not present " 1484 "on its olist head\n", pvo); 1485 failed = 1; 1486 } 1487 pt = pmap_pvo_to_pte(pvo, -1); 1488 if (pt == NULL) { 1489 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1490 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1491 "no PTE\n", pvo); 1492 failed = 1; 1493 } 1494 } else { 1495 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1496 (uintptr_t) pt >= 1497 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1498 printf("pmap_pvo_check: pvo %p: pte %p not in " 1499 "pteg table\n", pvo, pt); 1500 failed = 1; 1501 } 1502 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1503 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1504 "no PTE\n", pvo); 1505 failed = 1; 1506 } 1507 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1508 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1509 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1510 pvo->pvo_pte.pte_hi, 1511 pt->pte_hi); 1512 failed = 1; 1513 } 1514 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1515 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1516 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1517 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1518 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1519 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1520 failed = 1; 1521 } 1522 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1523 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1524 " doesn't not match PVO's VA %#" _PRIxva "\n", 1525 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1526 failed = 1; 1527 } 1528 if (failed) 1529 pmap_pte_print(pt); 1530 } 1531 if (failed) 1532 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1533 pvo->pvo_pmap); 1534 1535 PMAP_UNLOCK(); 1536 } 1537 #endif /* DEBUG || PMAPCHECK */ 1538 1539 /* 1540 * Search the PVO table looking for a non-wired entry. 1541 * If we find one, remove it and return it. 1542 */ 1543 1544 struct pvo_entry * 1545 pmap_pvo_reclaim(struct pmap *pm) 1546 { 1547 struct pvo_tqhead *pvoh; 1548 struct pvo_entry *pvo; 1549 uint32_t idx, endidx; 1550 1551 endidx = pmap_pvo_reclaim_nextidx; 1552 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1553 idx = (idx + 1) & pmap_pteg_mask) { 1554 pvoh = &pmap_pvo_table[idx]; 1555 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1556 if (!PVO_WIRED_P(pvo)) { 1557 pmap_pvo_remove(pvo, -1, NULL); 1558 pmap_pvo_reclaim_nextidx = idx; 1559 PMAPCOUNT(pvos_reclaimed); 1560 return pvo; 1561 } 1562 } 1563 } 1564 return NULL; 1565 } 1566 1567 /* 1568 * This returns whether this is the first mapping of a page. 1569 */ 1570 int 1571 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1572 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1573 { 1574 struct pvo_entry *pvo; 1575 struct pvo_tqhead *pvoh; 1576 register_t msr; 1577 int ptegidx; 1578 int i; 1579 int poolflags = PR_NOWAIT; 1580 1581 /* 1582 * Compute the PTE Group index. 1583 */ 1584 va &= ~ADDR_POFF; 1585 ptegidx = va_to_pteg(pm, va); 1586 1587 msr = pmap_interrupts_off(); 1588 1589 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1590 if (pmap_pvo_remove_depth > 0) 1591 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1592 if (++pmap_pvo_enter_depth > 1) 1593 panic("pmap_pvo_enter: called recursively!"); 1594 #endif 1595 1596 /* 1597 * Remove any existing mapping for this page. Reuse the 1598 * pvo entry if there a mapping. 1599 */ 1600 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1601 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1602 #ifdef DEBUG 1603 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1604 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1605 ~(PTE_REF|PTE_CHG)) == 0 && 1606 va < VM_MIN_KERNEL_ADDRESS) { 1607 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n", 1608 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1609 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n", 1610 pvo->pvo_pte.pte_hi, 1611 pm->pm_sr[va >> ADDR_SR_SHFT]); 1612 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1613 #ifdef DDBX 1614 Debugger(); 1615 #endif 1616 } 1617 #endif 1618 PMAPCOUNT(mappings_replaced); 1619 pmap_pvo_remove(pvo, -1, NULL); 1620 break; 1621 } 1622 } 1623 1624 /* 1625 * If we aren't overwriting an mapping, try to allocate 1626 */ 1627 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1628 --pmap_pvo_enter_depth; 1629 #endif 1630 pmap_interrupts_restore(msr); 1631 if (pvo) { 1632 pmap_pvo_free(pvo); 1633 } 1634 pvo = pool_get(pl, poolflags); 1635 1636 #ifdef DEBUG 1637 /* 1638 * Exercise pmap_pvo_reclaim() a little. 1639 */ 1640 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1641 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1642 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1643 pool_put(pl, pvo); 1644 pvo = NULL; 1645 } 1646 #endif 1647 1648 msr = pmap_interrupts_off(); 1649 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1650 ++pmap_pvo_enter_depth; 1651 #endif 1652 if (pvo == NULL) { 1653 pvo = pmap_pvo_reclaim(pm); 1654 if (pvo == NULL) { 1655 if ((flags & PMAP_CANFAIL) == 0) 1656 panic("pmap_pvo_enter: failed"); 1657 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1658 pmap_pvo_enter_depth--; 1659 #endif 1660 PMAPCOUNT(pvos_failed); 1661 pmap_interrupts_restore(msr); 1662 return ENOMEM; 1663 } 1664 } 1665 1666 pvo->pvo_vaddr = va; 1667 pvo->pvo_pmap = pm; 1668 pvo->pvo_vaddr &= ~ADDR_POFF; 1669 if (flags & VM_PROT_EXECUTE) { 1670 PMAPCOUNT(exec_mappings); 1671 pvo_set_exec(pvo); 1672 } 1673 if (flags & PMAP_WIRED) 1674 pvo->pvo_vaddr |= PVO_WIRED; 1675 if (pvo_head != &pmap_pvo_kunmanaged) { 1676 pvo->pvo_vaddr |= PVO_MANAGED; 1677 PMAPCOUNT(mappings); 1678 } else { 1679 PMAPCOUNT(kernel_mappings); 1680 } 1681 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1682 1683 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1684 if (PVO_WIRED_P(pvo)) 1685 pvo->pvo_pmap->pm_stats.wired_count++; 1686 pvo->pvo_pmap->pm_stats.resident_count++; 1687 #if defined(DEBUG) 1688 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1689 DPRINTFN(PVOENTER, 1690 ("pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1691 pvo, pm, va, pa)); 1692 #endif 1693 1694 /* 1695 * We hope this succeeds but it isn't required. 1696 */ 1697 pvoh = &pmap_pvo_table[ptegidx]; 1698 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1699 if (i >= 0) { 1700 PVO_PTEGIDX_SET(pvo, i); 1701 PVO_WHERE(pvo, ENTER_INSERT); 1702 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1703 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1704 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1705 1706 } else { 1707 /* 1708 * Since we didn't have room for this entry (which makes it 1709 * and evicted entry), place it at the head of the list. 1710 */ 1711 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1712 PMAPCOUNT(ptes_evicted); 1713 pm->pm_evictions++; 1714 /* 1715 * If this is a kernel page, make sure it's active. 1716 */ 1717 if (pm == pmap_kernel()) { 1718 i = pmap_pte_spill(pm, va, false); 1719 KASSERT(i); 1720 } 1721 } 1722 PMAP_PVO_CHECK(pvo); /* sanity check */ 1723 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1724 pmap_pvo_enter_depth--; 1725 #endif 1726 pmap_interrupts_restore(msr); 1727 return 0; 1728 } 1729 1730 static void 1731 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1732 { 1733 volatile struct pte *pt; 1734 int ptegidx; 1735 1736 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1737 if (++pmap_pvo_remove_depth > 1) 1738 panic("pmap_pvo_remove: called recursively!"); 1739 #endif 1740 1741 /* 1742 * If we haven't been supplied the ptegidx, calculate it. 1743 */ 1744 if (pteidx == -1) { 1745 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1746 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1747 } else { 1748 ptegidx = pteidx >> 3; 1749 if (pvo->pvo_pte.pte_hi & PTE_HID) 1750 ptegidx ^= pmap_pteg_mask; 1751 } 1752 PMAP_PVO_CHECK(pvo); /* sanity check */ 1753 1754 /* 1755 * If there is an active pte entry, we need to deactivate it 1756 * (and save the ref & chg bits). 1757 */ 1758 pt = pmap_pvo_to_pte(pvo, pteidx); 1759 if (pt != NULL) { 1760 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1761 PVO_WHERE(pvo, REMOVE); 1762 PVO_PTEGIDX_CLR(pvo); 1763 PMAPCOUNT(ptes_removed); 1764 } else { 1765 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1766 pvo->pvo_pmap->pm_evictions--; 1767 } 1768 1769 /* 1770 * Account for executable mappings. 1771 */ 1772 if (PVO_EXECUTABLE_P(pvo)) 1773 pvo_clear_exec(pvo); 1774 1775 /* 1776 * Update our statistics. 1777 */ 1778 pvo->pvo_pmap->pm_stats.resident_count--; 1779 if (PVO_WIRED_P(pvo)) 1780 pvo->pvo_pmap->pm_stats.wired_count--; 1781 1782 /* 1783 * Save the REF/CHG bits into their cache if the page is managed. 1784 */ 1785 if (PVO_MANAGED_P(pvo)) { 1786 register_t ptelo = pvo->pvo_pte.pte_lo; 1787 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1788 1789 if (pg != NULL) { 1790 /* 1791 * If this page was changed and it is mapped exec, 1792 * invalidate it. 1793 */ 1794 if ((ptelo & PTE_CHG) && 1795 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1796 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1797 if (LIST_EMPTY(pvoh)) { 1798 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1799 "%#" _PRIxpa ": clear-exec]\n", 1800 VM_PAGE_TO_PHYS(pg))); 1801 pmap_attr_clear(pg, PTE_EXEC); 1802 PMAPCOUNT(exec_uncached_pvo_remove); 1803 } else { 1804 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1805 "%#" _PRIxpa ": syncicache]\n", 1806 VM_PAGE_TO_PHYS(pg))); 1807 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1808 PAGE_SIZE); 1809 PMAPCOUNT(exec_synced_pvo_remove); 1810 } 1811 } 1812 1813 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1814 } 1815 PMAPCOUNT(unmappings); 1816 } else { 1817 PMAPCOUNT(kernel_unmappings); 1818 } 1819 1820 /* 1821 * Remove the PVO from its lists and return it to the pool. 1822 */ 1823 LIST_REMOVE(pvo, pvo_vlink); 1824 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1825 if (pvol) { 1826 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1827 } 1828 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1829 pmap_pvo_remove_depth--; 1830 #endif 1831 } 1832 1833 void 1834 pmap_pvo_free(struct pvo_entry *pvo) 1835 { 1836 1837 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1838 } 1839 1840 void 1841 pmap_pvo_free_list(struct pvo_head *pvol) 1842 { 1843 struct pvo_entry *pvo, *npvo; 1844 1845 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1846 npvo = LIST_NEXT(pvo, pvo_vlink); 1847 LIST_REMOVE(pvo, pvo_vlink); 1848 pmap_pvo_free(pvo); 1849 } 1850 } 1851 1852 /* 1853 * Mark a mapping as executable. 1854 * If this is the first executable mapping in the segment, 1855 * clear the noexec flag. 1856 */ 1857 static void 1858 pvo_set_exec(struct pvo_entry *pvo) 1859 { 1860 struct pmap *pm = pvo->pvo_pmap; 1861 1862 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1863 return; 1864 } 1865 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1866 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1867 { 1868 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1869 if (pm->pm_exec[sr]++ == 0) { 1870 pm->pm_sr[sr] &= ~SR_NOEXEC; 1871 } 1872 } 1873 #endif 1874 } 1875 1876 /* 1877 * Mark a mapping as non-executable. 1878 * If this was the last executable mapping in the segment, 1879 * set the noexec flag. 1880 */ 1881 static void 1882 pvo_clear_exec(struct pvo_entry *pvo) 1883 { 1884 struct pmap *pm = pvo->pvo_pmap; 1885 1886 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1887 return; 1888 } 1889 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1890 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1891 { 1892 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1893 if (--pm->pm_exec[sr] == 0) { 1894 pm->pm_sr[sr] |= SR_NOEXEC; 1895 } 1896 } 1897 #endif 1898 } 1899 1900 /* 1901 * Insert physical page at pa into the given pmap at virtual address va. 1902 */ 1903 int 1904 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 1905 { 1906 struct mem_region *mp; 1907 struct pvo_head *pvo_head; 1908 struct vm_page *pg; 1909 struct pool *pl; 1910 register_t pte_lo; 1911 int error; 1912 u_int pvo_flags; 1913 u_int was_exec = 0; 1914 1915 PMAP_LOCK(); 1916 1917 if (__predict_false(!pmap_initialized)) { 1918 pvo_head = &pmap_pvo_kunmanaged; 1919 pl = &pmap_upvo_pool; 1920 pvo_flags = 0; 1921 pg = NULL; 1922 was_exec = PTE_EXEC; 1923 } else { 1924 pvo_head = pa_to_pvoh(pa, &pg); 1925 pl = &pmap_mpvo_pool; 1926 pvo_flags = PVO_MANAGED; 1927 } 1928 1929 DPRINTFN(ENTER, 1930 ("pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1931 pm, va, pa, prot, flags)); 1932 1933 /* 1934 * If this is a managed page, and it's the first reference to the 1935 * page clear the execness of the page. Otherwise fetch the execness. 1936 */ 1937 if (pg != NULL) 1938 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1939 1940 DPRINTFN(ENTER, (" was_exec=%d", was_exec)); 1941 1942 /* 1943 * Assume the page is cache inhibited and access is guarded unless 1944 * it's in our available memory array. If it is in the memory array, 1945 * asssume it's in memory coherent memory. 1946 */ 1947 pte_lo = PTE_IG; 1948 if ((flags & PMAP_NC) == 0) { 1949 for (mp = mem; mp->size; mp++) { 1950 if (pa >= mp->start && pa < mp->start + mp->size) { 1951 pte_lo = PTE_M; 1952 break; 1953 } 1954 } 1955 } 1956 1957 if (prot & VM_PROT_WRITE) 1958 pte_lo |= PTE_BW; 1959 else 1960 pte_lo |= PTE_BR; 1961 1962 /* 1963 * If this was in response to a fault, "pre-fault" the PTE's 1964 * changed/referenced bit appropriately. 1965 */ 1966 if (flags & VM_PROT_WRITE) 1967 pte_lo |= PTE_CHG; 1968 if (flags & VM_PROT_ALL) 1969 pte_lo |= PTE_REF; 1970 1971 /* 1972 * We need to know if this page can be executable 1973 */ 1974 flags |= (prot & VM_PROT_EXECUTE); 1975 1976 /* 1977 * Record mapping for later back-translation and pte spilling. 1978 * This will overwrite any existing mapping. 1979 */ 1980 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1981 1982 /* 1983 * Flush the real page from the instruction cache if this page is 1984 * mapped executable and cacheable and has not been flushed since 1985 * the last time it was modified. 1986 */ 1987 if (error == 0 && 1988 (flags & VM_PROT_EXECUTE) && 1989 (pte_lo & PTE_I) == 0 && 1990 was_exec == 0) { 1991 DPRINTFN(ENTER, (" syncicache")); 1992 PMAPCOUNT(exec_synced); 1993 pmap_syncicache(pa, PAGE_SIZE); 1994 if (pg != NULL) { 1995 pmap_attr_save(pg, PTE_EXEC); 1996 PMAPCOUNT(exec_cached); 1997 #if defined(DEBUG) || defined(PMAPDEBUG) 1998 if (pmapdebug & PMAPDEBUG_ENTER) 1999 printf(" marked-as-exec"); 2000 else if (pmapdebug & PMAPDEBUG_EXEC) 2001 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 2002 VM_PAGE_TO_PHYS(pg)); 2003 2004 #endif 2005 } 2006 } 2007 2008 DPRINTFN(ENTER, (": error=%d\n", error)); 2009 2010 PMAP_UNLOCK(); 2011 2012 return error; 2013 } 2014 2015 void 2016 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 2017 { 2018 struct mem_region *mp; 2019 register_t pte_lo; 2020 int error; 2021 2022 #if defined (PMAP_OEA64_BRIDGE) 2023 if (va < VM_MIN_KERNEL_ADDRESS) 2024 panic("pmap_kenter_pa: attempt to enter " 2025 "non-kernel address %#" _PRIxva "!", va); 2026 #endif 2027 2028 DPRINTFN(KENTER, 2029 ("pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot)); 2030 2031 PMAP_LOCK(); 2032 2033 /* 2034 * Assume the page is cache inhibited and access is guarded unless 2035 * it's in our available memory array. If it is in the memory array, 2036 * asssume it's in memory coherent memory. 2037 */ 2038 pte_lo = PTE_IG; 2039 if ((prot & PMAP_NC) == 0) { 2040 for (mp = mem; mp->size; mp++) { 2041 if (pa >= mp->start && pa < mp->start + mp->size) { 2042 pte_lo = PTE_M; 2043 break; 2044 } 2045 } 2046 } 2047 2048 if (prot & VM_PROT_WRITE) 2049 pte_lo |= PTE_BW; 2050 else 2051 pte_lo |= PTE_BR; 2052 2053 /* 2054 * We don't care about REF/CHG on PVOs on the unmanaged list. 2055 */ 2056 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2057 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2058 2059 if (error != 0) 2060 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2061 va, pa, error); 2062 2063 PMAP_UNLOCK(); 2064 } 2065 2066 void 2067 pmap_kremove(vaddr_t va, vsize_t len) 2068 { 2069 if (va < VM_MIN_KERNEL_ADDRESS) 2070 panic("pmap_kremove: attempt to remove " 2071 "non-kernel address %#" _PRIxva "!", va); 2072 2073 DPRINTFN(KREMOVE,("pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len)); 2074 pmap_remove(pmap_kernel(), va, va + len); 2075 } 2076 2077 /* 2078 * Remove the given range of mapping entries. 2079 */ 2080 void 2081 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2082 { 2083 struct pvo_head pvol; 2084 struct pvo_entry *pvo; 2085 register_t msr; 2086 int pteidx; 2087 2088 PMAP_LOCK(); 2089 LIST_INIT(&pvol); 2090 msr = pmap_interrupts_off(); 2091 for (; va < endva; va += PAGE_SIZE) { 2092 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2093 if (pvo != NULL) { 2094 pmap_pvo_remove(pvo, pteidx, &pvol); 2095 } 2096 } 2097 pmap_interrupts_restore(msr); 2098 pmap_pvo_free_list(&pvol); 2099 PMAP_UNLOCK(); 2100 } 2101 2102 /* 2103 * Get the physical page address for the given pmap/virtual address. 2104 */ 2105 bool 2106 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2107 { 2108 struct pvo_entry *pvo; 2109 register_t msr; 2110 2111 PMAP_LOCK(); 2112 2113 /* 2114 * If this is a kernel pmap lookup, also check the battable 2115 * and if we get a hit, translate the VA to a PA using the 2116 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2117 * that will wrap back to 0. 2118 */ 2119 if (pm == pmap_kernel() && 2120 (va < VM_MIN_KERNEL_ADDRESS || 2121 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2122 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2123 #if defined (PMAP_OEA) 2124 #ifdef PPC_OEA601 2125 if ((MFPVR() >> 16) == MPC601) { 2126 register_t batu = battable[va >> 23].batu; 2127 register_t batl = battable[va >> 23].batl; 2128 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2129 if (BAT601_VALID_P(batl) && 2130 BAT601_VA_MATCH_P(batu, batl, va)) { 2131 register_t mask = 2132 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2133 if (pap) 2134 *pap = (batl & mask) | (va & ~mask); 2135 PMAP_UNLOCK(); 2136 return true; 2137 } else if (SR601_VALID_P(sr) && 2138 SR601_PA_MATCH_P(sr, va)) { 2139 if (pap) 2140 *pap = va; 2141 PMAP_UNLOCK(); 2142 return true; 2143 } 2144 } else 2145 #endif /* PPC_OEA601 */ 2146 { 2147 register_t batu = battable[va >> ADDR_SR_SHFT].batu; 2148 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2149 register_t batl = 2150 battable[va >> ADDR_SR_SHFT].batl; 2151 register_t mask = 2152 (~(batu & BAT_BL) << 15) & ~0x1ffffL; 2153 if (pap) 2154 *pap = (batl & mask) | (va & ~mask); 2155 PMAP_UNLOCK(); 2156 return true; 2157 } 2158 } 2159 return false; 2160 #elif defined (PMAP_OEA64_BRIDGE) 2161 if (va >= SEGMENT_LENGTH) 2162 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2163 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2164 else { 2165 if (pap) 2166 *pap = va; 2167 PMAP_UNLOCK(); 2168 return true; 2169 } 2170 #elif defined (PMAP_OEA64) 2171 #error PPC_OEA64 not supported 2172 #endif /* PPC_OEA */ 2173 } 2174 2175 msr = pmap_interrupts_off(); 2176 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2177 if (pvo != NULL) { 2178 PMAP_PVO_CHECK(pvo); /* sanity check */ 2179 if (pap) 2180 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2181 | (va & ADDR_POFF); 2182 } 2183 pmap_interrupts_restore(msr); 2184 PMAP_UNLOCK(); 2185 return pvo != NULL; 2186 } 2187 2188 /* 2189 * Lower the protection on the specified range of this pmap. 2190 */ 2191 void 2192 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2193 { 2194 struct pvo_entry *pvo; 2195 volatile struct pte *pt; 2196 register_t msr; 2197 int pteidx; 2198 2199 /* 2200 * Since this routine only downgrades protection, we should 2201 * always be called with at least one bit not set. 2202 */ 2203 KASSERT(prot != VM_PROT_ALL); 2204 2205 /* 2206 * If there is no protection, this is equivalent to 2207 * remove the pmap from the pmap. 2208 */ 2209 if ((prot & VM_PROT_READ) == 0) { 2210 pmap_remove(pm, va, endva); 2211 return; 2212 } 2213 2214 PMAP_LOCK(); 2215 2216 msr = pmap_interrupts_off(); 2217 for (; va < endva; va += PAGE_SIZE) { 2218 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2219 if (pvo == NULL) 2220 continue; 2221 PMAP_PVO_CHECK(pvo); /* sanity check */ 2222 2223 /* 2224 * Revoke executable if asked to do so. 2225 */ 2226 if ((prot & VM_PROT_EXECUTE) == 0) 2227 pvo_clear_exec(pvo); 2228 2229 #if 0 2230 /* 2231 * If the page is already read-only, no change 2232 * needs to be made. 2233 */ 2234 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2235 continue; 2236 #endif 2237 /* 2238 * Grab the PTE pointer before we diddle with 2239 * the cached PTE copy. 2240 */ 2241 pt = pmap_pvo_to_pte(pvo, pteidx); 2242 /* 2243 * Change the protection of the page. 2244 */ 2245 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2246 pvo->pvo_pte.pte_lo |= PTE_BR; 2247 2248 /* 2249 * If the PVO is in the page table, update 2250 * that pte at well. 2251 */ 2252 if (pt != NULL) { 2253 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2254 PVO_WHERE(pvo, PMAP_PROTECT); 2255 PMAPCOUNT(ptes_changed); 2256 } 2257 2258 PMAP_PVO_CHECK(pvo); /* sanity check */ 2259 } 2260 pmap_interrupts_restore(msr); 2261 PMAP_UNLOCK(); 2262 } 2263 2264 void 2265 pmap_unwire(pmap_t pm, vaddr_t va) 2266 { 2267 struct pvo_entry *pvo; 2268 register_t msr; 2269 2270 PMAP_LOCK(); 2271 msr = pmap_interrupts_off(); 2272 pvo = pmap_pvo_find_va(pm, va, NULL); 2273 if (pvo != NULL) { 2274 if (PVO_WIRED_P(pvo)) { 2275 pvo->pvo_vaddr &= ~PVO_WIRED; 2276 pm->pm_stats.wired_count--; 2277 } 2278 PMAP_PVO_CHECK(pvo); /* sanity check */ 2279 } 2280 pmap_interrupts_restore(msr); 2281 PMAP_UNLOCK(); 2282 } 2283 2284 /* 2285 * Lower the protection on the specified physical page. 2286 */ 2287 void 2288 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2289 { 2290 struct pvo_head *pvo_head, pvol; 2291 struct pvo_entry *pvo, *next_pvo; 2292 volatile struct pte *pt; 2293 register_t msr; 2294 2295 PMAP_LOCK(); 2296 2297 KASSERT(prot != VM_PROT_ALL); 2298 LIST_INIT(&pvol); 2299 msr = pmap_interrupts_off(); 2300 2301 /* 2302 * When UVM reuses a page, it does a pmap_page_protect with 2303 * VM_PROT_NONE. At that point, we can clear the exec flag 2304 * since we know the page will have different contents. 2305 */ 2306 if ((prot & VM_PROT_READ) == 0) { 2307 DPRINTFN(EXEC, ("[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2308 VM_PAGE_TO_PHYS(pg))); 2309 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2310 PMAPCOUNT(exec_uncached_page_protect); 2311 pmap_attr_clear(pg, PTE_EXEC); 2312 } 2313 } 2314 2315 pvo_head = vm_page_to_pvoh(pg); 2316 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2317 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2318 PMAP_PVO_CHECK(pvo); /* sanity check */ 2319 2320 /* 2321 * Downgrading to no mapping at all, we just remove the entry. 2322 */ 2323 if ((prot & VM_PROT_READ) == 0) { 2324 pmap_pvo_remove(pvo, -1, &pvol); 2325 continue; 2326 } 2327 2328 /* 2329 * If EXEC permission is being revoked, just clear the 2330 * flag in the PVO. 2331 */ 2332 if ((prot & VM_PROT_EXECUTE) == 0) 2333 pvo_clear_exec(pvo); 2334 2335 /* 2336 * If this entry is already RO, don't diddle with the 2337 * page table. 2338 */ 2339 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2340 PMAP_PVO_CHECK(pvo); 2341 continue; 2342 } 2343 2344 /* 2345 * Grab the PTE before the we diddle the bits so 2346 * pvo_to_pte can verify the pte contents are as 2347 * expected. 2348 */ 2349 pt = pmap_pvo_to_pte(pvo, -1); 2350 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2351 pvo->pvo_pte.pte_lo |= PTE_BR; 2352 if (pt != NULL) { 2353 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2354 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2355 PMAPCOUNT(ptes_changed); 2356 } 2357 PMAP_PVO_CHECK(pvo); /* sanity check */ 2358 } 2359 pmap_interrupts_restore(msr); 2360 pmap_pvo_free_list(&pvol); 2361 2362 PMAP_UNLOCK(); 2363 } 2364 2365 /* 2366 * Activate the address space for the specified process. If the process 2367 * is the current process, load the new MMU context. 2368 */ 2369 void 2370 pmap_activate(struct lwp *l) 2371 { 2372 struct pcb *pcb = lwp_getpcb(l); 2373 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2374 2375 DPRINTFN(ACTIVATE, 2376 ("pmap_activate: lwp %p (curlwp %p)\n", l, curlwp)); 2377 2378 /* 2379 * XXX Normally performed in cpu_lwp_fork(). 2380 */ 2381 pcb->pcb_pm = pmap; 2382 2383 /* 2384 * In theory, the SR registers need only be valid on return 2385 * to user space wait to do them there. 2386 */ 2387 if (l == curlwp) { 2388 /* Store pointer to new current pmap. */ 2389 curpm = pmap; 2390 } 2391 } 2392 2393 /* 2394 * Deactivate the specified process's address space. 2395 */ 2396 void 2397 pmap_deactivate(struct lwp *l) 2398 { 2399 } 2400 2401 bool 2402 pmap_query_bit(struct vm_page *pg, int ptebit) 2403 { 2404 struct pvo_entry *pvo; 2405 volatile struct pte *pt; 2406 register_t msr; 2407 2408 PMAP_LOCK(); 2409 2410 if (pmap_attr_fetch(pg) & ptebit) { 2411 PMAP_UNLOCK(); 2412 return true; 2413 } 2414 2415 msr = pmap_interrupts_off(); 2416 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2417 PMAP_PVO_CHECK(pvo); /* sanity check */ 2418 /* 2419 * See if we saved the bit off. If so cache, it and return 2420 * success. 2421 */ 2422 if (pvo->pvo_pte.pte_lo & ptebit) { 2423 pmap_attr_save(pg, ptebit); 2424 PMAP_PVO_CHECK(pvo); /* sanity check */ 2425 pmap_interrupts_restore(msr); 2426 PMAP_UNLOCK(); 2427 return true; 2428 } 2429 } 2430 /* 2431 * No luck, now go thru the hard part of looking at the ptes 2432 * themselves. Sync so any pending REF/CHG bits are flushed 2433 * to the PTEs. 2434 */ 2435 SYNC(); 2436 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2437 PMAP_PVO_CHECK(pvo); /* sanity check */ 2438 /* 2439 * See if this pvo have a valid PTE. If so, fetch the 2440 * REF/CHG bits from the valid PTE. If the appropriate 2441 * ptebit is set, cache, it and return success. 2442 */ 2443 pt = pmap_pvo_to_pte(pvo, -1); 2444 if (pt != NULL) { 2445 pmap_pte_synch(pt, &pvo->pvo_pte); 2446 if (pvo->pvo_pte.pte_lo & ptebit) { 2447 pmap_attr_save(pg, ptebit); 2448 PMAP_PVO_CHECK(pvo); /* sanity check */ 2449 pmap_interrupts_restore(msr); 2450 PMAP_UNLOCK(); 2451 return true; 2452 } 2453 } 2454 } 2455 pmap_interrupts_restore(msr); 2456 PMAP_UNLOCK(); 2457 return false; 2458 } 2459 2460 bool 2461 pmap_clear_bit(struct vm_page *pg, int ptebit) 2462 { 2463 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2464 struct pvo_entry *pvo; 2465 volatile struct pte *pt; 2466 register_t msr; 2467 int rv = 0; 2468 2469 PMAP_LOCK(); 2470 msr = pmap_interrupts_off(); 2471 2472 /* 2473 * Fetch the cache value 2474 */ 2475 rv |= pmap_attr_fetch(pg); 2476 2477 /* 2478 * Clear the cached value. 2479 */ 2480 pmap_attr_clear(pg, ptebit); 2481 2482 /* 2483 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2484 * can reset the right ones). Note that since the pvo entries and 2485 * list heads are accessed via BAT0 and are never placed in the 2486 * page table, we don't have to worry about further accesses setting 2487 * the REF/CHG bits. 2488 */ 2489 SYNC(); 2490 2491 /* 2492 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2493 * valid PTE. If so, clear the ptebit from the valid PTE. 2494 */ 2495 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2496 PMAP_PVO_CHECK(pvo); /* sanity check */ 2497 pt = pmap_pvo_to_pte(pvo, -1); 2498 if (pt != NULL) { 2499 /* 2500 * Only sync the PTE if the bit we are looking 2501 * for is not already set. 2502 */ 2503 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2504 pmap_pte_synch(pt, &pvo->pvo_pte); 2505 /* 2506 * If the bit we are looking for was already set, 2507 * clear that bit in the pte. 2508 */ 2509 if (pvo->pvo_pte.pte_lo & ptebit) 2510 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2511 } 2512 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2513 pvo->pvo_pte.pte_lo &= ~ptebit; 2514 PMAP_PVO_CHECK(pvo); /* sanity check */ 2515 } 2516 pmap_interrupts_restore(msr); 2517 2518 /* 2519 * If we are clearing the modify bit and this page was marked EXEC 2520 * and the user of the page thinks the page was modified, then we 2521 * need to clean it from the icache if it's mapped or clear the EXEC 2522 * bit if it's not mapped. The page itself might not have the CHG 2523 * bit set if the modification was done via DMA to the page. 2524 */ 2525 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2526 if (LIST_EMPTY(pvoh)) { 2527 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2528 VM_PAGE_TO_PHYS(pg))); 2529 pmap_attr_clear(pg, PTE_EXEC); 2530 PMAPCOUNT(exec_uncached_clear_modify); 2531 } else { 2532 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2533 VM_PAGE_TO_PHYS(pg))); 2534 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2535 PMAPCOUNT(exec_synced_clear_modify); 2536 } 2537 } 2538 PMAP_UNLOCK(); 2539 return (rv & ptebit) != 0; 2540 } 2541 2542 void 2543 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2544 { 2545 struct pvo_entry *pvo; 2546 size_t offset = va & ADDR_POFF; 2547 int s; 2548 2549 PMAP_LOCK(); 2550 s = splvm(); 2551 while (len > 0) { 2552 size_t seglen = PAGE_SIZE - offset; 2553 if (seglen > len) 2554 seglen = len; 2555 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2556 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2557 pmap_syncicache( 2558 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2559 PMAP_PVO_CHECK(pvo); 2560 } 2561 va += seglen; 2562 len -= seglen; 2563 offset = 0; 2564 } 2565 splx(s); 2566 PMAP_UNLOCK(); 2567 } 2568 2569 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2570 void 2571 pmap_pte_print(volatile struct pte *pt) 2572 { 2573 printf("PTE %p: ", pt); 2574 2575 #if defined(PMAP_OEA) 2576 /* High word: */ 2577 printf("%#" _PRIxpte ": [", pt->pte_hi); 2578 #else 2579 printf("%#" _PRIxpte ": [", pt->pte_hi); 2580 #endif /* PMAP_OEA */ 2581 2582 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2583 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2584 2585 printf("%#" _PRIxpte " %#" _PRIxpte "", 2586 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2587 pt->pte_hi & PTE_API); 2588 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2589 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2590 #else 2591 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2592 #endif /* PMAP_OEA */ 2593 2594 /* Low word: */ 2595 #if defined (PMAP_OEA) 2596 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2597 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2598 #else 2599 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2600 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2601 #endif 2602 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2603 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2604 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2605 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2606 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2607 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2608 switch (pt->pte_lo & PTE_PP) { 2609 case PTE_BR: printf("br]\n"); break; 2610 case PTE_BW: printf("bw]\n"); break; 2611 case PTE_SO: printf("so]\n"); break; 2612 case PTE_SW: printf("sw]\n"); break; 2613 } 2614 } 2615 #endif 2616 2617 #if defined(DDB) 2618 void 2619 pmap_pteg_check(void) 2620 { 2621 volatile struct pte *pt; 2622 int i; 2623 int ptegidx; 2624 u_int p_valid = 0; 2625 u_int s_valid = 0; 2626 u_int invalid = 0; 2627 2628 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2629 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2630 if (pt->pte_hi & PTE_VALID) { 2631 if (pt->pte_hi & PTE_HID) 2632 s_valid++; 2633 else 2634 { 2635 p_valid++; 2636 } 2637 } else 2638 invalid++; 2639 } 2640 } 2641 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2642 p_valid, p_valid, s_valid, s_valid, 2643 invalid, invalid); 2644 } 2645 2646 void 2647 pmap_print_mmuregs(void) 2648 { 2649 int i; 2650 u_int cpuvers; 2651 #ifndef PMAP_OEA64 2652 vaddr_t addr; 2653 register_t soft_sr[16]; 2654 #endif 2655 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2656 struct bat soft_ibat[4]; 2657 struct bat soft_dbat[4]; 2658 #endif 2659 paddr_t sdr1; 2660 2661 cpuvers = MFPVR() >> 16; 2662 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2663 #ifndef PMAP_OEA64 2664 addr = 0; 2665 for (i = 0; i < 16; i++) { 2666 soft_sr[i] = MFSRIN(addr); 2667 addr += (1 << ADDR_SR_SHFT); 2668 } 2669 #endif 2670 2671 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2672 /* read iBAT (601: uBAT) registers */ 2673 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2674 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2675 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2676 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2677 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2678 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2679 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2680 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2681 2682 2683 if (cpuvers != MPC601) { 2684 /* read dBAT registers */ 2685 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2686 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2687 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2688 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2689 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2690 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2691 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2692 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2693 } 2694 #endif 2695 2696 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2697 #ifndef PMAP_OEA64 2698 printf("SR[]:\t"); 2699 for (i = 0; i < 4; i++) 2700 printf("0x%08lx, ", soft_sr[i]); 2701 printf("\n\t"); 2702 for ( ; i < 8; i++) 2703 printf("0x%08lx, ", soft_sr[i]); 2704 printf("\n\t"); 2705 for ( ; i < 12; i++) 2706 printf("0x%08lx, ", soft_sr[i]); 2707 printf("\n\t"); 2708 for ( ; i < 16; i++) 2709 printf("0x%08lx, ", soft_sr[i]); 2710 printf("\n"); 2711 #endif 2712 2713 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2714 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2715 for (i = 0; i < 4; i++) { 2716 printf("0x%08lx 0x%08lx, ", 2717 soft_ibat[i].batu, soft_ibat[i].batl); 2718 if (i == 1) 2719 printf("\n\t"); 2720 } 2721 if (cpuvers != MPC601) { 2722 printf("\ndBAT[]:\t"); 2723 for (i = 0; i < 4; i++) { 2724 printf("0x%08lx 0x%08lx, ", 2725 soft_dbat[i].batu, soft_dbat[i].batl); 2726 if (i == 1) 2727 printf("\n\t"); 2728 } 2729 } 2730 printf("\n"); 2731 #endif /* PMAP_OEA... */ 2732 } 2733 2734 void 2735 pmap_print_pte(pmap_t pm, vaddr_t va) 2736 { 2737 struct pvo_entry *pvo; 2738 volatile struct pte *pt; 2739 int pteidx; 2740 2741 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2742 if (pvo != NULL) { 2743 pt = pmap_pvo_to_pte(pvo, pteidx); 2744 if (pt != NULL) { 2745 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2746 va, pt, 2747 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2748 pt->pte_hi, pt->pte_lo); 2749 } else { 2750 printf("No valid PTE found\n"); 2751 } 2752 } else { 2753 printf("Address not in pmap\n"); 2754 } 2755 } 2756 2757 void 2758 pmap_pteg_dist(void) 2759 { 2760 struct pvo_entry *pvo; 2761 int ptegidx; 2762 int depth; 2763 int max_depth = 0; 2764 unsigned int depths[64]; 2765 2766 memset(depths, 0, sizeof(depths)); 2767 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2768 depth = 0; 2769 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2770 depth++; 2771 } 2772 if (depth > max_depth) 2773 max_depth = depth; 2774 if (depth > 63) 2775 depth = 63; 2776 depths[depth]++; 2777 } 2778 2779 for (depth = 0; depth < 64; depth++) { 2780 printf(" [%2d]: %8u", depth, depths[depth]); 2781 if ((depth & 3) == 3) 2782 printf("\n"); 2783 if (depth == max_depth) 2784 break; 2785 } 2786 if ((depth & 3) != 3) 2787 printf("\n"); 2788 printf("Max depth found was %d\n", max_depth); 2789 } 2790 #endif /* DEBUG */ 2791 2792 #if defined(PMAPCHECK) || defined(DEBUG) 2793 void 2794 pmap_pvo_verify(void) 2795 { 2796 int ptegidx; 2797 int s; 2798 2799 s = splvm(); 2800 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2801 struct pvo_entry *pvo; 2802 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2803 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2804 panic("pmap_pvo_verify: invalid pvo %p " 2805 "on list %#x", pvo, ptegidx); 2806 pmap_pvo_check(pvo); 2807 } 2808 } 2809 splx(s); 2810 } 2811 #endif /* PMAPCHECK */ 2812 2813 2814 void * 2815 pmap_pool_ualloc(struct pool *pp, int flags) 2816 { 2817 struct pvo_page *pvop; 2818 2819 if (uvm.page_init_done != true) { 2820 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2821 } 2822 2823 PMAP_LOCK(); 2824 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2825 if (pvop != NULL) { 2826 pmap_upvop_free--; 2827 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2828 PMAP_UNLOCK(); 2829 return pvop; 2830 } 2831 PMAP_UNLOCK(); 2832 return pmap_pool_malloc(pp, flags); 2833 } 2834 2835 void * 2836 pmap_pool_malloc(struct pool *pp, int flags) 2837 { 2838 struct pvo_page *pvop; 2839 struct vm_page *pg; 2840 2841 PMAP_LOCK(); 2842 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2843 if (pvop != NULL) { 2844 pmap_mpvop_free--; 2845 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2846 PMAP_UNLOCK(); 2847 return pvop; 2848 } 2849 PMAP_UNLOCK(); 2850 again: 2851 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2852 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2853 if (__predict_false(pg == NULL)) { 2854 if (flags & PR_WAITOK) { 2855 uvm_wait("plpg"); 2856 goto again; 2857 } else { 2858 return (0); 2859 } 2860 } 2861 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2862 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2863 } 2864 2865 void 2866 pmap_pool_ufree(struct pool *pp, void *va) 2867 { 2868 struct pvo_page *pvop; 2869 #if 0 2870 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2871 pmap_pool_mfree(va, size, tag); 2872 return; 2873 } 2874 #endif 2875 PMAP_LOCK(); 2876 pvop = va; 2877 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2878 pmap_upvop_free++; 2879 if (pmap_upvop_free > pmap_upvop_maxfree) 2880 pmap_upvop_maxfree = pmap_upvop_free; 2881 PMAP_UNLOCK(); 2882 } 2883 2884 void 2885 pmap_pool_mfree(struct pool *pp, void *va) 2886 { 2887 struct pvo_page *pvop; 2888 2889 PMAP_LOCK(); 2890 pvop = va; 2891 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2892 pmap_mpvop_free++; 2893 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2894 pmap_mpvop_maxfree = pmap_mpvop_free; 2895 PMAP_UNLOCK(); 2896 #if 0 2897 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2898 #endif 2899 } 2900 2901 /* 2902 * This routine in bootstraping to steal to-be-managed memory (which will 2903 * then be unmanaged). We use it to grab from the first 256MB for our 2904 * pmap needs and above 256MB for other stuff. 2905 */ 2906 vaddr_t 2907 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2908 { 2909 vsize_t size; 2910 vaddr_t va; 2911 paddr_t pa = 0; 2912 int npgs, bank; 2913 struct vm_physseg *ps; 2914 2915 if (uvm.page_init_done == true) 2916 panic("pmap_steal_memory: called _after_ bootstrap"); 2917 2918 *vstartp = VM_MIN_KERNEL_ADDRESS; 2919 *vendp = VM_MAX_KERNEL_ADDRESS; 2920 2921 size = round_page(vsize); 2922 npgs = atop(size); 2923 2924 /* 2925 * PA 0 will never be among those given to UVM so we can use it 2926 * to indicate we couldn't steal any memory. 2927 */ 2928 for (bank = 0; bank < vm_nphysseg; bank++) { 2929 ps = VM_PHYSMEM_PTR(bank); 2930 if (ps->free_list == VM_FREELIST_FIRST256 && 2931 ps->avail_end - ps->avail_start >= npgs) { 2932 pa = ptoa(ps->avail_start); 2933 break; 2934 } 2935 } 2936 2937 if (pa == 0) 2938 panic("pmap_steal_memory: no approriate memory to steal!"); 2939 2940 ps->avail_start += npgs; 2941 ps->start += npgs; 2942 2943 /* 2944 * If we've used up all the pages in the segment, remove it and 2945 * compact the list. 2946 */ 2947 if (ps->avail_start == ps->end) { 2948 /* 2949 * If this was the last one, then a very bad thing has occurred 2950 */ 2951 if (--vm_nphysseg == 0) 2952 panic("pmap_steal_memory: out of memory!"); 2953 2954 printf("pmap_steal_memory: consumed bank %d\n", bank); 2955 for (; bank < vm_nphysseg; bank++, ps++) { 2956 ps[0] = ps[1]; 2957 } 2958 } 2959 2960 va = (vaddr_t) pa; 2961 memset((void *) va, 0, size); 2962 pmap_pages_stolen += npgs; 2963 #ifdef DEBUG 2964 if (pmapdebug && npgs > 1) { 2965 u_int cnt = 0; 2966 for (bank = 0; bank < vm_nphysseg; bank++) { 2967 ps = VM_PHYSMEM_PTR(bank); 2968 cnt += ps->avail_end - ps->avail_start; 2969 } 2970 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2971 npgs, pmap_pages_stolen, cnt); 2972 } 2973 #endif 2974 2975 return va; 2976 } 2977 2978 /* 2979 * Find a chuck of memory with right size and alignment. 2980 */ 2981 paddr_t 2982 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2983 { 2984 struct mem_region *mp; 2985 paddr_t s, e; 2986 int i, j; 2987 2988 size = round_page(size); 2989 2990 DPRINTFN(BOOT, 2991 ("pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 2992 size, alignment, at_end)); 2993 2994 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2995 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 2996 alignment); 2997 2998 if (at_end) { 2999 if (alignment != PAGE_SIZE) 3000 panic("pmap_boot_find_memory: invalid ending " 3001 "alignment %#" _PRIxpa, alignment); 3002 3003 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 3004 s = mp->start + mp->size - size; 3005 if (s >= mp->start && mp->size >= size) { 3006 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3007 DPRINTFN(BOOT, 3008 ("pmap_boot_find_memory: b-avail[%d] start " 3009 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3010 mp->start, mp->size)); 3011 mp->size -= size; 3012 DPRINTFN(BOOT, 3013 ("pmap_boot_find_memory: a-avail[%d] start " 3014 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3015 mp->start, mp->size)); 3016 return s; 3017 } 3018 } 3019 panic("pmap_boot_find_memory: no available memory"); 3020 } 3021 3022 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3023 s = (mp->start + alignment - 1) & ~(alignment-1); 3024 e = s + size; 3025 3026 /* 3027 * Is the calculated region entirely within the region? 3028 */ 3029 if (s < mp->start || e > mp->start + mp->size) 3030 continue; 3031 3032 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3033 if (s == mp->start) { 3034 /* 3035 * If the block starts at the beginning of region, 3036 * adjust the size & start. (the region may now be 3037 * zero in length) 3038 */ 3039 DPRINTFN(BOOT, 3040 ("pmap_boot_find_memory: b-avail[%d] start " 3041 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3042 mp->start += size; 3043 mp->size -= size; 3044 DPRINTFN(BOOT, 3045 ("pmap_boot_find_memory: a-avail[%d] start " 3046 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3047 } else if (e == mp->start + mp->size) { 3048 /* 3049 * If the block starts at the beginning of region, 3050 * adjust only the size. 3051 */ 3052 DPRINTFN(BOOT, 3053 ("pmap_boot_find_memory: b-avail[%d] start " 3054 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3055 mp->size -= size; 3056 DPRINTFN(BOOT, 3057 ("pmap_boot_find_memory: a-avail[%d] start " 3058 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3059 } else { 3060 /* 3061 * Block is in the middle of the region, so we 3062 * have to split it in two. 3063 */ 3064 for (j = avail_cnt; j > i + 1; j--) { 3065 avail[j] = avail[j-1]; 3066 } 3067 DPRINTFN(BOOT, 3068 ("pmap_boot_find_memory: b-avail[%d] start " 3069 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3070 mp[1].start = e; 3071 mp[1].size = mp[0].start + mp[0].size - e; 3072 mp[0].size = s - mp[0].start; 3073 avail_cnt++; 3074 for (; i < avail_cnt; i++) { 3075 DPRINTFN(BOOT, 3076 ("pmap_boot_find_memory: a-avail[%d] " 3077 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3078 avail[i].start, avail[i].size)); 3079 } 3080 } 3081 KASSERT(s == (uintptr_t) s); 3082 return s; 3083 } 3084 panic("pmap_boot_find_memory: not enough memory for " 3085 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3086 } 3087 3088 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3089 #if defined (PMAP_OEA64_BRIDGE) 3090 int 3091 pmap_setup_segment0_map(int use_large_pages, ...) 3092 { 3093 vaddr_t va; 3094 3095 register_t pte_lo = 0x0; 3096 int ptegidx = 0, i = 0; 3097 struct pte pte; 3098 va_list ap; 3099 3100 /* Coherent + Supervisor RW, no user access */ 3101 pte_lo = PTE_M; 3102 3103 /* XXXSL 3104 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3105 * these have to take priority. 3106 */ 3107 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3108 ptegidx = va_to_pteg(pmap_kernel(), va); 3109 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3110 i = pmap_pte_insert(ptegidx, &pte); 3111 } 3112 3113 va_start(ap, use_large_pages); 3114 while (1) { 3115 paddr_t pa; 3116 size_t size; 3117 3118 va = va_arg(ap, vaddr_t); 3119 3120 if (va == 0) 3121 break; 3122 3123 pa = va_arg(ap, paddr_t); 3124 size = va_arg(ap, size_t); 3125 3126 for (; va < (va + size); va += 0x1000, pa += 0x1000) { 3127 #if 0 3128 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3129 #endif 3130 ptegidx = va_to_pteg(pmap_kernel(), va); 3131 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3132 i = pmap_pte_insert(ptegidx, &pte); 3133 } 3134 } 3135 3136 TLBSYNC(); 3137 SYNC(); 3138 return (0); 3139 } 3140 #endif /* PMAP_OEA64_BRIDGE */ 3141 3142 /* 3143 * This is not part of the defined PMAP interface and is specific to the 3144 * PowerPC architecture. This is called during initppc, before the system 3145 * is really initialized. 3146 */ 3147 void 3148 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3149 { 3150 struct mem_region *mp, tmp; 3151 paddr_t s, e; 3152 psize_t size; 3153 int i, j; 3154 3155 /* 3156 * Get memory. 3157 */ 3158 mem_regions(&mem, &avail); 3159 #if defined(DEBUG) 3160 if (pmapdebug & PMAPDEBUG_BOOT) { 3161 printf("pmap_bootstrap: memory configuration:\n"); 3162 for (mp = mem; mp->size; mp++) { 3163 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3164 mp->start, mp->size); 3165 } 3166 for (mp = avail; mp->size; mp++) { 3167 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3168 mp->start, mp->size); 3169 } 3170 } 3171 #endif 3172 3173 /* 3174 * Find out how much physical memory we have and in how many chunks. 3175 */ 3176 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3177 if (mp->start >= pmap_memlimit) 3178 continue; 3179 if (mp->start + mp->size > pmap_memlimit) { 3180 size = pmap_memlimit - mp->start; 3181 physmem += btoc(size); 3182 } else { 3183 physmem += btoc(mp->size); 3184 } 3185 mem_cnt++; 3186 } 3187 3188 /* 3189 * Count the number of available entries. 3190 */ 3191 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3192 avail_cnt++; 3193 3194 /* 3195 * Page align all regions. 3196 */ 3197 kernelstart = trunc_page(kernelstart); 3198 kernelend = round_page(kernelend); 3199 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3200 s = round_page(mp->start); 3201 mp->size -= (s - mp->start); 3202 mp->size = trunc_page(mp->size); 3203 mp->start = s; 3204 e = mp->start + mp->size; 3205 3206 DPRINTFN(BOOT, 3207 ("pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3208 i, mp->start, mp->size)); 3209 3210 /* 3211 * Don't allow the end to run beyond our artificial limit 3212 */ 3213 if (e > pmap_memlimit) 3214 e = pmap_memlimit; 3215 3216 /* 3217 * Is this region empty or strange? skip it. 3218 */ 3219 if (e <= s) { 3220 mp->start = 0; 3221 mp->size = 0; 3222 continue; 3223 } 3224 3225 /* 3226 * Does this overlap the beginning of kernel? 3227 * Does extend past the end of the kernel? 3228 */ 3229 else if (s < kernelstart && e > kernelstart) { 3230 if (e > kernelend) { 3231 avail[avail_cnt].start = kernelend; 3232 avail[avail_cnt].size = e - kernelend; 3233 avail_cnt++; 3234 } 3235 mp->size = kernelstart - s; 3236 } 3237 /* 3238 * Check whether this region overlaps the end of the kernel. 3239 */ 3240 else if (s < kernelend && e > kernelend) { 3241 mp->start = kernelend; 3242 mp->size = e - kernelend; 3243 } 3244 /* 3245 * Look whether this regions is completely inside the kernel. 3246 * Nuke it if it does. 3247 */ 3248 else if (s >= kernelstart && e <= kernelend) { 3249 mp->start = 0; 3250 mp->size = 0; 3251 } 3252 /* 3253 * If the user imposed a memory limit, enforce it. 3254 */ 3255 else if (s >= pmap_memlimit) { 3256 mp->start = -PAGE_SIZE; /* let's know why */ 3257 mp->size = 0; 3258 } 3259 else { 3260 mp->start = s; 3261 mp->size = e - s; 3262 } 3263 DPRINTFN(BOOT, 3264 ("pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3265 i, mp->start, mp->size)); 3266 } 3267 3268 /* 3269 * Move (and uncount) all the null return to the end. 3270 */ 3271 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3272 if (mp->size == 0) { 3273 tmp = avail[i]; 3274 avail[i] = avail[--avail_cnt]; 3275 avail[avail_cnt] = avail[i]; 3276 } 3277 } 3278 3279 /* 3280 * (Bubble)sort them into ascending order. 3281 */ 3282 for (i = 0; i < avail_cnt; i++) { 3283 for (j = i + 1; j < avail_cnt; j++) { 3284 if (avail[i].start > avail[j].start) { 3285 tmp = avail[i]; 3286 avail[i] = avail[j]; 3287 avail[j] = tmp; 3288 } 3289 } 3290 } 3291 3292 /* 3293 * Make sure they don't overlap. 3294 */ 3295 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3296 if (mp[0].start + mp[0].size > mp[1].start) { 3297 mp[0].size = mp[1].start - mp[0].start; 3298 } 3299 DPRINTFN(BOOT, 3300 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3301 i, mp->start, mp->size)); 3302 } 3303 DPRINTFN(BOOT, 3304 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3305 i, mp->start, mp->size)); 3306 3307 #ifdef PTEGCOUNT 3308 pmap_pteg_cnt = PTEGCOUNT; 3309 #else /* PTEGCOUNT */ 3310 3311 pmap_pteg_cnt = 0x1000; 3312 3313 while (pmap_pteg_cnt < physmem) 3314 pmap_pteg_cnt <<= 1; 3315 3316 pmap_pteg_cnt >>= 1; 3317 #endif /* PTEGCOUNT */ 3318 3319 #ifdef DEBUG 3320 DPRINTFN(BOOT, 3321 ("pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt)); 3322 #endif 3323 3324 /* 3325 * Find suitably aligned memory for PTEG hash table. 3326 */ 3327 size = pmap_pteg_cnt * sizeof(struct pteg); 3328 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3329 3330 #ifdef DEBUG 3331 DPRINTFN(BOOT, 3332 ("PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table)); 3333 #endif 3334 3335 3336 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3337 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3338 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3339 pmap_pteg_table, size); 3340 #endif 3341 3342 memset(__UNVOLATILE(pmap_pteg_table), 0, 3343 pmap_pteg_cnt * sizeof(struct pteg)); 3344 pmap_pteg_mask = pmap_pteg_cnt - 1; 3345 3346 /* 3347 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3348 * with pages. So we just steal them before giving them to UVM. 3349 */ 3350 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3351 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3352 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3353 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3354 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3355 pmap_pvo_table, size); 3356 #endif 3357 3358 for (i = 0; i < pmap_pteg_cnt; i++) 3359 TAILQ_INIT(&pmap_pvo_table[i]); 3360 3361 #ifndef MSGBUFADDR 3362 /* 3363 * Allocate msgbuf in high memory. 3364 */ 3365 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3366 #endif 3367 3368 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3369 paddr_t pfstart = atop(mp->start); 3370 paddr_t pfend = atop(mp->start + mp->size); 3371 if (mp->size == 0) 3372 continue; 3373 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3374 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3375 VM_FREELIST_FIRST256); 3376 } else if (mp->start >= SEGMENT_LENGTH) { 3377 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3378 VM_FREELIST_DEFAULT); 3379 } else { 3380 pfend = atop(SEGMENT_LENGTH); 3381 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3382 VM_FREELIST_FIRST256); 3383 pfstart = atop(SEGMENT_LENGTH); 3384 pfend = atop(mp->start + mp->size); 3385 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3386 VM_FREELIST_DEFAULT); 3387 } 3388 } 3389 3390 /* 3391 * Make sure kernel vsid is allocated as well as VSID 0. 3392 */ 3393 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3394 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3395 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3396 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3397 pmap_vsid_bitmap[0] |= 1; 3398 3399 /* 3400 * Initialize kernel pmap and hardware. 3401 */ 3402 3403 /* PMAP_OEA64_BRIDGE does support these instructions */ 3404 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3405 for (i = 0; i < 16; i++) { 3406 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3407 __asm volatile ("mtsrin %0,%1" 3408 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3409 } 3410 3411 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3412 __asm volatile ("mtsr %0,%1" 3413 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3414 #ifdef KERNEL2_SR 3415 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3416 __asm volatile ("mtsr %0,%1" 3417 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3418 #endif 3419 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3420 #if defined (PMAP_OEA) 3421 for (i = 0; i < 16; i++) { 3422 if (iosrtable[i] & SR601_T) { 3423 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3424 __asm volatile ("mtsrin %0,%1" 3425 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3426 } 3427 } 3428 __asm volatile ("sync; mtsdr1 %0; isync" 3429 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3430 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3431 __asm __volatile ("sync; mtsdr1 %0; isync" 3432 :: "r"((uintptr_t)pmap_pteg_table | (32 - cntlzw(pmap_pteg_mask >> 11)))); 3433 #endif 3434 tlbia(); 3435 3436 #ifdef ALTIVEC 3437 pmap_use_altivec = cpu_altivec; 3438 #endif 3439 3440 #ifdef DEBUG 3441 if (pmapdebug & PMAPDEBUG_BOOT) { 3442 u_int cnt; 3443 int bank; 3444 char pbuf[9]; 3445 for (cnt = 0, bank = 0; bank < vm_nphysseg; bank++) { 3446 cnt += VM_PHYSMEM_PTR(bank)->avail_end - VM_PHYSMEM_PTR(bank)->avail_start; 3447 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3448 bank, 3449 ptoa(VM_PHYSMEM_PTR(bank)->avail_start), 3450 ptoa(VM_PHYSMEM_PTR(bank)->avail_end), 3451 ptoa(VM_PHYSMEM_PTR(bank)->avail_end - VM_PHYSMEM_PTR(bank)->avail_start)); 3452 } 3453 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3454 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3455 pbuf, cnt); 3456 } 3457 #endif 3458 3459 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3460 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3461 &pmap_pool_uallocator, IPL_VM); 3462 3463 pool_setlowat(&pmap_upvo_pool, 252); 3464 3465 pool_init(&pmap_pool, sizeof(struct pmap), 3466 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3467 IPL_NONE); 3468 3469 #if defined(PMAP_NEED_MAPKERNEL) || 1 3470 { 3471 struct pmap *pm = pmap_kernel(); 3472 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3473 extern int etext[], kernel_text[]; 3474 vaddr_t va, va_etext = (paddr_t) etext; 3475 #endif 3476 paddr_t pa, pa_end; 3477 register_t sr; 3478 struct pte pt; 3479 unsigned int ptegidx; 3480 int bank; 3481 3482 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3483 pm->pm_sr[0] = sr; 3484 3485 for (bank = 0; bank < vm_nphysseg; bank++) { 3486 pa_end = ptoa(VM_PHYSMEM_PTR(bank)->avail_end); 3487 pa = ptoa(VM_PHYSMEM_PTR(bank)->avail_start); 3488 for (; pa < pa_end; pa += PAGE_SIZE) { 3489 ptegidx = va_to_pteg(pm, pa); 3490 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3491 pmap_pte_insert(ptegidx, &pt); 3492 } 3493 } 3494 3495 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3496 va = (vaddr_t) kernel_text; 3497 3498 for (pa = kernelstart; va < va_etext; 3499 pa += PAGE_SIZE, va += PAGE_SIZE) { 3500 ptegidx = va_to_pteg(pm, va); 3501 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3502 pmap_pte_insert(ptegidx, &pt); 3503 } 3504 3505 for (; pa < kernelend; 3506 pa += PAGE_SIZE, va += PAGE_SIZE) { 3507 ptegidx = va_to_pteg(pm, va); 3508 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3509 pmap_pte_insert(ptegidx, &pt); 3510 } 3511 3512 for (va = 0, pa = 0; va < kernelstart; 3513 pa += PAGE_SIZE, va += PAGE_SIZE) { 3514 ptegidx = va_to_pteg(pm, va); 3515 if (va < 0x3000) 3516 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3517 else 3518 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3519 pmap_pte_insert(ptegidx, &pt); 3520 } 3521 for (va = kernelend, pa = kernelend; va < SEGMENT_LENGTH; 3522 pa += PAGE_SIZE, va += PAGE_SIZE) { 3523 ptegidx = va_to_pteg(pm, va); 3524 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3525 pmap_pte_insert(ptegidx, &pt); 3526 } 3527 #endif 3528 3529 __asm volatile ("mtsrin %0,%1" 3530 :: "r"(sr), "r"(kernelstart)); 3531 } 3532 #endif 3533 } 3534
Indexes created Thu Sep 25 16:09:42 GMT 2025