pmap.c revision 1.79
1 /* $NetBSD: pmap.c,v 1.79 2011/05/02 01:49:23 matt Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 36 * Copyright (C) 1995, 1996 TooLs GmbH. 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by TooLs GmbH. 50 * 4. The name of TooLs GmbH may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 58 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 59 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 60 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 61 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 62 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.79 2011/05/02 01:49:23 matt Exp $"); 67 68 #define PMAP_NOOPNAMES 69 70 #include "opt_ppcarch.h" 71 #include "opt_altivec.h" 72 #include "opt_multiprocessor.h" 73 #include "opt_pmap.h" 74 75 #include <sys/param.h> 76 #include <sys/malloc.h> 77 #include <sys/proc.h> 78 #include <sys/pool.h> 79 #include <sys/queue.h> 80 #include <sys/device.h> /* for evcnt */ 81 #include <sys/systm.h> 82 #include <sys/atomic.h> 83 84 #include <uvm/uvm.h> 85 86 #include <machine/pcb.h> 87 #include <machine/powerpc.h> 88 #include <powerpc/spr.h> 89 #include <powerpc/bat.h> 90 #include <powerpc/stdarg.h> 91 #include <powerpc/oea/spr.h> 92 #include <powerpc/oea/sr_601.h> 93 94 #ifdef ALTIVEC 95 int pmap_use_altivec; 96 #endif 97 98 volatile struct pteg *pmap_pteg_table; 99 unsigned int pmap_pteg_cnt; 100 unsigned int pmap_pteg_mask; 101 #ifdef PMAP_MEMLIMIT 102 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 103 #else 104 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 105 #endif 106 107 struct pmap kernel_pmap_; 108 unsigned int pmap_pages_stolen; 109 u_long pmap_pte_valid; 110 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 111 u_long pmap_pvo_enter_depth; 112 u_long pmap_pvo_remove_depth; 113 #endif 114 115 #ifndef MSGBUFADDR 116 extern paddr_t msgbuf_paddr; 117 #endif 118 119 static struct mem_region *mem, *avail; 120 static u_int mem_cnt, avail_cnt; 121 122 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 123 # define PMAP_OEA 1 124 #endif 125 126 #if defined(PMAP_OEA) 127 #define _PRIxpte "lx" 128 #else 129 #define _PRIxpte PRIx64 130 #endif 131 #define _PRIxpa "lx" 132 #define _PRIxva "lx" 133 #define _PRIsr "lx" 134 135 #ifdef PMAP_NEEDS_FIXUP 136 #if defined(PMAP_OEA) 137 #define PMAPNAME(name) pmap32_##name 138 #elif defined(PMAP_OEA64) 139 #define PMAPNAME(name) pmap64_##name 140 #elif defined(PMAP_OEA64_BRIDGE) 141 #define PMAPNAME(name) pmap64bridge_##name 142 #else 143 #error unknown variant for pmap 144 #endif 145 #endif /* PMAP_NEEDS_FIXUP */ 146 147 #ifdef PMAPNAME 148 #define STATIC static 149 #define pmap_pte_spill PMAPNAME(pte_spill) 150 #define pmap_real_memory PMAPNAME(real_memory) 151 #define pmap_init PMAPNAME(init) 152 #define pmap_virtual_space PMAPNAME(virtual_space) 153 #define pmap_create PMAPNAME(create) 154 #define pmap_reference PMAPNAME(reference) 155 #define pmap_destroy PMAPNAME(destroy) 156 #define pmap_copy PMAPNAME(copy) 157 #define pmap_update PMAPNAME(update) 158 #define pmap_enter PMAPNAME(enter) 159 #define pmap_remove PMAPNAME(remove) 160 #define pmap_kenter_pa PMAPNAME(kenter_pa) 161 #define pmap_kremove PMAPNAME(kremove) 162 #define pmap_extract PMAPNAME(extract) 163 #define pmap_protect PMAPNAME(protect) 164 #define pmap_unwire PMAPNAME(unwire) 165 #define pmap_page_protect PMAPNAME(page_protect) 166 #define pmap_query_bit PMAPNAME(query_bit) 167 #define pmap_clear_bit PMAPNAME(clear_bit) 168 169 #define pmap_activate PMAPNAME(activate) 170 #define pmap_deactivate PMAPNAME(deactivate) 171 172 #define pmap_pinit PMAPNAME(pinit) 173 #define pmap_procwr PMAPNAME(procwr) 174 175 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 176 #define pmap_pte_print PMAPNAME(pte_print) 177 #define pmap_pteg_check PMAPNAME(pteg_check) 178 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 179 #define pmap_print_pte PMAPNAME(print_pte) 180 #define pmap_pteg_dist PMAPNAME(pteg_dist) 181 #endif 182 #if defined(DEBUG) || defined(PMAPCHECK) 183 #define pmap_pvo_verify PMAPNAME(pvo_verify) 184 #define pmapcheck PMAPNAME(check) 185 #endif 186 #if defined(DEBUG) || defined(PMAPDEBUG) 187 #define pmapdebug PMAPNAME(debug) 188 #endif 189 #define pmap_steal_memory PMAPNAME(steal_memory) 190 #define pmap_bootstrap PMAPNAME(bootstrap) 191 #else 192 #define STATIC /* nothing */ 193 #endif /* PMAPNAME */ 194 195 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 196 STATIC void pmap_real_memory(paddr_t *, psize_t *); 197 STATIC void pmap_init(void); 198 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 199 STATIC pmap_t pmap_create(void); 200 STATIC void pmap_reference(pmap_t); 201 STATIC void pmap_destroy(pmap_t); 202 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 203 STATIC void pmap_update(pmap_t); 204 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); 205 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 206 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t, u_int); 207 STATIC void pmap_kremove(vaddr_t, vsize_t); 208 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 209 210 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 211 STATIC void pmap_unwire(pmap_t, vaddr_t); 212 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 213 STATIC bool pmap_query_bit(struct vm_page *, int); 214 STATIC bool pmap_clear_bit(struct vm_page *, int); 215 216 STATIC void pmap_activate(struct lwp *); 217 STATIC void pmap_deactivate(struct lwp *); 218 219 STATIC void pmap_pinit(pmap_t pm); 220 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 221 222 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 223 STATIC void pmap_pte_print(volatile struct pte *); 224 STATIC void pmap_pteg_check(void); 225 STATIC void pmap_print_mmuregs(void); 226 STATIC void pmap_print_pte(pmap_t, vaddr_t); 227 STATIC void pmap_pteg_dist(void); 228 #endif 229 #if defined(DEBUG) || defined(PMAPCHECK) 230 STATIC void pmap_pvo_verify(void); 231 #endif 232 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 233 STATIC void pmap_bootstrap(paddr_t, paddr_t); 234 235 #ifdef PMAPNAME 236 const struct pmap_ops PMAPNAME(ops) = { 237 .pmapop_pte_spill = pmap_pte_spill, 238 .pmapop_real_memory = pmap_real_memory, 239 .pmapop_init = pmap_init, 240 .pmapop_virtual_space = pmap_virtual_space, 241 .pmapop_create = pmap_create, 242 .pmapop_reference = pmap_reference, 243 .pmapop_destroy = pmap_destroy, 244 .pmapop_copy = pmap_copy, 245 .pmapop_update = pmap_update, 246 .pmapop_enter = pmap_enter, 247 .pmapop_remove = pmap_remove, 248 .pmapop_kenter_pa = pmap_kenter_pa, 249 .pmapop_kremove = pmap_kremove, 250 .pmapop_extract = pmap_extract, 251 .pmapop_protect = pmap_protect, 252 .pmapop_unwire = pmap_unwire, 253 .pmapop_page_protect = pmap_page_protect, 254 .pmapop_query_bit = pmap_query_bit, 255 .pmapop_clear_bit = pmap_clear_bit, 256 .pmapop_activate = pmap_activate, 257 .pmapop_deactivate = pmap_deactivate, 258 .pmapop_pinit = pmap_pinit, 259 .pmapop_procwr = pmap_procwr, 260 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 261 .pmapop_pte_print = pmap_pte_print, 262 .pmapop_pteg_check = pmap_pteg_check, 263 .pmapop_print_mmuregs = pmap_print_mmuregs, 264 .pmapop_print_pte = pmap_print_pte, 265 .pmapop_pteg_dist = pmap_pteg_dist, 266 #else 267 .pmapop_pte_print = NULL, 268 .pmapop_pteg_check = NULL, 269 .pmapop_print_mmuregs = NULL, 270 .pmapop_print_pte = NULL, 271 .pmapop_pteg_dist = NULL, 272 #endif 273 #if defined(DEBUG) || defined(PMAPCHECK) 274 .pmapop_pvo_verify = pmap_pvo_verify, 275 #else 276 .pmapop_pvo_verify = NULL, 277 #endif 278 .pmapop_steal_memory = pmap_steal_memory, 279 .pmapop_bootstrap = pmap_bootstrap, 280 }; 281 #endif /* !PMAPNAME */ 282 283 /* 284 * The following structure is aligned to 32 bytes 285 */ 286 struct pvo_entry { 287 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 288 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 289 struct pte pvo_pte; /* Prebuilt PTE */ 290 pmap_t pvo_pmap; /* ptr to owning pmap */ 291 vaddr_t pvo_vaddr; /* VA of entry */ 292 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 293 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 294 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 295 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 296 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 297 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 298 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 299 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 300 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 301 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 302 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 303 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 304 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 305 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 306 #define PVO_REMOVE 6 /* PVO has been removed */ 307 #define PVO_WHERE_MASK 15 308 #define PVO_WHERE_SHFT 8 309 } __attribute__ ((aligned (32))); 310 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 311 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 312 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 313 #define PVO_PTEGIDX_CLR(pvo) \ 314 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 315 #define PVO_PTEGIDX_SET(pvo,i) \ 316 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 317 #define PVO_WHERE(pvo,w) \ 318 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 319 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 320 321 TAILQ_HEAD(pvo_tqhead, pvo_entry); 322 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 323 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 324 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 325 326 struct pool pmap_pool; /* pool for pmap structures */ 327 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 328 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 329 330 /* 331 * We keep a cache of unmanaged pages to be used for pvo entries for 332 * unmanaged pages. 333 */ 334 struct pvo_page { 335 SIMPLEQ_ENTRY(pvo_page) pvop_link; 336 }; 337 SIMPLEQ_HEAD(pvop_head, pvo_page); 338 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 339 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 340 u_long pmap_upvop_free; 341 u_long pmap_upvop_maxfree; 342 u_long pmap_mpvop_free; 343 u_long pmap_mpvop_maxfree; 344 345 static void *pmap_pool_ualloc(struct pool *, int); 346 static void *pmap_pool_malloc(struct pool *, int); 347 348 static void pmap_pool_ufree(struct pool *, void *); 349 static void pmap_pool_mfree(struct pool *, void *); 350 351 static struct pool_allocator pmap_pool_mallocator = { 352 .pa_alloc = pmap_pool_malloc, 353 .pa_free = pmap_pool_mfree, 354 .pa_pagesz = 0, 355 }; 356 357 static struct pool_allocator pmap_pool_uallocator = { 358 .pa_alloc = pmap_pool_ualloc, 359 .pa_free = pmap_pool_ufree, 360 .pa_pagesz = 0, 361 }; 362 363 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 364 void pmap_pte_print(volatile struct pte *); 365 void pmap_pteg_check(void); 366 void pmap_pteg_dist(void); 367 void pmap_print_pte(pmap_t, vaddr_t); 368 void pmap_print_mmuregs(void); 369 #endif 370 371 #if defined(DEBUG) || defined(PMAPCHECK) 372 #ifdef PMAPCHECK 373 int pmapcheck = 1; 374 #else 375 int pmapcheck = 0; 376 #endif 377 void pmap_pvo_verify(void); 378 static void pmap_pvo_check(const struct pvo_entry *); 379 #define PMAP_PVO_CHECK(pvo) \ 380 do { \ 381 if (pmapcheck) \ 382 pmap_pvo_check(pvo); \ 383 } while (0) 384 #else 385 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 386 #endif 387 static int pmap_pte_insert(int, struct pte *); 388 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 389 vaddr_t, paddr_t, register_t, int); 390 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 391 static void pmap_pvo_free(struct pvo_entry *); 392 static void pmap_pvo_free_list(struct pvo_head *); 393 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 394 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 395 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 396 static void pvo_set_exec(struct pvo_entry *); 397 static void pvo_clear_exec(struct pvo_entry *); 398 399 static void tlbia(void); 400 401 static void pmap_release(pmap_t); 402 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 403 404 static uint32_t pmap_pvo_reclaim_nextidx; 405 #ifdef DEBUG 406 static int pmap_pvo_reclaim_debugctr; 407 #endif 408 409 #define VSID_NBPW (sizeof(uint32_t) * 8) 410 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 411 412 static int pmap_initialized; 413 414 #if defined(DEBUG) || defined(PMAPDEBUG) 415 #define PMAPDEBUG_BOOT 0x0001 416 #define PMAPDEBUG_PTE 0x0002 417 #define PMAPDEBUG_EXEC 0x0008 418 #define PMAPDEBUG_PVOENTER 0x0010 419 #define PMAPDEBUG_PVOREMOVE 0x0020 420 #define PMAPDEBUG_ACTIVATE 0x0100 421 #define PMAPDEBUG_CREATE 0x0200 422 #define PMAPDEBUG_ENTER 0x1000 423 #define PMAPDEBUG_KENTER 0x2000 424 #define PMAPDEBUG_KREMOVE 0x4000 425 #define PMAPDEBUG_REMOVE 0x8000 426 427 unsigned int pmapdebug = 0; 428 429 # define DPRINTF(x) printf x 430 # define DPRINTFN(n, x) if (pmapdebug & PMAPDEBUG_ ## n) printf x 431 #else 432 # define DPRINTF(x) 433 # define DPRINTFN(n, x) 434 #endif 435 436 437 #ifdef PMAPCOUNTERS 438 /* 439 * From pmap_subr.c 440 */ 441 extern struct evcnt pmap_evcnt_mappings; 442 extern struct evcnt pmap_evcnt_unmappings; 443 444 extern struct evcnt pmap_evcnt_kernel_mappings; 445 extern struct evcnt pmap_evcnt_kernel_unmappings; 446 447 extern struct evcnt pmap_evcnt_mappings_replaced; 448 449 extern struct evcnt pmap_evcnt_exec_mappings; 450 extern struct evcnt pmap_evcnt_exec_cached; 451 452 extern struct evcnt pmap_evcnt_exec_synced; 453 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 454 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 455 456 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 457 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 458 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 459 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 460 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 461 462 extern struct evcnt pmap_evcnt_updates; 463 extern struct evcnt pmap_evcnt_collects; 464 extern struct evcnt pmap_evcnt_copies; 465 466 extern struct evcnt pmap_evcnt_ptes_spilled; 467 extern struct evcnt pmap_evcnt_ptes_unspilled; 468 extern struct evcnt pmap_evcnt_ptes_evicted; 469 470 extern struct evcnt pmap_evcnt_ptes_primary[8]; 471 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 472 extern struct evcnt pmap_evcnt_ptes_removed; 473 extern struct evcnt pmap_evcnt_ptes_changed; 474 extern struct evcnt pmap_evcnt_pvos_reclaimed; 475 extern struct evcnt pmap_evcnt_pvos_failed; 476 477 extern struct evcnt pmap_evcnt_zeroed_pages; 478 extern struct evcnt pmap_evcnt_copied_pages; 479 extern struct evcnt pmap_evcnt_idlezeroed_pages; 480 481 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 482 #define PMAPCOUNT2(ev) ((ev).ev_count++) 483 #else 484 #define PMAPCOUNT(ev) ((void) 0) 485 #define PMAPCOUNT2(ev) ((void) 0) 486 #endif 487 488 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 489 490 /* XXXSL: this needs to be moved to assembler */ 491 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 492 493 #define TLBSYNC() __asm volatile("tlbsync") 494 #define SYNC() __asm volatile("sync") 495 #define EIEIO() __asm volatile("eieio") 496 #define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va)) 497 #define MFMSR() mfmsr() 498 #define MTMSR(psl) mtmsr(psl) 499 #define MFPVR() mfpvr() 500 #define MFSRIN(va) mfsrin(va) 501 #define MFTB() mfrtcltbl() 502 503 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 504 static inline register_t 505 mfsrin(vaddr_t va) 506 { 507 register_t sr; 508 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 509 return sr; 510 } 511 #endif /* PMAP_OEA*/ 512 513 #if defined (PMAP_OEA64_BRIDGE) 514 extern void mfmsr64 (register64_t *result); 515 #endif /* PMAP_OEA64_BRIDGE */ 516 517 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 518 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 519 520 static inline register_t 521 pmap_interrupts_off(void) 522 { 523 register_t msr = MFMSR(); 524 if (msr & PSL_EE) 525 MTMSR(msr & ~PSL_EE); 526 return msr; 527 } 528 529 static void 530 pmap_interrupts_restore(register_t msr) 531 { 532 if (msr & PSL_EE) 533 MTMSR(msr); 534 } 535 536 static inline u_int32_t 537 mfrtcltbl(void) 538 { 539 #ifdef PPC_OEA601 540 if ((MFPVR() >> 16) == MPC601) 541 return (mfrtcl() >> 7); 542 else 543 #endif 544 return (mftbl()); 545 } 546 547 /* 548 * These small routines may have to be replaced, 549 * if/when we support processors other that the 604. 550 */ 551 552 void 553 tlbia(void) 554 { 555 char *i; 556 557 SYNC(); 558 #if defined(PMAP_OEA) 559 /* 560 * Why not use "tlbia"? Because not all processors implement it. 561 * 562 * This needs to be a per-CPU callback to do the appropriate thing 563 * for the CPU. XXX 564 */ 565 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 566 TLBIE(i); 567 EIEIO(); 568 SYNC(); 569 } 570 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 571 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 572 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 573 TLBIEL(i); 574 EIEIO(); 575 SYNC(); 576 } 577 #endif 578 TLBSYNC(); 579 SYNC(); 580 } 581 582 static inline register_t 583 va_to_vsid(const struct pmap *pm, vaddr_t addr) 584 { 585 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 586 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 587 #else /* PMAP_OEA64 */ 588 #if 0 589 const struct ste *ste; 590 register_t hash; 591 int i; 592 593 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 594 595 /* 596 * Try the primary group first 597 */ 598 ste = pm->pm_stes[hash].stes; 599 for (i = 0; i < 8; i++, ste++) { 600 if (ste->ste_hi & STE_V) && 601 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 602 return ste; 603 } 604 605 /* 606 * Then the secondary group. 607 */ 608 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 609 for (i = 0; i < 8; i++, ste++) { 610 if (ste->ste_hi & STE_V) && 611 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 612 return addr; 613 } 614 615 return NULL; 616 #else 617 /* 618 * Rather than searching the STE groups for the VSID, we know 619 * how we generate that from the ESID and so do that. 620 */ 621 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 622 #endif 623 #endif /* PMAP_OEA */ 624 } 625 626 static inline register_t 627 va_to_pteg(const struct pmap *pm, vaddr_t addr) 628 { 629 register_t hash; 630 631 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 632 return hash & pmap_pteg_mask; 633 } 634 635 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 636 /* 637 * Given a PTE in the page table, calculate the VADDR that hashes to it. 638 * The only bit of magic is that the top 4 bits of the address doesn't 639 * technically exist in the PTE. But we know we reserved 4 bits of the 640 * VSID for it so that's how we get it. 641 */ 642 static vaddr_t 643 pmap_pte_to_va(volatile const struct pte *pt) 644 { 645 vaddr_t va; 646 uintptr_t ptaddr = (uintptr_t) pt; 647 648 if (pt->pte_hi & PTE_HID) 649 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 650 651 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 652 #if defined(PMAP_OEA) 653 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 654 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 655 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 656 #endif 657 va <<= ADDR_PIDX_SHFT; 658 659 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 660 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 661 662 #if defined(PMAP_OEA64) 663 /* PPC63 Bits 0-35 */ 664 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 665 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 666 /* PPC Bits 0-3 */ 667 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 668 #endif 669 670 return va; 671 } 672 #endif 673 674 static inline struct pvo_head * 675 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 676 { 677 struct vm_page *pg; 678 struct vm_page_md *md; 679 680 pg = PHYS_TO_VM_PAGE(pa); 681 if (pg_p != NULL) 682 *pg_p = pg; 683 if (pg == NULL) 684 return &pmap_pvo_unmanaged; 685 md = VM_PAGE_TO_MD(pg); 686 return &md->mdpg_pvoh; 687 } 688 689 static inline struct pvo_head * 690 vm_page_to_pvoh(struct vm_page *pg) 691 { 692 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 693 694 return &md->mdpg_pvoh; 695 } 696 697 698 static inline void 699 pmap_attr_clear(struct vm_page *pg, int ptebit) 700 { 701 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 702 703 md->mdpg_attrs &= ~ptebit; 704 } 705 706 static inline int 707 pmap_attr_fetch(struct vm_page *pg) 708 { 709 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 710 711 return md->mdpg_attrs; 712 } 713 714 static inline void 715 pmap_attr_save(struct vm_page *pg, int ptebit) 716 { 717 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 718 719 md->mdpg_attrs |= ptebit; 720 } 721 722 static inline int 723 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 724 { 725 if (pt->pte_hi == pvo_pt->pte_hi 726 #if 0 727 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 728 ~(PTE_REF|PTE_CHG)) == 0 729 #endif 730 ) 731 return 1; 732 return 0; 733 } 734 735 static inline void 736 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 737 { 738 /* 739 * Construct the PTE. Default to IMB initially. Valid bit 740 * only gets set when the real pte is set in memory. 741 * 742 * Note: Don't set the valid bit for correct operation of tlb update. 743 */ 744 #if defined(PMAP_OEA) 745 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 746 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 747 pt->pte_lo = pte_lo; 748 #elif defined (PMAP_OEA64_BRIDGE) || defined (PMAP_OEA64) 749 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 750 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 751 pt->pte_lo = (u_int64_t) pte_lo; 752 #endif /* PMAP_OEA */ 753 } 754 755 static inline void 756 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 757 { 758 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 759 } 760 761 static inline void 762 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 763 { 764 /* 765 * As shown in Section 7.6.3.2.3 766 */ 767 pt->pte_lo &= ~ptebit; 768 TLBIE(va); 769 SYNC(); 770 EIEIO(); 771 TLBSYNC(); 772 SYNC(); 773 #ifdef MULTIPROCESSOR 774 DCBST(pt); 775 #endif 776 } 777 778 static inline void 779 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 780 { 781 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 782 if (pvo_pt->pte_hi & PTE_VALID) 783 panic("pte_set: setting an already valid pte %p", pvo_pt); 784 #endif 785 pvo_pt->pte_hi |= PTE_VALID; 786 787 /* 788 * Update the PTE as defined in section 7.6.3.1 789 * Note that the REF/CHG bits are from pvo_pt and thus should 790 * have been saved so this routine can restore them (if desired). 791 */ 792 pt->pte_lo = pvo_pt->pte_lo; 793 EIEIO(); 794 pt->pte_hi = pvo_pt->pte_hi; 795 TLBSYNC(); 796 SYNC(); 797 #ifdef MULTIPROCESSOR 798 DCBST(pt); 799 #endif 800 pmap_pte_valid++; 801 } 802 803 static inline void 804 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 805 { 806 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 807 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 808 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 809 if ((pt->pte_hi & PTE_VALID) == 0) 810 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 811 #endif 812 813 pvo_pt->pte_hi &= ~PTE_VALID; 814 /* 815 * Force the ref & chg bits back into the PTEs. 816 */ 817 SYNC(); 818 /* 819 * Invalidate the pte ... (Section 7.6.3.3) 820 */ 821 pt->pte_hi &= ~PTE_VALID; 822 SYNC(); 823 TLBIE(va); 824 SYNC(); 825 EIEIO(); 826 TLBSYNC(); 827 SYNC(); 828 /* 829 * Save the ref & chg bits ... 830 */ 831 pmap_pte_synch(pt, pvo_pt); 832 pmap_pte_valid--; 833 } 834 835 static inline void 836 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 837 { 838 /* 839 * Invalidate the PTE 840 */ 841 pmap_pte_unset(pt, pvo_pt, va); 842 pmap_pte_set(pt, pvo_pt); 843 } 844 845 /* 846 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 847 * (either primary or secondary location). 848 * 849 * Note: both the destination and source PTEs must not have PTE_VALID set. 850 */ 851 852 static int 853 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 854 { 855 volatile struct pte *pt; 856 int i; 857 858 #if defined(DEBUG) 859 DPRINTFN(PTE, ("pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 860 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo)); 861 #endif 862 /* 863 * First try primary hash. 864 */ 865 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 866 if ((pt->pte_hi & PTE_VALID) == 0) { 867 pvo_pt->pte_hi &= ~PTE_HID; 868 pmap_pte_set(pt, pvo_pt); 869 return i; 870 } 871 } 872 873 /* 874 * Now try secondary hash. 875 */ 876 ptegidx ^= pmap_pteg_mask; 877 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 878 if ((pt->pte_hi & PTE_VALID) == 0) { 879 pvo_pt->pte_hi |= PTE_HID; 880 pmap_pte_set(pt, pvo_pt); 881 return i; 882 } 883 } 884 return -1; 885 } 886 887 /* 888 * Spill handler. 889 * 890 * Tries to spill a page table entry from the overflow area. 891 * This runs in either real mode (if dealing with a exception spill) 892 * or virtual mode when dealing with manually spilling one of the 893 * kernel's pte entries. In either case, interrupts are already 894 * disabled. 895 */ 896 897 int 898 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 899 { 900 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 901 struct pvo_entry *pvo; 902 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 903 struct pvo_tqhead *pvoh, *vpvoh = NULL; 904 int ptegidx, i, j; 905 volatile struct pteg *pteg; 906 volatile struct pte *pt; 907 908 PMAP_LOCK(); 909 910 ptegidx = va_to_pteg(pm, addr); 911 912 /* 913 * Have to substitute some entry. Use the primary hash for this. 914 * Use low bits of timebase as random generator. Make sure we are 915 * not picking a kernel pte for replacement. 916 */ 917 pteg = &pmap_pteg_table[ptegidx]; 918 i = MFTB() & 7; 919 for (j = 0; j < 8; j++) { 920 pt = &pteg->pt[i]; 921 if ((pt->pte_hi & PTE_VALID) == 0) 922 break; 923 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 924 < PHYSMAP_VSIDBITS) 925 break; 926 i = (i + 1) & 7; 927 } 928 KASSERT(j < 8); 929 930 source_pvo = NULL; 931 victim_pvo = NULL; 932 pvoh = &pmap_pvo_table[ptegidx]; 933 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 934 935 /* 936 * We need to find pvo entry for this address... 937 */ 938 PMAP_PVO_CHECK(pvo); /* sanity check */ 939 940 /* 941 * If we haven't found the source and we come to a PVO with 942 * a valid PTE, then we know we can't find it because all 943 * evicted PVOs always are first in the list. 944 */ 945 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 946 break; 947 if (source_pvo == NULL && pm == pvo->pvo_pmap && 948 addr == PVO_VADDR(pvo)) { 949 950 /* 951 * Now we have found the entry to be spilled into the 952 * pteg. Attempt to insert it into the page table. 953 */ 954 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 955 if (j >= 0) { 956 PVO_PTEGIDX_SET(pvo, j); 957 PMAP_PVO_CHECK(pvo); /* sanity check */ 958 PVO_WHERE(pvo, SPILL_INSERT); 959 pvo->pvo_pmap->pm_evictions--; 960 PMAPCOUNT(ptes_spilled); 961 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 962 ? pmap_evcnt_ptes_secondary 963 : pmap_evcnt_ptes_primary)[j]); 964 965 /* 966 * Since we keep the evicted entries at the 967 * from of the PVO list, we need move this 968 * (now resident) PVO after the evicted 969 * entries. 970 */ 971 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 972 973 /* 974 * If we don't have to move (either we were the 975 * last entry or the next entry was valid), 976 * don't change our position. Otherwise 977 * move ourselves to the tail of the queue. 978 */ 979 if (next_pvo != NULL && 980 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 981 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 982 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 983 } 984 PMAP_UNLOCK(); 985 return 1; 986 } 987 source_pvo = pvo; 988 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 989 return 0; 990 } 991 if (victim_pvo != NULL) 992 break; 993 } 994 995 /* 996 * We also need the pvo entry of the victim we are replacing 997 * so save the R & C bits of the PTE. 998 */ 999 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1000 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1001 vpvoh = pvoh; /* *1* */ 1002 victim_pvo = pvo; 1003 if (source_pvo != NULL) 1004 break; 1005 } 1006 } 1007 1008 if (source_pvo == NULL) { 1009 PMAPCOUNT(ptes_unspilled); 1010 PMAP_UNLOCK(); 1011 return 0; 1012 } 1013 1014 if (victim_pvo == NULL) { 1015 if ((pt->pte_hi & PTE_HID) == 0) 1016 panic("pmap_pte_spill: victim p-pte (%p) has " 1017 "no pvo entry!", pt); 1018 1019 /* 1020 * If this is a secondary PTE, we need to search 1021 * its primary pvo bucket for the matching PVO. 1022 */ 1023 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1024 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1025 PMAP_PVO_CHECK(pvo); /* sanity check */ 1026 1027 /* 1028 * We also need the pvo entry of the victim we are 1029 * replacing so save the R & C bits of the PTE. 1030 */ 1031 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1032 victim_pvo = pvo; 1033 break; 1034 } 1035 } 1036 if (victim_pvo == NULL) 1037 panic("pmap_pte_spill: victim s-pte (%p) has " 1038 "no pvo entry!", pt); 1039 } 1040 1041 /* 1042 * The victim should be not be a kernel PVO/PTE entry. 1043 */ 1044 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1045 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1046 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1047 1048 /* 1049 * We are invalidating the TLB entry for the EA for the 1050 * we are replacing even though its valid; If we don't 1051 * we lose any ref/chg bit changes contained in the TLB 1052 * entry. 1053 */ 1054 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1055 1056 /* 1057 * To enforce the PVO list ordering constraint that all 1058 * evicted entries should come before all valid entries, 1059 * move the source PVO to the tail of its list and the 1060 * victim PVO to the head of its list (which might not be 1061 * the same list, if the victim was using the secondary hash). 1062 */ 1063 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1064 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1065 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1066 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1067 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1068 pmap_pte_set(pt, &source_pvo->pvo_pte); 1069 victim_pvo->pvo_pmap->pm_evictions++; 1070 source_pvo->pvo_pmap->pm_evictions--; 1071 PVO_WHERE(victim_pvo, SPILL_UNSET); 1072 PVO_WHERE(source_pvo, SPILL_SET); 1073 1074 PVO_PTEGIDX_CLR(victim_pvo); 1075 PVO_PTEGIDX_SET(source_pvo, i); 1076 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1077 PMAPCOUNT(ptes_spilled); 1078 PMAPCOUNT(ptes_evicted); 1079 PMAPCOUNT(ptes_removed); 1080 1081 PMAP_PVO_CHECK(victim_pvo); 1082 PMAP_PVO_CHECK(source_pvo); 1083 1084 PMAP_UNLOCK(); 1085 return 1; 1086 } 1087 1088 /* 1089 * Restrict given range to physical memory 1090 */ 1091 void 1092 pmap_real_memory(paddr_t *start, psize_t *size) 1093 { 1094 struct mem_region *mp; 1095 1096 for (mp = mem; mp->size; mp++) { 1097 if (*start + *size > mp->start 1098 && *start < mp->start + mp->size) { 1099 if (*start < mp->start) { 1100 *size -= mp->start - *start; 1101 *start = mp->start; 1102 } 1103 if (*start + *size > mp->start + mp->size) 1104 *size = mp->start + mp->size - *start; 1105 return; 1106 } 1107 } 1108 *size = 0; 1109 } 1110 1111 /* 1112 * Initialize anything else for pmap handling. 1113 * Called during vm_init(). 1114 */ 1115 void 1116 pmap_init(void) 1117 { 1118 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1119 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1120 &pmap_pool_mallocator, IPL_NONE); 1121 1122 pool_setlowat(&pmap_mpvo_pool, 1008); 1123 1124 pmap_initialized = 1; 1125 1126 } 1127 1128 /* 1129 * How much virtual space does the kernel get? 1130 */ 1131 void 1132 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1133 { 1134 /* 1135 * For now, reserve one segment (minus some overhead) for kernel 1136 * virtual memory 1137 */ 1138 *start = VM_MIN_KERNEL_ADDRESS; 1139 *end = VM_MAX_KERNEL_ADDRESS; 1140 } 1141 1142 /* 1143 * Allocate, initialize, and return a new physical map. 1144 */ 1145 pmap_t 1146 pmap_create(void) 1147 { 1148 pmap_t pm; 1149 1150 pm = pool_get(&pmap_pool, PR_WAITOK); 1151 memset((void *)pm, 0, sizeof *pm); 1152 pmap_pinit(pm); 1153 1154 DPRINTFN(CREATE,("pmap_create: pm %p:\n" 1155 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1156 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1157 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1158 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1159 pm, 1160 pm->pm_sr[0], pm->pm_sr[1], 1161 pm->pm_sr[2], pm->pm_sr[3], 1162 pm->pm_sr[4], pm->pm_sr[5], 1163 pm->pm_sr[6], pm->pm_sr[7], 1164 pm->pm_sr[8], pm->pm_sr[9], 1165 pm->pm_sr[10], pm->pm_sr[11], 1166 pm->pm_sr[12], pm->pm_sr[13], 1167 pm->pm_sr[14], pm->pm_sr[15])); 1168 return pm; 1169 } 1170 1171 /* 1172 * Initialize a preallocated and zeroed pmap structure. 1173 */ 1174 void 1175 pmap_pinit(pmap_t pm) 1176 { 1177 register_t entropy = MFTB(); 1178 register_t mask; 1179 int i; 1180 1181 /* 1182 * Allocate some segment registers for this pmap. 1183 */ 1184 pm->pm_refs = 1; 1185 PMAP_LOCK(); 1186 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1187 static register_t pmap_vsidcontext; 1188 register_t hash; 1189 unsigned int n; 1190 1191 /* Create a new value by multiplying by a prime adding in 1192 * entropy from the timebase register. This is to make the 1193 * VSID more random so that the PT Hash function collides 1194 * less often. (note that the prime causes gcc to do shifts 1195 * instead of a multiply) 1196 */ 1197 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1198 hash = pmap_vsidcontext & (NPMAPS - 1); 1199 if (hash == 0) { /* 0 is special, avoid it */ 1200 entropy += 0xbadf00d; 1201 continue; 1202 } 1203 n = hash >> 5; 1204 mask = 1L << (hash & (VSID_NBPW-1)); 1205 hash = pmap_vsidcontext; 1206 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1207 /* anything free in this bucket? */ 1208 if (~pmap_vsid_bitmap[n] == 0) { 1209 entropy = hash ^ (hash >> 16); 1210 continue; 1211 } 1212 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1213 mask = 1L << i; 1214 hash &= ~(VSID_NBPW-1); 1215 hash |= i; 1216 } 1217 hash &= PTE_VSID >> PTE_VSID_SHFT; 1218 pmap_vsid_bitmap[n] |= mask; 1219 pm->pm_vsid = hash; 1220 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1221 for (i = 0; i < 16; i++) 1222 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1223 SR_NOEXEC; 1224 #endif 1225 PMAP_UNLOCK(); 1226 return; 1227 } 1228 PMAP_UNLOCK(); 1229 panic("pmap_pinit: out of segments"); 1230 } 1231 1232 /* 1233 * Add a reference to the given pmap. 1234 */ 1235 void 1236 pmap_reference(pmap_t pm) 1237 { 1238 atomic_inc_uint(&pm->pm_refs); 1239 } 1240 1241 /* 1242 * Retire the given pmap from service. 1243 * Should only be called if the map contains no valid mappings. 1244 */ 1245 void 1246 pmap_destroy(pmap_t pm) 1247 { 1248 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1249 pmap_release(pm); 1250 pool_put(&pmap_pool, pm); 1251 } 1252 } 1253 1254 /* 1255 * Release any resources held by the given physical map. 1256 * Called when a pmap initialized by pmap_pinit is being released. 1257 */ 1258 void 1259 pmap_release(pmap_t pm) 1260 { 1261 int idx, mask; 1262 1263 KASSERT(pm->pm_stats.resident_count == 0); 1264 KASSERT(pm->pm_stats.wired_count == 0); 1265 1266 PMAP_LOCK(); 1267 if (pm->pm_sr[0] == 0) 1268 panic("pmap_release"); 1269 idx = pm->pm_vsid & (NPMAPS-1); 1270 mask = 1 << (idx % VSID_NBPW); 1271 idx /= VSID_NBPW; 1272 1273 KASSERT(pmap_vsid_bitmap[idx] & mask); 1274 pmap_vsid_bitmap[idx] &= ~mask; 1275 PMAP_UNLOCK(); 1276 } 1277 1278 /* 1279 * Copy the range specified by src_addr/len 1280 * from the source map to the range dst_addr/len 1281 * in the destination map. 1282 * 1283 * This routine is only advisory and need not do anything. 1284 */ 1285 void 1286 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1287 vsize_t len, vaddr_t src_addr) 1288 { 1289 PMAPCOUNT(copies); 1290 } 1291 1292 /* 1293 * Require that all active physical maps contain no 1294 * incorrect entries NOW. 1295 */ 1296 void 1297 pmap_update(struct pmap *pmap) 1298 { 1299 PMAPCOUNT(updates); 1300 TLBSYNC(); 1301 } 1302 1303 static inline int 1304 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1305 { 1306 int pteidx; 1307 /* 1308 * We can find the actual pte entry without searching by 1309 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1310 * and by noticing the HID bit. 1311 */ 1312 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1313 if (pvo->pvo_pte.pte_hi & PTE_HID) 1314 pteidx ^= pmap_pteg_mask * 8; 1315 return pteidx; 1316 } 1317 1318 volatile struct pte * 1319 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1320 { 1321 volatile struct pte *pt; 1322 1323 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1324 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1325 return NULL; 1326 #endif 1327 1328 /* 1329 * If we haven't been supplied the ptegidx, calculate it. 1330 */ 1331 if (pteidx == -1) { 1332 int ptegidx; 1333 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1334 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1335 } 1336 1337 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1338 1339 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1340 return pt; 1341 #else 1342 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1343 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1344 "pvo but no valid pte index", pvo); 1345 } 1346 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1347 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1348 "pvo but no valid pte", pvo); 1349 } 1350 1351 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1352 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1353 #if defined(DEBUG) || defined(PMAPCHECK) 1354 pmap_pte_print(pt); 1355 #endif 1356 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1357 "pmap_pteg_table %p but invalid in pvo", 1358 pvo, pt); 1359 } 1360 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1361 #if defined(DEBUG) || defined(PMAPCHECK) 1362 pmap_pte_print(pt); 1363 #endif 1364 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1365 "not match pte %p in pmap_pteg_table", 1366 pvo, pt); 1367 } 1368 return pt; 1369 } 1370 1371 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1372 #if defined(DEBUG) || defined(PMAPCHECK) 1373 pmap_pte_print(pt); 1374 #endif 1375 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1376 "pmap_pteg_table but valid in pvo", pvo, pt); 1377 } 1378 return NULL; 1379 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1380 } 1381 1382 struct pvo_entry * 1383 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1384 { 1385 struct pvo_entry *pvo; 1386 int ptegidx; 1387 1388 va &= ~ADDR_POFF; 1389 ptegidx = va_to_pteg(pm, va); 1390 1391 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1392 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1393 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1394 panic("pmap_pvo_find_va: invalid pvo %p on " 1395 "list %#x (%p)", pvo, ptegidx, 1396 &pmap_pvo_table[ptegidx]); 1397 #endif 1398 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1399 if (pteidx_p) 1400 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1401 return pvo; 1402 } 1403 } 1404 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1405 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1406 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1407 return NULL; 1408 } 1409 1410 #if defined(DEBUG) || defined(PMAPCHECK) 1411 void 1412 pmap_pvo_check(const struct pvo_entry *pvo) 1413 { 1414 struct pvo_head *pvo_head; 1415 struct pvo_entry *pvo0; 1416 volatile struct pte *pt; 1417 int failed = 0; 1418 1419 PMAP_LOCK(); 1420 1421 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1422 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1423 1424 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1425 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1426 pvo, pvo->pvo_pmap); 1427 failed = 1; 1428 } 1429 1430 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1431 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1432 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1433 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1434 failed = 1; 1435 } 1436 1437 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1438 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1439 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1440 pvo, LIST_NEXT(pvo, pvo_vlink)); 1441 failed = 1; 1442 } 1443 1444 if (PVO_MANAGED_P(pvo)) { 1445 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1446 } else { 1447 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1448 printf("pmap_pvo_check: pvo %p: non kernel address " 1449 "on kernel unmanaged list\n", pvo); 1450 failed = 1; 1451 } 1452 pvo_head = &pmap_pvo_kunmanaged; 1453 } 1454 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1455 if (pvo0 == pvo) 1456 break; 1457 } 1458 if (pvo0 == NULL) { 1459 printf("pmap_pvo_check: pvo %p: not present " 1460 "on its vlist head %p\n", pvo, pvo_head); 1461 failed = 1; 1462 } 1463 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1464 printf("pmap_pvo_check: pvo %p: not present " 1465 "on its olist head\n", pvo); 1466 failed = 1; 1467 } 1468 pt = pmap_pvo_to_pte(pvo, -1); 1469 if (pt == NULL) { 1470 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1471 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1472 "no PTE\n", pvo); 1473 failed = 1; 1474 } 1475 } else { 1476 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1477 (uintptr_t) pt >= 1478 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1479 printf("pmap_pvo_check: pvo %p: pte %p not in " 1480 "pteg table\n", pvo, pt); 1481 failed = 1; 1482 } 1483 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1484 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1485 "no PTE\n", pvo); 1486 failed = 1; 1487 } 1488 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1489 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1490 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1491 pvo->pvo_pte.pte_hi, 1492 pt->pte_hi); 1493 failed = 1; 1494 } 1495 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1496 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1497 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1498 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1499 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1500 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1501 failed = 1; 1502 } 1503 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1504 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1505 " doesn't not match PVO's VA %#" _PRIxva "\n", 1506 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1507 failed = 1; 1508 } 1509 if (failed) 1510 pmap_pte_print(pt); 1511 } 1512 if (failed) 1513 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1514 pvo->pvo_pmap); 1515 1516 PMAP_UNLOCK(); 1517 } 1518 #endif /* DEBUG || PMAPCHECK */ 1519 1520 /* 1521 * Search the PVO table looking for a non-wired entry. 1522 * If we find one, remove it and return it. 1523 */ 1524 1525 struct pvo_entry * 1526 pmap_pvo_reclaim(struct pmap *pm) 1527 { 1528 struct pvo_tqhead *pvoh; 1529 struct pvo_entry *pvo; 1530 uint32_t idx, endidx; 1531 1532 endidx = pmap_pvo_reclaim_nextidx; 1533 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1534 idx = (idx + 1) & pmap_pteg_mask) { 1535 pvoh = &pmap_pvo_table[idx]; 1536 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1537 if (!PVO_WIRED_P(pvo)) { 1538 pmap_pvo_remove(pvo, -1, NULL); 1539 pmap_pvo_reclaim_nextidx = idx; 1540 PMAPCOUNT(pvos_reclaimed); 1541 return pvo; 1542 } 1543 } 1544 } 1545 return NULL; 1546 } 1547 1548 /* 1549 * This returns whether this is the first mapping of a page. 1550 */ 1551 int 1552 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1553 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1554 { 1555 struct pvo_entry *pvo; 1556 struct pvo_tqhead *pvoh; 1557 register_t msr; 1558 int ptegidx; 1559 int i; 1560 int poolflags = PR_NOWAIT; 1561 1562 /* 1563 * Compute the PTE Group index. 1564 */ 1565 va &= ~ADDR_POFF; 1566 ptegidx = va_to_pteg(pm, va); 1567 1568 msr = pmap_interrupts_off(); 1569 1570 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1571 if (pmap_pvo_remove_depth > 0) 1572 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1573 if (++pmap_pvo_enter_depth > 1) 1574 panic("pmap_pvo_enter: called recursively!"); 1575 #endif 1576 1577 /* 1578 * Remove any existing mapping for this page. Reuse the 1579 * pvo entry if there a mapping. 1580 */ 1581 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1582 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1583 #ifdef DEBUG 1584 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1585 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1586 ~(PTE_REF|PTE_CHG)) == 0 && 1587 va < VM_MIN_KERNEL_ADDRESS) { 1588 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n", 1589 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1590 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n", 1591 pvo->pvo_pte.pte_hi, 1592 pm->pm_sr[va >> ADDR_SR_SHFT]); 1593 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1594 #ifdef DDBX 1595 Debugger(); 1596 #endif 1597 } 1598 #endif 1599 PMAPCOUNT(mappings_replaced); 1600 pmap_pvo_remove(pvo, -1, NULL); 1601 break; 1602 } 1603 } 1604 1605 /* 1606 * If we aren't overwriting an mapping, try to allocate 1607 */ 1608 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1609 --pmap_pvo_enter_depth; 1610 #endif 1611 pmap_interrupts_restore(msr); 1612 if (pvo) { 1613 pmap_pvo_free(pvo); 1614 } 1615 pvo = pool_get(pl, poolflags); 1616 1617 #ifdef DEBUG 1618 /* 1619 * Exercise pmap_pvo_reclaim() a little. 1620 */ 1621 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1622 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1623 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1624 pool_put(pl, pvo); 1625 pvo = NULL; 1626 } 1627 #endif 1628 1629 msr = pmap_interrupts_off(); 1630 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1631 ++pmap_pvo_enter_depth; 1632 #endif 1633 if (pvo == NULL) { 1634 pvo = pmap_pvo_reclaim(pm); 1635 if (pvo == NULL) { 1636 if ((flags & PMAP_CANFAIL) == 0) 1637 panic("pmap_pvo_enter: failed"); 1638 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1639 pmap_pvo_enter_depth--; 1640 #endif 1641 PMAPCOUNT(pvos_failed); 1642 pmap_interrupts_restore(msr); 1643 return ENOMEM; 1644 } 1645 } 1646 1647 pvo->pvo_vaddr = va; 1648 pvo->pvo_pmap = pm; 1649 pvo->pvo_vaddr &= ~ADDR_POFF; 1650 if (flags & VM_PROT_EXECUTE) { 1651 PMAPCOUNT(exec_mappings); 1652 pvo_set_exec(pvo); 1653 } 1654 if (flags & PMAP_WIRED) 1655 pvo->pvo_vaddr |= PVO_WIRED; 1656 if (pvo_head != &pmap_pvo_kunmanaged) { 1657 pvo->pvo_vaddr |= PVO_MANAGED; 1658 PMAPCOUNT(mappings); 1659 } else { 1660 PMAPCOUNT(kernel_mappings); 1661 } 1662 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1663 1664 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1665 if (PVO_WIRED_P(pvo)) 1666 pvo->pvo_pmap->pm_stats.wired_count++; 1667 pvo->pvo_pmap->pm_stats.resident_count++; 1668 #if defined(DEBUG) 1669 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1670 DPRINTFN(PVOENTER, 1671 ("pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1672 pvo, pm, va, pa)); 1673 #endif 1674 1675 /* 1676 * We hope this succeeds but it isn't required. 1677 */ 1678 pvoh = &pmap_pvo_table[ptegidx]; 1679 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1680 if (i >= 0) { 1681 PVO_PTEGIDX_SET(pvo, i); 1682 PVO_WHERE(pvo, ENTER_INSERT); 1683 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1684 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1685 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1686 1687 } else { 1688 /* 1689 * Since we didn't have room for this entry (which makes it 1690 * and evicted entry), place it at the head of the list. 1691 */ 1692 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1693 PMAPCOUNT(ptes_evicted); 1694 pm->pm_evictions++; 1695 /* 1696 * If this is a kernel page, make sure it's active. 1697 */ 1698 if (pm == pmap_kernel()) { 1699 i = pmap_pte_spill(pm, va, false); 1700 KASSERT(i); 1701 } 1702 } 1703 PMAP_PVO_CHECK(pvo); /* sanity check */ 1704 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1705 pmap_pvo_enter_depth--; 1706 #endif 1707 pmap_interrupts_restore(msr); 1708 return 0; 1709 } 1710 1711 static void 1712 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1713 { 1714 volatile struct pte *pt; 1715 int ptegidx; 1716 1717 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1718 if (++pmap_pvo_remove_depth > 1) 1719 panic("pmap_pvo_remove: called recursively!"); 1720 #endif 1721 1722 /* 1723 * If we haven't been supplied the ptegidx, calculate it. 1724 */ 1725 if (pteidx == -1) { 1726 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1727 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1728 } else { 1729 ptegidx = pteidx >> 3; 1730 if (pvo->pvo_pte.pte_hi & PTE_HID) 1731 ptegidx ^= pmap_pteg_mask; 1732 } 1733 PMAP_PVO_CHECK(pvo); /* sanity check */ 1734 1735 /* 1736 * If there is an active pte entry, we need to deactivate it 1737 * (and save the ref & chg bits). 1738 */ 1739 pt = pmap_pvo_to_pte(pvo, pteidx); 1740 if (pt != NULL) { 1741 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1742 PVO_WHERE(pvo, REMOVE); 1743 PVO_PTEGIDX_CLR(pvo); 1744 PMAPCOUNT(ptes_removed); 1745 } else { 1746 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1747 pvo->pvo_pmap->pm_evictions--; 1748 } 1749 1750 /* 1751 * Account for executable mappings. 1752 */ 1753 if (PVO_EXECUTABLE_P(pvo)) 1754 pvo_clear_exec(pvo); 1755 1756 /* 1757 * Update our statistics. 1758 */ 1759 pvo->pvo_pmap->pm_stats.resident_count--; 1760 if (PVO_WIRED_P(pvo)) 1761 pvo->pvo_pmap->pm_stats.wired_count--; 1762 1763 /* 1764 * Save the REF/CHG bits into their cache if the page is managed. 1765 */ 1766 if (PVO_MANAGED_P(pvo)) { 1767 register_t ptelo = pvo->pvo_pte.pte_lo; 1768 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1769 1770 if (pg != NULL) { 1771 /* 1772 * If this page was changed and it is mapped exec, 1773 * invalidate it. 1774 */ 1775 if ((ptelo & PTE_CHG) && 1776 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1777 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1778 if (LIST_EMPTY(pvoh)) { 1779 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1780 "%#" _PRIxpa ": clear-exec]\n", 1781 VM_PAGE_TO_PHYS(pg))); 1782 pmap_attr_clear(pg, PTE_EXEC); 1783 PMAPCOUNT(exec_uncached_pvo_remove); 1784 } else { 1785 DPRINTFN(EXEC, ("[pmap_pvo_remove: " 1786 "%#" _PRIxpa ": syncicache]\n", 1787 VM_PAGE_TO_PHYS(pg))); 1788 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1789 PAGE_SIZE); 1790 PMAPCOUNT(exec_synced_pvo_remove); 1791 } 1792 } 1793 1794 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1795 } 1796 PMAPCOUNT(unmappings); 1797 } else { 1798 PMAPCOUNT(kernel_unmappings); 1799 } 1800 1801 /* 1802 * Remove the PVO from its lists and return it to the pool. 1803 */ 1804 LIST_REMOVE(pvo, pvo_vlink); 1805 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1806 if (pvol) { 1807 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1808 } 1809 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1810 pmap_pvo_remove_depth--; 1811 #endif 1812 } 1813 1814 void 1815 pmap_pvo_free(struct pvo_entry *pvo) 1816 { 1817 1818 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1819 } 1820 1821 void 1822 pmap_pvo_free_list(struct pvo_head *pvol) 1823 { 1824 struct pvo_entry *pvo, *npvo; 1825 1826 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1827 npvo = LIST_NEXT(pvo, pvo_vlink); 1828 LIST_REMOVE(pvo, pvo_vlink); 1829 pmap_pvo_free(pvo); 1830 } 1831 } 1832 1833 /* 1834 * Mark a mapping as executable. 1835 * If this is the first executable mapping in the segment, 1836 * clear the noexec flag. 1837 */ 1838 static void 1839 pvo_set_exec(struct pvo_entry *pvo) 1840 { 1841 struct pmap *pm = pvo->pvo_pmap; 1842 1843 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1844 return; 1845 } 1846 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1847 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1848 { 1849 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1850 if (pm->pm_exec[sr]++ == 0) { 1851 pm->pm_sr[sr] &= ~SR_NOEXEC; 1852 } 1853 } 1854 #endif 1855 } 1856 1857 /* 1858 * Mark a mapping as non-executable. 1859 * If this was the last executable mapping in the segment, 1860 * set the noexec flag. 1861 */ 1862 static void 1863 pvo_clear_exec(struct pvo_entry *pvo) 1864 { 1865 struct pmap *pm = pvo->pvo_pmap; 1866 1867 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1868 return; 1869 } 1870 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1871 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1872 { 1873 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1874 if (--pm->pm_exec[sr] == 0) { 1875 pm->pm_sr[sr] |= SR_NOEXEC; 1876 } 1877 } 1878 #endif 1879 } 1880 1881 /* 1882 * Insert physical page at pa into the given pmap at virtual address va. 1883 */ 1884 int 1885 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 1886 { 1887 struct mem_region *mp; 1888 struct pvo_head *pvo_head; 1889 struct vm_page *pg; 1890 struct pool *pl; 1891 register_t pte_lo; 1892 int error; 1893 u_int pvo_flags; 1894 u_int was_exec = 0; 1895 1896 PMAP_LOCK(); 1897 1898 if (__predict_false(!pmap_initialized)) { 1899 pvo_head = &pmap_pvo_kunmanaged; 1900 pl = &pmap_upvo_pool; 1901 pvo_flags = 0; 1902 pg = NULL; 1903 was_exec = PTE_EXEC; 1904 } else { 1905 pvo_head = pa_to_pvoh(pa, &pg); 1906 pl = &pmap_mpvo_pool; 1907 pvo_flags = PVO_MANAGED; 1908 } 1909 1910 DPRINTFN(ENTER, 1911 ("pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1912 pm, va, pa, prot, flags)); 1913 1914 /* 1915 * If this is a managed page, and it's the first reference to the 1916 * page clear the execness of the page. Otherwise fetch the execness. 1917 */ 1918 if (pg != NULL) 1919 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1920 1921 DPRINTFN(ENTER, (" was_exec=%d", was_exec)); 1922 1923 /* 1924 * Assume the page is cache inhibited and access is guarded unless 1925 * it's in our available memory array. If it is in the memory array, 1926 * asssume it's in memory coherent memory. 1927 */ 1928 if (flags & PMAP_MD_PREFETCHABLE) { 1929 pte_lo = 0; 1930 } else 1931 pte_lo = PTE_G; 1932 1933 if ((flags & PMAP_MD_NOCACHE) == 0) { 1934 for (mp = mem; mp->size; mp++) { 1935 if (pa >= mp->start && pa < mp->start + mp->size) { 1936 pte_lo = PTE_M; 1937 break; 1938 } 1939 } 1940 } else { 1941 pte_lo |= PTE_I; 1942 } 1943 1944 if (prot & VM_PROT_WRITE) 1945 pte_lo |= PTE_BW; 1946 else 1947 pte_lo |= PTE_BR; 1948 1949 /* 1950 * If this was in response to a fault, "pre-fault" the PTE's 1951 * changed/referenced bit appropriately. 1952 */ 1953 if (flags & VM_PROT_WRITE) 1954 pte_lo |= PTE_CHG; 1955 if (flags & VM_PROT_ALL) 1956 pte_lo |= PTE_REF; 1957 1958 /* 1959 * We need to know if this page can be executable 1960 */ 1961 flags |= (prot & VM_PROT_EXECUTE); 1962 1963 /* 1964 * Record mapping for later back-translation and pte spilling. 1965 * This will overwrite any existing mapping. 1966 */ 1967 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1968 1969 /* 1970 * Flush the real page from the instruction cache if this page is 1971 * mapped executable and cacheable and has not been flushed since 1972 * the last time it was modified. 1973 */ 1974 if (error == 0 && 1975 (flags & VM_PROT_EXECUTE) && 1976 (pte_lo & PTE_I) == 0 && 1977 was_exec == 0) { 1978 DPRINTFN(ENTER, (" syncicache")); 1979 PMAPCOUNT(exec_synced); 1980 pmap_syncicache(pa, PAGE_SIZE); 1981 if (pg != NULL) { 1982 pmap_attr_save(pg, PTE_EXEC); 1983 PMAPCOUNT(exec_cached); 1984 #if defined(DEBUG) || defined(PMAPDEBUG) 1985 if (pmapdebug & PMAPDEBUG_ENTER) 1986 printf(" marked-as-exec"); 1987 else if (pmapdebug & PMAPDEBUG_EXEC) 1988 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 1989 VM_PAGE_TO_PHYS(pg)); 1990 1991 #endif 1992 } 1993 } 1994 1995 DPRINTFN(ENTER, (": error=%d\n", error)); 1996 1997 PMAP_UNLOCK(); 1998 1999 return error; 2000 } 2001 2002 void 2003 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 2004 { 2005 struct mem_region *mp; 2006 register_t pte_lo; 2007 int error; 2008 2009 #if defined (PMAP_OEA64_BRIDGE) 2010 if (va < VM_MIN_KERNEL_ADDRESS) 2011 panic("pmap_kenter_pa: attempt to enter " 2012 "non-kernel address %#" _PRIxva "!", va); 2013 #endif 2014 2015 DPRINTFN(KENTER, 2016 ("pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot)); 2017 2018 PMAP_LOCK(); 2019 2020 /* 2021 * Assume the page is cache inhibited and access is guarded unless 2022 * it's in our available memory array. If it is in the memory array, 2023 * asssume it's in memory coherent memory. 2024 */ 2025 pte_lo = PTE_IG; 2026 if ((flags & PMAP_MD_NOCACHE) == 0) { 2027 for (mp = mem; mp->size; mp++) { 2028 if (pa >= mp->start && pa < mp->start + mp->size) { 2029 pte_lo = PTE_M; 2030 break; 2031 } 2032 } 2033 } 2034 2035 if (prot & VM_PROT_WRITE) 2036 pte_lo |= PTE_BW; 2037 else 2038 pte_lo |= PTE_BR; 2039 2040 /* 2041 * We don't care about REF/CHG on PVOs on the unmanaged list. 2042 */ 2043 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2044 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2045 2046 if (error != 0) 2047 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2048 va, pa, error); 2049 2050 PMAP_UNLOCK(); 2051 } 2052 2053 void 2054 pmap_kremove(vaddr_t va, vsize_t len) 2055 { 2056 if (va < VM_MIN_KERNEL_ADDRESS) 2057 panic("pmap_kremove: attempt to remove " 2058 "non-kernel address %#" _PRIxva "!", va); 2059 2060 DPRINTFN(KREMOVE,("pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len)); 2061 pmap_remove(pmap_kernel(), va, va + len); 2062 } 2063 2064 /* 2065 * Remove the given range of mapping entries. 2066 */ 2067 void 2068 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2069 { 2070 struct pvo_head pvol; 2071 struct pvo_entry *pvo; 2072 register_t msr; 2073 int pteidx; 2074 2075 PMAP_LOCK(); 2076 LIST_INIT(&pvol); 2077 msr = pmap_interrupts_off(); 2078 for (; va < endva; va += PAGE_SIZE) { 2079 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2080 if (pvo != NULL) { 2081 pmap_pvo_remove(pvo, pteidx, &pvol); 2082 } 2083 } 2084 pmap_interrupts_restore(msr); 2085 pmap_pvo_free_list(&pvol); 2086 PMAP_UNLOCK(); 2087 } 2088 2089 /* 2090 * Get the physical page address for the given pmap/virtual address. 2091 */ 2092 bool 2093 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2094 { 2095 struct pvo_entry *pvo; 2096 register_t msr; 2097 2098 PMAP_LOCK(); 2099 2100 /* 2101 * If this is a kernel pmap lookup, also check the battable 2102 * and if we get a hit, translate the VA to a PA using the 2103 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2104 * that will wrap back to 0. 2105 */ 2106 if (pm == pmap_kernel() && 2107 (va < VM_MIN_KERNEL_ADDRESS || 2108 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2109 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2110 #if defined (PMAP_OEA) 2111 #ifdef PPC_OEA601 2112 if ((MFPVR() >> 16) == MPC601) { 2113 register_t batu = battable[va >> 23].batu; 2114 register_t batl = battable[va >> 23].batl; 2115 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2116 if (BAT601_VALID_P(batl) && 2117 BAT601_VA_MATCH_P(batu, batl, va)) { 2118 register_t mask = 2119 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2120 if (pap) 2121 *pap = (batl & mask) | (va & ~mask); 2122 PMAP_UNLOCK(); 2123 return true; 2124 } else if (SR601_VALID_P(sr) && 2125 SR601_PA_MATCH_P(sr, va)) { 2126 if (pap) 2127 *pap = va; 2128 PMAP_UNLOCK(); 2129 return true; 2130 } 2131 } else 2132 #endif /* PPC_OEA601 */ 2133 { 2134 register_t batu = battable[va >> ADDR_SR_SHFT].batu; 2135 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2136 register_t batl = 2137 battable[va >> ADDR_SR_SHFT].batl; 2138 register_t mask = 2139 (~(batu & BAT_BL) << 15) & ~0x1ffffL; 2140 if (pap) 2141 *pap = (batl & mask) | (va & ~mask); 2142 PMAP_UNLOCK(); 2143 return true; 2144 } 2145 } 2146 return false; 2147 #elif defined (PMAP_OEA64_BRIDGE) 2148 if (va >= SEGMENT_LENGTH) 2149 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2150 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2151 else { 2152 if (pap) 2153 *pap = va; 2154 PMAP_UNLOCK(); 2155 return true; 2156 } 2157 #elif defined (PMAP_OEA64) 2158 #error PPC_OEA64 not supported 2159 #endif /* PPC_OEA */ 2160 } 2161 2162 msr = pmap_interrupts_off(); 2163 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2164 if (pvo != NULL) { 2165 PMAP_PVO_CHECK(pvo); /* sanity check */ 2166 if (pap) 2167 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2168 | (va & ADDR_POFF); 2169 } 2170 pmap_interrupts_restore(msr); 2171 PMAP_UNLOCK(); 2172 return pvo != NULL; 2173 } 2174 2175 /* 2176 * Lower the protection on the specified range of this pmap. 2177 */ 2178 void 2179 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2180 { 2181 struct pvo_entry *pvo; 2182 volatile struct pte *pt; 2183 register_t msr; 2184 int pteidx; 2185 2186 /* 2187 * Since this routine only downgrades protection, we should 2188 * always be called with at least one bit not set. 2189 */ 2190 KASSERT(prot != VM_PROT_ALL); 2191 2192 /* 2193 * If there is no protection, this is equivalent to 2194 * remove the pmap from the pmap. 2195 */ 2196 if ((prot & VM_PROT_READ) == 0) { 2197 pmap_remove(pm, va, endva); 2198 return; 2199 } 2200 2201 PMAP_LOCK(); 2202 2203 msr = pmap_interrupts_off(); 2204 for (; va < endva; va += PAGE_SIZE) { 2205 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2206 if (pvo == NULL) 2207 continue; 2208 PMAP_PVO_CHECK(pvo); /* sanity check */ 2209 2210 /* 2211 * Revoke executable if asked to do so. 2212 */ 2213 if ((prot & VM_PROT_EXECUTE) == 0) 2214 pvo_clear_exec(pvo); 2215 2216 #if 0 2217 /* 2218 * If the page is already read-only, no change 2219 * needs to be made. 2220 */ 2221 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2222 continue; 2223 #endif 2224 /* 2225 * Grab the PTE pointer before we diddle with 2226 * the cached PTE copy. 2227 */ 2228 pt = pmap_pvo_to_pte(pvo, pteidx); 2229 /* 2230 * Change the protection of the page. 2231 */ 2232 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2233 pvo->pvo_pte.pte_lo |= PTE_BR; 2234 2235 /* 2236 * If the PVO is in the page table, update 2237 * that pte at well. 2238 */ 2239 if (pt != NULL) { 2240 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2241 PVO_WHERE(pvo, PMAP_PROTECT); 2242 PMAPCOUNT(ptes_changed); 2243 } 2244 2245 PMAP_PVO_CHECK(pvo); /* sanity check */ 2246 } 2247 pmap_interrupts_restore(msr); 2248 PMAP_UNLOCK(); 2249 } 2250 2251 void 2252 pmap_unwire(pmap_t pm, vaddr_t va) 2253 { 2254 struct pvo_entry *pvo; 2255 register_t msr; 2256 2257 PMAP_LOCK(); 2258 msr = pmap_interrupts_off(); 2259 pvo = pmap_pvo_find_va(pm, va, NULL); 2260 if (pvo != NULL) { 2261 if (PVO_WIRED_P(pvo)) { 2262 pvo->pvo_vaddr &= ~PVO_WIRED; 2263 pm->pm_stats.wired_count--; 2264 } 2265 PMAP_PVO_CHECK(pvo); /* sanity check */ 2266 } 2267 pmap_interrupts_restore(msr); 2268 PMAP_UNLOCK(); 2269 } 2270 2271 /* 2272 * Lower the protection on the specified physical page. 2273 */ 2274 void 2275 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2276 { 2277 struct pvo_head *pvo_head, pvol; 2278 struct pvo_entry *pvo, *next_pvo; 2279 volatile struct pte *pt; 2280 register_t msr; 2281 2282 PMAP_LOCK(); 2283 2284 KASSERT(prot != VM_PROT_ALL); 2285 LIST_INIT(&pvol); 2286 msr = pmap_interrupts_off(); 2287 2288 /* 2289 * When UVM reuses a page, it does a pmap_page_protect with 2290 * VM_PROT_NONE. At that point, we can clear the exec flag 2291 * since we know the page will have different contents. 2292 */ 2293 if ((prot & VM_PROT_READ) == 0) { 2294 DPRINTFN(EXEC, ("[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2295 VM_PAGE_TO_PHYS(pg))); 2296 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2297 PMAPCOUNT(exec_uncached_page_protect); 2298 pmap_attr_clear(pg, PTE_EXEC); 2299 } 2300 } 2301 2302 pvo_head = vm_page_to_pvoh(pg); 2303 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2304 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2305 PMAP_PVO_CHECK(pvo); /* sanity check */ 2306 2307 /* 2308 * Downgrading to no mapping at all, we just remove the entry. 2309 */ 2310 if ((prot & VM_PROT_READ) == 0) { 2311 pmap_pvo_remove(pvo, -1, &pvol); 2312 continue; 2313 } 2314 2315 /* 2316 * If EXEC permission is being revoked, just clear the 2317 * flag in the PVO. 2318 */ 2319 if ((prot & VM_PROT_EXECUTE) == 0) 2320 pvo_clear_exec(pvo); 2321 2322 /* 2323 * If this entry is already RO, don't diddle with the 2324 * page table. 2325 */ 2326 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2327 PMAP_PVO_CHECK(pvo); 2328 continue; 2329 } 2330 2331 /* 2332 * Grab the PTE before the we diddle the bits so 2333 * pvo_to_pte can verify the pte contents are as 2334 * expected. 2335 */ 2336 pt = pmap_pvo_to_pte(pvo, -1); 2337 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2338 pvo->pvo_pte.pte_lo |= PTE_BR; 2339 if (pt != NULL) { 2340 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2341 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2342 PMAPCOUNT(ptes_changed); 2343 } 2344 PMAP_PVO_CHECK(pvo); /* sanity check */ 2345 } 2346 pmap_interrupts_restore(msr); 2347 pmap_pvo_free_list(&pvol); 2348 2349 PMAP_UNLOCK(); 2350 } 2351 2352 /* 2353 * Activate the address space for the specified process. If the process 2354 * is the current process, load the new MMU context. 2355 */ 2356 void 2357 pmap_activate(struct lwp *l) 2358 { 2359 struct pcb *pcb = lwp_getpcb(l); 2360 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2361 2362 DPRINTFN(ACTIVATE, 2363 ("pmap_activate: lwp %p (curlwp %p)\n", l, curlwp)); 2364 2365 /* 2366 * XXX Normally performed in cpu_lwp_fork(). 2367 */ 2368 pcb->pcb_pm = pmap; 2369 2370 /* 2371 * In theory, the SR registers need only be valid on return 2372 * to user space wait to do them there. 2373 */ 2374 if (l == curlwp) { 2375 /* Store pointer to new current pmap. */ 2376 curpm = pmap; 2377 } 2378 } 2379 2380 /* 2381 * Deactivate the specified process's address space. 2382 */ 2383 void 2384 pmap_deactivate(struct lwp *l) 2385 { 2386 } 2387 2388 bool 2389 pmap_query_bit(struct vm_page *pg, int ptebit) 2390 { 2391 struct pvo_entry *pvo; 2392 volatile struct pte *pt; 2393 register_t msr; 2394 2395 PMAP_LOCK(); 2396 2397 if (pmap_attr_fetch(pg) & ptebit) { 2398 PMAP_UNLOCK(); 2399 return true; 2400 } 2401 2402 msr = pmap_interrupts_off(); 2403 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2404 PMAP_PVO_CHECK(pvo); /* sanity check */ 2405 /* 2406 * See if we saved the bit off. If so cache, it and return 2407 * success. 2408 */ 2409 if (pvo->pvo_pte.pte_lo & ptebit) { 2410 pmap_attr_save(pg, ptebit); 2411 PMAP_PVO_CHECK(pvo); /* sanity check */ 2412 pmap_interrupts_restore(msr); 2413 PMAP_UNLOCK(); 2414 return true; 2415 } 2416 } 2417 /* 2418 * No luck, now go thru the hard part of looking at the ptes 2419 * themselves. Sync so any pending REF/CHG bits are flushed 2420 * to the PTEs. 2421 */ 2422 SYNC(); 2423 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2424 PMAP_PVO_CHECK(pvo); /* sanity check */ 2425 /* 2426 * See if this pvo have a valid PTE. If so, fetch the 2427 * REF/CHG bits from the valid PTE. If the appropriate 2428 * ptebit is set, cache, it and return success. 2429 */ 2430 pt = pmap_pvo_to_pte(pvo, -1); 2431 if (pt != NULL) { 2432 pmap_pte_synch(pt, &pvo->pvo_pte); 2433 if (pvo->pvo_pte.pte_lo & ptebit) { 2434 pmap_attr_save(pg, ptebit); 2435 PMAP_PVO_CHECK(pvo); /* sanity check */ 2436 pmap_interrupts_restore(msr); 2437 PMAP_UNLOCK(); 2438 return true; 2439 } 2440 } 2441 } 2442 pmap_interrupts_restore(msr); 2443 PMAP_UNLOCK(); 2444 return false; 2445 } 2446 2447 bool 2448 pmap_clear_bit(struct vm_page *pg, int ptebit) 2449 { 2450 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2451 struct pvo_entry *pvo; 2452 volatile struct pte *pt; 2453 register_t msr; 2454 int rv = 0; 2455 2456 PMAP_LOCK(); 2457 msr = pmap_interrupts_off(); 2458 2459 /* 2460 * Fetch the cache value 2461 */ 2462 rv |= pmap_attr_fetch(pg); 2463 2464 /* 2465 * Clear the cached value. 2466 */ 2467 pmap_attr_clear(pg, ptebit); 2468 2469 /* 2470 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2471 * can reset the right ones). Note that since the pvo entries and 2472 * list heads are accessed via BAT0 and are never placed in the 2473 * page table, we don't have to worry about further accesses setting 2474 * the REF/CHG bits. 2475 */ 2476 SYNC(); 2477 2478 /* 2479 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2480 * valid PTE. If so, clear the ptebit from the valid PTE. 2481 */ 2482 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2483 PMAP_PVO_CHECK(pvo); /* sanity check */ 2484 pt = pmap_pvo_to_pte(pvo, -1); 2485 if (pt != NULL) { 2486 /* 2487 * Only sync the PTE if the bit we are looking 2488 * for is not already set. 2489 */ 2490 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2491 pmap_pte_synch(pt, &pvo->pvo_pte); 2492 /* 2493 * If the bit we are looking for was already set, 2494 * clear that bit in the pte. 2495 */ 2496 if (pvo->pvo_pte.pte_lo & ptebit) 2497 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2498 } 2499 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2500 pvo->pvo_pte.pte_lo &= ~ptebit; 2501 PMAP_PVO_CHECK(pvo); /* sanity check */ 2502 } 2503 pmap_interrupts_restore(msr); 2504 2505 /* 2506 * If we are clearing the modify bit and this page was marked EXEC 2507 * and the user of the page thinks the page was modified, then we 2508 * need to clean it from the icache if it's mapped or clear the EXEC 2509 * bit if it's not mapped. The page itself might not have the CHG 2510 * bit set if the modification was done via DMA to the page. 2511 */ 2512 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2513 if (LIST_EMPTY(pvoh)) { 2514 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2515 VM_PAGE_TO_PHYS(pg))); 2516 pmap_attr_clear(pg, PTE_EXEC); 2517 PMAPCOUNT(exec_uncached_clear_modify); 2518 } else { 2519 DPRINTFN(EXEC, ("[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2520 VM_PAGE_TO_PHYS(pg))); 2521 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2522 PMAPCOUNT(exec_synced_clear_modify); 2523 } 2524 } 2525 PMAP_UNLOCK(); 2526 return (rv & ptebit) != 0; 2527 } 2528 2529 void 2530 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2531 { 2532 struct pvo_entry *pvo; 2533 size_t offset = va & ADDR_POFF; 2534 int s; 2535 2536 PMAP_LOCK(); 2537 s = splvm(); 2538 while (len > 0) { 2539 size_t seglen = PAGE_SIZE - offset; 2540 if (seglen > len) 2541 seglen = len; 2542 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2543 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2544 pmap_syncicache( 2545 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2546 PMAP_PVO_CHECK(pvo); 2547 } 2548 va += seglen; 2549 len -= seglen; 2550 offset = 0; 2551 } 2552 splx(s); 2553 PMAP_UNLOCK(); 2554 } 2555 2556 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2557 void 2558 pmap_pte_print(volatile struct pte *pt) 2559 { 2560 printf("PTE %p: ", pt); 2561 2562 #if defined(PMAP_OEA) 2563 /* High word: */ 2564 printf("%#" _PRIxpte ": [", pt->pte_hi); 2565 #else 2566 printf("%#" _PRIxpte ": [", pt->pte_hi); 2567 #endif /* PMAP_OEA */ 2568 2569 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2570 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2571 2572 printf("%#" _PRIxpte " %#" _PRIxpte "", 2573 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2574 pt->pte_hi & PTE_API); 2575 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2576 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2577 #else 2578 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2579 #endif /* PMAP_OEA */ 2580 2581 /* Low word: */ 2582 #if defined (PMAP_OEA) 2583 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2584 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2585 #else 2586 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2587 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2588 #endif 2589 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2590 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2591 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2592 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2593 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2594 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2595 switch (pt->pte_lo & PTE_PP) { 2596 case PTE_BR: printf("br]\n"); break; 2597 case PTE_BW: printf("bw]\n"); break; 2598 case PTE_SO: printf("so]\n"); break; 2599 case PTE_SW: printf("sw]\n"); break; 2600 } 2601 } 2602 #endif 2603 2604 #if defined(DDB) 2605 void 2606 pmap_pteg_check(void) 2607 { 2608 volatile struct pte *pt; 2609 int i; 2610 int ptegidx; 2611 u_int p_valid = 0; 2612 u_int s_valid = 0; 2613 u_int invalid = 0; 2614 2615 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2616 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2617 if (pt->pte_hi & PTE_VALID) { 2618 if (pt->pte_hi & PTE_HID) 2619 s_valid++; 2620 else 2621 { 2622 p_valid++; 2623 } 2624 } else 2625 invalid++; 2626 } 2627 } 2628 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2629 p_valid, p_valid, s_valid, s_valid, 2630 invalid, invalid); 2631 } 2632 2633 void 2634 pmap_print_mmuregs(void) 2635 { 2636 int i; 2637 u_int cpuvers; 2638 #ifndef PMAP_OEA64 2639 vaddr_t addr; 2640 register_t soft_sr[16]; 2641 #endif 2642 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2643 struct bat soft_ibat[4]; 2644 struct bat soft_dbat[4]; 2645 #endif 2646 paddr_t sdr1; 2647 2648 cpuvers = MFPVR() >> 16; 2649 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2650 #ifndef PMAP_OEA64 2651 addr = 0; 2652 for (i = 0; i < 16; i++) { 2653 soft_sr[i] = MFSRIN(addr); 2654 addr += (1 << ADDR_SR_SHFT); 2655 } 2656 #endif 2657 2658 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2659 /* read iBAT (601: uBAT) registers */ 2660 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2661 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2662 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2663 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2664 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2665 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2666 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2667 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2668 2669 2670 if (cpuvers != MPC601) { 2671 /* read dBAT registers */ 2672 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2673 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2674 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2675 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2676 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2677 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2678 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2679 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2680 } 2681 #endif 2682 2683 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2684 #ifndef PMAP_OEA64 2685 printf("SR[]:\t"); 2686 for (i = 0; i < 4; i++) 2687 printf("0x%08lx, ", soft_sr[i]); 2688 printf("\n\t"); 2689 for ( ; i < 8; i++) 2690 printf("0x%08lx, ", soft_sr[i]); 2691 printf("\n\t"); 2692 for ( ; i < 12; i++) 2693 printf("0x%08lx, ", soft_sr[i]); 2694 printf("\n\t"); 2695 for ( ; i < 16; i++) 2696 printf("0x%08lx, ", soft_sr[i]); 2697 printf("\n"); 2698 #endif 2699 2700 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2701 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2702 for (i = 0; i < 4; i++) { 2703 printf("0x%08lx 0x%08lx, ", 2704 soft_ibat[i].batu, soft_ibat[i].batl); 2705 if (i == 1) 2706 printf("\n\t"); 2707 } 2708 if (cpuvers != MPC601) { 2709 printf("\ndBAT[]:\t"); 2710 for (i = 0; i < 4; i++) { 2711 printf("0x%08lx 0x%08lx, ", 2712 soft_dbat[i].batu, soft_dbat[i].batl); 2713 if (i == 1) 2714 printf("\n\t"); 2715 } 2716 } 2717 printf("\n"); 2718 #endif /* PMAP_OEA... */ 2719 } 2720 2721 void 2722 pmap_print_pte(pmap_t pm, vaddr_t va) 2723 { 2724 struct pvo_entry *pvo; 2725 volatile struct pte *pt; 2726 int pteidx; 2727 2728 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2729 if (pvo != NULL) { 2730 pt = pmap_pvo_to_pte(pvo, pteidx); 2731 if (pt != NULL) { 2732 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2733 va, pt, 2734 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2735 pt->pte_hi, pt->pte_lo); 2736 } else { 2737 printf("No valid PTE found\n"); 2738 } 2739 } else { 2740 printf("Address not in pmap\n"); 2741 } 2742 } 2743 2744 void 2745 pmap_pteg_dist(void) 2746 { 2747 struct pvo_entry *pvo; 2748 int ptegidx; 2749 int depth; 2750 int max_depth = 0; 2751 unsigned int depths[64]; 2752 2753 memset(depths, 0, sizeof(depths)); 2754 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2755 depth = 0; 2756 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2757 depth++; 2758 } 2759 if (depth > max_depth) 2760 max_depth = depth; 2761 if (depth > 63) 2762 depth = 63; 2763 depths[depth]++; 2764 } 2765 2766 for (depth = 0; depth < 64; depth++) { 2767 printf(" [%2d]: %8u", depth, depths[depth]); 2768 if ((depth & 3) == 3) 2769 printf("\n"); 2770 if (depth == max_depth) 2771 break; 2772 } 2773 if ((depth & 3) != 3) 2774 printf("\n"); 2775 printf("Max depth found was %d\n", max_depth); 2776 } 2777 #endif /* DEBUG */ 2778 2779 #if defined(PMAPCHECK) || defined(DEBUG) 2780 void 2781 pmap_pvo_verify(void) 2782 { 2783 int ptegidx; 2784 int s; 2785 2786 s = splvm(); 2787 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2788 struct pvo_entry *pvo; 2789 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2790 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2791 panic("pmap_pvo_verify: invalid pvo %p " 2792 "on list %#x", pvo, ptegidx); 2793 pmap_pvo_check(pvo); 2794 } 2795 } 2796 splx(s); 2797 } 2798 #endif /* PMAPCHECK */ 2799 2800 2801 void * 2802 pmap_pool_ualloc(struct pool *pp, int flags) 2803 { 2804 struct pvo_page *pvop; 2805 2806 if (uvm.page_init_done != true) { 2807 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2808 } 2809 2810 PMAP_LOCK(); 2811 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2812 if (pvop != NULL) { 2813 pmap_upvop_free--; 2814 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2815 PMAP_UNLOCK(); 2816 return pvop; 2817 } 2818 PMAP_UNLOCK(); 2819 return pmap_pool_malloc(pp, flags); 2820 } 2821 2822 void * 2823 pmap_pool_malloc(struct pool *pp, int flags) 2824 { 2825 struct pvo_page *pvop; 2826 struct vm_page *pg; 2827 2828 PMAP_LOCK(); 2829 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2830 if (pvop != NULL) { 2831 pmap_mpvop_free--; 2832 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2833 PMAP_UNLOCK(); 2834 return pvop; 2835 } 2836 PMAP_UNLOCK(); 2837 again: 2838 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2839 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2840 if (__predict_false(pg == NULL)) { 2841 if (flags & PR_WAITOK) { 2842 uvm_wait("plpg"); 2843 goto again; 2844 } else { 2845 return (0); 2846 } 2847 } 2848 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2849 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2850 } 2851 2852 void 2853 pmap_pool_ufree(struct pool *pp, void *va) 2854 { 2855 struct pvo_page *pvop; 2856 #if 0 2857 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2858 pmap_pool_mfree(va, size, tag); 2859 return; 2860 } 2861 #endif 2862 PMAP_LOCK(); 2863 pvop = va; 2864 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2865 pmap_upvop_free++; 2866 if (pmap_upvop_free > pmap_upvop_maxfree) 2867 pmap_upvop_maxfree = pmap_upvop_free; 2868 PMAP_UNLOCK(); 2869 } 2870 2871 void 2872 pmap_pool_mfree(struct pool *pp, void *va) 2873 { 2874 struct pvo_page *pvop; 2875 2876 PMAP_LOCK(); 2877 pvop = va; 2878 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2879 pmap_mpvop_free++; 2880 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2881 pmap_mpvop_maxfree = pmap_mpvop_free; 2882 PMAP_UNLOCK(); 2883 #if 0 2884 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2885 #endif 2886 } 2887 2888 /* 2889 * This routine in bootstraping to steal to-be-managed memory (which will 2890 * then be unmanaged). We use it to grab from the first 256MB for our 2891 * pmap needs and above 256MB for other stuff. 2892 */ 2893 vaddr_t 2894 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2895 { 2896 vsize_t size; 2897 vaddr_t va; 2898 paddr_t pa = 0; 2899 int npgs, bank; 2900 struct vm_physseg *ps; 2901 2902 if (uvm.page_init_done == true) 2903 panic("pmap_steal_memory: called _after_ bootstrap"); 2904 2905 *vstartp = VM_MIN_KERNEL_ADDRESS; 2906 *vendp = VM_MAX_KERNEL_ADDRESS; 2907 2908 size = round_page(vsize); 2909 npgs = atop(size); 2910 2911 /* 2912 * PA 0 will never be among those given to UVM so we can use it 2913 * to indicate we couldn't steal any memory. 2914 */ 2915 for (bank = 0; bank < vm_nphysseg; bank++) { 2916 ps = VM_PHYSMEM_PTR(bank); 2917 if (ps->free_list == VM_FREELIST_FIRST256 && 2918 ps->avail_end - ps->avail_start >= npgs) { 2919 pa = ptoa(ps->avail_start); 2920 break; 2921 } 2922 } 2923 2924 if (pa == 0) 2925 panic("pmap_steal_memory: no approriate memory to steal!"); 2926 2927 ps->avail_start += npgs; 2928 ps->start += npgs; 2929 2930 /* 2931 * If we've used up all the pages in the segment, remove it and 2932 * compact the list. 2933 */ 2934 if (ps->avail_start == ps->end) { 2935 /* 2936 * If this was the last one, then a very bad thing has occurred 2937 */ 2938 if (--vm_nphysseg == 0) 2939 panic("pmap_steal_memory: out of memory!"); 2940 2941 printf("pmap_steal_memory: consumed bank %d\n", bank); 2942 for (; bank < vm_nphysseg; bank++, ps++) { 2943 ps[0] = ps[1]; 2944 } 2945 } 2946 2947 va = (vaddr_t) pa; 2948 memset((void *) va, 0, size); 2949 pmap_pages_stolen += npgs; 2950 #ifdef DEBUG 2951 if (pmapdebug && npgs > 1) { 2952 u_int cnt = 0; 2953 for (bank = 0; bank < vm_nphysseg; bank++) { 2954 ps = VM_PHYSMEM_PTR(bank); 2955 cnt += ps->avail_end - ps->avail_start; 2956 } 2957 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2958 npgs, pmap_pages_stolen, cnt); 2959 } 2960 #endif 2961 2962 return va; 2963 } 2964 2965 /* 2966 * Find a chuck of memory with right size and alignment. 2967 */ 2968 paddr_t 2969 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2970 { 2971 struct mem_region *mp; 2972 paddr_t s, e; 2973 int i, j; 2974 2975 size = round_page(size); 2976 2977 DPRINTFN(BOOT, 2978 ("pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 2979 size, alignment, at_end)); 2980 2981 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2982 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 2983 alignment); 2984 2985 if (at_end) { 2986 if (alignment != PAGE_SIZE) 2987 panic("pmap_boot_find_memory: invalid ending " 2988 "alignment %#" _PRIxpa, alignment); 2989 2990 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 2991 s = mp->start + mp->size - size; 2992 if (s >= mp->start && mp->size >= size) { 2993 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 2994 DPRINTFN(BOOT, 2995 ("pmap_boot_find_memory: b-avail[%d] start " 2996 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 2997 mp->start, mp->size)); 2998 mp->size -= size; 2999 DPRINTFN(BOOT, 3000 ("pmap_boot_find_memory: a-avail[%d] start " 3001 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3002 mp->start, mp->size)); 3003 return s; 3004 } 3005 } 3006 panic("pmap_boot_find_memory: no available memory"); 3007 } 3008 3009 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3010 s = (mp->start + alignment - 1) & ~(alignment-1); 3011 e = s + size; 3012 3013 /* 3014 * Is the calculated region entirely within the region? 3015 */ 3016 if (s < mp->start || e > mp->start + mp->size) 3017 continue; 3018 3019 DPRINTFN(BOOT,(": %#" _PRIxpa "\n", s)); 3020 if (s == mp->start) { 3021 /* 3022 * If the block starts at the beginning of region, 3023 * adjust the size & start. (the region may now be 3024 * zero in length) 3025 */ 3026 DPRINTFN(BOOT, 3027 ("pmap_boot_find_memory: b-avail[%d] start " 3028 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3029 mp->start += size; 3030 mp->size -= size; 3031 DPRINTFN(BOOT, 3032 ("pmap_boot_find_memory: a-avail[%d] start " 3033 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3034 } else if (e == mp->start + mp->size) { 3035 /* 3036 * If the block starts at the beginning of region, 3037 * adjust only the size. 3038 */ 3039 DPRINTFN(BOOT, 3040 ("pmap_boot_find_memory: b-avail[%d] start " 3041 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3042 mp->size -= size; 3043 DPRINTFN(BOOT, 3044 ("pmap_boot_find_memory: a-avail[%d] start " 3045 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3046 } else { 3047 /* 3048 * Block is in the middle of the region, so we 3049 * have to split it in two. 3050 */ 3051 for (j = avail_cnt; j > i + 1; j--) { 3052 avail[j] = avail[j-1]; 3053 } 3054 DPRINTFN(BOOT, 3055 ("pmap_boot_find_memory: b-avail[%d] start " 3056 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size)); 3057 mp[1].start = e; 3058 mp[1].size = mp[0].start + mp[0].size - e; 3059 mp[0].size = s - mp[0].start; 3060 avail_cnt++; 3061 for (; i < avail_cnt; i++) { 3062 DPRINTFN(BOOT, 3063 ("pmap_boot_find_memory: a-avail[%d] " 3064 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3065 avail[i].start, avail[i].size)); 3066 } 3067 } 3068 KASSERT(s == (uintptr_t) s); 3069 return s; 3070 } 3071 panic("pmap_boot_find_memory: not enough memory for " 3072 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3073 } 3074 3075 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3076 #if defined (PMAP_OEA64_BRIDGE) 3077 int 3078 pmap_setup_segment0_map(int use_large_pages, ...) 3079 { 3080 vaddr_t va; 3081 3082 register_t pte_lo = 0x0; 3083 int ptegidx = 0, i = 0; 3084 struct pte pte; 3085 va_list ap; 3086 3087 /* Coherent + Supervisor RW, no user access */ 3088 pte_lo = PTE_M; 3089 3090 /* XXXSL 3091 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3092 * these have to take priority. 3093 */ 3094 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3095 ptegidx = va_to_pteg(pmap_kernel(), va); 3096 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3097 i = pmap_pte_insert(ptegidx, &pte); 3098 } 3099 3100 va_start(ap, use_large_pages); 3101 while (1) { 3102 paddr_t pa; 3103 size_t size; 3104 3105 va = va_arg(ap, vaddr_t); 3106 3107 if (va == 0) 3108 break; 3109 3110 pa = va_arg(ap, paddr_t); 3111 size = va_arg(ap, size_t); 3112 3113 for (; va < (va + size); va += 0x1000, pa += 0x1000) { 3114 #if 0 3115 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3116 #endif 3117 ptegidx = va_to_pteg(pmap_kernel(), va); 3118 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3119 i = pmap_pte_insert(ptegidx, &pte); 3120 } 3121 } 3122 3123 TLBSYNC(); 3124 SYNC(); 3125 return (0); 3126 } 3127 #endif /* PMAP_OEA64_BRIDGE */ 3128 3129 /* 3130 * This is not part of the defined PMAP interface and is specific to the 3131 * PowerPC architecture. This is called during initppc, before the system 3132 * is really initialized. 3133 */ 3134 void 3135 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3136 { 3137 struct mem_region *mp, tmp; 3138 paddr_t s, e; 3139 psize_t size; 3140 int i, j; 3141 3142 /* 3143 * Get memory. 3144 */ 3145 mem_regions(&mem, &avail); 3146 #if defined(DEBUG) 3147 if (pmapdebug & PMAPDEBUG_BOOT) { 3148 printf("pmap_bootstrap: memory configuration:\n"); 3149 for (mp = mem; mp->size; mp++) { 3150 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3151 mp->start, mp->size); 3152 } 3153 for (mp = avail; mp->size; mp++) { 3154 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3155 mp->start, mp->size); 3156 } 3157 } 3158 #endif 3159 3160 /* 3161 * Find out how much physical memory we have and in how many chunks. 3162 */ 3163 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3164 if (mp->start >= pmap_memlimit) 3165 continue; 3166 if (mp->start + mp->size > pmap_memlimit) { 3167 size = pmap_memlimit - mp->start; 3168 physmem += btoc(size); 3169 } else { 3170 physmem += btoc(mp->size); 3171 } 3172 mem_cnt++; 3173 } 3174 3175 /* 3176 * Count the number of available entries. 3177 */ 3178 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3179 avail_cnt++; 3180 3181 /* 3182 * Page align all regions. 3183 */ 3184 kernelstart = trunc_page(kernelstart); 3185 kernelend = round_page(kernelend); 3186 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3187 s = round_page(mp->start); 3188 mp->size -= (s - mp->start); 3189 mp->size = trunc_page(mp->size); 3190 mp->start = s; 3191 e = mp->start + mp->size; 3192 3193 DPRINTFN(BOOT, 3194 ("pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3195 i, mp->start, mp->size)); 3196 3197 /* 3198 * Don't allow the end to run beyond our artificial limit 3199 */ 3200 if (e > pmap_memlimit) 3201 e = pmap_memlimit; 3202 3203 /* 3204 * Is this region empty or strange? skip it. 3205 */ 3206 if (e <= s) { 3207 mp->start = 0; 3208 mp->size = 0; 3209 continue; 3210 } 3211 3212 /* 3213 * Does this overlap the beginning of kernel? 3214 * Does extend past the end of the kernel? 3215 */ 3216 else if (s < kernelstart && e > kernelstart) { 3217 if (e > kernelend) { 3218 avail[avail_cnt].start = kernelend; 3219 avail[avail_cnt].size = e - kernelend; 3220 avail_cnt++; 3221 } 3222 mp->size = kernelstart - s; 3223 } 3224 /* 3225 * Check whether this region overlaps the end of the kernel. 3226 */ 3227 else if (s < kernelend && e > kernelend) { 3228 mp->start = kernelend; 3229 mp->size = e - kernelend; 3230 } 3231 /* 3232 * Look whether this regions is completely inside the kernel. 3233 * Nuke it if it does. 3234 */ 3235 else if (s >= kernelstart && e <= kernelend) { 3236 mp->start = 0; 3237 mp->size = 0; 3238 } 3239 /* 3240 * If the user imposed a memory limit, enforce it. 3241 */ 3242 else if (s >= pmap_memlimit) { 3243 mp->start = -PAGE_SIZE; /* let's know why */ 3244 mp->size = 0; 3245 } 3246 else { 3247 mp->start = s; 3248 mp->size = e - s; 3249 } 3250 DPRINTFN(BOOT, 3251 ("pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3252 i, mp->start, mp->size)); 3253 } 3254 3255 /* 3256 * Move (and uncount) all the null return to the end. 3257 */ 3258 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3259 if (mp->size == 0) { 3260 tmp = avail[i]; 3261 avail[i] = avail[--avail_cnt]; 3262 avail[avail_cnt] = avail[i]; 3263 } 3264 } 3265 3266 /* 3267 * (Bubble)sort them into ascending order. 3268 */ 3269 for (i = 0; i < avail_cnt; i++) { 3270 for (j = i + 1; j < avail_cnt; j++) { 3271 if (avail[i].start > avail[j].start) { 3272 tmp = avail[i]; 3273 avail[i] = avail[j]; 3274 avail[j] = tmp; 3275 } 3276 } 3277 } 3278 3279 /* 3280 * Make sure they don't overlap. 3281 */ 3282 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3283 if (mp[0].start + mp[0].size > mp[1].start) { 3284 mp[0].size = mp[1].start - mp[0].start; 3285 } 3286 DPRINTFN(BOOT, 3287 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3288 i, mp->start, mp->size)); 3289 } 3290 DPRINTFN(BOOT, 3291 ("pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3292 i, mp->start, mp->size)); 3293 3294 #ifdef PTEGCOUNT 3295 pmap_pteg_cnt = PTEGCOUNT; 3296 #else /* PTEGCOUNT */ 3297 3298 pmap_pteg_cnt = 0x1000; 3299 3300 while (pmap_pteg_cnt < physmem) 3301 pmap_pteg_cnt <<= 1; 3302 3303 pmap_pteg_cnt >>= 1; 3304 #endif /* PTEGCOUNT */ 3305 3306 #ifdef DEBUG 3307 DPRINTFN(BOOT, 3308 ("pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt)); 3309 #endif 3310 3311 /* 3312 * Find suitably aligned memory for PTEG hash table. 3313 */ 3314 size = pmap_pteg_cnt * sizeof(struct pteg); 3315 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3316 3317 #ifdef DEBUG 3318 DPRINTFN(BOOT, 3319 ("PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table)); 3320 #endif 3321 3322 3323 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3324 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3325 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3326 pmap_pteg_table, size); 3327 #endif 3328 3329 memset(__UNVOLATILE(pmap_pteg_table), 0, 3330 pmap_pteg_cnt * sizeof(struct pteg)); 3331 pmap_pteg_mask = pmap_pteg_cnt - 1; 3332 3333 /* 3334 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3335 * with pages. So we just steal them before giving them to UVM. 3336 */ 3337 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3338 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3339 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3340 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3341 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3342 pmap_pvo_table, size); 3343 #endif 3344 3345 for (i = 0; i < pmap_pteg_cnt; i++) 3346 TAILQ_INIT(&pmap_pvo_table[i]); 3347 3348 #ifndef MSGBUFADDR 3349 /* 3350 * Allocate msgbuf in high memory. 3351 */ 3352 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3353 #endif 3354 3355 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3356 paddr_t pfstart = atop(mp->start); 3357 paddr_t pfend = atop(mp->start + mp->size); 3358 if (mp->size == 0) 3359 continue; 3360 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3361 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3362 VM_FREELIST_FIRST256); 3363 } else if (mp->start >= SEGMENT_LENGTH) { 3364 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3365 VM_FREELIST_DEFAULT); 3366 } else { 3367 pfend = atop(SEGMENT_LENGTH); 3368 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3369 VM_FREELIST_FIRST256); 3370 pfstart = atop(SEGMENT_LENGTH); 3371 pfend = atop(mp->start + mp->size); 3372 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3373 VM_FREELIST_DEFAULT); 3374 } 3375 } 3376 3377 /* 3378 * Make sure kernel vsid is allocated as well as VSID 0. 3379 */ 3380 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3381 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3382 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3383 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3384 pmap_vsid_bitmap[0] |= 1; 3385 3386 /* 3387 * Initialize kernel pmap and hardware. 3388 */ 3389 3390 /* PMAP_OEA64_BRIDGE does support these instructions */ 3391 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3392 for (i = 0; i < 16; i++) { 3393 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3394 __asm volatile ("mtsrin %0,%1" 3395 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3396 } 3397 3398 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3399 __asm volatile ("mtsr %0,%1" 3400 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3401 #ifdef KERNEL2_SR 3402 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3403 __asm volatile ("mtsr %0,%1" 3404 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3405 #endif 3406 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3407 #if defined (PMAP_OEA) 3408 for (i = 0; i < 16; i++) { 3409 if (iosrtable[i] & SR601_T) { 3410 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3411 __asm volatile ("mtsrin %0,%1" 3412 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3413 } 3414 } 3415 __asm volatile ("sync; mtsdr1 %0; isync" 3416 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3417 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3418 __asm __volatile ("sync; mtsdr1 %0; isync" 3419 :: "r"((uintptr_t)pmap_pteg_table | (32 - cntlzw(pmap_pteg_mask >> 11)))); 3420 #endif 3421 tlbia(); 3422 3423 #ifdef ALTIVEC 3424 pmap_use_altivec = cpu_altivec; 3425 #endif 3426 3427 #ifdef DEBUG 3428 if (pmapdebug & PMAPDEBUG_BOOT) { 3429 u_int cnt; 3430 int bank; 3431 char pbuf[9]; 3432 for (cnt = 0, bank = 0; bank < vm_nphysseg; bank++) { 3433 cnt += VM_PHYSMEM_PTR(bank)->avail_end - VM_PHYSMEM_PTR(bank)->avail_start; 3434 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3435 bank, 3436 ptoa(VM_PHYSMEM_PTR(bank)->avail_start), 3437 ptoa(VM_PHYSMEM_PTR(bank)->avail_end), 3438 ptoa(VM_PHYSMEM_PTR(bank)->avail_end - VM_PHYSMEM_PTR(bank)->avail_start)); 3439 } 3440 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3441 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3442 pbuf, cnt); 3443 } 3444 #endif 3445 3446 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3447 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3448 &pmap_pool_uallocator, IPL_VM); 3449 3450 pool_setlowat(&pmap_upvo_pool, 252); 3451 3452 pool_init(&pmap_pool, sizeof(struct pmap), 3453 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3454 IPL_NONE); 3455 3456 #if defined(PMAP_NEED_MAPKERNEL) || 1 3457 { 3458 struct pmap *pm = pmap_kernel(); 3459 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3460 extern int etext[], kernel_text[]; 3461 vaddr_t va, va_etext = (paddr_t) etext; 3462 #endif 3463 paddr_t pa, pa_end; 3464 register_t sr; 3465 struct pte pt; 3466 unsigned int ptegidx; 3467 int bank; 3468 3469 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3470 pm->pm_sr[0] = sr; 3471 3472 for (bank = 0; bank < vm_nphysseg; bank++) { 3473 pa_end = ptoa(VM_PHYSMEM_PTR(bank)->avail_end); 3474 pa = ptoa(VM_PHYSMEM_PTR(bank)->avail_start); 3475 for (; pa < pa_end; pa += PAGE_SIZE) { 3476 ptegidx = va_to_pteg(pm, pa); 3477 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3478 pmap_pte_insert(ptegidx, &pt); 3479 } 3480 } 3481 3482 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3483 va = (vaddr_t) kernel_text; 3484 3485 for (pa = kernelstart; va < va_etext; 3486 pa += PAGE_SIZE, va += PAGE_SIZE) { 3487 ptegidx = va_to_pteg(pm, va); 3488 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3489 pmap_pte_insert(ptegidx, &pt); 3490 } 3491 3492 for (; pa < kernelend; 3493 pa += PAGE_SIZE, va += PAGE_SIZE) { 3494 ptegidx = va_to_pteg(pm, va); 3495 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3496 pmap_pte_insert(ptegidx, &pt); 3497 } 3498 3499 for (va = 0, pa = 0; va < kernelstart; 3500 pa += PAGE_SIZE, va += PAGE_SIZE) { 3501 ptegidx = va_to_pteg(pm, va); 3502 if (va < 0x3000) 3503 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3504 else 3505 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3506 pmap_pte_insert(ptegidx, &pt); 3507 } 3508 for (va = kernelend, pa = kernelend; va < SEGMENT_LENGTH; 3509 pa += PAGE_SIZE, va += PAGE_SIZE) { 3510 ptegidx = va_to_pteg(pm, va); 3511 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3512 pmap_pte_insert(ptegidx, &pt); 3513 } 3514 #endif 3515 3516 __asm volatile ("mtsrin %0,%1" 3517 :: "r"(sr), "r"(kernelstart)); 3518 } 3519 #endif 3520 } 3521
Indexes created Sun Sep 28 16:09:52 GMT 2025