pmap.c revision 1.92.2.1
1 /* $NetBSD: pmap.c,v 1.92.2.1 2020/06/07 12:26:22 martin Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 36 * Copyright (C) 1995, 1996 TooLs GmbH. 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by TooLs GmbH. 50 * 4. The name of TooLs GmbH may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 58 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 59 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 60 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 61 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 62 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.92.2.1 2020/06/07 12:26:22 martin Exp $"); 67 68 #define PMAP_NOOPNAMES 69 70 #include "opt_ppcarch.h" 71 #include "opt_altivec.h" 72 #include "opt_multiprocessor.h" 73 #include "opt_pmap.h" 74 75 #include <sys/param.h> 76 #include <sys/proc.h> 77 #include <sys/pool.h> 78 #include <sys/queue.h> 79 #include <sys/device.h> /* for evcnt */ 80 #include <sys/systm.h> 81 #include <sys/atomic.h> 82 83 #include <uvm/uvm.h> 84 85 #include <machine/powerpc.h> 86 #include <powerpc/bat.h> 87 #include <powerpc/pcb.h> 88 #include <powerpc/psl.h> 89 #include <powerpc/spr.h> 90 #include <powerpc/oea/spr.h> 91 #include <powerpc/oea/sr_601.h> 92 93 #ifdef ALTIVEC 94 extern int pmap_use_altivec; 95 #endif 96 97 #ifdef PMAP_MEMLIMIT 98 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 99 #else 100 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 101 #endif 102 103 extern struct pmap kernel_pmap_; 104 static unsigned int pmap_pages_stolen; 105 static u_long pmap_pte_valid; 106 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 107 static u_long pmap_pvo_enter_depth; 108 static u_long pmap_pvo_remove_depth; 109 #endif 110 111 #ifndef MSGBUFADDR 112 extern paddr_t msgbuf_paddr; 113 #endif 114 115 static struct mem_region *mem, *avail; 116 static u_int mem_cnt, avail_cnt; 117 118 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 119 # define PMAP_OEA 1 120 #endif 121 122 #if defined(PMAP_OEA) 123 #define _PRIxpte "lx" 124 #else 125 #define _PRIxpte PRIx64 126 #endif 127 #define _PRIxpa "lx" 128 #define _PRIxva "lx" 129 #define _PRIsr "lx" 130 131 #ifdef PMAP_NEEDS_FIXUP 132 #if defined(PMAP_OEA) 133 #define PMAPNAME(name) pmap32_##name 134 #elif defined(PMAP_OEA64) 135 #define PMAPNAME(name) pmap64_##name 136 #elif defined(PMAP_OEA64_BRIDGE) 137 #define PMAPNAME(name) pmap64bridge_##name 138 #else 139 #error unknown variant for pmap 140 #endif 141 #endif /* PMAP_NEEDS_FIXUP */ 142 143 #ifdef PMAPNAME 144 #define STATIC static 145 #define pmap_pte_spill PMAPNAME(pte_spill) 146 #define pmap_real_memory PMAPNAME(real_memory) 147 #define pmap_init PMAPNAME(init) 148 #define pmap_virtual_space PMAPNAME(virtual_space) 149 #define pmap_create PMAPNAME(create) 150 #define pmap_reference PMAPNAME(reference) 151 #define pmap_destroy PMAPNAME(destroy) 152 #define pmap_copy PMAPNAME(copy) 153 #define pmap_update PMAPNAME(update) 154 #define pmap_enter PMAPNAME(enter) 155 #define pmap_remove PMAPNAME(remove) 156 #define pmap_kenter_pa PMAPNAME(kenter_pa) 157 #define pmap_kremove PMAPNAME(kremove) 158 #define pmap_extract PMAPNAME(extract) 159 #define pmap_protect PMAPNAME(protect) 160 #define pmap_unwire PMAPNAME(unwire) 161 #define pmap_page_protect PMAPNAME(page_protect) 162 #define pmap_query_bit PMAPNAME(query_bit) 163 #define pmap_clear_bit PMAPNAME(clear_bit) 164 165 #define pmap_activate PMAPNAME(activate) 166 #define pmap_deactivate PMAPNAME(deactivate) 167 168 #define pmap_pinit PMAPNAME(pinit) 169 #define pmap_procwr PMAPNAME(procwr) 170 171 #define pmap_pool PMAPNAME(pool) 172 #define pmap_upvo_pool PMAPNAME(upvo_pool) 173 #define pmap_mpvo_pool PMAPNAME(mpvo_pool) 174 #define pmap_pvo_table PMAPNAME(pvo_table) 175 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 176 #define pmap_pte_print PMAPNAME(pte_print) 177 #define pmap_pteg_check PMAPNAME(pteg_check) 178 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 179 #define pmap_print_pte PMAPNAME(print_pte) 180 #define pmap_pteg_dist PMAPNAME(pteg_dist) 181 #endif 182 #if defined(DEBUG) || defined(PMAPCHECK) 183 #define pmap_pvo_verify PMAPNAME(pvo_verify) 184 #define pmapcheck PMAPNAME(check) 185 #endif 186 #if defined(DEBUG) || defined(PMAPDEBUG) 187 #define pmapdebug PMAPNAME(debug) 188 #endif 189 #define pmap_steal_memory PMAPNAME(steal_memory) 190 #define pmap_bootstrap PMAPNAME(bootstrap) 191 #else 192 #define STATIC /* nothing */ 193 #endif /* PMAPNAME */ 194 195 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 196 STATIC void pmap_real_memory(paddr_t *, psize_t *); 197 STATIC void pmap_init(void); 198 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 199 STATIC pmap_t pmap_create(void); 200 STATIC void pmap_reference(pmap_t); 201 STATIC void pmap_destroy(pmap_t); 202 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 203 STATIC void pmap_update(pmap_t); 204 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); 205 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 206 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t, u_int); 207 STATIC void pmap_kremove(vaddr_t, vsize_t); 208 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 209 210 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 211 STATIC void pmap_unwire(pmap_t, vaddr_t); 212 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 213 STATIC bool pmap_query_bit(struct vm_page *, int); 214 STATIC bool pmap_clear_bit(struct vm_page *, int); 215 216 STATIC void pmap_activate(struct lwp *); 217 STATIC void pmap_deactivate(struct lwp *); 218 219 STATIC void pmap_pinit(pmap_t pm); 220 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 221 222 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 223 STATIC void pmap_pte_print(volatile struct pte *); 224 STATIC void pmap_pteg_check(void); 225 STATIC void pmap_print_mmuregs(void); 226 STATIC void pmap_print_pte(pmap_t, vaddr_t); 227 STATIC void pmap_pteg_dist(void); 228 #endif 229 #if defined(DEBUG) || defined(PMAPCHECK) 230 STATIC void pmap_pvo_verify(void); 231 #endif 232 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 233 STATIC void pmap_bootstrap(paddr_t, paddr_t); 234 235 #ifdef PMAPNAME 236 const struct pmap_ops PMAPNAME(ops) = { 237 .pmapop_pte_spill = pmap_pte_spill, 238 .pmapop_real_memory = pmap_real_memory, 239 .pmapop_init = pmap_init, 240 .pmapop_virtual_space = pmap_virtual_space, 241 .pmapop_create = pmap_create, 242 .pmapop_reference = pmap_reference, 243 .pmapop_destroy = pmap_destroy, 244 .pmapop_copy = pmap_copy, 245 .pmapop_update = pmap_update, 246 .pmapop_enter = pmap_enter, 247 .pmapop_remove = pmap_remove, 248 .pmapop_kenter_pa = pmap_kenter_pa, 249 .pmapop_kremove = pmap_kremove, 250 .pmapop_extract = pmap_extract, 251 .pmapop_protect = pmap_protect, 252 .pmapop_unwire = pmap_unwire, 253 .pmapop_page_protect = pmap_page_protect, 254 .pmapop_query_bit = pmap_query_bit, 255 .pmapop_clear_bit = pmap_clear_bit, 256 .pmapop_activate = pmap_activate, 257 .pmapop_deactivate = pmap_deactivate, 258 .pmapop_pinit = pmap_pinit, 259 .pmapop_procwr = pmap_procwr, 260 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 261 .pmapop_pte_print = pmap_pte_print, 262 .pmapop_pteg_check = pmap_pteg_check, 263 .pmapop_print_mmuregs = pmap_print_mmuregs, 264 .pmapop_print_pte = pmap_print_pte, 265 .pmapop_pteg_dist = pmap_pteg_dist, 266 #else 267 .pmapop_pte_print = NULL, 268 .pmapop_pteg_check = NULL, 269 .pmapop_print_mmuregs = NULL, 270 .pmapop_print_pte = NULL, 271 .pmapop_pteg_dist = NULL, 272 #endif 273 #if defined(DEBUG) || defined(PMAPCHECK) 274 .pmapop_pvo_verify = pmap_pvo_verify, 275 #else 276 .pmapop_pvo_verify = NULL, 277 #endif 278 .pmapop_steal_memory = pmap_steal_memory, 279 .pmapop_bootstrap = pmap_bootstrap, 280 }; 281 #endif /* !PMAPNAME */ 282 283 /* 284 * The following structure is aligned to 32 bytes 285 */ 286 struct pvo_entry { 287 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 288 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 289 struct pte pvo_pte; /* Prebuilt PTE */ 290 pmap_t pvo_pmap; /* ptr to owning pmap */ 291 vaddr_t pvo_vaddr; /* VA of entry */ 292 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 293 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 294 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 295 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 296 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 297 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 298 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 299 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 300 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 301 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 302 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 303 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 304 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 305 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 306 #define PVO_REMOVE 6 /* PVO has been removed */ 307 #define PVO_WHERE_MASK 15 308 #define PVO_WHERE_SHFT 8 309 } __attribute__ ((aligned (32))); 310 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 311 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 312 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 313 #define PVO_PTEGIDX_CLR(pvo) \ 314 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 315 #define PVO_PTEGIDX_SET(pvo,i) \ 316 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 317 #define PVO_WHERE(pvo,w) \ 318 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 319 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 320 321 TAILQ_HEAD(pvo_tqhead, pvo_entry); 322 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 323 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 324 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 325 326 struct pool pmap_pool; /* pool for pmap structures */ 327 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 328 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 329 330 /* 331 * We keep a cache of unmanaged pages to be used for pvo entries for 332 * unmanaged pages. 333 */ 334 struct pvo_page { 335 SIMPLEQ_ENTRY(pvo_page) pvop_link; 336 }; 337 SIMPLEQ_HEAD(pvop_head, pvo_page); 338 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 339 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 340 static u_long pmap_upvop_free; 341 static u_long pmap_upvop_maxfree; 342 static u_long pmap_mpvop_free; 343 static u_long pmap_mpvop_maxfree; 344 345 static void *pmap_pool_ualloc(struct pool *, int); 346 static void *pmap_pool_malloc(struct pool *, int); 347 348 static void pmap_pool_ufree(struct pool *, void *); 349 static void pmap_pool_mfree(struct pool *, void *); 350 351 static struct pool_allocator pmap_pool_mallocator = { 352 .pa_alloc = pmap_pool_malloc, 353 .pa_free = pmap_pool_mfree, 354 .pa_pagesz = 0, 355 }; 356 357 static struct pool_allocator pmap_pool_uallocator = { 358 .pa_alloc = pmap_pool_ualloc, 359 .pa_free = pmap_pool_ufree, 360 .pa_pagesz = 0, 361 }; 362 363 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 364 void pmap_pte_print(volatile struct pte *); 365 void pmap_pteg_check(void); 366 void pmap_pteg_dist(void); 367 void pmap_print_pte(pmap_t, vaddr_t); 368 void pmap_print_mmuregs(void); 369 #endif 370 371 #if defined(DEBUG) || defined(PMAPCHECK) 372 #ifdef PMAPCHECK 373 int pmapcheck = 1; 374 #else 375 int pmapcheck = 0; 376 #endif 377 void pmap_pvo_verify(void); 378 static void pmap_pvo_check(const struct pvo_entry *); 379 #define PMAP_PVO_CHECK(pvo) \ 380 do { \ 381 if (pmapcheck) \ 382 pmap_pvo_check(pvo); \ 383 } while (0) 384 #else 385 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 386 #endif 387 static int pmap_pte_insert(int, struct pte *); 388 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 389 vaddr_t, paddr_t, register_t, int); 390 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 391 static void pmap_pvo_free(struct pvo_entry *); 392 static void pmap_pvo_free_list(struct pvo_head *); 393 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 394 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 395 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 396 static void pvo_set_exec(struct pvo_entry *); 397 static void pvo_clear_exec(struct pvo_entry *); 398 399 static void tlbia(void); 400 401 static void pmap_release(pmap_t); 402 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 403 404 static uint32_t pmap_pvo_reclaim_nextidx; 405 #ifdef DEBUG 406 static int pmap_pvo_reclaim_debugctr; 407 #endif 408 409 #define VSID_NBPW (sizeof(uint32_t) * 8) 410 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 411 412 static int pmap_initialized; 413 414 #if defined(DEBUG) || defined(PMAPDEBUG) 415 #define PMAPDEBUG_BOOT 0x0001 416 #define PMAPDEBUG_PTE 0x0002 417 #define PMAPDEBUG_EXEC 0x0008 418 #define PMAPDEBUG_PVOENTER 0x0010 419 #define PMAPDEBUG_PVOREMOVE 0x0020 420 #define PMAPDEBUG_ACTIVATE 0x0100 421 #define PMAPDEBUG_CREATE 0x0200 422 #define PMAPDEBUG_ENTER 0x1000 423 #define PMAPDEBUG_KENTER 0x2000 424 #define PMAPDEBUG_KREMOVE 0x4000 425 #define PMAPDEBUG_REMOVE 0x8000 426 427 unsigned int pmapdebug = 0; 428 429 # define DPRINTF(x, ...) printf(x, __VA_ARGS__) 430 # define DPRINTFN(n, x, ...) do if (pmapdebug & PMAPDEBUG_ ## n) printf(x, __VA_ARGS__); while (0) 431 #else 432 # define DPRINTF(x, ...) do { } while (0) 433 # define DPRINTFN(n, x, ...) do { } while (0) 434 #endif 435 436 437 #ifdef PMAPCOUNTERS 438 /* 439 * From pmap_subr.c 440 */ 441 extern struct evcnt pmap_evcnt_mappings; 442 extern struct evcnt pmap_evcnt_unmappings; 443 444 extern struct evcnt pmap_evcnt_kernel_mappings; 445 extern struct evcnt pmap_evcnt_kernel_unmappings; 446 447 extern struct evcnt pmap_evcnt_mappings_replaced; 448 449 extern struct evcnt pmap_evcnt_exec_mappings; 450 extern struct evcnt pmap_evcnt_exec_cached; 451 452 extern struct evcnt pmap_evcnt_exec_synced; 453 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 454 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 455 456 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 457 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 458 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 459 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 460 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 461 462 extern struct evcnt pmap_evcnt_updates; 463 extern struct evcnt pmap_evcnt_collects; 464 extern struct evcnt pmap_evcnt_copies; 465 466 extern struct evcnt pmap_evcnt_ptes_spilled; 467 extern struct evcnt pmap_evcnt_ptes_unspilled; 468 extern struct evcnt pmap_evcnt_ptes_evicted; 469 470 extern struct evcnt pmap_evcnt_ptes_primary[8]; 471 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 472 extern struct evcnt pmap_evcnt_ptes_removed; 473 extern struct evcnt pmap_evcnt_ptes_changed; 474 extern struct evcnt pmap_evcnt_pvos_reclaimed; 475 extern struct evcnt pmap_evcnt_pvos_failed; 476 477 extern struct evcnt pmap_evcnt_zeroed_pages; 478 extern struct evcnt pmap_evcnt_copied_pages; 479 extern struct evcnt pmap_evcnt_idlezeroed_pages; 480 481 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 482 #define PMAPCOUNT2(ev) ((ev).ev_count++) 483 #else 484 #define PMAPCOUNT(ev) ((void) 0) 485 #define PMAPCOUNT2(ev) ((void) 0) 486 #endif 487 488 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 489 490 /* XXXSL: this needs to be moved to assembler */ 491 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 492 493 #ifdef MD_TLBSYNC 494 #define TLBSYNC() MD_TLBSYNC() 495 #else 496 #define TLBSYNC() __asm volatile("tlbsync") 497 #endif 498 #define SYNC() __asm volatile("sync") 499 #define EIEIO() __asm volatile("eieio") 500 #define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va)) 501 #define MFMSR() mfmsr() 502 #define MTMSR(psl) mtmsr(psl) 503 #define MFPVR() mfpvr() 504 #define MFSRIN(va) mfsrin(va) 505 #define MFTB() mfrtcltbl() 506 507 #if defined(DDB) && !defined(PMAP_OEA64) 508 static inline register_t 509 mfsrin(vaddr_t va) 510 { 511 register_t sr; 512 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 513 return sr; 514 } 515 #endif /* DDB && !PMAP_OEA64 */ 516 517 #if defined (PMAP_OEA64_BRIDGE) 518 extern void mfmsr64 (register64_t *result); 519 #endif /* PMAP_OEA64_BRIDGE */ 520 521 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 522 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 523 524 static inline register_t 525 pmap_interrupts_off(void) 526 { 527 register_t msr = MFMSR(); 528 if (msr & PSL_EE) 529 MTMSR(msr & ~PSL_EE); 530 return msr; 531 } 532 533 static void 534 pmap_interrupts_restore(register_t msr) 535 { 536 if (msr & PSL_EE) 537 MTMSR(msr); 538 } 539 540 static inline u_int32_t 541 mfrtcltbl(void) 542 { 543 #ifdef PPC_OEA601 544 if ((MFPVR() >> 16) == MPC601) 545 return (mfrtcl() >> 7); 546 else 547 #endif 548 return (mftbl()); 549 } 550 551 /* 552 * These small routines may have to be replaced, 553 * if/when we support processors other that the 604. 554 */ 555 556 void 557 tlbia(void) 558 { 559 char *i; 560 561 SYNC(); 562 #if defined(PMAP_OEA) 563 /* 564 * Why not use "tlbia"? Because not all processors implement it. 565 * 566 * This needs to be a per-CPU callback to do the appropriate thing 567 * for the CPU. XXX 568 */ 569 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 570 TLBIE(i); 571 EIEIO(); 572 SYNC(); 573 } 574 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 575 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 576 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 577 TLBIEL(i); 578 EIEIO(); 579 SYNC(); 580 } 581 #endif 582 TLBSYNC(); 583 SYNC(); 584 } 585 586 static inline register_t 587 va_to_vsid(const struct pmap *pm, vaddr_t addr) 588 { 589 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 590 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 591 #else /* PMAP_OEA64 */ 592 #if 0 593 const struct ste *ste; 594 register_t hash; 595 int i; 596 597 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 598 599 /* 600 * Try the primary group first 601 */ 602 ste = pm->pm_stes[hash].stes; 603 for (i = 0; i < 8; i++, ste++) { 604 if (ste->ste_hi & STE_V) && 605 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 606 return ste; 607 } 608 609 /* 610 * Then the secondary group. 611 */ 612 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 613 for (i = 0; i < 8; i++, ste++) { 614 if (ste->ste_hi & STE_V) && 615 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 616 return addr; 617 } 618 619 return NULL; 620 #else 621 /* 622 * Rather than searching the STE groups for the VSID, we know 623 * how we generate that from the ESID and so do that. 624 */ 625 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 626 #endif 627 #endif /* PMAP_OEA */ 628 } 629 630 static inline register_t 631 va_to_pteg(const struct pmap *pm, vaddr_t addr) 632 { 633 register_t hash; 634 635 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 636 return hash & pmap_pteg_mask; 637 } 638 639 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 640 /* 641 * Given a PTE in the page table, calculate the VADDR that hashes to it. 642 * The only bit of magic is that the top 4 bits of the address doesn't 643 * technically exist in the PTE. But we know we reserved 4 bits of the 644 * VSID for it so that's how we get it. 645 */ 646 static vaddr_t 647 pmap_pte_to_va(volatile const struct pte *pt) 648 { 649 vaddr_t va; 650 uintptr_t ptaddr = (uintptr_t) pt; 651 652 if (pt->pte_hi & PTE_HID) 653 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 654 655 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 656 #if defined(PMAP_OEA) 657 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 658 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 659 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 660 #endif 661 va <<= ADDR_PIDX_SHFT; 662 663 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 664 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 665 666 #if defined(PMAP_OEA64) 667 /* PPC63 Bits 0-35 */ 668 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 669 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 670 /* PPC Bits 0-3 */ 671 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 672 #endif 673 674 return va; 675 } 676 #endif 677 678 static inline struct pvo_head * 679 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 680 { 681 struct vm_page *pg; 682 struct vm_page_md *md; 683 684 pg = PHYS_TO_VM_PAGE(pa); 685 if (pg_p != NULL) 686 *pg_p = pg; 687 if (pg == NULL) 688 return &pmap_pvo_unmanaged; 689 md = VM_PAGE_TO_MD(pg); 690 return &md->mdpg_pvoh; 691 } 692 693 static inline struct pvo_head * 694 vm_page_to_pvoh(struct vm_page *pg) 695 { 696 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 697 698 return &md->mdpg_pvoh; 699 } 700 701 702 static inline void 703 pmap_attr_clear(struct vm_page *pg, int ptebit) 704 { 705 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 706 707 md->mdpg_attrs &= ~ptebit; 708 } 709 710 static inline int 711 pmap_attr_fetch(struct vm_page *pg) 712 { 713 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 714 715 return md->mdpg_attrs; 716 } 717 718 static inline void 719 pmap_attr_save(struct vm_page *pg, int ptebit) 720 { 721 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 722 723 md->mdpg_attrs |= ptebit; 724 } 725 726 static inline int 727 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 728 { 729 if (pt->pte_hi == pvo_pt->pte_hi 730 #if 0 731 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 732 ~(PTE_REF|PTE_CHG)) == 0 733 #endif 734 ) 735 return 1; 736 return 0; 737 } 738 739 static inline void 740 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 741 { 742 /* 743 * Construct the PTE. Default to IMB initially. Valid bit 744 * only gets set when the real pte is set in memory. 745 * 746 * Note: Don't set the valid bit for correct operation of tlb update. 747 */ 748 #if defined(PMAP_OEA) 749 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 750 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 751 pt->pte_lo = pte_lo; 752 #elif defined (PMAP_OEA64_BRIDGE) || defined (PMAP_OEA64) 753 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 754 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 755 pt->pte_lo = (u_int64_t) pte_lo; 756 #endif /* PMAP_OEA */ 757 } 758 759 static inline void 760 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 761 { 762 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 763 } 764 765 static inline void 766 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 767 { 768 /* 769 * As shown in Section 7.6.3.2.3 770 */ 771 pt->pte_lo &= ~ptebit; 772 TLBIE(va); 773 SYNC(); 774 EIEIO(); 775 TLBSYNC(); 776 SYNC(); 777 #ifdef MULTIPROCESSOR 778 DCBST(pt); 779 #endif 780 } 781 782 static inline void 783 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 784 { 785 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 786 if (pvo_pt->pte_hi & PTE_VALID) 787 panic("pte_set: setting an already valid pte %p", pvo_pt); 788 #endif 789 pvo_pt->pte_hi |= PTE_VALID; 790 791 /* 792 * Update the PTE as defined in section 7.6.3.1 793 * Note that the REF/CHG bits are from pvo_pt and thus should 794 * have been saved so this routine can restore them (if desired). 795 */ 796 pt->pte_lo = pvo_pt->pte_lo; 797 EIEIO(); 798 pt->pte_hi = pvo_pt->pte_hi; 799 TLBSYNC(); 800 SYNC(); 801 #ifdef MULTIPROCESSOR 802 DCBST(pt); 803 #endif 804 pmap_pte_valid++; 805 } 806 807 static inline void 808 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 809 { 810 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 811 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 812 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 813 if ((pt->pte_hi & PTE_VALID) == 0) 814 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 815 #endif 816 817 pvo_pt->pte_hi &= ~PTE_VALID; 818 /* 819 * Force the ref & chg bits back into the PTEs. 820 */ 821 SYNC(); 822 /* 823 * Invalidate the pte ... (Section 7.6.3.3) 824 */ 825 pt->pte_hi &= ~PTE_VALID; 826 SYNC(); 827 TLBIE(va); 828 SYNC(); 829 EIEIO(); 830 TLBSYNC(); 831 SYNC(); 832 /* 833 * Save the ref & chg bits ... 834 */ 835 pmap_pte_synch(pt, pvo_pt); 836 pmap_pte_valid--; 837 } 838 839 static inline void 840 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 841 { 842 /* 843 * Invalidate the PTE 844 */ 845 pmap_pte_unset(pt, pvo_pt, va); 846 pmap_pte_set(pt, pvo_pt); 847 } 848 849 /* 850 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 851 * (either primary or secondary location). 852 * 853 * Note: both the destination and source PTEs must not have PTE_VALID set. 854 */ 855 856 static int 857 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 858 { 859 volatile struct pte *pt; 860 int i; 861 862 #if defined(DEBUG) 863 DPRINTFN(PTE, "pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 864 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo); 865 #endif 866 /* 867 * First try primary hash. 868 */ 869 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 870 if ((pt->pte_hi & PTE_VALID) == 0) { 871 pvo_pt->pte_hi &= ~PTE_HID; 872 pmap_pte_set(pt, pvo_pt); 873 return i; 874 } 875 } 876 877 /* 878 * Now try secondary hash. 879 */ 880 ptegidx ^= pmap_pteg_mask; 881 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 882 if ((pt->pte_hi & PTE_VALID) == 0) { 883 pvo_pt->pte_hi |= PTE_HID; 884 pmap_pte_set(pt, pvo_pt); 885 return i; 886 } 887 } 888 return -1; 889 } 890 891 /* 892 * Spill handler. 893 * 894 * Tries to spill a page table entry from the overflow area. 895 * This runs in either real mode (if dealing with a exception spill) 896 * or virtual mode when dealing with manually spilling one of the 897 * kernel's pte entries. In either case, interrupts are already 898 * disabled. 899 */ 900 901 int 902 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 903 { 904 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 905 struct pvo_entry *pvo; 906 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 907 struct pvo_tqhead *pvoh, *vpvoh = NULL; 908 int ptegidx, i, j; 909 volatile struct pteg *pteg; 910 volatile struct pte *pt; 911 912 PMAP_LOCK(); 913 914 ptegidx = va_to_pteg(pm, addr); 915 916 /* 917 * Have to substitute some entry. Use the primary hash for this. 918 * Use low bits of timebase as random generator. Make sure we are 919 * not picking a kernel pte for replacement. 920 */ 921 pteg = &pmap_pteg_table[ptegidx]; 922 i = MFTB() & 7; 923 for (j = 0; j < 8; j++) { 924 pt = &pteg->pt[i]; 925 if ((pt->pte_hi & PTE_VALID) == 0) 926 break; 927 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 928 < PHYSMAP_VSIDBITS) 929 break; 930 i = (i + 1) & 7; 931 } 932 KASSERT(j < 8); 933 934 source_pvo = NULL; 935 victim_pvo = NULL; 936 pvoh = &pmap_pvo_table[ptegidx]; 937 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 938 939 /* 940 * We need to find pvo entry for this address... 941 */ 942 PMAP_PVO_CHECK(pvo); /* sanity check */ 943 944 /* 945 * If we haven't found the source and we come to a PVO with 946 * a valid PTE, then we know we can't find it because all 947 * evicted PVOs always are first in the list. 948 */ 949 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 950 break; 951 if (source_pvo == NULL && pm == pvo->pvo_pmap && 952 addr == PVO_VADDR(pvo)) { 953 954 /* 955 * Now we have found the entry to be spilled into the 956 * pteg. Attempt to insert it into the page table. 957 */ 958 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 959 if (j >= 0) { 960 PVO_PTEGIDX_SET(pvo, j); 961 PMAP_PVO_CHECK(pvo); /* sanity check */ 962 PVO_WHERE(pvo, SPILL_INSERT); 963 pvo->pvo_pmap->pm_evictions--; 964 PMAPCOUNT(ptes_spilled); 965 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 966 ? pmap_evcnt_ptes_secondary 967 : pmap_evcnt_ptes_primary)[j]); 968 969 /* 970 * Since we keep the evicted entries at the 971 * from of the PVO list, we need move this 972 * (now resident) PVO after the evicted 973 * entries. 974 */ 975 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 976 977 /* 978 * If we don't have to move (either we were the 979 * last entry or the next entry was valid), 980 * don't change our position. Otherwise 981 * move ourselves to the tail of the queue. 982 */ 983 if (next_pvo != NULL && 984 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 985 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 986 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 987 } 988 PMAP_UNLOCK(); 989 return 1; 990 } 991 source_pvo = pvo; 992 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 993 PMAP_UNLOCK(); 994 return 0; 995 } 996 if (victim_pvo != NULL) 997 break; 998 } 999 1000 /* 1001 * We also need the pvo entry of the victim we are replacing 1002 * so save the R & C bits of the PTE. 1003 */ 1004 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1005 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1006 vpvoh = pvoh; /* *1* */ 1007 victim_pvo = pvo; 1008 if (source_pvo != NULL) 1009 break; 1010 } 1011 } 1012 1013 if (source_pvo == NULL) { 1014 PMAPCOUNT(ptes_unspilled); 1015 PMAP_UNLOCK(); 1016 return 0; 1017 } 1018 1019 if (victim_pvo == NULL) { 1020 if ((pt->pte_hi & PTE_HID) == 0) 1021 panic("pmap_pte_spill: victim p-pte (%p) has " 1022 "no pvo entry!", pt); 1023 1024 /* 1025 * If this is a secondary PTE, we need to search 1026 * its primary pvo bucket for the matching PVO. 1027 */ 1028 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1029 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1030 PMAP_PVO_CHECK(pvo); /* sanity check */ 1031 1032 /* 1033 * We also need the pvo entry of the victim we are 1034 * replacing so save the R & C bits of the PTE. 1035 */ 1036 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1037 victim_pvo = pvo; 1038 break; 1039 } 1040 } 1041 if (victim_pvo == NULL) 1042 panic("pmap_pte_spill: victim s-pte (%p) has " 1043 "no pvo entry!", pt); 1044 } 1045 1046 /* 1047 * The victim should be not be a kernel PVO/PTE entry. 1048 */ 1049 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1050 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1051 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1052 1053 /* 1054 * We are invalidating the TLB entry for the EA for the 1055 * we are replacing even though its valid; If we don't 1056 * we lose any ref/chg bit changes contained in the TLB 1057 * entry. 1058 */ 1059 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1060 1061 /* 1062 * To enforce the PVO list ordering constraint that all 1063 * evicted entries should come before all valid entries, 1064 * move the source PVO to the tail of its list and the 1065 * victim PVO to the head of its list (which might not be 1066 * the same list, if the victim was using the secondary hash). 1067 */ 1068 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1069 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1070 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1071 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1072 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1073 pmap_pte_set(pt, &source_pvo->pvo_pte); 1074 victim_pvo->pvo_pmap->pm_evictions++; 1075 source_pvo->pvo_pmap->pm_evictions--; 1076 PVO_WHERE(victim_pvo, SPILL_UNSET); 1077 PVO_WHERE(source_pvo, SPILL_SET); 1078 1079 PVO_PTEGIDX_CLR(victim_pvo); 1080 PVO_PTEGIDX_SET(source_pvo, i); 1081 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1082 PMAPCOUNT(ptes_spilled); 1083 PMAPCOUNT(ptes_evicted); 1084 PMAPCOUNT(ptes_removed); 1085 1086 PMAP_PVO_CHECK(victim_pvo); 1087 PMAP_PVO_CHECK(source_pvo); 1088 1089 PMAP_UNLOCK(); 1090 return 1; 1091 } 1092 1093 /* 1094 * Restrict given range to physical memory 1095 */ 1096 void 1097 pmap_real_memory(paddr_t *start, psize_t *size) 1098 { 1099 struct mem_region *mp; 1100 1101 for (mp = mem; mp->size; mp++) { 1102 if (*start + *size > mp->start 1103 && *start < mp->start + mp->size) { 1104 if (*start < mp->start) { 1105 *size -= mp->start - *start; 1106 *start = mp->start; 1107 } 1108 if (*start + *size > mp->start + mp->size) 1109 *size = mp->start + mp->size - *start; 1110 return; 1111 } 1112 } 1113 *size = 0; 1114 } 1115 1116 /* 1117 * Initialize anything else for pmap handling. 1118 * Called during vm_init(). 1119 */ 1120 void 1121 pmap_init(void) 1122 { 1123 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1124 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1125 &pmap_pool_mallocator, IPL_NONE); 1126 1127 pool_setlowat(&pmap_mpvo_pool, 1008); 1128 1129 pmap_initialized = 1; 1130 1131 } 1132 1133 /* 1134 * How much virtual space does the kernel get? 1135 */ 1136 void 1137 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1138 { 1139 /* 1140 * For now, reserve one segment (minus some overhead) for kernel 1141 * virtual memory 1142 */ 1143 *start = VM_MIN_KERNEL_ADDRESS; 1144 *end = VM_MAX_KERNEL_ADDRESS; 1145 } 1146 1147 /* 1148 * Allocate, initialize, and return a new physical map. 1149 */ 1150 pmap_t 1151 pmap_create(void) 1152 { 1153 pmap_t pm; 1154 1155 pm = pool_get(&pmap_pool, PR_WAITOK); 1156 KASSERT((vaddr_t)pm < VM_MIN_KERNEL_ADDRESS); 1157 memset((void *)pm, 0, sizeof *pm); 1158 pmap_pinit(pm); 1159 1160 DPRINTFN(CREATE, "pmap_create: pm %p:\n" 1161 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1162 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1163 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1164 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1165 pm, 1166 pm->pm_sr[0], pm->pm_sr[1], 1167 pm->pm_sr[2], pm->pm_sr[3], 1168 pm->pm_sr[4], pm->pm_sr[5], 1169 pm->pm_sr[6], pm->pm_sr[7], 1170 pm->pm_sr[8], pm->pm_sr[9], 1171 pm->pm_sr[10], pm->pm_sr[11], 1172 pm->pm_sr[12], pm->pm_sr[13], 1173 pm->pm_sr[14], pm->pm_sr[15]); 1174 return pm; 1175 } 1176 1177 /* 1178 * Initialize a preallocated and zeroed pmap structure. 1179 */ 1180 void 1181 pmap_pinit(pmap_t pm) 1182 { 1183 register_t entropy = MFTB(); 1184 register_t mask; 1185 int i; 1186 1187 /* 1188 * Allocate some segment registers for this pmap. 1189 */ 1190 pm->pm_refs = 1; 1191 PMAP_LOCK(); 1192 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1193 static register_t pmap_vsidcontext; 1194 register_t hash; 1195 unsigned int n; 1196 1197 /* Create a new value by multiplying by a prime adding in 1198 * entropy from the timebase register. This is to make the 1199 * VSID more random so that the PT Hash function collides 1200 * less often. (note that the prime causes gcc to do shifts 1201 * instead of a multiply) 1202 */ 1203 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1204 hash = pmap_vsidcontext & (NPMAPS - 1); 1205 if (hash == 0) { /* 0 is special, avoid it */ 1206 entropy += 0xbadf00d; 1207 continue; 1208 } 1209 n = hash >> 5; 1210 mask = 1L << (hash & (VSID_NBPW-1)); 1211 hash = pmap_vsidcontext; 1212 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1213 /* anything free in this bucket? */ 1214 if (~pmap_vsid_bitmap[n] == 0) { 1215 entropy = hash ^ (hash >> 16); 1216 continue; 1217 } 1218 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1219 mask = 1L << i; 1220 hash &= ~(VSID_NBPW-1); 1221 hash |= i; 1222 } 1223 hash &= PTE_VSID >> PTE_VSID_SHFT; 1224 pmap_vsid_bitmap[n] |= mask; 1225 pm->pm_vsid = hash; 1226 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1227 for (i = 0; i < 16; i++) 1228 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1229 SR_NOEXEC; 1230 #endif 1231 PMAP_UNLOCK(); 1232 return; 1233 } 1234 PMAP_UNLOCK(); 1235 panic("pmap_pinit: out of segments"); 1236 } 1237 1238 /* 1239 * Add a reference to the given pmap. 1240 */ 1241 void 1242 pmap_reference(pmap_t pm) 1243 { 1244 atomic_inc_uint(&pm->pm_refs); 1245 } 1246 1247 /* 1248 * Retire the given pmap from service. 1249 * Should only be called if the map contains no valid mappings. 1250 */ 1251 void 1252 pmap_destroy(pmap_t pm) 1253 { 1254 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1255 pmap_release(pm); 1256 pool_put(&pmap_pool, pm); 1257 } 1258 } 1259 1260 /* 1261 * Release any resources held by the given physical map. 1262 * Called when a pmap initialized by pmap_pinit is being released. 1263 */ 1264 void 1265 pmap_release(pmap_t pm) 1266 { 1267 int idx, mask; 1268 1269 KASSERT(pm->pm_stats.resident_count == 0); 1270 KASSERT(pm->pm_stats.wired_count == 0); 1271 1272 PMAP_LOCK(); 1273 if (pm->pm_sr[0] == 0) 1274 panic("pmap_release"); 1275 idx = pm->pm_vsid & (NPMAPS-1); 1276 mask = 1 << (idx % VSID_NBPW); 1277 idx /= VSID_NBPW; 1278 1279 KASSERT(pmap_vsid_bitmap[idx] & mask); 1280 pmap_vsid_bitmap[idx] &= ~mask; 1281 PMAP_UNLOCK(); 1282 } 1283 1284 /* 1285 * Copy the range specified by src_addr/len 1286 * from the source map to the range dst_addr/len 1287 * in the destination map. 1288 * 1289 * This routine is only advisory and need not do anything. 1290 */ 1291 void 1292 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1293 vsize_t len, vaddr_t src_addr) 1294 { 1295 PMAPCOUNT(copies); 1296 } 1297 1298 /* 1299 * Require that all active physical maps contain no 1300 * incorrect entries NOW. 1301 */ 1302 void 1303 pmap_update(struct pmap *pmap) 1304 { 1305 PMAPCOUNT(updates); 1306 TLBSYNC(); 1307 } 1308 1309 static inline int 1310 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1311 { 1312 int pteidx; 1313 /* 1314 * We can find the actual pte entry without searching by 1315 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1316 * and by noticing the HID bit. 1317 */ 1318 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1319 if (pvo->pvo_pte.pte_hi & PTE_HID) 1320 pteidx ^= pmap_pteg_mask * 8; 1321 return pteidx; 1322 } 1323 1324 volatile struct pte * 1325 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1326 { 1327 volatile struct pte *pt; 1328 1329 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1330 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1331 return NULL; 1332 #endif 1333 1334 /* 1335 * If we haven't been supplied the ptegidx, calculate it. 1336 */ 1337 if (pteidx == -1) { 1338 int ptegidx; 1339 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1340 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1341 } 1342 1343 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1344 1345 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1346 return pt; 1347 #else 1348 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1349 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1350 "pvo but no valid pte index", pvo); 1351 } 1352 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1353 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1354 "pvo but no valid pte", pvo); 1355 } 1356 1357 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1358 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1359 #if defined(DEBUG) || defined(PMAPCHECK) 1360 pmap_pte_print(pt); 1361 #endif 1362 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1363 "pmap_pteg_table %p but invalid in pvo", 1364 pvo, pt); 1365 } 1366 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1367 #if defined(DEBUG) || defined(PMAPCHECK) 1368 pmap_pte_print(pt); 1369 #endif 1370 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1371 "not match pte %p in pmap_pteg_table", 1372 pvo, pt); 1373 } 1374 return pt; 1375 } 1376 1377 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1378 #if defined(DEBUG) || defined(PMAPCHECK) 1379 pmap_pte_print(pt); 1380 #endif 1381 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1382 "pmap_pteg_table but valid in pvo", pvo, pt); 1383 } 1384 return NULL; 1385 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1386 } 1387 1388 struct pvo_entry * 1389 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1390 { 1391 struct pvo_entry *pvo; 1392 int ptegidx; 1393 1394 va &= ~ADDR_POFF; 1395 ptegidx = va_to_pteg(pm, va); 1396 1397 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1398 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1399 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1400 panic("pmap_pvo_find_va: invalid pvo %p on " 1401 "list %#x (%p)", pvo, ptegidx, 1402 &pmap_pvo_table[ptegidx]); 1403 #endif 1404 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1405 if (pteidx_p) 1406 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1407 return pvo; 1408 } 1409 } 1410 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1411 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1412 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1413 return NULL; 1414 } 1415 1416 #if defined(DEBUG) || defined(PMAPCHECK) 1417 void 1418 pmap_pvo_check(const struct pvo_entry *pvo) 1419 { 1420 struct pvo_head *pvo_head; 1421 struct pvo_entry *pvo0; 1422 volatile struct pte *pt; 1423 int failed = 0; 1424 1425 PMAP_LOCK(); 1426 1427 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1428 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1429 1430 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1431 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1432 pvo, pvo->pvo_pmap); 1433 failed = 1; 1434 } 1435 1436 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1437 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1438 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1439 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1440 failed = 1; 1441 } 1442 1443 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1444 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1445 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1446 pvo, LIST_NEXT(pvo, pvo_vlink)); 1447 failed = 1; 1448 } 1449 1450 if (PVO_MANAGED_P(pvo)) { 1451 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1452 } else { 1453 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1454 printf("pmap_pvo_check: pvo %p: non kernel address " 1455 "on kernel unmanaged list\n", pvo); 1456 failed = 1; 1457 } 1458 pvo_head = &pmap_pvo_kunmanaged; 1459 } 1460 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1461 if (pvo0 == pvo) 1462 break; 1463 } 1464 if (pvo0 == NULL) { 1465 printf("pmap_pvo_check: pvo %p: not present " 1466 "on its vlist head %p\n", pvo, pvo_head); 1467 failed = 1; 1468 } 1469 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1470 printf("pmap_pvo_check: pvo %p: not present " 1471 "on its olist head\n", pvo); 1472 failed = 1; 1473 } 1474 pt = pmap_pvo_to_pte(pvo, -1); 1475 if (pt == NULL) { 1476 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1477 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1478 "no PTE\n", pvo); 1479 failed = 1; 1480 } 1481 } else { 1482 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1483 (uintptr_t) pt >= 1484 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1485 printf("pmap_pvo_check: pvo %p: pte %p not in " 1486 "pteg table\n", pvo, pt); 1487 failed = 1; 1488 } 1489 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1490 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1491 "no PTE\n", pvo); 1492 failed = 1; 1493 } 1494 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1495 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1496 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1497 pvo->pvo_pte.pte_hi, 1498 pt->pte_hi); 1499 failed = 1; 1500 } 1501 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1502 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1503 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1504 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1505 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1506 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1507 failed = 1; 1508 } 1509 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1510 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1511 " doesn't not match PVO's VA %#" _PRIxva "\n", 1512 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1513 failed = 1; 1514 } 1515 if (failed) 1516 pmap_pte_print(pt); 1517 } 1518 if (failed) 1519 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1520 pvo->pvo_pmap); 1521 1522 PMAP_UNLOCK(); 1523 } 1524 #endif /* DEBUG || PMAPCHECK */ 1525 1526 /* 1527 * Search the PVO table looking for a non-wired entry. 1528 * If we find one, remove it and return it. 1529 */ 1530 1531 struct pvo_entry * 1532 pmap_pvo_reclaim(struct pmap *pm) 1533 { 1534 struct pvo_tqhead *pvoh; 1535 struct pvo_entry *pvo; 1536 uint32_t idx, endidx; 1537 1538 endidx = pmap_pvo_reclaim_nextidx; 1539 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1540 idx = (idx + 1) & pmap_pteg_mask) { 1541 pvoh = &pmap_pvo_table[idx]; 1542 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1543 if (!PVO_WIRED_P(pvo)) { 1544 pmap_pvo_remove(pvo, -1, NULL); 1545 pmap_pvo_reclaim_nextidx = idx; 1546 PMAPCOUNT(pvos_reclaimed); 1547 return pvo; 1548 } 1549 } 1550 } 1551 return NULL; 1552 } 1553 1554 /* 1555 * This returns whether this is the first mapping of a page. 1556 */ 1557 int 1558 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1559 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1560 { 1561 struct pvo_entry *pvo; 1562 struct pvo_tqhead *pvoh; 1563 register_t msr; 1564 int ptegidx; 1565 int i; 1566 int poolflags = PR_NOWAIT; 1567 1568 /* 1569 * Compute the PTE Group index. 1570 */ 1571 va &= ~ADDR_POFF; 1572 ptegidx = va_to_pteg(pm, va); 1573 1574 msr = pmap_interrupts_off(); 1575 1576 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1577 if (pmap_pvo_remove_depth > 0) 1578 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1579 if (++pmap_pvo_enter_depth > 1) 1580 panic("pmap_pvo_enter: called recursively!"); 1581 #endif 1582 1583 /* 1584 * Remove any existing mapping for this page. Reuse the 1585 * pvo entry if there a mapping. 1586 */ 1587 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1588 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1589 #ifdef DEBUG 1590 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1591 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1592 ~(PTE_REF|PTE_CHG)) == 0 && 1593 va < VM_MIN_KERNEL_ADDRESS) { 1594 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n", 1595 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1596 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n", 1597 pvo->pvo_pte.pte_hi, 1598 pm->pm_sr[va >> ADDR_SR_SHFT]); 1599 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1600 #ifdef DDBX 1601 Debugger(); 1602 #endif 1603 } 1604 #endif 1605 PMAPCOUNT(mappings_replaced); 1606 pmap_pvo_remove(pvo, -1, NULL); 1607 break; 1608 } 1609 } 1610 1611 /* 1612 * If we aren't overwriting an mapping, try to allocate 1613 */ 1614 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1615 --pmap_pvo_enter_depth; 1616 #endif 1617 pmap_interrupts_restore(msr); 1618 if (pvo) { 1619 pmap_pvo_free(pvo); 1620 } 1621 pvo = pool_get(pl, poolflags); 1622 KASSERT((vaddr_t)pvo < VM_MIN_KERNEL_ADDRESS); 1623 1624 #ifdef DEBUG 1625 /* 1626 * Exercise pmap_pvo_reclaim() a little. 1627 */ 1628 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1629 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1630 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1631 pool_put(pl, pvo); 1632 pvo = NULL; 1633 } 1634 #endif 1635 1636 msr = pmap_interrupts_off(); 1637 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1638 ++pmap_pvo_enter_depth; 1639 #endif 1640 if (pvo == NULL) { 1641 pvo = pmap_pvo_reclaim(pm); 1642 if (pvo == NULL) { 1643 if ((flags & PMAP_CANFAIL) == 0) 1644 panic("pmap_pvo_enter: failed"); 1645 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1646 pmap_pvo_enter_depth--; 1647 #endif 1648 PMAPCOUNT(pvos_failed); 1649 pmap_interrupts_restore(msr); 1650 return ENOMEM; 1651 } 1652 } 1653 1654 pvo->pvo_vaddr = va; 1655 pvo->pvo_pmap = pm; 1656 pvo->pvo_vaddr &= ~ADDR_POFF; 1657 if (flags & VM_PROT_EXECUTE) { 1658 PMAPCOUNT(exec_mappings); 1659 pvo_set_exec(pvo); 1660 } 1661 if (flags & PMAP_WIRED) 1662 pvo->pvo_vaddr |= PVO_WIRED; 1663 if (pvo_head != &pmap_pvo_kunmanaged) { 1664 pvo->pvo_vaddr |= PVO_MANAGED; 1665 PMAPCOUNT(mappings); 1666 } else { 1667 PMAPCOUNT(kernel_mappings); 1668 } 1669 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1670 1671 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1672 if (PVO_WIRED_P(pvo)) 1673 pvo->pvo_pmap->pm_stats.wired_count++; 1674 pvo->pvo_pmap->pm_stats.resident_count++; 1675 #if defined(DEBUG) 1676 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1677 DPRINTFN(PVOENTER, 1678 "pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1679 pvo, pm, va, pa); 1680 #endif 1681 1682 /* 1683 * We hope this succeeds but it isn't required. 1684 */ 1685 pvoh = &pmap_pvo_table[ptegidx]; 1686 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1687 if (i >= 0) { 1688 PVO_PTEGIDX_SET(pvo, i); 1689 PVO_WHERE(pvo, ENTER_INSERT); 1690 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1691 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1692 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1693 1694 } else { 1695 /* 1696 * Since we didn't have room for this entry (which makes it 1697 * and evicted entry), place it at the head of the list. 1698 */ 1699 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1700 PMAPCOUNT(ptes_evicted); 1701 pm->pm_evictions++; 1702 /* 1703 * If this is a kernel page, make sure it's active. 1704 */ 1705 if (pm == pmap_kernel()) { 1706 i = pmap_pte_spill(pm, va, false); 1707 KASSERT(i); 1708 } 1709 } 1710 PMAP_PVO_CHECK(pvo); /* sanity check */ 1711 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1712 pmap_pvo_enter_depth--; 1713 #endif 1714 pmap_interrupts_restore(msr); 1715 return 0; 1716 } 1717 1718 static void 1719 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1720 { 1721 volatile struct pte *pt; 1722 int ptegidx; 1723 1724 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1725 if (++pmap_pvo_remove_depth > 1) 1726 panic("pmap_pvo_remove: called recursively!"); 1727 #endif 1728 1729 /* 1730 * If we haven't been supplied the ptegidx, calculate it. 1731 */ 1732 if (pteidx == -1) { 1733 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1734 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1735 } else { 1736 ptegidx = pteidx >> 3; 1737 if (pvo->pvo_pte.pte_hi & PTE_HID) 1738 ptegidx ^= pmap_pteg_mask; 1739 } 1740 PMAP_PVO_CHECK(pvo); /* sanity check */ 1741 1742 /* 1743 * If there is an active pte entry, we need to deactivate it 1744 * (and save the ref & chg bits). 1745 */ 1746 pt = pmap_pvo_to_pte(pvo, pteidx); 1747 if (pt != NULL) { 1748 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1749 PVO_WHERE(pvo, REMOVE); 1750 PVO_PTEGIDX_CLR(pvo); 1751 PMAPCOUNT(ptes_removed); 1752 } else { 1753 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1754 pvo->pvo_pmap->pm_evictions--; 1755 } 1756 1757 /* 1758 * Account for executable mappings. 1759 */ 1760 if (PVO_EXECUTABLE_P(pvo)) 1761 pvo_clear_exec(pvo); 1762 1763 /* 1764 * Update our statistics. 1765 */ 1766 pvo->pvo_pmap->pm_stats.resident_count--; 1767 if (PVO_WIRED_P(pvo)) 1768 pvo->pvo_pmap->pm_stats.wired_count--; 1769 1770 /* 1771 * Save the REF/CHG bits into their cache if the page is managed. 1772 */ 1773 if (PVO_MANAGED_P(pvo)) { 1774 register_t ptelo = pvo->pvo_pte.pte_lo; 1775 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1776 1777 if (pg != NULL) { 1778 /* 1779 * If this page was changed and it is mapped exec, 1780 * invalidate it. 1781 */ 1782 if ((ptelo & PTE_CHG) && 1783 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1784 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1785 if (LIST_EMPTY(pvoh)) { 1786 DPRINTFN(EXEC, "[pmap_pvo_remove: " 1787 "%#" _PRIxpa ": clear-exec]\n", 1788 VM_PAGE_TO_PHYS(pg)); 1789 pmap_attr_clear(pg, PTE_EXEC); 1790 PMAPCOUNT(exec_uncached_pvo_remove); 1791 } else { 1792 DPRINTFN(EXEC, "[pmap_pvo_remove: " 1793 "%#" _PRIxpa ": syncicache]\n", 1794 VM_PAGE_TO_PHYS(pg)); 1795 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1796 PAGE_SIZE); 1797 PMAPCOUNT(exec_synced_pvo_remove); 1798 } 1799 } 1800 1801 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1802 } 1803 PMAPCOUNT(unmappings); 1804 } else { 1805 PMAPCOUNT(kernel_unmappings); 1806 } 1807 1808 /* 1809 * Remove the PVO from its lists and return it to the pool. 1810 */ 1811 LIST_REMOVE(pvo, pvo_vlink); 1812 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1813 if (pvol) { 1814 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1815 } 1816 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1817 pmap_pvo_remove_depth--; 1818 #endif 1819 } 1820 1821 void 1822 pmap_pvo_free(struct pvo_entry *pvo) 1823 { 1824 1825 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1826 } 1827 1828 void 1829 pmap_pvo_free_list(struct pvo_head *pvol) 1830 { 1831 struct pvo_entry *pvo, *npvo; 1832 1833 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1834 npvo = LIST_NEXT(pvo, pvo_vlink); 1835 LIST_REMOVE(pvo, pvo_vlink); 1836 pmap_pvo_free(pvo); 1837 } 1838 } 1839 1840 /* 1841 * Mark a mapping as executable. 1842 * If this is the first executable mapping in the segment, 1843 * clear the noexec flag. 1844 */ 1845 static void 1846 pvo_set_exec(struct pvo_entry *pvo) 1847 { 1848 struct pmap *pm = pvo->pvo_pmap; 1849 1850 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1851 return; 1852 } 1853 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1854 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1855 { 1856 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1857 if (pm->pm_exec[sr]++ == 0) { 1858 pm->pm_sr[sr] &= ~SR_NOEXEC; 1859 } 1860 } 1861 #endif 1862 } 1863 1864 /* 1865 * Mark a mapping as non-executable. 1866 * If this was the last executable mapping in the segment, 1867 * set the noexec flag. 1868 */ 1869 static void 1870 pvo_clear_exec(struct pvo_entry *pvo) 1871 { 1872 struct pmap *pm = pvo->pvo_pmap; 1873 1874 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1875 return; 1876 } 1877 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1878 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1879 { 1880 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1881 if (--pm->pm_exec[sr] == 0) { 1882 pm->pm_sr[sr] |= SR_NOEXEC; 1883 } 1884 } 1885 #endif 1886 } 1887 1888 /* 1889 * Insert physical page at pa into the given pmap at virtual address va. 1890 */ 1891 int 1892 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 1893 { 1894 struct mem_region *mp; 1895 struct pvo_head *pvo_head; 1896 struct vm_page *pg; 1897 struct pool *pl; 1898 register_t pte_lo; 1899 int error; 1900 u_int was_exec = 0; 1901 1902 PMAP_LOCK(); 1903 1904 if (__predict_false(!pmap_initialized)) { 1905 pvo_head = &pmap_pvo_kunmanaged; 1906 pl = &pmap_upvo_pool; 1907 pg = NULL; 1908 was_exec = PTE_EXEC; 1909 } else { 1910 pvo_head = pa_to_pvoh(pa, &pg); 1911 pl = &pmap_mpvo_pool; 1912 } 1913 1914 DPRINTFN(ENTER, 1915 "pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1916 pm, va, pa, prot, flags); 1917 1918 /* 1919 * If this is a managed page, and it's the first reference to the 1920 * page clear the execness of the page. Otherwise fetch the execness. 1921 */ 1922 if (pg != NULL) 1923 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1924 1925 DPRINTFN(ENTER, " was_exec=%d", was_exec); 1926 1927 /* 1928 * Assume the page is cache inhibited and access is guarded unless 1929 * it's in our available memory array. If it is in the memory array, 1930 * asssume it's in memory coherent memory. 1931 */ 1932 if (flags & PMAP_MD_PREFETCHABLE) { 1933 pte_lo = 0; 1934 } else 1935 pte_lo = PTE_G; 1936 1937 if ((flags & PMAP_NOCACHE) == 0) { 1938 for (mp = mem; mp->size; mp++) { 1939 if (pa >= mp->start && pa < mp->start + mp->size) { 1940 pte_lo = PTE_M; 1941 break; 1942 } 1943 } 1944 #ifdef MULTIPROCESSOR 1945 if (((mfpvr() >> 16) & 0xffff) == MPC603e) 1946 pte_lo = PTE_M; 1947 #endif 1948 } else { 1949 pte_lo |= PTE_I; 1950 } 1951 1952 if (prot & VM_PROT_WRITE) 1953 pte_lo |= PTE_BW; 1954 else 1955 pte_lo |= PTE_BR; 1956 1957 /* 1958 * If this was in response to a fault, "pre-fault" the PTE's 1959 * changed/referenced bit appropriately. 1960 */ 1961 if (flags & VM_PROT_WRITE) 1962 pte_lo |= PTE_CHG; 1963 if (flags & VM_PROT_ALL) 1964 pte_lo |= PTE_REF; 1965 1966 /* 1967 * We need to know if this page can be executable 1968 */ 1969 flags |= (prot & VM_PROT_EXECUTE); 1970 1971 /* 1972 * Record mapping for later back-translation and pte spilling. 1973 * This will overwrite any existing mapping. 1974 */ 1975 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1976 1977 /* 1978 * Flush the real page from the instruction cache if this page is 1979 * mapped executable and cacheable and has not been flushed since 1980 * the last time it was modified. 1981 */ 1982 if (error == 0 && 1983 (flags & VM_PROT_EXECUTE) && 1984 (pte_lo & PTE_I) == 0 && 1985 was_exec == 0) { 1986 DPRINTFN(ENTER, " %s", "syncicache"); 1987 PMAPCOUNT(exec_synced); 1988 pmap_syncicache(pa, PAGE_SIZE); 1989 if (pg != NULL) { 1990 pmap_attr_save(pg, PTE_EXEC); 1991 PMAPCOUNT(exec_cached); 1992 #if defined(DEBUG) || defined(PMAPDEBUG) 1993 if (pmapdebug & PMAPDEBUG_ENTER) 1994 printf(" marked-as-exec"); 1995 else if (pmapdebug & PMAPDEBUG_EXEC) 1996 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 1997 VM_PAGE_TO_PHYS(pg)); 1998 1999 #endif 2000 } 2001 } 2002 2003 DPRINTFN(ENTER, ": error=%d\n", error); 2004 2005 PMAP_UNLOCK(); 2006 2007 return error; 2008 } 2009 2010 void 2011 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 2012 { 2013 struct mem_region *mp; 2014 register_t pte_lo; 2015 int error; 2016 2017 #if defined (PMAP_OEA64_BRIDGE) || defined (PMAP_OEA) 2018 if (va < VM_MIN_KERNEL_ADDRESS) 2019 panic("pmap_kenter_pa: attempt to enter " 2020 "non-kernel address %#" _PRIxva "!", va); 2021 #endif 2022 2023 DPRINTFN(KENTER, 2024 "pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot); 2025 2026 PMAP_LOCK(); 2027 2028 /* 2029 * Assume the page is cache inhibited and access is guarded unless 2030 * it's in our available memory array. If it is in the memory array, 2031 * asssume it's in memory coherent memory. 2032 */ 2033 pte_lo = PTE_IG; 2034 if ((flags & PMAP_NOCACHE) == 0) { 2035 for (mp = mem; mp->size; mp++) { 2036 if (pa >= mp->start && pa < mp->start + mp->size) { 2037 pte_lo = PTE_M; 2038 break; 2039 } 2040 } 2041 #ifdef MULTIPROCESSOR 2042 if (((mfpvr() >> 16) & 0xffff) == MPC603e) 2043 pte_lo = PTE_M; 2044 #endif 2045 } 2046 2047 if (prot & VM_PROT_WRITE) 2048 pte_lo |= PTE_BW; 2049 else 2050 pte_lo |= PTE_BR; 2051 2052 /* 2053 * We don't care about REF/CHG on PVOs on the unmanaged list. 2054 */ 2055 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2056 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2057 2058 if (error != 0) 2059 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2060 va, pa, error); 2061 2062 PMAP_UNLOCK(); 2063 } 2064 2065 void 2066 pmap_kremove(vaddr_t va, vsize_t len) 2067 { 2068 if (va < VM_MIN_KERNEL_ADDRESS) 2069 panic("pmap_kremove: attempt to remove " 2070 "non-kernel address %#" _PRIxva "!", va); 2071 2072 DPRINTFN(KREMOVE, "pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len); 2073 pmap_remove(pmap_kernel(), va, va + len); 2074 } 2075 2076 /* 2077 * Remove the given range of mapping entries. 2078 */ 2079 void 2080 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2081 { 2082 struct pvo_head pvol; 2083 struct pvo_entry *pvo; 2084 register_t msr; 2085 int pteidx; 2086 2087 PMAP_LOCK(); 2088 LIST_INIT(&pvol); 2089 msr = pmap_interrupts_off(); 2090 for (; va < endva; va += PAGE_SIZE) { 2091 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2092 if (pvo != NULL) { 2093 pmap_pvo_remove(pvo, pteidx, &pvol); 2094 } 2095 } 2096 pmap_interrupts_restore(msr); 2097 pmap_pvo_free_list(&pvol); 2098 PMAP_UNLOCK(); 2099 } 2100 2101 /* 2102 * Get the physical page address for the given pmap/virtual address. 2103 */ 2104 bool 2105 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2106 { 2107 struct pvo_entry *pvo; 2108 register_t msr; 2109 2110 PMAP_LOCK(); 2111 2112 /* 2113 * If this is a kernel pmap lookup, also check the battable 2114 * and if we get a hit, translate the VA to a PA using the 2115 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2116 * that will wrap back to 0. 2117 */ 2118 if (pm == pmap_kernel() && 2119 (va < VM_MIN_KERNEL_ADDRESS || 2120 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2121 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2122 #if defined (PMAP_OEA) 2123 #ifdef PPC_OEA601 2124 if ((MFPVR() >> 16) == MPC601) { 2125 register_t batu = battable[va >> 23].batu; 2126 register_t batl = battable[va >> 23].batl; 2127 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2128 if (BAT601_VALID_P(batl) && 2129 BAT601_VA_MATCH_P(batu, batl, va)) { 2130 register_t mask = 2131 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2132 if (pap) 2133 *pap = (batl & mask) | (va & ~mask); 2134 PMAP_UNLOCK(); 2135 return true; 2136 } else if (SR601_VALID_P(sr) && 2137 SR601_PA_MATCH_P(sr, va)) { 2138 if (pap) 2139 *pap = va; 2140 PMAP_UNLOCK(); 2141 return true; 2142 } 2143 } else 2144 #endif /* PPC_OEA601 */ 2145 { 2146 register_t batu = battable[BAT_VA2IDX(va)].batu; 2147 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2148 register_t batl = battable[BAT_VA2IDX(va)].batl; 2149 register_t mask = 2150 (~(batu & (BAT_XBL|BAT_BL)) << 15) & ~0x1ffffL; 2151 if (pap) 2152 *pap = (batl & mask) | (va & ~mask); 2153 PMAP_UNLOCK(); 2154 return true; 2155 } 2156 } 2157 PMAP_UNLOCK(); 2158 return false; 2159 #elif defined (PMAP_OEA64_BRIDGE) 2160 if (va >= SEGMENT_LENGTH) 2161 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2162 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2163 else { 2164 if (pap) 2165 *pap = va; 2166 PMAP_UNLOCK(); 2167 return true; 2168 } 2169 #elif defined (PMAP_OEA64) 2170 #error PPC_OEA64 not supported 2171 #endif /* PPC_OEA */ 2172 } 2173 2174 msr = pmap_interrupts_off(); 2175 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2176 if (pvo != NULL) { 2177 PMAP_PVO_CHECK(pvo); /* sanity check */ 2178 if (pap) 2179 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2180 | (va & ADDR_POFF); 2181 } 2182 pmap_interrupts_restore(msr); 2183 PMAP_UNLOCK(); 2184 return pvo != NULL; 2185 } 2186 2187 /* 2188 * Lower the protection on the specified range of this pmap. 2189 */ 2190 void 2191 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2192 { 2193 struct pvo_entry *pvo; 2194 volatile struct pte *pt; 2195 register_t msr; 2196 int pteidx; 2197 2198 /* 2199 * Since this routine only downgrades protection, we should 2200 * always be called with at least one bit not set. 2201 */ 2202 KASSERT(prot != VM_PROT_ALL); 2203 2204 /* 2205 * If there is no protection, this is equivalent to 2206 * remove the pmap from the pmap. 2207 */ 2208 if ((prot & VM_PROT_READ) == 0) { 2209 pmap_remove(pm, va, endva); 2210 return; 2211 } 2212 2213 PMAP_LOCK(); 2214 2215 msr = pmap_interrupts_off(); 2216 for (; va < endva; va += PAGE_SIZE) { 2217 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2218 if (pvo == NULL) 2219 continue; 2220 PMAP_PVO_CHECK(pvo); /* sanity check */ 2221 2222 /* 2223 * Revoke executable if asked to do so. 2224 */ 2225 if ((prot & VM_PROT_EXECUTE) == 0) 2226 pvo_clear_exec(pvo); 2227 2228 #if 0 2229 /* 2230 * If the page is already read-only, no change 2231 * needs to be made. 2232 */ 2233 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2234 continue; 2235 #endif 2236 /* 2237 * Grab the PTE pointer before we diddle with 2238 * the cached PTE copy. 2239 */ 2240 pt = pmap_pvo_to_pte(pvo, pteidx); 2241 /* 2242 * Change the protection of the page. 2243 */ 2244 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2245 pvo->pvo_pte.pte_lo |= PTE_BR; 2246 2247 /* 2248 * If the PVO is in the page table, update 2249 * that pte at well. 2250 */ 2251 if (pt != NULL) { 2252 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2253 PVO_WHERE(pvo, PMAP_PROTECT); 2254 PMAPCOUNT(ptes_changed); 2255 } 2256 2257 PMAP_PVO_CHECK(pvo); /* sanity check */ 2258 } 2259 pmap_interrupts_restore(msr); 2260 PMAP_UNLOCK(); 2261 } 2262 2263 void 2264 pmap_unwire(pmap_t pm, vaddr_t va) 2265 { 2266 struct pvo_entry *pvo; 2267 register_t msr; 2268 2269 PMAP_LOCK(); 2270 msr = pmap_interrupts_off(); 2271 pvo = pmap_pvo_find_va(pm, va, NULL); 2272 if (pvo != NULL) { 2273 if (PVO_WIRED_P(pvo)) { 2274 pvo->pvo_vaddr &= ~PVO_WIRED; 2275 pm->pm_stats.wired_count--; 2276 } 2277 PMAP_PVO_CHECK(pvo); /* sanity check */ 2278 } 2279 pmap_interrupts_restore(msr); 2280 PMAP_UNLOCK(); 2281 } 2282 2283 /* 2284 * Lower the protection on the specified physical page. 2285 */ 2286 void 2287 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2288 { 2289 struct pvo_head *pvo_head, pvol; 2290 struct pvo_entry *pvo, *next_pvo; 2291 volatile struct pte *pt; 2292 register_t msr; 2293 2294 PMAP_LOCK(); 2295 2296 KASSERT(prot != VM_PROT_ALL); 2297 LIST_INIT(&pvol); 2298 msr = pmap_interrupts_off(); 2299 2300 /* 2301 * When UVM reuses a page, it does a pmap_page_protect with 2302 * VM_PROT_NONE. At that point, we can clear the exec flag 2303 * since we know the page will have different contents. 2304 */ 2305 if ((prot & VM_PROT_READ) == 0) { 2306 DPRINTFN(EXEC, "[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2307 VM_PAGE_TO_PHYS(pg)); 2308 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2309 PMAPCOUNT(exec_uncached_page_protect); 2310 pmap_attr_clear(pg, PTE_EXEC); 2311 } 2312 } 2313 2314 pvo_head = vm_page_to_pvoh(pg); 2315 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2316 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2317 PMAP_PVO_CHECK(pvo); /* sanity check */ 2318 2319 /* 2320 * Downgrading to no mapping at all, we just remove the entry. 2321 */ 2322 if ((prot & VM_PROT_READ) == 0) { 2323 pmap_pvo_remove(pvo, -1, &pvol); 2324 continue; 2325 } 2326 2327 /* 2328 * If EXEC permission is being revoked, just clear the 2329 * flag in the PVO. 2330 */ 2331 if ((prot & VM_PROT_EXECUTE) == 0) 2332 pvo_clear_exec(pvo); 2333 2334 /* 2335 * If this entry is already RO, don't diddle with the 2336 * page table. 2337 */ 2338 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2339 PMAP_PVO_CHECK(pvo); 2340 continue; 2341 } 2342 2343 /* 2344 * Grab the PTE before the we diddle the bits so 2345 * pvo_to_pte can verify the pte contents are as 2346 * expected. 2347 */ 2348 pt = pmap_pvo_to_pte(pvo, -1); 2349 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2350 pvo->pvo_pte.pte_lo |= PTE_BR; 2351 if (pt != NULL) { 2352 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2353 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2354 PMAPCOUNT(ptes_changed); 2355 } 2356 PMAP_PVO_CHECK(pvo); /* sanity check */ 2357 } 2358 pmap_interrupts_restore(msr); 2359 pmap_pvo_free_list(&pvol); 2360 2361 PMAP_UNLOCK(); 2362 } 2363 2364 /* 2365 * Activate the address space for the specified process. If the process 2366 * is the current process, load the new MMU context. 2367 */ 2368 void 2369 pmap_activate(struct lwp *l) 2370 { 2371 struct pcb *pcb = lwp_getpcb(l); 2372 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2373 2374 DPRINTFN(ACTIVATE, 2375 "pmap_activate: lwp %p (curlwp %p)\n", l, curlwp); 2376 2377 /* 2378 * XXX Normally performed in cpu_lwp_fork(). 2379 */ 2380 pcb->pcb_pm = pmap; 2381 2382 /* 2383 * In theory, the SR registers need only be valid on return 2384 * to user space wait to do them there. 2385 */ 2386 if (l == curlwp) { 2387 /* Store pointer to new current pmap. */ 2388 curpm = pmap; 2389 } 2390 } 2391 2392 /* 2393 * Deactivate the specified process's address space. 2394 */ 2395 void 2396 pmap_deactivate(struct lwp *l) 2397 { 2398 } 2399 2400 bool 2401 pmap_query_bit(struct vm_page *pg, int ptebit) 2402 { 2403 struct pvo_entry *pvo; 2404 volatile struct pte *pt; 2405 register_t msr; 2406 2407 PMAP_LOCK(); 2408 2409 if (pmap_attr_fetch(pg) & ptebit) { 2410 PMAP_UNLOCK(); 2411 return true; 2412 } 2413 2414 msr = pmap_interrupts_off(); 2415 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2416 PMAP_PVO_CHECK(pvo); /* sanity check */ 2417 /* 2418 * See if we saved the bit off. If so cache, it and return 2419 * success. 2420 */ 2421 if (pvo->pvo_pte.pte_lo & ptebit) { 2422 pmap_attr_save(pg, ptebit); 2423 PMAP_PVO_CHECK(pvo); /* sanity check */ 2424 pmap_interrupts_restore(msr); 2425 PMAP_UNLOCK(); 2426 return true; 2427 } 2428 } 2429 /* 2430 * No luck, now go thru the hard part of looking at the ptes 2431 * themselves. Sync so any pending REF/CHG bits are flushed 2432 * to the PTEs. 2433 */ 2434 SYNC(); 2435 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2436 PMAP_PVO_CHECK(pvo); /* sanity check */ 2437 /* 2438 * See if this pvo have a valid PTE. If so, fetch the 2439 * REF/CHG bits from the valid PTE. If the appropriate 2440 * ptebit is set, cache, it and return success. 2441 */ 2442 pt = pmap_pvo_to_pte(pvo, -1); 2443 if (pt != NULL) { 2444 pmap_pte_synch(pt, &pvo->pvo_pte); 2445 if (pvo->pvo_pte.pte_lo & ptebit) { 2446 pmap_attr_save(pg, ptebit); 2447 PMAP_PVO_CHECK(pvo); /* sanity check */ 2448 pmap_interrupts_restore(msr); 2449 PMAP_UNLOCK(); 2450 return true; 2451 } 2452 } 2453 } 2454 pmap_interrupts_restore(msr); 2455 PMAP_UNLOCK(); 2456 return false; 2457 } 2458 2459 bool 2460 pmap_clear_bit(struct vm_page *pg, int ptebit) 2461 { 2462 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2463 struct pvo_entry *pvo; 2464 volatile struct pte *pt; 2465 register_t msr; 2466 int rv = 0; 2467 2468 PMAP_LOCK(); 2469 msr = pmap_interrupts_off(); 2470 2471 /* 2472 * Fetch the cache value 2473 */ 2474 rv |= pmap_attr_fetch(pg); 2475 2476 /* 2477 * Clear the cached value. 2478 */ 2479 pmap_attr_clear(pg, ptebit); 2480 2481 /* 2482 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2483 * can reset the right ones). Note that since the pvo entries and 2484 * list heads are accessed via BAT0 and are never placed in the 2485 * page table, we don't have to worry about further accesses setting 2486 * the REF/CHG bits. 2487 */ 2488 SYNC(); 2489 2490 /* 2491 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2492 * valid PTE. If so, clear the ptebit from the valid PTE. 2493 */ 2494 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2495 PMAP_PVO_CHECK(pvo); /* sanity check */ 2496 pt = pmap_pvo_to_pte(pvo, -1); 2497 if (pt != NULL) { 2498 /* 2499 * Only sync the PTE if the bit we are looking 2500 * for is not already set. 2501 */ 2502 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2503 pmap_pte_synch(pt, &pvo->pvo_pte); 2504 /* 2505 * If the bit we are looking for was already set, 2506 * clear that bit in the pte. 2507 */ 2508 if (pvo->pvo_pte.pte_lo & ptebit) 2509 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2510 } 2511 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2512 pvo->pvo_pte.pte_lo &= ~ptebit; 2513 PMAP_PVO_CHECK(pvo); /* sanity check */ 2514 } 2515 pmap_interrupts_restore(msr); 2516 2517 /* 2518 * If we are clearing the modify bit and this page was marked EXEC 2519 * and the user of the page thinks the page was modified, then we 2520 * need to clean it from the icache if it's mapped or clear the EXEC 2521 * bit if it's not mapped. The page itself might not have the CHG 2522 * bit set if the modification was done via DMA to the page. 2523 */ 2524 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2525 if (LIST_EMPTY(pvoh)) { 2526 DPRINTFN(EXEC, "[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2527 VM_PAGE_TO_PHYS(pg)); 2528 pmap_attr_clear(pg, PTE_EXEC); 2529 PMAPCOUNT(exec_uncached_clear_modify); 2530 } else { 2531 DPRINTFN(EXEC, "[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2532 VM_PAGE_TO_PHYS(pg)); 2533 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2534 PMAPCOUNT(exec_synced_clear_modify); 2535 } 2536 } 2537 PMAP_UNLOCK(); 2538 return (rv & ptebit) != 0; 2539 } 2540 2541 void 2542 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2543 { 2544 struct pvo_entry *pvo; 2545 size_t offset = va & ADDR_POFF; 2546 int s; 2547 2548 PMAP_LOCK(); 2549 s = splvm(); 2550 while (len > 0) { 2551 size_t seglen = PAGE_SIZE - offset; 2552 if (seglen > len) 2553 seglen = len; 2554 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2555 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2556 pmap_syncicache( 2557 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2558 PMAP_PVO_CHECK(pvo); 2559 } 2560 va += seglen; 2561 len -= seglen; 2562 offset = 0; 2563 } 2564 splx(s); 2565 PMAP_UNLOCK(); 2566 } 2567 2568 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2569 void 2570 pmap_pte_print(volatile struct pte *pt) 2571 { 2572 printf("PTE %p: ", pt); 2573 2574 #if defined(PMAP_OEA) 2575 /* High word: */ 2576 printf("%#" _PRIxpte ": [", pt->pte_hi); 2577 #else 2578 printf("%#" _PRIxpte ": [", pt->pte_hi); 2579 #endif /* PMAP_OEA */ 2580 2581 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2582 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2583 2584 printf("%#" _PRIxpte " %#" _PRIxpte "", 2585 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2586 pt->pte_hi & PTE_API); 2587 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2588 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2589 #else 2590 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2591 #endif /* PMAP_OEA */ 2592 2593 /* Low word: */ 2594 #if defined (PMAP_OEA) 2595 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2596 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2597 #else 2598 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2599 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2600 #endif 2601 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2602 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2603 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2604 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2605 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2606 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2607 switch (pt->pte_lo & PTE_PP) { 2608 case PTE_BR: printf("br]\n"); break; 2609 case PTE_BW: printf("bw]\n"); break; 2610 case PTE_SO: printf("so]\n"); break; 2611 case PTE_SW: printf("sw]\n"); break; 2612 } 2613 } 2614 #endif 2615 2616 #if defined(DDB) 2617 void 2618 pmap_pteg_check(void) 2619 { 2620 volatile struct pte *pt; 2621 int i; 2622 int ptegidx; 2623 u_int p_valid = 0; 2624 u_int s_valid = 0; 2625 u_int invalid = 0; 2626 2627 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2628 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2629 if (pt->pte_hi & PTE_VALID) { 2630 if (pt->pte_hi & PTE_HID) 2631 s_valid++; 2632 else 2633 { 2634 p_valid++; 2635 } 2636 } else 2637 invalid++; 2638 } 2639 } 2640 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2641 p_valid, p_valid, s_valid, s_valid, 2642 invalid, invalid); 2643 } 2644 2645 void 2646 pmap_print_mmuregs(void) 2647 { 2648 int i; 2649 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2650 u_int cpuvers; 2651 #endif 2652 #ifndef PMAP_OEA64 2653 vaddr_t addr; 2654 register_t soft_sr[16]; 2655 #endif 2656 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2657 struct bat soft_ibat[4]; 2658 struct bat soft_dbat[4]; 2659 #endif 2660 paddr_t sdr1; 2661 2662 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2663 cpuvers = MFPVR() >> 16; 2664 #endif 2665 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2666 #ifndef PMAP_OEA64 2667 addr = 0; 2668 for (i = 0; i < 16; i++) { 2669 soft_sr[i] = MFSRIN(addr); 2670 addr += (1 << ADDR_SR_SHFT); 2671 } 2672 #endif 2673 2674 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2675 /* read iBAT (601: uBAT) registers */ 2676 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2677 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2678 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2679 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2680 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2681 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2682 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2683 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2684 2685 2686 if (cpuvers != MPC601) { 2687 /* read dBAT registers */ 2688 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2689 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2690 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2691 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2692 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2693 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2694 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2695 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2696 } 2697 #endif 2698 2699 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2700 #ifndef PMAP_OEA64 2701 printf("SR[]:\t"); 2702 for (i = 0; i < 4; i++) 2703 printf("0x%08lx, ", soft_sr[i]); 2704 printf("\n\t"); 2705 for ( ; i < 8; i++) 2706 printf("0x%08lx, ", soft_sr[i]); 2707 printf("\n\t"); 2708 for ( ; i < 12; i++) 2709 printf("0x%08lx, ", soft_sr[i]); 2710 printf("\n\t"); 2711 for ( ; i < 16; i++) 2712 printf("0x%08lx, ", soft_sr[i]); 2713 printf("\n"); 2714 #endif 2715 2716 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2717 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2718 for (i = 0; i < 4; i++) { 2719 printf("0x%08lx 0x%08lx, ", 2720 soft_ibat[i].batu, soft_ibat[i].batl); 2721 if (i == 1) 2722 printf("\n\t"); 2723 } 2724 if (cpuvers != MPC601) { 2725 printf("\ndBAT[]:\t"); 2726 for (i = 0; i < 4; i++) { 2727 printf("0x%08lx 0x%08lx, ", 2728 soft_dbat[i].batu, soft_dbat[i].batl); 2729 if (i == 1) 2730 printf("\n\t"); 2731 } 2732 } 2733 printf("\n"); 2734 #endif /* PMAP_OEA... */ 2735 } 2736 2737 void 2738 pmap_print_pte(pmap_t pm, vaddr_t va) 2739 { 2740 struct pvo_entry *pvo; 2741 volatile struct pte *pt; 2742 int pteidx; 2743 2744 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2745 if (pvo != NULL) { 2746 pt = pmap_pvo_to_pte(pvo, pteidx); 2747 if (pt != NULL) { 2748 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2749 va, pt, 2750 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2751 pt->pte_hi, pt->pte_lo); 2752 } else { 2753 printf("No valid PTE found\n"); 2754 } 2755 } else { 2756 printf("Address not in pmap\n"); 2757 } 2758 } 2759 2760 void 2761 pmap_pteg_dist(void) 2762 { 2763 struct pvo_entry *pvo; 2764 int ptegidx; 2765 int depth; 2766 int max_depth = 0; 2767 unsigned int depths[64]; 2768 2769 memset(depths, 0, sizeof(depths)); 2770 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2771 depth = 0; 2772 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2773 depth++; 2774 } 2775 if (depth > max_depth) 2776 max_depth = depth; 2777 if (depth > 63) 2778 depth = 63; 2779 depths[depth]++; 2780 } 2781 2782 for (depth = 0; depth < 64; depth++) { 2783 printf(" [%2d]: %8u", depth, depths[depth]); 2784 if ((depth & 3) == 3) 2785 printf("\n"); 2786 if (depth == max_depth) 2787 break; 2788 } 2789 if ((depth & 3) != 3) 2790 printf("\n"); 2791 printf("Max depth found was %d\n", max_depth); 2792 } 2793 #endif /* DEBUG */ 2794 2795 #if defined(PMAPCHECK) || defined(DEBUG) 2796 void 2797 pmap_pvo_verify(void) 2798 { 2799 int ptegidx; 2800 int s; 2801 2802 s = splvm(); 2803 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2804 struct pvo_entry *pvo; 2805 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2806 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2807 panic("pmap_pvo_verify: invalid pvo %p " 2808 "on list %#x", pvo, ptegidx); 2809 pmap_pvo_check(pvo); 2810 } 2811 } 2812 splx(s); 2813 } 2814 #endif /* PMAPCHECK */ 2815 2816 2817 void * 2818 pmap_pool_ualloc(struct pool *pp, int flags) 2819 { 2820 struct pvo_page *pvop; 2821 2822 if (uvm.page_init_done != true) { 2823 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2824 } 2825 2826 PMAP_LOCK(); 2827 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2828 if (pvop != NULL) { 2829 pmap_upvop_free--; 2830 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2831 PMAP_UNLOCK(); 2832 return pvop; 2833 } 2834 PMAP_UNLOCK(); 2835 return pmap_pool_malloc(pp, flags); 2836 } 2837 2838 void * 2839 pmap_pool_malloc(struct pool *pp, int flags) 2840 { 2841 struct pvo_page *pvop; 2842 struct vm_page *pg; 2843 2844 PMAP_LOCK(); 2845 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2846 if (pvop != NULL) { 2847 pmap_mpvop_free--; 2848 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2849 PMAP_UNLOCK(); 2850 return pvop; 2851 } 2852 PMAP_UNLOCK(); 2853 again: 2854 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2855 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2856 if (__predict_false(pg == NULL)) { 2857 if (flags & PR_WAITOK) { 2858 uvm_wait("plpg"); 2859 goto again; 2860 } else { 2861 return (0); 2862 } 2863 } 2864 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2865 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2866 } 2867 2868 void 2869 pmap_pool_ufree(struct pool *pp, void *va) 2870 { 2871 struct pvo_page *pvop; 2872 #if 0 2873 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2874 pmap_pool_mfree(va, size, tag); 2875 return; 2876 } 2877 #endif 2878 PMAP_LOCK(); 2879 pvop = va; 2880 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2881 pmap_upvop_free++; 2882 if (pmap_upvop_free > pmap_upvop_maxfree) 2883 pmap_upvop_maxfree = pmap_upvop_free; 2884 PMAP_UNLOCK(); 2885 } 2886 2887 void 2888 pmap_pool_mfree(struct pool *pp, void *va) 2889 { 2890 struct pvo_page *pvop; 2891 2892 PMAP_LOCK(); 2893 pvop = va; 2894 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2895 pmap_mpvop_free++; 2896 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2897 pmap_mpvop_maxfree = pmap_mpvop_free; 2898 PMAP_UNLOCK(); 2899 #if 0 2900 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2901 #endif 2902 } 2903 2904 /* 2905 * This routine in bootstraping to steal to-be-managed memory (which will 2906 * then be unmanaged). We use it to grab from the first 256MB for our 2907 * pmap needs and above 256MB for other stuff. 2908 */ 2909 vaddr_t 2910 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2911 { 2912 vsize_t size; 2913 vaddr_t va; 2914 paddr_t pa = 0; 2915 int npgs, bank; 2916 struct vm_physseg *ps; 2917 2918 if (uvm.page_init_done == true) 2919 panic("pmap_steal_memory: called _after_ bootstrap"); 2920 2921 *vstartp = VM_MIN_KERNEL_ADDRESS; 2922 *vendp = VM_MAX_KERNEL_ADDRESS; 2923 2924 size = round_page(vsize); 2925 npgs = atop(size); 2926 2927 /* 2928 * PA 0 will never be among those given to UVM so we can use it 2929 * to indicate we couldn't steal any memory. 2930 */ 2931 for (bank = 0; bank < vm_nphysseg; bank++) { 2932 ps = VM_PHYSMEM_PTR(bank); 2933 if (ps->free_list == VM_FREELIST_FIRST256 && 2934 ps->avail_end - ps->avail_start >= npgs) { 2935 pa = ptoa(ps->avail_start); 2936 break; 2937 } 2938 } 2939 2940 if (pa == 0) 2941 panic("pmap_steal_memory: no approriate memory to steal!"); 2942 2943 ps->avail_start += npgs; 2944 ps->start += npgs; 2945 2946 /* 2947 * If we've used up all the pages in the segment, remove it and 2948 * compact the list. 2949 */ 2950 if (ps->avail_start == ps->end) { 2951 /* 2952 * If this was the last one, then a very bad thing has occurred 2953 */ 2954 if (--vm_nphysseg == 0) 2955 panic("pmap_steal_memory: out of memory!"); 2956 2957 printf("pmap_steal_memory: consumed bank %d\n", bank); 2958 for (; bank < vm_nphysseg; bank++, ps++) { 2959 ps[0] = ps[1]; 2960 } 2961 } 2962 2963 va = (vaddr_t) pa; 2964 memset((void *) va, 0, size); 2965 pmap_pages_stolen += npgs; 2966 #ifdef DEBUG 2967 if (pmapdebug && npgs > 1) { 2968 u_int cnt = 0; 2969 for (bank = 0; bank < vm_nphysseg; bank++) { 2970 ps = VM_PHYSMEM_PTR(bank); 2971 cnt += ps->avail_end - ps->avail_start; 2972 } 2973 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2974 npgs, pmap_pages_stolen, cnt); 2975 } 2976 #endif 2977 2978 return va; 2979 } 2980 2981 /* 2982 * Find a chuck of memory with right size and alignment. 2983 */ 2984 paddr_t 2985 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2986 { 2987 struct mem_region *mp; 2988 paddr_t s, e; 2989 int i, j; 2990 2991 size = round_page(size); 2992 2993 DPRINTFN(BOOT, 2994 "pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 2995 size, alignment, at_end); 2996 2997 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2998 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 2999 alignment); 3000 3001 if (at_end) { 3002 if (alignment != PAGE_SIZE) 3003 panic("pmap_boot_find_memory: invalid ending " 3004 "alignment %#" _PRIxpa, alignment); 3005 3006 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 3007 s = mp->start + mp->size - size; 3008 if (s >= mp->start && mp->size >= size) { 3009 DPRINTFN(BOOT, ": %#" _PRIxpa "\n", s); 3010 DPRINTFN(BOOT, 3011 "pmap_boot_find_memory: b-avail[%d] start " 3012 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3013 mp->start, mp->size); 3014 mp->size -= size; 3015 DPRINTFN(BOOT, 3016 "pmap_boot_find_memory: a-avail[%d] start " 3017 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3018 mp->start, mp->size); 3019 return s; 3020 } 3021 } 3022 panic("pmap_boot_find_memory: no available memory"); 3023 } 3024 3025 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3026 s = (mp->start + alignment - 1) & ~(alignment-1); 3027 e = s + size; 3028 3029 /* 3030 * Is the calculated region entirely within the region? 3031 */ 3032 if (s < mp->start || e > mp->start + mp->size) 3033 continue; 3034 3035 DPRINTFN(BOOT, ": %#" _PRIxpa "\n", s); 3036 if (s == mp->start) { 3037 /* 3038 * If the block starts at the beginning of region, 3039 * adjust the size & start. (the region may now be 3040 * zero in length) 3041 */ 3042 DPRINTFN(BOOT, 3043 "pmap_boot_find_memory: b-avail[%d] start " 3044 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3045 mp->start += size; 3046 mp->size -= size; 3047 DPRINTFN(BOOT, 3048 "pmap_boot_find_memory: a-avail[%d] start " 3049 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3050 } else if (e == mp->start + mp->size) { 3051 /* 3052 * If the block starts at the beginning of region, 3053 * adjust only the size. 3054 */ 3055 DPRINTFN(BOOT, 3056 "pmap_boot_find_memory: b-avail[%d] start " 3057 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3058 mp->size -= size; 3059 DPRINTFN(BOOT, 3060 "pmap_boot_find_memory: a-avail[%d] start " 3061 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3062 } else { 3063 /* 3064 * Block is in the middle of the region, so we 3065 * have to split it in two. 3066 */ 3067 for (j = avail_cnt; j > i + 1; j--) { 3068 avail[j] = avail[j-1]; 3069 } 3070 DPRINTFN(BOOT, 3071 "pmap_boot_find_memory: b-avail[%d] start " 3072 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3073 mp[1].start = e; 3074 mp[1].size = mp[0].start + mp[0].size - e; 3075 mp[0].size = s - mp[0].start; 3076 avail_cnt++; 3077 for (; i < avail_cnt; i++) { 3078 DPRINTFN(BOOT, 3079 "pmap_boot_find_memory: a-avail[%d] " 3080 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3081 avail[i].start, avail[i].size); 3082 } 3083 } 3084 KASSERT(s == (uintptr_t) s); 3085 return s; 3086 } 3087 panic("pmap_boot_find_memory: not enough memory for " 3088 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3089 } 3090 3091 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3092 #if defined (PMAP_OEA64_BRIDGE) 3093 int 3094 pmap_setup_segment0_map(int use_large_pages, ...) 3095 { 3096 vaddr_t va, va_end; 3097 3098 register_t pte_lo = 0x0; 3099 int ptegidx = 0; 3100 struct pte pte; 3101 va_list ap; 3102 3103 /* Coherent + Supervisor RW, no user access */ 3104 pte_lo = PTE_M; 3105 3106 /* XXXSL 3107 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3108 * these have to take priority. 3109 */ 3110 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3111 ptegidx = va_to_pteg(pmap_kernel(), va); 3112 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3113 (void)pmap_pte_insert(ptegidx, &pte); 3114 } 3115 3116 va_start(ap, use_large_pages); 3117 while (1) { 3118 paddr_t pa; 3119 size_t size; 3120 3121 va = va_arg(ap, vaddr_t); 3122 3123 if (va == 0) 3124 break; 3125 3126 pa = va_arg(ap, paddr_t); 3127 size = va_arg(ap, size_t); 3128 3129 for (va_end = va + size; va < va_end; va += 0x1000, pa += 0x1000) { 3130 #if 0 3131 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3132 #endif 3133 ptegidx = va_to_pteg(pmap_kernel(), va); 3134 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3135 (void)pmap_pte_insert(ptegidx, &pte); 3136 } 3137 } 3138 3139 TLBSYNC(); 3140 SYNC(); 3141 return (0); 3142 } 3143 #endif /* PMAP_OEA64_BRIDGE */ 3144 3145 /* 3146 * This is not part of the defined PMAP interface and is specific to the 3147 * PowerPC architecture. This is called during initppc, before the system 3148 * is really initialized. 3149 */ 3150 void 3151 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3152 { 3153 struct mem_region *mp, tmp; 3154 paddr_t s, e; 3155 psize_t size; 3156 int i, j; 3157 3158 /* 3159 * Get memory. 3160 */ 3161 mem_regions(&mem, &avail); 3162 #if defined(DEBUG) 3163 if (pmapdebug & PMAPDEBUG_BOOT) { 3164 printf("pmap_bootstrap: memory configuration:\n"); 3165 for (mp = mem; mp->size; mp++) { 3166 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3167 mp->start, mp->size); 3168 } 3169 for (mp = avail; mp->size; mp++) { 3170 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3171 mp->start, mp->size); 3172 } 3173 } 3174 #endif 3175 3176 /* 3177 * Find out how much physical memory we have and in how many chunks. 3178 */ 3179 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3180 if (mp->start >= pmap_memlimit) 3181 continue; 3182 if (mp->start + mp->size > pmap_memlimit) { 3183 size = pmap_memlimit - mp->start; 3184 physmem += btoc(size); 3185 } else { 3186 physmem += btoc(mp->size); 3187 } 3188 mem_cnt++; 3189 } 3190 3191 /* 3192 * Count the number of available entries. 3193 */ 3194 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3195 avail_cnt++; 3196 3197 /* 3198 * Page align all regions. 3199 */ 3200 kernelstart = trunc_page(kernelstart); 3201 kernelend = round_page(kernelend); 3202 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3203 s = round_page(mp->start); 3204 mp->size -= (s - mp->start); 3205 mp->size = trunc_page(mp->size); 3206 mp->start = s; 3207 e = mp->start + mp->size; 3208 3209 DPRINTFN(BOOT, 3210 "pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3211 i, mp->start, mp->size); 3212 3213 /* 3214 * Don't allow the end to run beyond our artificial limit 3215 */ 3216 if (e > pmap_memlimit) 3217 e = pmap_memlimit; 3218 3219 /* 3220 * Is this region empty or strange? skip it. 3221 */ 3222 if (e <= s) { 3223 mp->start = 0; 3224 mp->size = 0; 3225 continue; 3226 } 3227 3228 /* 3229 * Does this overlap the beginning of kernel? 3230 * Does extend past the end of the kernel? 3231 */ 3232 else if (s < kernelstart && e > kernelstart) { 3233 if (e > kernelend) { 3234 avail[avail_cnt].start = kernelend; 3235 avail[avail_cnt].size = e - kernelend; 3236 avail_cnt++; 3237 } 3238 mp->size = kernelstart - s; 3239 } 3240 /* 3241 * Check whether this region overlaps the end of the kernel. 3242 */ 3243 else if (s < kernelend && e > kernelend) { 3244 mp->start = kernelend; 3245 mp->size = e - kernelend; 3246 } 3247 /* 3248 * Look whether this regions is completely inside the kernel. 3249 * Nuke it if it does. 3250 */ 3251 else if (s >= kernelstart && e <= kernelend) { 3252 mp->start = 0; 3253 mp->size = 0; 3254 } 3255 /* 3256 * If the user imposed a memory limit, enforce it. 3257 */ 3258 else if (s >= pmap_memlimit) { 3259 mp->start = -PAGE_SIZE; /* let's know why */ 3260 mp->size = 0; 3261 } 3262 else { 3263 mp->start = s; 3264 mp->size = e - s; 3265 } 3266 DPRINTFN(BOOT, 3267 "pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3268 i, mp->start, mp->size); 3269 } 3270 3271 /* 3272 * Move (and uncount) all the null return to the end. 3273 */ 3274 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3275 if (mp->size == 0) { 3276 tmp = avail[i]; 3277 avail[i] = avail[--avail_cnt]; 3278 avail[avail_cnt] = avail[i]; 3279 } 3280 } 3281 3282 /* 3283 * (Bubble)sort them into ascending order. 3284 */ 3285 for (i = 0; i < avail_cnt; i++) { 3286 for (j = i + 1; j < avail_cnt; j++) { 3287 if (avail[i].start > avail[j].start) { 3288 tmp = avail[i]; 3289 avail[i] = avail[j]; 3290 avail[j] = tmp; 3291 } 3292 } 3293 } 3294 3295 /* 3296 * Make sure they don't overlap. 3297 */ 3298 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3299 if (mp[0].start + mp[0].size > mp[1].start) { 3300 mp[0].size = mp[1].start - mp[0].start; 3301 } 3302 DPRINTFN(BOOT, 3303 "pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3304 i, mp->start, mp->size); 3305 } 3306 DPRINTFN(BOOT, 3307 "pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3308 i, mp->start, mp->size); 3309 3310 #ifdef PTEGCOUNT 3311 pmap_pteg_cnt = PTEGCOUNT; 3312 #else /* PTEGCOUNT */ 3313 3314 pmap_pteg_cnt = 0x1000; 3315 3316 while (pmap_pteg_cnt < physmem) 3317 pmap_pteg_cnt <<= 1; 3318 3319 pmap_pteg_cnt >>= 1; 3320 #endif /* PTEGCOUNT */ 3321 3322 #ifdef DEBUG 3323 DPRINTFN(BOOT, "pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt); 3324 #endif 3325 3326 /* 3327 * Find suitably aligned memory for PTEG hash table. 3328 */ 3329 size = pmap_pteg_cnt * sizeof(struct pteg); 3330 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3331 3332 #ifdef DEBUG 3333 DPRINTFN(BOOT, 3334 "PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table); 3335 #endif 3336 3337 3338 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3339 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3340 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3341 pmap_pteg_table, size); 3342 #endif 3343 3344 memset(__UNVOLATILE(pmap_pteg_table), 0, 3345 pmap_pteg_cnt * sizeof(struct pteg)); 3346 pmap_pteg_mask = pmap_pteg_cnt - 1; 3347 3348 /* 3349 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3350 * with pages. So we just steal them before giving them to UVM. 3351 */ 3352 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3353 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3354 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3355 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3356 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3357 pmap_pvo_table, size); 3358 #endif 3359 3360 for (i = 0; i < pmap_pteg_cnt; i++) 3361 TAILQ_INIT(&pmap_pvo_table[i]); 3362 3363 #ifndef MSGBUFADDR 3364 /* 3365 * Allocate msgbuf in high memory. 3366 */ 3367 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3368 #endif 3369 3370 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3371 paddr_t pfstart = atop(mp->start); 3372 paddr_t pfend = atop(mp->start + mp->size); 3373 if (mp->size == 0) 3374 continue; 3375 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3376 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3377 VM_FREELIST_FIRST256); 3378 } else if (mp->start >= SEGMENT_LENGTH) { 3379 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3380 VM_FREELIST_DEFAULT); 3381 } else { 3382 pfend = atop(SEGMENT_LENGTH); 3383 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3384 VM_FREELIST_FIRST256); 3385 pfstart = atop(SEGMENT_LENGTH); 3386 pfend = atop(mp->start + mp->size); 3387 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3388 VM_FREELIST_DEFAULT); 3389 } 3390 } 3391 3392 /* 3393 * Make sure kernel vsid is allocated as well as VSID 0. 3394 */ 3395 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3396 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3397 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3398 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3399 pmap_vsid_bitmap[0] |= 1; 3400 3401 /* 3402 * Initialize kernel pmap and hardware. 3403 */ 3404 3405 /* PMAP_OEA64_BRIDGE does support these instructions */ 3406 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3407 for (i = 0; i < 16; i++) { 3408 #if defined(PPC_OEA601) 3409 /* XXX wedges for segment register 0xf , so set later */ 3410 if ((iosrtable[i] & SR601_T) && ((MFPVR() >> 16) == MPC601)) 3411 continue; 3412 #endif 3413 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3414 __asm volatile ("mtsrin %0,%1" 3415 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3416 } 3417 3418 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3419 __asm volatile ("mtsr %0,%1" 3420 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3421 #ifdef KERNEL2_SR 3422 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3423 __asm volatile ("mtsr %0,%1" 3424 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3425 #endif 3426 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3427 #if defined (PMAP_OEA) 3428 for (i = 0; i < 16; i++) { 3429 if (iosrtable[i] & SR601_T) { 3430 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3431 __asm volatile ("mtsrin %0,%1" 3432 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3433 } 3434 } 3435 __asm volatile ("sync; mtsdr1 %0; isync" 3436 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3437 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3438 __asm __volatile ("sync; mtsdr1 %0; isync" 3439 :: "r"((uintptr_t)pmap_pteg_table | (32 - __builtin_clz(pmap_pteg_mask >> 11)))); 3440 #endif 3441 tlbia(); 3442 3443 #ifdef ALTIVEC 3444 pmap_use_altivec = cpu_altivec; 3445 #endif 3446 3447 #ifdef DEBUG 3448 if (pmapdebug & PMAPDEBUG_BOOT) { 3449 u_int cnt; 3450 int bank; 3451 char pbuf[9]; 3452 for (cnt = 0, bank = 0; bank < vm_nphysseg; bank++) { 3453 cnt += VM_PHYSMEM_PTR(bank)->avail_end - VM_PHYSMEM_PTR(bank)->avail_start; 3454 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3455 bank, 3456 ptoa(VM_PHYSMEM_PTR(bank)->avail_start), 3457 ptoa(VM_PHYSMEM_PTR(bank)->avail_end), 3458 ptoa(VM_PHYSMEM_PTR(bank)->avail_end - VM_PHYSMEM_PTR(bank)->avail_start)); 3459 } 3460 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3461 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3462 pbuf, cnt); 3463 } 3464 #endif 3465 3466 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3467 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3468 &pmap_pool_uallocator, IPL_VM); 3469 3470 pool_setlowat(&pmap_upvo_pool, 252); 3471 3472 pool_init(&pmap_pool, sizeof(struct pmap), 3473 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3474 IPL_NONE); 3475 3476 #if defined(PMAP_NEED_MAPKERNEL) 3477 { 3478 struct pmap *pm = pmap_kernel(); 3479 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3480 extern int etext[], kernel_text[]; 3481 vaddr_t va, va_etext = (paddr_t) etext; 3482 #endif 3483 paddr_t pa, pa_end; 3484 register_t sr; 3485 struct pte pt; 3486 unsigned int ptegidx; 3487 int bank; 3488 3489 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3490 pm->pm_sr[0] = sr; 3491 3492 for (bank = 0; bank < vm_nphysseg; bank++) { 3493 pa_end = ptoa(VM_PHYSMEM_PTR(bank)->avail_end); 3494 pa = ptoa(VM_PHYSMEM_PTR(bank)->avail_start); 3495 for (; pa < pa_end; pa += PAGE_SIZE) { 3496 ptegidx = va_to_pteg(pm, pa); 3497 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3498 pmap_pte_insert(ptegidx, &pt); 3499 } 3500 } 3501 3502 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3503 va = (vaddr_t) kernel_text; 3504 3505 for (pa = kernelstart; va < va_etext; 3506 pa += PAGE_SIZE, va += PAGE_SIZE) { 3507 ptegidx = va_to_pteg(pm, va); 3508 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3509 pmap_pte_insert(ptegidx, &pt); 3510 } 3511 3512 for (; pa < kernelend; 3513 pa += PAGE_SIZE, va += PAGE_SIZE) { 3514 ptegidx = va_to_pteg(pm, va); 3515 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3516 pmap_pte_insert(ptegidx, &pt); 3517 } 3518 3519 for (va = 0, pa = 0; va < kernelstart; 3520 pa += PAGE_SIZE, va += PAGE_SIZE) { 3521 ptegidx = va_to_pteg(pm, va); 3522 if (va < 0x3000) 3523 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3524 else 3525 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3526 pmap_pte_insert(ptegidx, &pt); 3527 } 3528 for (va = kernelend, pa = kernelend; va < SEGMENT_LENGTH; 3529 pa += PAGE_SIZE, va += PAGE_SIZE) { 3530 ptegidx = va_to_pteg(pm, va); 3531 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3532 pmap_pte_insert(ptegidx, &pt); 3533 } 3534 #endif 3535 3536 __asm volatile ("mtsrin %0,%1" 3537 :: "r"(sr), "r"(kernelstart)); 3538 } 3539 #endif 3540 3541 #if defined(PMAPDEBUG) 3542 if ( pmapdebug ) 3543 pmap_print_mmuregs(); 3544 #endif 3545 } 3546
Indexes created Sat Oct 25 07:10:08 GMT 2025