pmap.c revision 1.94
1 /* $NetBSD: pmap.c,v 1.94 2016/12/23 07:15:28 cherry Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 36 * Copyright (C) 1995, 1996 TooLs GmbH. 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by TooLs GmbH. 50 * 4. The name of TooLs GmbH may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 58 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 59 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 60 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 61 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 62 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.94 2016/12/23 07:15:28 cherry Exp $"); 67 68 #define PMAP_NOOPNAMES 69 70 #include "opt_ppcarch.h" 71 #include "opt_altivec.h" 72 #include "opt_multiprocessor.h" 73 #include "opt_pmap.h" 74 75 #include <sys/param.h> 76 #include <sys/proc.h> 77 #include <sys/pool.h> 78 #include <sys/queue.h> 79 #include <sys/device.h> /* for evcnt */ 80 #include <sys/systm.h> 81 #include <sys/atomic.h> 82 83 #include <uvm/uvm.h> 84 #include <uvm/uvm_physseg.h> 85 86 #include <machine/powerpc.h> 87 #include <powerpc/bat.h> 88 #include <powerpc/pcb.h> 89 #include <powerpc/psl.h> 90 #include <powerpc/spr.h> 91 #include <powerpc/oea/spr.h> 92 #include <powerpc/oea/sr_601.h> 93 94 #ifdef ALTIVEC 95 extern int pmap_use_altivec; 96 #endif 97 98 #ifdef PMAP_MEMLIMIT 99 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 100 #else 101 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 102 #endif 103 104 extern struct pmap kernel_pmap_; 105 static unsigned int pmap_pages_stolen; 106 static u_long pmap_pte_valid; 107 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 108 static u_long pmap_pvo_enter_depth; 109 static u_long pmap_pvo_remove_depth; 110 #endif 111 112 #ifndef MSGBUFADDR 113 extern paddr_t msgbuf_paddr; 114 #endif 115 116 static struct mem_region *mem, *avail; 117 static u_int mem_cnt, avail_cnt; 118 119 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 120 # define PMAP_OEA 1 121 #endif 122 123 #if defined(PMAP_OEA) 124 #define _PRIxpte "lx" 125 #else 126 #define _PRIxpte PRIx64 127 #endif 128 #define _PRIxpa "lx" 129 #define _PRIxva "lx" 130 #define _PRIsr "lx" 131 132 #ifdef PMAP_NEEDS_FIXUP 133 #if defined(PMAP_OEA) 134 #define PMAPNAME(name) pmap32_##name 135 #elif defined(PMAP_OEA64) 136 #define PMAPNAME(name) pmap64_##name 137 #elif defined(PMAP_OEA64_BRIDGE) 138 #define PMAPNAME(name) pmap64bridge_##name 139 #else 140 #error unknown variant for pmap 141 #endif 142 #endif /* PMAP_NEEDS_FIXUP */ 143 144 #ifdef PMAPNAME 145 #define STATIC static 146 #define pmap_pte_spill PMAPNAME(pte_spill) 147 #define pmap_real_memory PMAPNAME(real_memory) 148 #define pmap_init PMAPNAME(init) 149 #define pmap_virtual_space PMAPNAME(virtual_space) 150 #define pmap_create PMAPNAME(create) 151 #define pmap_reference PMAPNAME(reference) 152 #define pmap_destroy PMAPNAME(destroy) 153 #define pmap_copy PMAPNAME(copy) 154 #define pmap_update PMAPNAME(update) 155 #define pmap_enter PMAPNAME(enter) 156 #define pmap_remove PMAPNAME(remove) 157 #define pmap_kenter_pa PMAPNAME(kenter_pa) 158 #define pmap_kremove PMAPNAME(kremove) 159 #define pmap_extract PMAPNAME(extract) 160 #define pmap_protect PMAPNAME(protect) 161 #define pmap_unwire PMAPNAME(unwire) 162 #define pmap_page_protect PMAPNAME(page_protect) 163 #define pmap_query_bit PMAPNAME(query_bit) 164 #define pmap_clear_bit PMAPNAME(clear_bit) 165 166 #define pmap_activate PMAPNAME(activate) 167 #define pmap_deactivate PMAPNAME(deactivate) 168 169 #define pmap_pinit PMAPNAME(pinit) 170 #define pmap_procwr PMAPNAME(procwr) 171 172 #define pmap_pool PMAPNAME(pool) 173 #define pmap_upvo_pool PMAPNAME(upvo_pool) 174 #define pmap_mpvo_pool PMAPNAME(mpvo_pool) 175 #define pmap_pvo_table PMAPNAME(pvo_table) 176 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 177 #define pmap_pte_print PMAPNAME(pte_print) 178 #define pmap_pteg_check PMAPNAME(pteg_check) 179 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 180 #define pmap_print_pte PMAPNAME(print_pte) 181 #define pmap_pteg_dist PMAPNAME(pteg_dist) 182 #endif 183 #if defined(DEBUG) || defined(PMAPCHECK) 184 #define pmap_pvo_verify PMAPNAME(pvo_verify) 185 #define pmapcheck PMAPNAME(check) 186 #endif 187 #if defined(DEBUG) || defined(PMAPDEBUG) 188 #define pmapdebug PMAPNAME(debug) 189 #endif 190 #define pmap_steal_memory PMAPNAME(steal_memory) 191 #define pmap_bootstrap PMAPNAME(bootstrap) 192 #else 193 #define STATIC /* nothing */ 194 #endif /* PMAPNAME */ 195 196 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 197 STATIC void pmap_real_memory(paddr_t *, psize_t *); 198 STATIC void pmap_init(void); 199 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 200 STATIC pmap_t pmap_create(void); 201 STATIC void pmap_reference(pmap_t); 202 STATIC void pmap_destroy(pmap_t); 203 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 204 STATIC void pmap_update(pmap_t); 205 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); 206 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 207 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t, u_int); 208 STATIC void pmap_kremove(vaddr_t, vsize_t); 209 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 210 211 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 212 STATIC void pmap_unwire(pmap_t, vaddr_t); 213 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 214 STATIC bool pmap_query_bit(struct vm_page *, int); 215 STATIC bool pmap_clear_bit(struct vm_page *, int); 216 217 STATIC void pmap_activate(struct lwp *); 218 STATIC void pmap_deactivate(struct lwp *); 219 220 STATIC void pmap_pinit(pmap_t pm); 221 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 222 223 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 224 STATIC void pmap_pte_print(volatile struct pte *); 225 STATIC void pmap_pteg_check(void); 226 STATIC void pmap_print_mmuregs(void); 227 STATIC void pmap_print_pte(pmap_t, vaddr_t); 228 STATIC void pmap_pteg_dist(void); 229 #endif 230 #if defined(DEBUG) || defined(PMAPCHECK) 231 STATIC void pmap_pvo_verify(void); 232 #endif 233 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 234 STATIC void pmap_bootstrap(paddr_t, paddr_t); 235 236 #ifdef PMAPNAME 237 const struct pmap_ops PMAPNAME(ops) = { 238 .pmapop_pte_spill = pmap_pte_spill, 239 .pmapop_real_memory = pmap_real_memory, 240 .pmapop_init = pmap_init, 241 .pmapop_virtual_space = pmap_virtual_space, 242 .pmapop_create = pmap_create, 243 .pmapop_reference = pmap_reference, 244 .pmapop_destroy = pmap_destroy, 245 .pmapop_copy = pmap_copy, 246 .pmapop_update = pmap_update, 247 .pmapop_enter = pmap_enter, 248 .pmapop_remove = pmap_remove, 249 .pmapop_kenter_pa = pmap_kenter_pa, 250 .pmapop_kremove = pmap_kremove, 251 .pmapop_extract = pmap_extract, 252 .pmapop_protect = pmap_protect, 253 .pmapop_unwire = pmap_unwire, 254 .pmapop_page_protect = pmap_page_protect, 255 .pmapop_query_bit = pmap_query_bit, 256 .pmapop_clear_bit = pmap_clear_bit, 257 .pmapop_activate = pmap_activate, 258 .pmapop_deactivate = pmap_deactivate, 259 .pmapop_pinit = pmap_pinit, 260 .pmapop_procwr = pmap_procwr, 261 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 262 .pmapop_pte_print = pmap_pte_print, 263 .pmapop_pteg_check = pmap_pteg_check, 264 .pmapop_print_mmuregs = pmap_print_mmuregs, 265 .pmapop_print_pte = pmap_print_pte, 266 .pmapop_pteg_dist = pmap_pteg_dist, 267 #else 268 .pmapop_pte_print = NULL, 269 .pmapop_pteg_check = NULL, 270 .pmapop_print_mmuregs = NULL, 271 .pmapop_print_pte = NULL, 272 .pmapop_pteg_dist = NULL, 273 #endif 274 #if defined(DEBUG) || defined(PMAPCHECK) 275 .pmapop_pvo_verify = pmap_pvo_verify, 276 #else 277 .pmapop_pvo_verify = NULL, 278 #endif 279 .pmapop_steal_memory = pmap_steal_memory, 280 .pmapop_bootstrap = pmap_bootstrap, 281 }; 282 #endif /* !PMAPNAME */ 283 284 /* 285 * The following structure is aligned to 32 bytes 286 */ 287 struct pvo_entry { 288 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 289 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 290 struct pte pvo_pte; /* Prebuilt PTE */ 291 pmap_t pvo_pmap; /* ptr to owning pmap */ 292 vaddr_t pvo_vaddr; /* VA of entry */ 293 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 294 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 295 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 296 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 297 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 298 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 299 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 300 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 301 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 302 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 303 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 304 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 305 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 306 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 307 #define PVO_REMOVE 6 /* PVO has been removed */ 308 #define PVO_WHERE_MASK 15 309 #define PVO_WHERE_SHFT 8 310 } __attribute__ ((aligned (32))); 311 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 312 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 313 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 314 #define PVO_PTEGIDX_CLR(pvo) \ 315 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 316 #define PVO_PTEGIDX_SET(pvo,i) \ 317 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 318 #define PVO_WHERE(pvo,w) \ 319 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 320 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 321 322 TAILQ_HEAD(pvo_tqhead, pvo_entry); 323 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 324 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 325 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 326 327 struct pool pmap_pool; /* pool for pmap structures */ 328 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 329 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 330 331 /* 332 * We keep a cache of unmanaged pages to be used for pvo entries for 333 * unmanaged pages. 334 */ 335 struct pvo_page { 336 SIMPLEQ_ENTRY(pvo_page) pvop_link; 337 }; 338 SIMPLEQ_HEAD(pvop_head, pvo_page); 339 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 340 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 341 static u_long pmap_upvop_free; 342 static u_long pmap_upvop_maxfree; 343 static u_long pmap_mpvop_free; 344 static u_long pmap_mpvop_maxfree; 345 346 static void *pmap_pool_ualloc(struct pool *, int); 347 static void *pmap_pool_malloc(struct pool *, int); 348 349 static void pmap_pool_ufree(struct pool *, void *); 350 static void pmap_pool_mfree(struct pool *, void *); 351 352 static struct pool_allocator pmap_pool_mallocator = { 353 .pa_alloc = pmap_pool_malloc, 354 .pa_free = pmap_pool_mfree, 355 .pa_pagesz = 0, 356 }; 357 358 static struct pool_allocator pmap_pool_uallocator = { 359 .pa_alloc = pmap_pool_ualloc, 360 .pa_free = pmap_pool_ufree, 361 .pa_pagesz = 0, 362 }; 363 364 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 365 void pmap_pte_print(volatile struct pte *); 366 void pmap_pteg_check(void); 367 void pmap_pteg_dist(void); 368 void pmap_print_pte(pmap_t, vaddr_t); 369 void pmap_print_mmuregs(void); 370 #endif 371 372 #if defined(DEBUG) || defined(PMAPCHECK) 373 #ifdef PMAPCHECK 374 int pmapcheck = 1; 375 #else 376 int pmapcheck = 0; 377 #endif 378 void pmap_pvo_verify(void); 379 static void pmap_pvo_check(const struct pvo_entry *); 380 #define PMAP_PVO_CHECK(pvo) \ 381 do { \ 382 if (pmapcheck) \ 383 pmap_pvo_check(pvo); \ 384 } while (0) 385 #else 386 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 387 #endif 388 static int pmap_pte_insert(int, struct pte *); 389 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 390 vaddr_t, paddr_t, register_t, int); 391 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 392 static void pmap_pvo_free(struct pvo_entry *); 393 static void pmap_pvo_free_list(struct pvo_head *); 394 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 395 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 396 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 397 static void pvo_set_exec(struct pvo_entry *); 398 static void pvo_clear_exec(struct pvo_entry *); 399 400 static void tlbia(void); 401 402 static void pmap_release(pmap_t); 403 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 404 405 static uint32_t pmap_pvo_reclaim_nextidx; 406 #ifdef DEBUG 407 static int pmap_pvo_reclaim_debugctr; 408 #endif 409 410 #define VSID_NBPW (sizeof(uint32_t) * 8) 411 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 412 413 static int pmap_initialized; 414 415 #if defined(DEBUG) || defined(PMAPDEBUG) 416 #define PMAPDEBUG_BOOT 0x0001 417 #define PMAPDEBUG_PTE 0x0002 418 #define PMAPDEBUG_EXEC 0x0008 419 #define PMAPDEBUG_PVOENTER 0x0010 420 #define PMAPDEBUG_PVOREMOVE 0x0020 421 #define PMAPDEBUG_ACTIVATE 0x0100 422 #define PMAPDEBUG_CREATE 0x0200 423 #define PMAPDEBUG_ENTER 0x1000 424 #define PMAPDEBUG_KENTER 0x2000 425 #define PMAPDEBUG_KREMOVE 0x4000 426 #define PMAPDEBUG_REMOVE 0x8000 427 428 unsigned int pmapdebug = 0; 429 430 # define DPRINTF(x, ...) printf(x, __VA_ARGS__) 431 # define DPRINTFN(n, x, ...) do if (pmapdebug & PMAPDEBUG_ ## n) printf(x, __VA_ARGS__); while (0) 432 #else 433 # define DPRINTF(x, ...) do { } while (0) 434 # define DPRINTFN(n, x, ...) do { } while (0) 435 #endif 436 437 438 #ifdef PMAPCOUNTERS 439 /* 440 * From pmap_subr.c 441 */ 442 extern struct evcnt pmap_evcnt_mappings; 443 extern struct evcnt pmap_evcnt_unmappings; 444 445 extern struct evcnt pmap_evcnt_kernel_mappings; 446 extern struct evcnt pmap_evcnt_kernel_unmappings; 447 448 extern struct evcnt pmap_evcnt_mappings_replaced; 449 450 extern struct evcnt pmap_evcnt_exec_mappings; 451 extern struct evcnt pmap_evcnt_exec_cached; 452 453 extern struct evcnt pmap_evcnt_exec_synced; 454 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 455 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 456 457 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 458 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 459 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 460 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 461 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 462 463 extern struct evcnt pmap_evcnt_updates; 464 extern struct evcnt pmap_evcnt_collects; 465 extern struct evcnt pmap_evcnt_copies; 466 467 extern struct evcnt pmap_evcnt_ptes_spilled; 468 extern struct evcnt pmap_evcnt_ptes_unspilled; 469 extern struct evcnt pmap_evcnt_ptes_evicted; 470 471 extern struct evcnt pmap_evcnt_ptes_primary[8]; 472 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 473 extern struct evcnt pmap_evcnt_ptes_removed; 474 extern struct evcnt pmap_evcnt_ptes_changed; 475 extern struct evcnt pmap_evcnt_pvos_reclaimed; 476 extern struct evcnt pmap_evcnt_pvos_failed; 477 478 extern struct evcnt pmap_evcnt_zeroed_pages; 479 extern struct evcnt pmap_evcnt_copied_pages; 480 extern struct evcnt pmap_evcnt_idlezeroed_pages; 481 482 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 483 #define PMAPCOUNT2(ev) ((ev).ev_count++) 484 #else 485 #define PMAPCOUNT(ev) ((void) 0) 486 #define PMAPCOUNT2(ev) ((void) 0) 487 #endif 488 489 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 490 491 /* XXXSL: this needs to be moved to assembler */ 492 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 493 494 #ifdef MD_TLBSYNC 495 #define TLBSYNC() MD_TLBSYNC() 496 #else 497 #define TLBSYNC() __asm volatile("tlbsync") 498 #endif 499 #define SYNC() __asm volatile("sync") 500 #define EIEIO() __asm volatile("eieio") 501 #define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va)) 502 #define MFMSR() mfmsr() 503 #define MTMSR(psl) mtmsr(psl) 504 #define MFPVR() mfpvr() 505 #define MFSRIN(va) mfsrin(va) 506 #define MFTB() mfrtcltbl() 507 508 #if defined(DDB) && !defined(PMAP_OEA64) 509 static inline register_t 510 mfsrin(vaddr_t va) 511 { 512 register_t sr; 513 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 514 return sr; 515 } 516 #endif /* DDB && !PMAP_OEA64 */ 517 518 #if defined (PMAP_OEA64_BRIDGE) 519 extern void mfmsr64 (register64_t *result); 520 #endif /* PMAP_OEA64_BRIDGE */ 521 522 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 523 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 524 525 static inline register_t 526 pmap_interrupts_off(void) 527 { 528 register_t msr = MFMSR(); 529 if (msr & PSL_EE) 530 MTMSR(msr & ~PSL_EE); 531 return msr; 532 } 533 534 static void 535 pmap_interrupts_restore(register_t msr) 536 { 537 if (msr & PSL_EE) 538 MTMSR(msr); 539 } 540 541 static inline u_int32_t 542 mfrtcltbl(void) 543 { 544 #ifdef PPC_OEA601 545 if ((MFPVR() >> 16) == MPC601) 546 return (mfrtcl() >> 7); 547 else 548 #endif 549 return (mftbl()); 550 } 551 552 /* 553 * These small routines may have to be replaced, 554 * if/when we support processors other that the 604. 555 */ 556 557 void 558 tlbia(void) 559 { 560 char *i; 561 562 SYNC(); 563 #if defined(PMAP_OEA) 564 /* 565 * Why not use "tlbia"? Because not all processors implement it. 566 * 567 * This needs to be a per-CPU callback to do the appropriate thing 568 * for the CPU. XXX 569 */ 570 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 571 TLBIE(i); 572 EIEIO(); 573 SYNC(); 574 } 575 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 576 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 577 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 578 TLBIEL(i); 579 EIEIO(); 580 SYNC(); 581 } 582 #endif 583 TLBSYNC(); 584 SYNC(); 585 } 586 587 static inline register_t 588 va_to_vsid(const struct pmap *pm, vaddr_t addr) 589 { 590 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 591 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 592 #else /* PMAP_OEA64 */ 593 #if 0 594 const struct ste *ste; 595 register_t hash; 596 int i; 597 598 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 599 600 /* 601 * Try the primary group first 602 */ 603 ste = pm->pm_stes[hash].stes; 604 for (i = 0; i < 8; i++, ste++) { 605 if (ste->ste_hi & STE_V) && 606 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 607 return ste; 608 } 609 610 /* 611 * Then the secondary group. 612 */ 613 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 614 for (i = 0; i < 8; i++, ste++) { 615 if (ste->ste_hi & STE_V) && 616 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 617 return addr; 618 } 619 620 return NULL; 621 #else 622 /* 623 * Rather than searching the STE groups for the VSID, we know 624 * how we generate that from the ESID and so do that. 625 */ 626 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 627 #endif 628 #endif /* PMAP_OEA */ 629 } 630 631 static inline register_t 632 va_to_pteg(const struct pmap *pm, vaddr_t addr) 633 { 634 register_t hash; 635 636 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 637 return hash & pmap_pteg_mask; 638 } 639 640 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 641 /* 642 * Given a PTE in the page table, calculate the VADDR that hashes to it. 643 * The only bit of magic is that the top 4 bits of the address doesn't 644 * technically exist in the PTE. But we know we reserved 4 bits of the 645 * VSID for it so that's how we get it. 646 */ 647 static vaddr_t 648 pmap_pte_to_va(volatile const struct pte *pt) 649 { 650 vaddr_t va; 651 uintptr_t ptaddr = (uintptr_t) pt; 652 653 if (pt->pte_hi & PTE_HID) 654 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 655 656 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 657 #if defined(PMAP_OEA) 658 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 659 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 660 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 661 #endif 662 va <<= ADDR_PIDX_SHFT; 663 664 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 665 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 666 667 #if defined(PMAP_OEA64) 668 /* PPC63 Bits 0-35 */ 669 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 670 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 671 /* PPC Bits 0-3 */ 672 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 673 #endif 674 675 return va; 676 } 677 #endif 678 679 static inline struct pvo_head * 680 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 681 { 682 struct vm_page *pg; 683 struct vm_page_md *md; 684 685 pg = PHYS_TO_VM_PAGE(pa); 686 if (pg_p != NULL) 687 *pg_p = pg; 688 if (pg == NULL) 689 return &pmap_pvo_unmanaged; 690 md = VM_PAGE_TO_MD(pg); 691 return &md->mdpg_pvoh; 692 } 693 694 static inline struct pvo_head * 695 vm_page_to_pvoh(struct vm_page *pg) 696 { 697 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 698 699 return &md->mdpg_pvoh; 700 } 701 702 703 static inline void 704 pmap_attr_clear(struct vm_page *pg, int ptebit) 705 { 706 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 707 708 md->mdpg_attrs &= ~ptebit; 709 } 710 711 static inline int 712 pmap_attr_fetch(struct vm_page *pg) 713 { 714 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 715 716 return md->mdpg_attrs; 717 } 718 719 static inline void 720 pmap_attr_save(struct vm_page *pg, int ptebit) 721 { 722 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 723 724 md->mdpg_attrs |= ptebit; 725 } 726 727 static inline int 728 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 729 { 730 if (pt->pte_hi == pvo_pt->pte_hi 731 #if 0 732 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 733 ~(PTE_REF|PTE_CHG)) == 0 734 #endif 735 ) 736 return 1; 737 return 0; 738 } 739 740 static inline void 741 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 742 { 743 /* 744 * Construct the PTE. Default to IMB initially. Valid bit 745 * only gets set when the real pte is set in memory. 746 * 747 * Note: Don't set the valid bit for correct operation of tlb update. 748 */ 749 #if defined(PMAP_OEA) 750 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 751 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 752 pt->pte_lo = pte_lo; 753 #elif defined (PMAP_OEA64_BRIDGE) || defined (PMAP_OEA64) 754 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 755 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 756 pt->pte_lo = (u_int64_t) pte_lo; 757 #endif /* PMAP_OEA */ 758 } 759 760 static inline void 761 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 762 { 763 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 764 } 765 766 static inline void 767 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 768 { 769 /* 770 * As shown in Section 7.6.3.2.3 771 */ 772 pt->pte_lo &= ~ptebit; 773 TLBIE(va); 774 SYNC(); 775 EIEIO(); 776 TLBSYNC(); 777 SYNC(); 778 #ifdef MULTIPROCESSOR 779 DCBST(pt); 780 #endif 781 } 782 783 static inline void 784 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 785 { 786 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 787 if (pvo_pt->pte_hi & PTE_VALID) 788 panic("pte_set: setting an already valid pte %p", pvo_pt); 789 #endif 790 pvo_pt->pte_hi |= PTE_VALID; 791 792 /* 793 * Update the PTE as defined in section 7.6.3.1 794 * Note that the REF/CHG bits are from pvo_pt and thus should 795 * have been saved so this routine can restore them (if desired). 796 */ 797 pt->pte_lo = pvo_pt->pte_lo; 798 EIEIO(); 799 pt->pte_hi = pvo_pt->pte_hi; 800 TLBSYNC(); 801 SYNC(); 802 #ifdef MULTIPROCESSOR 803 DCBST(pt); 804 #endif 805 pmap_pte_valid++; 806 } 807 808 static inline void 809 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 810 { 811 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 812 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 813 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 814 if ((pt->pte_hi & PTE_VALID) == 0) 815 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 816 #endif 817 818 pvo_pt->pte_hi &= ~PTE_VALID; 819 /* 820 * Force the ref & chg bits back into the PTEs. 821 */ 822 SYNC(); 823 /* 824 * Invalidate the pte ... (Section 7.6.3.3) 825 */ 826 pt->pte_hi &= ~PTE_VALID; 827 SYNC(); 828 TLBIE(va); 829 SYNC(); 830 EIEIO(); 831 TLBSYNC(); 832 SYNC(); 833 /* 834 * Save the ref & chg bits ... 835 */ 836 pmap_pte_synch(pt, pvo_pt); 837 pmap_pte_valid--; 838 } 839 840 static inline void 841 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 842 { 843 /* 844 * Invalidate the PTE 845 */ 846 pmap_pte_unset(pt, pvo_pt, va); 847 pmap_pte_set(pt, pvo_pt); 848 } 849 850 /* 851 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 852 * (either primary or secondary location). 853 * 854 * Note: both the destination and source PTEs must not have PTE_VALID set. 855 */ 856 857 static int 858 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 859 { 860 volatile struct pte *pt; 861 int i; 862 863 #if defined(DEBUG) 864 DPRINTFN(PTE, "pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 865 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo); 866 #endif 867 /* 868 * First try primary hash. 869 */ 870 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 871 if ((pt->pte_hi & PTE_VALID) == 0) { 872 pvo_pt->pte_hi &= ~PTE_HID; 873 pmap_pte_set(pt, pvo_pt); 874 return i; 875 } 876 } 877 878 /* 879 * Now try secondary hash. 880 */ 881 ptegidx ^= pmap_pteg_mask; 882 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 883 if ((pt->pte_hi & PTE_VALID) == 0) { 884 pvo_pt->pte_hi |= PTE_HID; 885 pmap_pte_set(pt, pvo_pt); 886 return i; 887 } 888 } 889 return -1; 890 } 891 892 /* 893 * Spill handler. 894 * 895 * Tries to spill a page table entry from the overflow area. 896 * This runs in either real mode (if dealing with a exception spill) 897 * or virtual mode when dealing with manually spilling one of the 898 * kernel's pte entries. In either case, interrupts are already 899 * disabled. 900 */ 901 902 int 903 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 904 { 905 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 906 struct pvo_entry *pvo; 907 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 908 struct pvo_tqhead *pvoh, *vpvoh = NULL; 909 int ptegidx, i, j; 910 volatile struct pteg *pteg; 911 volatile struct pte *pt; 912 913 PMAP_LOCK(); 914 915 ptegidx = va_to_pteg(pm, addr); 916 917 /* 918 * Have to substitute some entry. Use the primary hash for this. 919 * Use low bits of timebase as random generator. Make sure we are 920 * not picking a kernel pte for replacement. 921 */ 922 pteg = &pmap_pteg_table[ptegidx]; 923 i = MFTB() & 7; 924 for (j = 0; j < 8; j++) { 925 pt = &pteg->pt[i]; 926 if ((pt->pte_hi & PTE_VALID) == 0) 927 break; 928 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 929 < PHYSMAP_VSIDBITS) 930 break; 931 i = (i + 1) & 7; 932 } 933 KASSERT(j < 8); 934 935 source_pvo = NULL; 936 victim_pvo = NULL; 937 pvoh = &pmap_pvo_table[ptegidx]; 938 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 939 940 /* 941 * We need to find pvo entry for this address... 942 */ 943 PMAP_PVO_CHECK(pvo); /* sanity check */ 944 945 /* 946 * If we haven't found the source and we come to a PVO with 947 * a valid PTE, then we know we can't find it because all 948 * evicted PVOs always are first in the list. 949 */ 950 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 951 break; 952 if (source_pvo == NULL && pm == pvo->pvo_pmap && 953 addr == PVO_VADDR(pvo)) { 954 955 /* 956 * Now we have found the entry to be spilled into the 957 * pteg. Attempt to insert it into the page table. 958 */ 959 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 960 if (j >= 0) { 961 PVO_PTEGIDX_SET(pvo, j); 962 PMAP_PVO_CHECK(pvo); /* sanity check */ 963 PVO_WHERE(pvo, SPILL_INSERT); 964 pvo->pvo_pmap->pm_evictions--; 965 PMAPCOUNT(ptes_spilled); 966 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 967 ? pmap_evcnt_ptes_secondary 968 : pmap_evcnt_ptes_primary)[j]); 969 970 /* 971 * Since we keep the evicted entries at the 972 * from of the PVO list, we need move this 973 * (now resident) PVO after the evicted 974 * entries. 975 */ 976 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 977 978 /* 979 * If we don't have to move (either we were the 980 * last entry or the next entry was valid), 981 * don't change our position. Otherwise 982 * move ourselves to the tail of the queue. 983 */ 984 if (next_pvo != NULL && 985 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 986 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 987 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 988 } 989 PMAP_UNLOCK(); 990 return 1; 991 } 992 source_pvo = pvo; 993 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 994 return 0; 995 } 996 if (victim_pvo != NULL) 997 break; 998 } 999 1000 /* 1001 * We also need the pvo entry of the victim we are replacing 1002 * so save the R & C bits of the PTE. 1003 */ 1004 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1005 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1006 vpvoh = pvoh; /* *1* */ 1007 victim_pvo = pvo; 1008 if (source_pvo != NULL) 1009 break; 1010 } 1011 } 1012 1013 if (source_pvo == NULL) { 1014 PMAPCOUNT(ptes_unspilled); 1015 PMAP_UNLOCK(); 1016 return 0; 1017 } 1018 1019 if (victim_pvo == NULL) { 1020 if ((pt->pte_hi & PTE_HID) == 0) 1021 panic("pmap_pte_spill: victim p-pte (%p) has " 1022 "no pvo entry!", pt); 1023 1024 /* 1025 * If this is a secondary PTE, we need to search 1026 * its primary pvo bucket for the matching PVO. 1027 */ 1028 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1029 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1030 PMAP_PVO_CHECK(pvo); /* sanity check */ 1031 1032 /* 1033 * We also need the pvo entry of the victim we are 1034 * replacing so save the R & C bits of the PTE. 1035 */ 1036 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1037 victim_pvo = pvo; 1038 break; 1039 } 1040 } 1041 if (victim_pvo == NULL) 1042 panic("pmap_pte_spill: victim s-pte (%p) has " 1043 "no pvo entry!", pt); 1044 } 1045 1046 /* 1047 * The victim should be not be a kernel PVO/PTE entry. 1048 */ 1049 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1050 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1051 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1052 1053 /* 1054 * We are invalidating the TLB entry for the EA for the 1055 * we are replacing even though its valid; If we don't 1056 * we lose any ref/chg bit changes contained in the TLB 1057 * entry. 1058 */ 1059 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1060 1061 /* 1062 * To enforce the PVO list ordering constraint that all 1063 * evicted entries should come before all valid entries, 1064 * move the source PVO to the tail of its list and the 1065 * victim PVO to the head of its list (which might not be 1066 * the same list, if the victim was using the secondary hash). 1067 */ 1068 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1069 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1070 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1071 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1072 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1073 pmap_pte_set(pt, &source_pvo->pvo_pte); 1074 victim_pvo->pvo_pmap->pm_evictions++; 1075 source_pvo->pvo_pmap->pm_evictions--; 1076 PVO_WHERE(victim_pvo, SPILL_UNSET); 1077 PVO_WHERE(source_pvo, SPILL_SET); 1078 1079 PVO_PTEGIDX_CLR(victim_pvo); 1080 PVO_PTEGIDX_SET(source_pvo, i); 1081 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1082 PMAPCOUNT(ptes_spilled); 1083 PMAPCOUNT(ptes_evicted); 1084 PMAPCOUNT(ptes_removed); 1085 1086 PMAP_PVO_CHECK(victim_pvo); 1087 PMAP_PVO_CHECK(source_pvo); 1088 1089 PMAP_UNLOCK(); 1090 return 1; 1091 } 1092 1093 /* 1094 * Restrict given range to physical memory 1095 */ 1096 void 1097 pmap_real_memory(paddr_t *start, psize_t *size) 1098 { 1099 struct mem_region *mp; 1100 1101 for (mp = mem; mp->size; mp++) { 1102 if (*start + *size > mp->start 1103 && *start < mp->start + mp->size) { 1104 if (*start < mp->start) { 1105 *size -= mp->start - *start; 1106 *start = mp->start; 1107 } 1108 if (*start + *size > mp->start + mp->size) 1109 *size = mp->start + mp->size - *start; 1110 return; 1111 } 1112 } 1113 *size = 0; 1114 } 1115 1116 /* 1117 * Initialize anything else for pmap handling. 1118 * Called during vm_init(). 1119 */ 1120 void 1121 pmap_init(void) 1122 { 1123 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1124 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1125 &pmap_pool_mallocator, IPL_NONE); 1126 1127 pool_setlowat(&pmap_mpvo_pool, 1008); 1128 1129 pmap_initialized = 1; 1130 1131 } 1132 1133 /* 1134 * How much virtual space does the kernel get? 1135 */ 1136 void 1137 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1138 { 1139 /* 1140 * For now, reserve one segment (minus some overhead) for kernel 1141 * virtual memory 1142 */ 1143 *start = VM_MIN_KERNEL_ADDRESS; 1144 *end = VM_MAX_KERNEL_ADDRESS; 1145 } 1146 1147 /* 1148 * Allocate, initialize, and return a new physical map. 1149 */ 1150 pmap_t 1151 pmap_create(void) 1152 { 1153 pmap_t pm; 1154 1155 pm = pool_get(&pmap_pool, PR_WAITOK); 1156 KASSERT((vaddr_t)pm < VM_MIN_KERNEL_ADDRESS); 1157 memset((void *)pm, 0, sizeof *pm); 1158 pmap_pinit(pm); 1159 1160 DPRINTFN(CREATE, "pmap_create: pm %p:\n" 1161 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1162 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1163 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1164 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1165 pm, 1166 pm->pm_sr[0], pm->pm_sr[1], 1167 pm->pm_sr[2], pm->pm_sr[3], 1168 pm->pm_sr[4], pm->pm_sr[5], 1169 pm->pm_sr[6], pm->pm_sr[7], 1170 pm->pm_sr[8], pm->pm_sr[9], 1171 pm->pm_sr[10], pm->pm_sr[11], 1172 pm->pm_sr[12], pm->pm_sr[13], 1173 pm->pm_sr[14], pm->pm_sr[15]); 1174 return pm; 1175 } 1176 1177 /* 1178 * Initialize a preallocated and zeroed pmap structure. 1179 */ 1180 void 1181 pmap_pinit(pmap_t pm) 1182 { 1183 register_t entropy = MFTB(); 1184 register_t mask; 1185 int i; 1186 1187 /* 1188 * Allocate some segment registers for this pmap. 1189 */ 1190 pm->pm_refs = 1; 1191 PMAP_LOCK(); 1192 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1193 static register_t pmap_vsidcontext; 1194 register_t hash; 1195 unsigned int n; 1196 1197 /* Create a new value by multiplying by a prime adding in 1198 * entropy from the timebase register. This is to make the 1199 * VSID more random so that the PT Hash function collides 1200 * less often. (note that the prime causes gcc to do shifts 1201 * instead of a multiply) 1202 */ 1203 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1204 hash = pmap_vsidcontext & (NPMAPS - 1); 1205 if (hash == 0) { /* 0 is special, avoid it */ 1206 entropy += 0xbadf00d; 1207 continue; 1208 } 1209 n = hash >> 5; 1210 mask = 1L << (hash & (VSID_NBPW-1)); 1211 hash = pmap_vsidcontext; 1212 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1213 /* anything free in this bucket? */ 1214 if (~pmap_vsid_bitmap[n] == 0) { 1215 entropy = hash ^ (hash >> 16); 1216 continue; 1217 } 1218 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1219 mask = 1L << i; 1220 hash &= ~(VSID_NBPW-1); 1221 hash |= i; 1222 } 1223 hash &= PTE_VSID >> PTE_VSID_SHFT; 1224 pmap_vsid_bitmap[n] |= mask; 1225 pm->pm_vsid = hash; 1226 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1227 for (i = 0; i < 16; i++) 1228 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1229 SR_NOEXEC; 1230 #endif 1231 PMAP_UNLOCK(); 1232 return; 1233 } 1234 PMAP_UNLOCK(); 1235 panic("pmap_pinit: out of segments"); 1236 } 1237 1238 /* 1239 * Add a reference to the given pmap. 1240 */ 1241 void 1242 pmap_reference(pmap_t pm) 1243 { 1244 atomic_inc_uint(&pm->pm_refs); 1245 } 1246 1247 /* 1248 * Retire the given pmap from service. 1249 * Should only be called if the map contains no valid mappings. 1250 */ 1251 void 1252 pmap_destroy(pmap_t pm) 1253 { 1254 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1255 pmap_release(pm); 1256 pool_put(&pmap_pool, pm); 1257 } 1258 } 1259 1260 /* 1261 * Release any resources held by the given physical map. 1262 * Called when a pmap initialized by pmap_pinit is being released. 1263 */ 1264 void 1265 pmap_release(pmap_t pm) 1266 { 1267 int idx, mask; 1268 1269 KASSERT(pm->pm_stats.resident_count == 0); 1270 KASSERT(pm->pm_stats.wired_count == 0); 1271 1272 PMAP_LOCK(); 1273 if (pm->pm_sr[0] == 0) 1274 panic("pmap_release"); 1275 idx = pm->pm_vsid & (NPMAPS-1); 1276 mask = 1 << (idx % VSID_NBPW); 1277 idx /= VSID_NBPW; 1278 1279 KASSERT(pmap_vsid_bitmap[idx] & mask); 1280 pmap_vsid_bitmap[idx] &= ~mask; 1281 PMAP_UNLOCK(); 1282 } 1283 1284 /* 1285 * Copy the range specified by src_addr/len 1286 * from the source map to the range dst_addr/len 1287 * in the destination map. 1288 * 1289 * This routine is only advisory and need not do anything. 1290 */ 1291 void 1292 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1293 vsize_t len, vaddr_t src_addr) 1294 { 1295 PMAPCOUNT(copies); 1296 } 1297 1298 /* 1299 * Require that all active physical maps contain no 1300 * incorrect entries NOW. 1301 */ 1302 void 1303 pmap_update(struct pmap *pmap) 1304 { 1305 PMAPCOUNT(updates); 1306 TLBSYNC(); 1307 } 1308 1309 static inline int 1310 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1311 { 1312 int pteidx; 1313 /* 1314 * We can find the actual pte entry without searching by 1315 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1316 * and by noticing the HID bit. 1317 */ 1318 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1319 if (pvo->pvo_pte.pte_hi & PTE_HID) 1320 pteidx ^= pmap_pteg_mask * 8; 1321 return pteidx; 1322 } 1323 1324 volatile struct pte * 1325 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1326 { 1327 volatile struct pte *pt; 1328 1329 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1330 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1331 return NULL; 1332 #endif 1333 1334 /* 1335 * If we haven't been supplied the ptegidx, calculate it. 1336 */ 1337 if (pteidx == -1) { 1338 int ptegidx; 1339 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1340 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1341 } 1342 1343 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1344 1345 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1346 return pt; 1347 #else 1348 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1349 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1350 "pvo but no valid pte index", pvo); 1351 } 1352 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1353 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1354 "pvo but no valid pte", pvo); 1355 } 1356 1357 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1358 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1359 #if defined(DEBUG) || defined(PMAPCHECK) 1360 pmap_pte_print(pt); 1361 #endif 1362 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1363 "pmap_pteg_table %p but invalid in pvo", 1364 pvo, pt); 1365 } 1366 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1367 #if defined(DEBUG) || defined(PMAPCHECK) 1368 pmap_pte_print(pt); 1369 #endif 1370 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1371 "not match pte %p in pmap_pteg_table", 1372 pvo, pt); 1373 } 1374 return pt; 1375 } 1376 1377 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1378 #if defined(DEBUG) || defined(PMAPCHECK) 1379 pmap_pte_print(pt); 1380 #endif 1381 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1382 "pmap_pteg_table but valid in pvo", pvo, pt); 1383 } 1384 return NULL; 1385 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1386 } 1387 1388 struct pvo_entry * 1389 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1390 { 1391 struct pvo_entry *pvo; 1392 int ptegidx; 1393 1394 va &= ~ADDR_POFF; 1395 ptegidx = va_to_pteg(pm, va); 1396 1397 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1398 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1399 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1400 panic("pmap_pvo_find_va: invalid pvo %p on " 1401 "list %#x (%p)", pvo, ptegidx, 1402 &pmap_pvo_table[ptegidx]); 1403 #endif 1404 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1405 if (pteidx_p) 1406 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1407 return pvo; 1408 } 1409 } 1410 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1411 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1412 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1413 return NULL; 1414 } 1415 1416 #if defined(DEBUG) || defined(PMAPCHECK) 1417 void 1418 pmap_pvo_check(const struct pvo_entry *pvo) 1419 { 1420 struct pvo_head *pvo_head; 1421 struct pvo_entry *pvo0; 1422 volatile struct pte *pt; 1423 int failed = 0; 1424 1425 PMAP_LOCK(); 1426 1427 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1428 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1429 1430 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1431 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1432 pvo, pvo->pvo_pmap); 1433 failed = 1; 1434 } 1435 1436 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1437 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1438 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1439 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1440 failed = 1; 1441 } 1442 1443 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1444 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1445 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1446 pvo, LIST_NEXT(pvo, pvo_vlink)); 1447 failed = 1; 1448 } 1449 1450 if (PVO_MANAGED_P(pvo)) { 1451 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1452 } else { 1453 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1454 printf("pmap_pvo_check: pvo %p: non kernel address " 1455 "on kernel unmanaged list\n", pvo); 1456 failed = 1; 1457 } 1458 pvo_head = &pmap_pvo_kunmanaged; 1459 } 1460 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1461 if (pvo0 == pvo) 1462 break; 1463 } 1464 if (pvo0 == NULL) { 1465 printf("pmap_pvo_check: pvo %p: not present " 1466 "on its vlist head %p\n", pvo, pvo_head); 1467 failed = 1; 1468 } 1469 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1470 printf("pmap_pvo_check: pvo %p: not present " 1471 "on its olist head\n", pvo); 1472 failed = 1; 1473 } 1474 pt = pmap_pvo_to_pte(pvo, -1); 1475 if (pt == NULL) { 1476 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1477 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1478 "no PTE\n", pvo); 1479 failed = 1; 1480 } 1481 } else { 1482 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1483 (uintptr_t) pt >= 1484 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1485 printf("pmap_pvo_check: pvo %p: pte %p not in " 1486 "pteg table\n", pvo, pt); 1487 failed = 1; 1488 } 1489 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1490 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1491 "no PTE\n", pvo); 1492 failed = 1; 1493 } 1494 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1495 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1496 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1497 pvo->pvo_pte.pte_hi, 1498 pt->pte_hi); 1499 failed = 1; 1500 } 1501 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1502 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1503 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1504 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1505 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1506 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1507 failed = 1; 1508 } 1509 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1510 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1511 " doesn't not match PVO's VA %#" _PRIxva "\n", 1512 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1513 failed = 1; 1514 } 1515 if (failed) 1516 pmap_pte_print(pt); 1517 } 1518 if (failed) 1519 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1520 pvo->pvo_pmap); 1521 1522 PMAP_UNLOCK(); 1523 } 1524 #endif /* DEBUG || PMAPCHECK */ 1525 1526 /* 1527 * Search the PVO table looking for a non-wired entry. 1528 * If we find one, remove it and return it. 1529 */ 1530 1531 struct pvo_entry * 1532 pmap_pvo_reclaim(struct pmap *pm) 1533 { 1534 struct pvo_tqhead *pvoh; 1535 struct pvo_entry *pvo; 1536 uint32_t idx, endidx; 1537 1538 endidx = pmap_pvo_reclaim_nextidx; 1539 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1540 idx = (idx + 1) & pmap_pteg_mask) { 1541 pvoh = &pmap_pvo_table[idx]; 1542 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1543 if (!PVO_WIRED_P(pvo)) { 1544 pmap_pvo_remove(pvo, -1, NULL); 1545 pmap_pvo_reclaim_nextidx = idx; 1546 PMAPCOUNT(pvos_reclaimed); 1547 return pvo; 1548 } 1549 } 1550 } 1551 return NULL; 1552 } 1553 1554 /* 1555 * This returns whether this is the first mapping of a page. 1556 */ 1557 int 1558 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1559 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1560 { 1561 struct pvo_entry *pvo; 1562 struct pvo_tqhead *pvoh; 1563 register_t msr; 1564 int ptegidx; 1565 int i; 1566 int poolflags = PR_NOWAIT; 1567 1568 /* 1569 * Compute the PTE Group index. 1570 */ 1571 va &= ~ADDR_POFF; 1572 ptegidx = va_to_pteg(pm, va); 1573 1574 msr = pmap_interrupts_off(); 1575 1576 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1577 if (pmap_pvo_remove_depth > 0) 1578 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1579 if (++pmap_pvo_enter_depth > 1) 1580 panic("pmap_pvo_enter: called recursively!"); 1581 #endif 1582 1583 /* 1584 * Remove any existing mapping for this page. Reuse the 1585 * pvo entry if there a mapping. 1586 */ 1587 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1588 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1589 #ifdef DEBUG 1590 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1591 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1592 ~(PTE_REF|PTE_CHG)) == 0 && 1593 va < VM_MIN_KERNEL_ADDRESS) { 1594 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n", 1595 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1596 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n", 1597 pvo->pvo_pte.pte_hi, 1598 pm->pm_sr[va >> ADDR_SR_SHFT]); 1599 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1600 #ifdef DDBX 1601 Debugger(); 1602 #endif 1603 } 1604 #endif 1605 PMAPCOUNT(mappings_replaced); 1606 pmap_pvo_remove(pvo, -1, NULL); 1607 break; 1608 } 1609 } 1610 1611 /* 1612 * If we aren't overwriting an mapping, try to allocate 1613 */ 1614 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1615 --pmap_pvo_enter_depth; 1616 #endif 1617 pmap_interrupts_restore(msr); 1618 if (pvo) { 1619 pmap_pvo_free(pvo); 1620 } 1621 pvo = pool_get(pl, poolflags); 1622 KASSERT((vaddr_t)pvo < VM_MIN_KERNEL_ADDRESS); 1623 1624 #ifdef DEBUG 1625 /* 1626 * Exercise pmap_pvo_reclaim() a little. 1627 */ 1628 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1629 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1630 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1631 pool_put(pl, pvo); 1632 pvo = NULL; 1633 } 1634 #endif 1635 1636 msr = pmap_interrupts_off(); 1637 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1638 ++pmap_pvo_enter_depth; 1639 #endif 1640 if (pvo == NULL) { 1641 pvo = pmap_pvo_reclaim(pm); 1642 if (pvo == NULL) { 1643 if ((flags & PMAP_CANFAIL) == 0) 1644 panic("pmap_pvo_enter: failed"); 1645 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1646 pmap_pvo_enter_depth--; 1647 #endif 1648 PMAPCOUNT(pvos_failed); 1649 pmap_interrupts_restore(msr); 1650 return ENOMEM; 1651 } 1652 } 1653 1654 pvo->pvo_vaddr = va; 1655 pvo->pvo_pmap = pm; 1656 pvo->pvo_vaddr &= ~ADDR_POFF; 1657 if (flags & VM_PROT_EXECUTE) { 1658 PMAPCOUNT(exec_mappings); 1659 pvo_set_exec(pvo); 1660 } 1661 if (flags & PMAP_WIRED) 1662 pvo->pvo_vaddr |= PVO_WIRED; 1663 if (pvo_head != &pmap_pvo_kunmanaged) { 1664 pvo->pvo_vaddr |= PVO_MANAGED; 1665 PMAPCOUNT(mappings); 1666 } else { 1667 PMAPCOUNT(kernel_mappings); 1668 } 1669 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1670 1671 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1672 if (PVO_WIRED_P(pvo)) 1673 pvo->pvo_pmap->pm_stats.wired_count++; 1674 pvo->pvo_pmap->pm_stats.resident_count++; 1675 #if defined(DEBUG) 1676 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1677 DPRINTFN(PVOENTER, 1678 "pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1679 pvo, pm, va, pa); 1680 #endif 1681 1682 /* 1683 * We hope this succeeds but it isn't required. 1684 */ 1685 pvoh = &pmap_pvo_table[ptegidx]; 1686 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1687 if (i >= 0) { 1688 PVO_PTEGIDX_SET(pvo, i); 1689 PVO_WHERE(pvo, ENTER_INSERT); 1690 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1691 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1692 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1693 1694 } else { 1695 /* 1696 * Since we didn't have room for this entry (which makes it 1697 * and evicted entry), place it at the head of the list. 1698 */ 1699 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1700 PMAPCOUNT(ptes_evicted); 1701 pm->pm_evictions++; 1702 /* 1703 * If this is a kernel page, make sure it's active. 1704 */ 1705 if (pm == pmap_kernel()) { 1706 i = pmap_pte_spill(pm, va, false); 1707 KASSERT(i); 1708 } 1709 } 1710 PMAP_PVO_CHECK(pvo); /* sanity check */ 1711 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1712 pmap_pvo_enter_depth--; 1713 #endif 1714 pmap_interrupts_restore(msr); 1715 return 0; 1716 } 1717 1718 static void 1719 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1720 { 1721 volatile struct pte *pt; 1722 int ptegidx; 1723 1724 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1725 if (++pmap_pvo_remove_depth > 1) 1726 panic("pmap_pvo_remove: called recursively!"); 1727 #endif 1728 1729 /* 1730 * If we haven't been supplied the ptegidx, calculate it. 1731 */ 1732 if (pteidx == -1) { 1733 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1734 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1735 } else { 1736 ptegidx = pteidx >> 3; 1737 if (pvo->pvo_pte.pte_hi & PTE_HID) 1738 ptegidx ^= pmap_pteg_mask; 1739 } 1740 PMAP_PVO_CHECK(pvo); /* sanity check */ 1741 1742 /* 1743 * If there is an active pte entry, we need to deactivate it 1744 * (and save the ref & chg bits). 1745 */ 1746 pt = pmap_pvo_to_pte(pvo, pteidx); 1747 if (pt != NULL) { 1748 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1749 PVO_WHERE(pvo, REMOVE); 1750 PVO_PTEGIDX_CLR(pvo); 1751 PMAPCOUNT(ptes_removed); 1752 } else { 1753 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1754 pvo->pvo_pmap->pm_evictions--; 1755 } 1756 1757 /* 1758 * Account for executable mappings. 1759 */ 1760 if (PVO_EXECUTABLE_P(pvo)) 1761 pvo_clear_exec(pvo); 1762 1763 /* 1764 * Update our statistics. 1765 */ 1766 pvo->pvo_pmap->pm_stats.resident_count--; 1767 if (PVO_WIRED_P(pvo)) 1768 pvo->pvo_pmap->pm_stats.wired_count--; 1769 1770 /* 1771 * Save the REF/CHG bits into their cache if the page is managed. 1772 */ 1773 if (PVO_MANAGED_P(pvo)) { 1774 register_t ptelo = pvo->pvo_pte.pte_lo; 1775 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1776 1777 if (pg != NULL) { 1778 /* 1779 * If this page was changed and it is mapped exec, 1780 * invalidate it. 1781 */ 1782 if ((ptelo & PTE_CHG) && 1783 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1784 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1785 if (LIST_EMPTY(pvoh)) { 1786 DPRINTFN(EXEC, "[pmap_pvo_remove: " 1787 "%#" _PRIxpa ": clear-exec]\n", 1788 VM_PAGE_TO_PHYS(pg)); 1789 pmap_attr_clear(pg, PTE_EXEC); 1790 PMAPCOUNT(exec_uncached_pvo_remove); 1791 } else { 1792 DPRINTFN(EXEC, "[pmap_pvo_remove: " 1793 "%#" _PRIxpa ": syncicache]\n", 1794 VM_PAGE_TO_PHYS(pg)); 1795 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1796 PAGE_SIZE); 1797 PMAPCOUNT(exec_synced_pvo_remove); 1798 } 1799 } 1800 1801 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1802 } 1803 PMAPCOUNT(unmappings); 1804 } else { 1805 PMAPCOUNT(kernel_unmappings); 1806 } 1807 1808 /* 1809 * Remove the PVO from its lists and return it to the pool. 1810 */ 1811 LIST_REMOVE(pvo, pvo_vlink); 1812 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1813 if (pvol) { 1814 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1815 } 1816 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1817 pmap_pvo_remove_depth--; 1818 #endif 1819 } 1820 1821 void 1822 pmap_pvo_free(struct pvo_entry *pvo) 1823 { 1824 1825 pool_put(PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool, pvo); 1826 } 1827 1828 void 1829 pmap_pvo_free_list(struct pvo_head *pvol) 1830 { 1831 struct pvo_entry *pvo, *npvo; 1832 1833 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1834 npvo = LIST_NEXT(pvo, pvo_vlink); 1835 LIST_REMOVE(pvo, pvo_vlink); 1836 pmap_pvo_free(pvo); 1837 } 1838 } 1839 1840 /* 1841 * Mark a mapping as executable. 1842 * If this is the first executable mapping in the segment, 1843 * clear the noexec flag. 1844 */ 1845 static void 1846 pvo_set_exec(struct pvo_entry *pvo) 1847 { 1848 struct pmap *pm = pvo->pvo_pmap; 1849 1850 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1851 return; 1852 } 1853 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1854 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1855 { 1856 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1857 if (pm->pm_exec[sr]++ == 0) { 1858 pm->pm_sr[sr] &= ~SR_NOEXEC; 1859 } 1860 } 1861 #endif 1862 } 1863 1864 /* 1865 * Mark a mapping as non-executable. 1866 * If this was the last executable mapping in the segment, 1867 * set the noexec flag. 1868 */ 1869 static void 1870 pvo_clear_exec(struct pvo_entry *pvo) 1871 { 1872 struct pmap *pm = pvo->pvo_pmap; 1873 1874 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1875 return; 1876 } 1877 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1878 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1879 { 1880 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1881 if (--pm->pm_exec[sr] == 0) { 1882 pm->pm_sr[sr] |= SR_NOEXEC; 1883 } 1884 } 1885 #endif 1886 } 1887 1888 /* 1889 * Insert physical page at pa into the given pmap at virtual address va. 1890 */ 1891 int 1892 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 1893 { 1894 struct mem_region *mp; 1895 struct pvo_head *pvo_head; 1896 struct vm_page *pg; 1897 struct pool *pl; 1898 register_t pte_lo; 1899 int error; 1900 u_int was_exec = 0; 1901 1902 PMAP_LOCK(); 1903 1904 if (__predict_false(!pmap_initialized)) { 1905 pvo_head = &pmap_pvo_kunmanaged; 1906 pl = &pmap_upvo_pool; 1907 pg = NULL; 1908 was_exec = PTE_EXEC; 1909 } else { 1910 pvo_head = pa_to_pvoh(pa, &pg); 1911 pl = &pmap_mpvo_pool; 1912 } 1913 1914 DPRINTFN(ENTER, 1915 "pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1916 pm, va, pa, prot, flags); 1917 1918 /* 1919 * If this is a managed page, and it's the first reference to the 1920 * page clear the execness of the page. Otherwise fetch the execness. 1921 */ 1922 if (pg != NULL) 1923 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1924 1925 DPRINTFN(ENTER, " was_exec=%d", was_exec); 1926 1927 /* 1928 * Assume the page is cache inhibited and access is guarded unless 1929 * it's in our available memory array. If it is in the memory array, 1930 * asssume it's in memory coherent memory. 1931 */ 1932 if (flags & PMAP_MD_PREFETCHABLE) { 1933 pte_lo = 0; 1934 } else 1935 pte_lo = PTE_G; 1936 1937 if ((flags & PMAP_NOCACHE) == 0) { 1938 for (mp = mem; mp->size; mp++) { 1939 if (pa >= mp->start && pa < mp->start + mp->size) { 1940 pte_lo = PTE_M; 1941 break; 1942 } 1943 } 1944 #ifdef MULTIPROCESSOR 1945 if (((mfpvr() >> 16) & 0xffff) == MPC603e) 1946 pte_lo = PTE_M; 1947 #endif 1948 } else { 1949 pte_lo |= PTE_I; 1950 } 1951 1952 if (prot & VM_PROT_WRITE) 1953 pte_lo |= PTE_BW; 1954 else 1955 pte_lo |= PTE_BR; 1956 1957 /* 1958 * If this was in response to a fault, "pre-fault" the PTE's 1959 * changed/referenced bit appropriately. 1960 */ 1961 if (flags & VM_PROT_WRITE) 1962 pte_lo |= PTE_CHG; 1963 if (flags & VM_PROT_ALL) 1964 pte_lo |= PTE_REF; 1965 1966 /* 1967 * We need to know if this page can be executable 1968 */ 1969 flags |= (prot & VM_PROT_EXECUTE); 1970 1971 /* 1972 * Record mapping for later back-translation and pte spilling. 1973 * This will overwrite any existing mapping. 1974 */ 1975 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1976 1977 /* 1978 * Flush the real page from the instruction cache if this page is 1979 * mapped executable and cacheable and has not been flushed since 1980 * the last time it was modified. 1981 */ 1982 if (error == 0 && 1983 (flags & VM_PROT_EXECUTE) && 1984 (pte_lo & PTE_I) == 0 && 1985 was_exec == 0) { 1986 DPRINTFN(ENTER, " %s", "syncicache"); 1987 PMAPCOUNT(exec_synced); 1988 pmap_syncicache(pa, PAGE_SIZE); 1989 if (pg != NULL) { 1990 pmap_attr_save(pg, PTE_EXEC); 1991 PMAPCOUNT(exec_cached); 1992 #if defined(DEBUG) || defined(PMAPDEBUG) 1993 if (pmapdebug & PMAPDEBUG_ENTER) 1994 printf(" marked-as-exec"); 1995 else if (pmapdebug & PMAPDEBUG_EXEC) 1996 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 1997 VM_PAGE_TO_PHYS(pg)); 1998 1999 #endif 2000 } 2001 } 2002 2003 DPRINTFN(ENTER, ": error=%d\n", error); 2004 2005 PMAP_UNLOCK(); 2006 2007 return error; 2008 } 2009 2010 void 2011 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 2012 { 2013 struct mem_region *mp; 2014 register_t pte_lo; 2015 int error; 2016 2017 #if defined (PMAP_OEA64_BRIDGE) || defined (PMAP_OEA) 2018 if (va < VM_MIN_KERNEL_ADDRESS) 2019 panic("pmap_kenter_pa: attempt to enter " 2020 "non-kernel address %#" _PRIxva "!", va); 2021 #endif 2022 2023 DPRINTFN(KENTER, 2024 "pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot); 2025 2026 PMAP_LOCK(); 2027 2028 /* 2029 * Assume the page is cache inhibited and access is guarded unless 2030 * it's in our available memory array. If it is in the memory array, 2031 * asssume it's in memory coherent memory. 2032 */ 2033 pte_lo = PTE_IG; 2034 if ((flags & PMAP_NOCACHE) == 0) { 2035 for (mp = mem; mp->size; mp++) { 2036 if (pa >= mp->start && pa < mp->start + mp->size) { 2037 pte_lo = PTE_M; 2038 break; 2039 } 2040 } 2041 #ifdef MULTIPROCESSOR 2042 if (((mfpvr() >> 16) & 0xffff) == MPC603e) 2043 pte_lo = PTE_M; 2044 #endif 2045 } 2046 2047 if (prot & VM_PROT_WRITE) 2048 pte_lo |= PTE_BW; 2049 else 2050 pte_lo |= PTE_BR; 2051 2052 /* 2053 * We don't care about REF/CHG on PVOs on the unmanaged list. 2054 */ 2055 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2056 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2057 2058 if (error != 0) 2059 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2060 va, pa, error); 2061 2062 PMAP_UNLOCK(); 2063 } 2064 2065 void 2066 pmap_kremove(vaddr_t va, vsize_t len) 2067 { 2068 if (va < VM_MIN_KERNEL_ADDRESS) 2069 panic("pmap_kremove: attempt to remove " 2070 "non-kernel address %#" _PRIxva "!", va); 2071 2072 DPRINTFN(KREMOVE, "pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len); 2073 pmap_remove(pmap_kernel(), va, va + len); 2074 } 2075 2076 /* 2077 * Remove the given range of mapping entries. 2078 */ 2079 void 2080 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2081 { 2082 struct pvo_head pvol; 2083 struct pvo_entry *pvo; 2084 register_t msr; 2085 int pteidx; 2086 2087 PMAP_LOCK(); 2088 LIST_INIT(&pvol); 2089 msr = pmap_interrupts_off(); 2090 for (; va < endva; va += PAGE_SIZE) { 2091 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2092 if (pvo != NULL) { 2093 pmap_pvo_remove(pvo, pteidx, &pvol); 2094 } 2095 } 2096 pmap_interrupts_restore(msr); 2097 pmap_pvo_free_list(&pvol); 2098 PMAP_UNLOCK(); 2099 } 2100 2101 /* 2102 * Get the physical page address for the given pmap/virtual address. 2103 */ 2104 bool 2105 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2106 { 2107 struct pvo_entry *pvo; 2108 register_t msr; 2109 2110 PMAP_LOCK(); 2111 2112 /* 2113 * If this is a kernel pmap lookup, also check the battable 2114 * and if we get a hit, translate the VA to a PA using the 2115 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2116 * that will wrap back to 0. 2117 */ 2118 if (pm == pmap_kernel() && 2119 (va < VM_MIN_KERNEL_ADDRESS || 2120 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2121 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2122 #if defined (PMAP_OEA) 2123 #ifdef PPC_OEA601 2124 if ((MFPVR() >> 16) == MPC601) { 2125 register_t batu = battable[va >> 23].batu; 2126 register_t batl = battable[va >> 23].batl; 2127 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2128 if (BAT601_VALID_P(batl) && 2129 BAT601_VA_MATCH_P(batu, batl, va)) { 2130 register_t mask = 2131 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2132 if (pap) 2133 *pap = (batl & mask) | (va & ~mask); 2134 PMAP_UNLOCK(); 2135 return true; 2136 } else if (SR601_VALID_P(sr) && 2137 SR601_PA_MATCH_P(sr, va)) { 2138 if (pap) 2139 *pap = va; 2140 PMAP_UNLOCK(); 2141 return true; 2142 } 2143 } else 2144 #endif /* PPC_OEA601 */ 2145 { 2146 register_t batu = battable[BAT_VA2IDX(va)].batu; 2147 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2148 register_t batl = battable[BAT_VA2IDX(va)].batl; 2149 register_t mask = 2150 (~(batu & (BAT_XBL|BAT_BL)) << 15) & ~0x1ffffL; 2151 if (pap) 2152 *pap = (batl & mask) | (va & ~mask); 2153 PMAP_UNLOCK(); 2154 return true; 2155 } 2156 } 2157 return false; 2158 #elif defined (PMAP_OEA64_BRIDGE) 2159 if (va >= SEGMENT_LENGTH) 2160 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2161 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2162 else { 2163 if (pap) 2164 *pap = va; 2165 PMAP_UNLOCK(); 2166 return true; 2167 } 2168 #elif defined (PMAP_OEA64) 2169 #error PPC_OEA64 not supported 2170 #endif /* PPC_OEA */ 2171 } 2172 2173 msr = pmap_interrupts_off(); 2174 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2175 if (pvo != NULL) { 2176 PMAP_PVO_CHECK(pvo); /* sanity check */ 2177 if (pap) 2178 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2179 | (va & ADDR_POFF); 2180 } 2181 pmap_interrupts_restore(msr); 2182 PMAP_UNLOCK(); 2183 return pvo != NULL; 2184 } 2185 2186 /* 2187 * Lower the protection on the specified range of this pmap. 2188 */ 2189 void 2190 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2191 { 2192 struct pvo_entry *pvo; 2193 volatile struct pte *pt; 2194 register_t msr; 2195 int pteidx; 2196 2197 /* 2198 * Since this routine only downgrades protection, we should 2199 * always be called with at least one bit not set. 2200 */ 2201 KASSERT(prot != VM_PROT_ALL); 2202 2203 /* 2204 * If there is no protection, this is equivalent to 2205 * remove the pmap from the pmap. 2206 */ 2207 if ((prot & VM_PROT_READ) == 0) { 2208 pmap_remove(pm, va, endva); 2209 return; 2210 } 2211 2212 PMAP_LOCK(); 2213 2214 msr = pmap_interrupts_off(); 2215 for (; va < endva; va += PAGE_SIZE) { 2216 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2217 if (pvo == NULL) 2218 continue; 2219 PMAP_PVO_CHECK(pvo); /* sanity check */ 2220 2221 /* 2222 * Revoke executable if asked to do so. 2223 */ 2224 if ((prot & VM_PROT_EXECUTE) == 0) 2225 pvo_clear_exec(pvo); 2226 2227 #if 0 2228 /* 2229 * If the page is already read-only, no change 2230 * needs to be made. 2231 */ 2232 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2233 continue; 2234 #endif 2235 /* 2236 * Grab the PTE pointer before we diddle with 2237 * the cached PTE copy. 2238 */ 2239 pt = pmap_pvo_to_pte(pvo, pteidx); 2240 /* 2241 * Change the protection of the page. 2242 */ 2243 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2244 pvo->pvo_pte.pte_lo |= PTE_BR; 2245 2246 /* 2247 * If the PVO is in the page table, update 2248 * that pte at well. 2249 */ 2250 if (pt != NULL) { 2251 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2252 PVO_WHERE(pvo, PMAP_PROTECT); 2253 PMAPCOUNT(ptes_changed); 2254 } 2255 2256 PMAP_PVO_CHECK(pvo); /* sanity check */ 2257 } 2258 pmap_interrupts_restore(msr); 2259 PMAP_UNLOCK(); 2260 } 2261 2262 void 2263 pmap_unwire(pmap_t pm, vaddr_t va) 2264 { 2265 struct pvo_entry *pvo; 2266 register_t msr; 2267 2268 PMAP_LOCK(); 2269 msr = pmap_interrupts_off(); 2270 pvo = pmap_pvo_find_va(pm, va, NULL); 2271 if (pvo != NULL) { 2272 if (PVO_WIRED_P(pvo)) { 2273 pvo->pvo_vaddr &= ~PVO_WIRED; 2274 pm->pm_stats.wired_count--; 2275 } 2276 PMAP_PVO_CHECK(pvo); /* sanity check */ 2277 } 2278 pmap_interrupts_restore(msr); 2279 PMAP_UNLOCK(); 2280 } 2281 2282 /* 2283 * Lower the protection on the specified physical page. 2284 */ 2285 void 2286 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2287 { 2288 struct pvo_head *pvo_head, pvol; 2289 struct pvo_entry *pvo, *next_pvo; 2290 volatile struct pte *pt; 2291 register_t msr; 2292 2293 PMAP_LOCK(); 2294 2295 KASSERT(prot != VM_PROT_ALL); 2296 LIST_INIT(&pvol); 2297 msr = pmap_interrupts_off(); 2298 2299 /* 2300 * When UVM reuses a page, it does a pmap_page_protect with 2301 * VM_PROT_NONE. At that point, we can clear the exec flag 2302 * since we know the page will have different contents. 2303 */ 2304 if ((prot & VM_PROT_READ) == 0) { 2305 DPRINTFN(EXEC, "[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2306 VM_PAGE_TO_PHYS(pg)); 2307 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2308 PMAPCOUNT(exec_uncached_page_protect); 2309 pmap_attr_clear(pg, PTE_EXEC); 2310 } 2311 } 2312 2313 pvo_head = vm_page_to_pvoh(pg); 2314 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2315 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2316 PMAP_PVO_CHECK(pvo); /* sanity check */ 2317 2318 /* 2319 * Downgrading to no mapping at all, we just remove the entry. 2320 */ 2321 if ((prot & VM_PROT_READ) == 0) { 2322 pmap_pvo_remove(pvo, -1, &pvol); 2323 continue; 2324 } 2325 2326 /* 2327 * If EXEC permission is being revoked, just clear the 2328 * flag in the PVO. 2329 */ 2330 if ((prot & VM_PROT_EXECUTE) == 0) 2331 pvo_clear_exec(pvo); 2332 2333 /* 2334 * If this entry is already RO, don't diddle with the 2335 * page table. 2336 */ 2337 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2338 PMAP_PVO_CHECK(pvo); 2339 continue; 2340 } 2341 2342 /* 2343 * Grab the PTE before the we diddle the bits so 2344 * pvo_to_pte can verify the pte contents are as 2345 * expected. 2346 */ 2347 pt = pmap_pvo_to_pte(pvo, -1); 2348 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2349 pvo->pvo_pte.pte_lo |= PTE_BR; 2350 if (pt != NULL) { 2351 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2352 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2353 PMAPCOUNT(ptes_changed); 2354 } 2355 PMAP_PVO_CHECK(pvo); /* sanity check */ 2356 } 2357 pmap_interrupts_restore(msr); 2358 pmap_pvo_free_list(&pvol); 2359 2360 PMAP_UNLOCK(); 2361 } 2362 2363 /* 2364 * Activate the address space for the specified process. If the process 2365 * is the current process, load the new MMU context. 2366 */ 2367 void 2368 pmap_activate(struct lwp *l) 2369 { 2370 struct pcb *pcb = lwp_getpcb(l); 2371 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2372 2373 DPRINTFN(ACTIVATE, 2374 "pmap_activate: lwp %p (curlwp %p)\n", l, curlwp); 2375 2376 /* 2377 * XXX Normally performed in cpu_lwp_fork(). 2378 */ 2379 pcb->pcb_pm = pmap; 2380 2381 /* 2382 * In theory, the SR registers need only be valid on return 2383 * to user space wait to do them there. 2384 */ 2385 if (l == curlwp) { 2386 /* Store pointer to new current pmap. */ 2387 curpm = pmap; 2388 } 2389 } 2390 2391 /* 2392 * Deactivate the specified process's address space. 2393 */ 2394 void 2395 pmap_deactivate(struct lwp *l) 2396 { 2397 } 2398 2399 bool 2400 pmap_query_bit(struct vm_page *pg, int ptebit) 2401 { 2402 struct pvo_entry *pvo; 2403 volatile struct pte *pt; 2404 register_t msr; 2405 2406 PMAP_LOCK(); 2407 2408 if (pmap_attr_fetch(pg) & ptebit) { 2409 PMAP_UNLOCK(); 2410 return true; 2411 } 2412 2413 msr = pmap_interrupts_off(); 2414 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2415 PMAP_PVO_CHECK(pvo); /* sanity check */ 2416 /* 2417 * See if we saved the bit off. If so cache, it and return 2418 * success. 2419 */ 2420 if (pvo->pvo_pte.pte_lo & ptebit) { 2421 pmap_attr_save(pg, ptebit); 2422 PMAP_PVO_CHECK(pvo); /* sanity check */ 2423 pmap_interrupts_restore(msr); 2424 PMAP_UNLOCK(); 2425 return true; 2426 } 2427 } 2428 /* 2429 * No luck, now go thru the hard part of looking at the ptes 2430 * themselves. Sync so any pending REF/CHG bits are flushed 2431 * to the PTEs. 2432 */ 2433 SYNC(); 2434 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2435 PMAP_PVO_CHECK(pvo); /* sanity check */ 2436 /* 2437 * See if this pvo have a valid PTE. If so, fetch the 2438 * REF/CHG bits from the valid PTE. If the appropriate 2439 * ptebit is set, cache, it and return success. 2440 */ 2441 pt = pmap_pvo_to_pte(pvo, -1); 2442 if (pt != NULL) { 2443 pmap_pte_synch(pt, &pvo->pvo_pte); 2444 if (pvo->pvo_pte.pte_lo & ptebit) { 2445 pmap_attr_save(pg, ptebit); 2446 PMAP_PVO_CHECK(pvo); /* sanity check */ 2447 pmap_interrupts_restore(msr); 2448 PMAP_UNLOCK(); 2449 return true; 2450 } 2451 } 2452 } 2453 pmap_interrupts_restore(msr); 2454 PMAP_UNLOCK(); 2455 return false; 2456 } 2457 2458 bool 2459 pmap_clear_bit(struct vm_page *pg, int ptebit) 2460 { 2461 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2462 struct pvo_entry *pvo; 2463 volatile struct pte *pt; 2464 register_t msr; 2465 int rv = 0; 2466 2467 PMAP_LOCK(); 2468 msr = pmap_interrupts_off(); 2469 2470 /* 2471 * Fetch the cache value 2472 */ 2473 rv |= pmap_attr_fetch(pg); 2474 2475 /* 2476 * Clear the cached value. 2477 */ 2478 pmap_attr_clear(pg, ptebit); 2479 2480 /* 2481 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2482 * can reset the right ones). Note that since the pvo entries and 2483 * list heads are accessed via BAT0 and are never placed in the 2484 * page table, we don't have to worry about further accesses setting 2485 * the REF/CHG bits. 2486 */ 2487 SYNC(); 2488 2489 /* 2490 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2491 * valid PTE. If so, clear the ptebit from the valid PTE. 2492 */ 2493 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2494 PMAP_PVO_CHECK(pvo); /* sanity check */ 2495 pt = pmap_pvo_to_pte(pvo, -1); 2496 if (pt != NULL) { 2497 /* 2498 * Only sync the PTE if the bit we are looking 2499 * for is not already set. 2500 */ 2501 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2502 pmap_pte_synch(pt, &pvo->pvo_pte); 2503 /* 2504 * If the bit we are looking for was already set, 2505 * clear that bit in the pte. 2506 */ 2507 if (pvo->pvo_pte.pte_lo & ptebit) 2508 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2509 } 2510 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2511 pvo->pvo_pte.pte_lo &= ~ptebit; 2512 PMAP_PVO_CHECK(pvo); /* sanity check */ 2513 } 2514 pmap_interrupts_restore(msr); 2515 2516 /* 2517 * If we are clearing the modify bit and this page was marked EXEC 2518 * and the user of the page thinks the page was modified, then we 2519 * need to clean it from the icache if it's mapped or clear the EXEC 2520 * bit if it's not mapped. The page itself might not have the CHG 2521 * bit set if the modification was done via DMA to the page. 2522 */ 2523 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2524 if (LIST_EMPTY(pvoh)) { 2525 DPRINTFN(EXEC, "[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2526 VM_PAGE_TO_PHYS(pg)); 2527 pmap_attr_clear(pg, PTE_EXEC); 2528 PMAPCOUNT(exec_uncached_clear_modify); 2529 } else { 2530 DPRINTFN(EXEC, "[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2531 VM_PAGE_TO_PHYS(pg)); 2532 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2533 PMAPCOUNT(exec_synced_clear_modify); 2534 } 2535 } 2536 PMAP_UNLOCK(); 2537 return (rv & ptebit) != 0; 2538 } 2539 2540 void 2541 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2542 { 2543 struct pvo_entry *pvo; 2544 size_t offset = va & ADDR_POFF; 2545 int s; 2546 2547 PMAP_LOCK(); 2548 s = splvm(); 2549 while (len > 0) { 2550 size_t seglen = PAGE_SIZE - offset; 2551 if (seglen > len) 2552 seglen = len; 2553 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2554 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2555 pmap_syncicache( 2556 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2557 PMAP_PVO_CHECK(pvo); 2558 } 2559 va += seglen; 2560 len -= seglen; 2561 offset = 0; 2562 } 2563 splx(s); 2564 PMAP_UNLOCK(); 2565 } 2566 2567 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2568 void 2569 pmap_pte_print(volatile struct pte *pt) 2570 { 2571 printf("PTE %p: ", pt); 2572 2573 #if defined(PMAP_OEA) 2574 /* High word: */ 2575 printf("%#" _PRIxpte ": [", pt->pte_hi); 2576 #else 2577 printf("%#" _PRIxpte ": [", pt->pte_hi); 2578 #endif /* PMAP_OEA */ 2579 2580 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2581 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2582 2583 printf("%#" _PRIxpte " %#" _PRIxpte "", 2584 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2585 pt->pte_hi & PTE_API); 2586 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2587 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2588 #else 2589 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2590 #endif /* PMAP_OEA */ 2591 2592 /* Low word: */ 2593 #if defined (PMAP_OEA) 2594 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2595 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2596 #else 2597 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2598 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2599 #endif 2600 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2601 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2602 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2603 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2604 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2605 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2606 switch (pt->pte_lo & PTE_PP) { 2607 case PTE_BR: printf("br]\n"); break; 2608 case PTE_BW: printf("bw]\n"); break; 2609 case PTE_SO: printf("so]\n"); break; 2610 case PTE_SW: printf("sw]\n"); break; 2611 } 2612 } 2613 #endif 2614 2615 #if defined(DDB) 2616 void 2617 pmap_pteg_check(void) 2618 { 2619 volatile struct pte *pt; 2620 int i; 2621 int ptegidx; 2622 u_int p_valid = 0; 2623 u_int s_valid = 0; 2624 u_int invalid = 0; 2625 2626 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2627 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2628 if (pt->pte_hi & PTE_VALID) { 2629 if (pt->pte_hi & PTE_HID) 2630 s_valid++; 2631 else 2632 { 2633 p_valid++; 2634 } 2635 } else 2636 invalid++; 2637 } 2638 } 2639 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2640 p_valid, p_valid, s_valid, s_valid, 2641 invalid, invalid); 2642 } 2643 2644 void 2645 pmap_print_mmuregs(void) 2646 { 2647 int i; 2648 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2649 u_int cpuvers; 2650 #endif 2651 #ifndef PMAP_OEA64 2652 vaddr_t addr; 2653 register_t soft_sr[16]; 2654 #endif 2655 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2656 struct bat soft_ibat[4]; 2657 struct bat soft_dbat[4]; 2658 #endif 2659 paddr_t sdr1; 2660 2661 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2662 cpuvers = MFPVR() >> 16; 2663 #endif 2664 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2665 #ifndef PMAP_OEA64 2666 addr = 0; 2667 for (i = 0; i < 16; i++) { 2668 soft_sr[i] = MFSRIN(addr); 2669 addr += (1 << ADDR_SR_SHFT); 2670 } 2671 #endif 2672 2673 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2674 /* read iBAT (601: uBAT) registers */ 2675 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2676 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2677 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2678 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2679 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2680 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2681 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2682 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2683 2684 2685 if (cpuvers != MPC601) { 2686 /* read dBAT registers */ 2687 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2688 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2689 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2690 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2691 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2692 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2693 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2694 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2695 } 2696 #endif 2697 2698 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2699 #ifndef PMAP_OEA64 2700 printf("SR[]:\t"); 2701 for (i = 0; i < 4; i++) 2702 printf("0x%08lx, ", soft_sr[i]); 2703 printf("\n\t"); 2704 for ( ; i < 8; i++) 2705 printf("0x%08lx, ", soft_sr[i]); 2706 printf("\n\t"); 2707 for ( ; i < 12; i++) 2708 printf("0x%08lx, ", soft_sr[i]); 2709 printf("\n\t"); 2710 for ( ; i < 16; i++) 2711 printf("0x%08lx, ", soft_sr[i]); 2712 printf("\n"); 2713 #endif 2714 2715 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2716 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2717 for (i = 0; i < 4; i++) { 2718 printf("0x%08lx 0x%08lx, ", 2719 soft_ibat[i].batu, soft_ibat[i].batl); 2720 if (i == 1) 2721 printf("\n\t"); 2722 } 2723 if (cpuvers != MPC601) { 2724 printf("\ndBAT[]:\t"); 2725 for (i = 0; i < 4; i++) { 2726 printf("0x%08lx 0x%08lx, ", 2727 soft_dbat[i].batu, soft_dbat[i].batl); 2728 if (i == 1) 2729 printf("\n\t"); 2730 } 2731 } 2732 printf("\n"); 2733 #endif /* PMAP_OEA... */ 2734 } 2735 2736 void 2737 pmap_print_pte(pmap_t pm, vaddr_t va) 2738 { 2739 struct pvo_entry *pvo; 2740 volatile struct pte *pt; 2741 int pteidx; 2742 2743 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2744 if (pvo != NULL) { 2745 pt = pmap_pvo_to_pte(pvo, pteidx); 2746 if (pt != NULL) { 2747 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2748 va, pt, 2749 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2750 pt->pte_hi, pt->pte_lo); 2751 } else { 2752 printf("No valid PTE found\n"); 2753 } 2754 } else { 2755 printf("Address not in pmap\n"); 2756 } 2757 } 2758 2759 void 2760 pmap_pteg_dist(void) 2761 { 2762 struct pvo_entry *pvo; 2763 int ptegidx; 2764 int depth; 2765 int max_depth = 0; 2766 unsigned int depths[64]; 2767 2768 memset(depths, 0, sizeof(depths)); 2769 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2770 depth = 0; 2771 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2772 depth++; 2773 } 2774 if (depth > max_depth) 2775 max_depth = depth; 2776 if (depth > 63) 2777 depth = 63; 2778 depths[depth]++; 2779 } 2780 2781 for (depth = 0; depth < 64; depth++) { 2782 printf(" [%2d]: %8u", depth, depths[depth]); 2783 if ((depth & 3) == 3) 2784 printf("\n"); 2785 if (depth == max_depth) 2786 break; 2787 } 2788 if ((depth & 3) != 3) 2789 printf("\n"); 2790 printf("Max depth found was %d\n", max_depth); 2791 } 2792 #endif /* DEBUG */ 2793 2794 #if defined(PMAPCHECK) || defined(DEBUG) 2795 void 2796 pmap_pvo_verify(void) 2797 { 2798 int ptegidx; 2799 int s; 2800 2801 s = splvm(); 2802 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2803 struct pvo_entry *pvo; 2804 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2805 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2806 panic("pmap_pvo_verify: invalid pvo %p " 2807 "on list %#x", pvo, ptegidx); 2808 pmap_pvo_check(pvo); 2809 } 2810 } 2811 splx(s); 2812 } 2813 #endif /* PMAPCHECK */ 2814 2815 2816 void * 2817 pmap_pool_ualloc(struct pool *pp, int flags) 2818 { 2819 struct pvo_page *pvop; 2820 2821 if (uvm.page_init_done != true) { 2822 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2823 } 2824 2825 PMAP_LOCK(); 2826 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2827 if (pvop != NULL) { 2828 pmap_upvop_free--; 2829 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2830 PMAP_UNLOCK(); 2831 return pvop; 2832 } 2833 PMAP_UNLOCK(); 2834 return pmap_pool_malloc(pp, flags); 2835 } 2836 2837 void * 2838 pmap_pool_malloc(struct pool *pp, int flags) 2839 { 2840 struct pvo_page *pvop; 2841 struct vm_page *pg; 2842 2843 PMAP_LOCK(); 2844 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2845 if (pvop != NULL) { 2846 pmap_mpvop_free--; 2847 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2848 PMAP_UNLOCK(); 2849 return pvop; 2850 } 2851 PMAP_UNLOCK(); 2852 again: 2853 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2854 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2855 if (__predict_false(pg == NULL)) { 2856 if (flags & PR_WAITOK) { 2857 uvm_wait("plpg"); 2858 goto again; 2859 } else { 2860 return (0); 2861 } 2862 } 2863 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2864 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2865 } 2866 2867 void 2868 pmap_pool_ufree(struct pool *pp, void *va) 2869 { 2870 struct pvo_page *pvop; 2871 #if 0 2872 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2873 pmap_pool_mfree(va, size, tag); 2874 return; 2875 } 2876 #endif 2877 PMAP_LOCK(); 2878 pvop = va; 2879 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2880 pmap_upvop_free++; 2881 if (pmap_upvop_free > pmap_upvop_maxfree) 2882 pmap_upvop_maxfree = pmap_upvop_free; 2883 PMAP_UNLOCK(); 2884 } 2885 2886 void 2887 pmap_pool_mfree(struct pool *pp, void *va) 2888 { 2889 struct pvo_page *pvop; 2890 2891 PMAP_LOCK(); 2892 pvop = va; 2893 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2894 pmap_mpvop_free++; 2895 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2896 pmap_mpvop_maxfree = pmap_mpvop_free; 2897 PMAP_UNLOCK(); 2898 #if 0 2899 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2900 #endif 2901 } 2902 2903 /* 2904 * This routine in bootstraping to steal to-be-managed memory (which will 2905 * then be unmanaged). We use it to grab from the first 256MB for our 2906 * pmap needs and above 256MB for other stuff. 2907 */ 2908 vaddr_t 2909 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2910 { 2911 vsize_t size; 2912 vaddr_t va; 2913 paddr_t start, end, pa = 0; 2914 int npgs, freelist; 2915 uvm_physseg_t bank; 2916 2917 if (uvm.page_init_done == true) 2918 panic("pmap_steal_memory: called _after_ bootstrap"); 2919 2920 *vstartp = VM_MIN_KERNEL_ADDRESS; 2921 *vendp = VM_MAX_KERNEL_ADDRESS; 2922 2923 size = round_page(vsize); 2924 npgs = atop(size); 2925 2926 /* 2927 * PA 0 will never be among those given to UVM so we can use it 2928 * to indicate we couldn't steal any memory. 2929 */ 2930 2931 for (bank = uvm_physseg_get_first(); 2932 uvm_physseg_valid_p(bank); 2933 bank = uvm_physseg_get_next(bank)) { 2934 2935 freelist = uvm_physseg_get_free_list(bank); 2936 start = uvm_physseg_get_start(bank); 2937 end = uvm_physseg_get_end(bank); 2938 2939 if (freelist == VM_FREELIST_FIRST256 && 2940 (end - start) >= npgs) { 2941 pa = ptoa(start); 2942 break; 2943 } 2944 } 2945 2946 if (pa == 0) 2947 panic("pmap_steal_memory: no approriate memory to steal!"); 2948 2949 uvm_physseg_unplug(start, npgs); 2950 2951 va = (vaddr_t) pa; 2952 memset((void *) va, 0, size); 2953 pmap_pages_stolen += npgs; 2954 #ifdef DEBUG 2955 if (pmapdebug && npgs > 1) { 2956 u_int cnt = 0; 2957 for (bank = uvm_physseg_get_first(); 2958 uvm_physseg_valid_p(bank); 2959 bank = uvm_physseg_get_next(bank)) { 2960 cnt += uvm_physseg_get_avail_end(bank) - uvm_physseg_get_avail_start(bank); 2961 } 2962 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2963 npgs, pmap_pages_stolen, cnt); 2964 } 2965 #endif 2966 2967 return va; 2968 } 2969 2970 /* 2971 * Find a chuck of memory with right size and alignment. 2972 */ 2973 paddr_t 2974 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2975 { 2976 struct mem_region *mp; 2977 paddr_t s, e; 2978 int i, j; 2979 2980 size = round_page(size); 2981 2982 DPRINTFN(BOOT, 2983 "pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 2984 size, alignment, at_end); 2985 2986 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2987 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 2988 alignment); 2989 2990 if (at_end) { 2991 if (alignment != PAGE_SIZE) 2992 panic("pmap_boot_find_memory: invalid ending " 2993 "alignment %#" _PRIxpa, alignment); 2994 2995 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 2996 s = mp->start + mp->size - size; 2997 if (s >= mp->start && mp->size >= size) { 2998 DPRINTFN(BOOT, ": %#" _PRIxpa "\n", s); 2999 DPRINTFN(BOOT, 3000 "pmap_boot_find_memory: b-avail[%d] start " 3001 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3002 mp->start, mp->size); 3003 mp->size -= size; 3004 DPRINTFN(BOOT, 3005 "pmap_boot_find_memory: a-avail[%d] start " 3006 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3007 mp->start, mp->size); 3008 return s; 3009 } 3010 } 3011 panic("pmap_boot_find_memory: no available memory"); 3012 } 3013 3014 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3015 s = (mp->start + alignment - 1) & ~(alignment-1); 3016 e = s + size; 3017 3018 /* 3019 * Is the calculated region entirely within the region? 3020 */ 3021 if (s < mp->start || e > mp->start + mp->size) 3022 continue; 3023 3024 DPRINTFN(BOOT, ": %#" _PRIxpa "\n", s); 3025 if (s == mp->start) { 3026 /* 3027 * If the block starts at the beginning of region, 3028 * adjust the size & start. (the region may now be 3029 * zero in length) 3030 */ 3031 DPRINTFN(BOOT, 3032 "pmap_boot_find_memory: b-avail[%d] start " 3033 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3034 mp->start += size; 3035 mp->size -= size; 3036 DPRINTFN(BOOT, 3037 "pmap_boot_find_memory: a-avail[%d] start " 3038 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3039 } else if (e == mp->start + mp->size) { 3040 /* 3041 * If the block starts at the beginning of region, 3042 * adjust only the size. 3043 */ 3044 DPRINTFN(BOOT, 3045 "pmap_boot_find_memory: b-avail[%d] start " 3046 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3047 mp->size -= size; 3048 DPRINTFN(BOOT, 3049 "pmap_boot_find_memory: a-avail[%d] start " 3050 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3051 } else { 3052 /* 3053 * Block is in the middle of the region, so we 3054 * have to split it in two. 3055 */ 3056 for (j = avail_cnt; j > i + 1; j--) { 3057 avail[j] = avail[j-1]; 3058 } 3059 DPRINTFN(BOOT, 3060 "pmap_boot_find_memory: b-avail[%d] start " 3061 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3062 mp[1].start = e; 3063 mp[1].size = mp[0].start + mp[0].size - e; 3064 mp[0].size = s - mp[0].start; 3065 avail_cnt++; 3066 for (; i < avail_cnt; i++) { 3067 DPRINTFN(BOOT, 3068 "pmap_boot_find_memory: a-avail[%d] " 3069 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3070 avail[i].start, avail[i].size); 3071 } 3072 } 3073 KASSERT(s == (uintptr_t) s); 3074 return s; 3075 } 3076 panic("pmap_boot_find_memory: not enough memory for " 3077 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3078 } 3079 3080 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3081 #if defined (PMAP_OEA64_BRIDGE) 3082 int 3083 pmap_setup_segment0_map(int use_large_pages, ...) 3084 { 3085 vaddr_t va, va_end; 3086 3087 register_t pte_lo = 0x0; 3088 int ptegidx = 0; 3089 struct pte pte; 3090 va_list ap; 3091 3092 /* Coherent + Supervisor RW, no user access */ 3093 pte_lo = PTE_M; 3094 3095 /* XXXSL 3096 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3097 * these have to take priority. 3098 */ 3099 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3100 ptegidx = va_to_pteg(pmap_kernel(), va); 3101 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3102 (void)pmap_pte_insert(ptegidx, &pte); 3103 } 3104 3105 va_start(ap, use_large_pages); 3106 while (1) { 3107 paddr_t pa; 3108 size_t size; 3109 3110 va = va_arg(ap, vaddr_t); 3111 3112 if (va == 0) 3113 break; 3114 3115 pa = va_arg(ap, paddr_t); 3116 size = va_arg(ap, size_t); 3117 3118 for (va_end = va + size; va < va_end; va += 0x1000, pa += 0x1000) { 3119 #if 0 3120 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3121 #endif 3122 ptegidx = va_to_pteg(pmap_kernel(), va); 3123 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3124 (void)pmap_pte_insert(ptegidx, &pte); 3125 } 3126 } 3127 va_end(ap); 3128 3129 TLBSYNC(); 3130 SYNC(); 3131 return (0); 3132 } 3133 #endif /* PMAP_OEA64_BRIDGE */ 3134 3135 /* 3136 * This is not part of the defined PMAP interface and is specific to the 3137 * PowerPC architecture. This is called during initppc, before the system 3138 * is really initialized. 3139 */ 3140 void 3141 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3142 { 3143 struct mem_region *mp, tmp; 3144 paddr_t s, e; 3145 psize_t size; 3146 int i, j; 3147 3148 /* 3149 * Get memory. 3150 */ 3151 mem_regions(&mem, &avail); 3152 #if defined(DEBUG) 3153 if (pmapdebug & PMAPDEBUG_BOOT) { 3154 printf("pmap_bootstrap: memory configuration:\n"); 3155 for (mp = mem; mp->size; mp++) { 3156 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3157 mp->start, mp->size); 3158 } 3159 for (mp = avail; mp->size; mp++) { 3160 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3161 mp->start, mp->size); 3162 } 3163 } 3164 #endif 3165 3166 /* 3167 * Find out how much physical memory we have and in how many chunks. 3168 */ 3169 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3170 if (mp->start >= pmap_memlimit) 3171 continue; 3172 if (mp->start + mp->size > pmap_memlimit) { 3173 size = pmap_memlimit - mp->start; 3174 physmem += btoc(size); 3175 } else { 3176 physmem += btoc(mp->size); 3177 } 3178 mem_cnt++; 3179 } 3180 3181 /* 3182 * Count the number of available entries. 3183 */ 3184 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3185 avail_cnt++; 3186 3187 /* 3188 * Page align all regions. 3189 */ 3190 kernelstart = trunc_page(kernelstart); 3191 kernelend = round_page(kernelend); 3192 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3193 s = round_page(mp->start); 3194 mp->size -= (s - mp->start); 3195 mp->size = trunc_page(mp->size); 3196 mp->start = s; 3197 e = mp->start + mp->size; 3198 3199 DPRINTFN(BOOT, 3200 "pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3201 i, mp->start, mp->size); 3202 3203 /* 3204 * Don't allow the end to run beyond our artificial limit 3205 */ 3206 if (e > pmap_memlimit) 3207 e = pmap_memlimit; 3208 3209 /* 3210 * Is this region empty or strange? skip it. 3211 */ 3212 if (e <= s) { 3213 mp->start = 0; 3214 mp->size = 0; 3215 continue; 3216 } 3217 3218 /* 3219 * Does this overlap the beginning of kernel? 3220 * Does extend past the end of the kernel? 3221 */ 3222 else if (s < kernelstart && e > kernelstart) { 3223 if (e > kernelend) { 3224 avail[avail_cnt].start = kernelend; 3225 avail[avail_cnt].size = e - kernelend; 3226 avail_cnt++; 3227 } 3228 mp->size = kernelstart - s; 3229 } 3230 /* 3231 * Check whether this region overlaps the end of the kernel. 3232 */ 3233 else if (s < kernelend && e > kernelend) { 3234 mp->start = kernelend; 3235 mp->size = e - kernelend; 3236 } 3237 /* 3238 * Look whether this regions is completely inside the kernel. 3239 * Nuke it if it does. 3240 */ 3241 else if (s >= kernelstart && e <= kernelend) { 3242 mp->start = 0; 3243 mp->size = 0; 3244 } 3245 /* 3246 * If the user imposed a memory limit, enforce it. 3247 */ 3248 else if (s >= pmap_memlimit) { 3249 mp->start = -PAGE_SIZE; /* let's know why */ 3250 mp->size = 0; 3251 } 3252 else { 3253 mp->start = s; 3254 mp->size = e - s; 3255 } 3256 DPRINTFN(BOOT, 3257 "pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3258 i, mp->start, mp->size); 3259 } 3260 3261 /* 3262 * Move (and uncount) all the null return to the end. 3263 */ 3264 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3265 if (mp->size == 0) { 3266 tmp = avail[i]; 3267 avail[i] = avail[--avail_cnt]; 3268 avail[avail_cnt] = avail[i]; 3269 } 3270 } 3271 3272 /* 3273 * (Bubble)sort them into ascending order. 3274 */ 3275 for (i = 0; i < avail_cnt; i++) { 3276 for (j = i + 1; j < avail_cnt; j++) { 3277 if (avail[i].start > avail[j].start) { 3278 tmp = avail[i]; 3279 avail[i] = avail[j]; 3280 avail[j] = tmp; 3281 } 3282 } 3283 } 3284 3285 /* 3286 * Make sure they don't overlap. 3287 */ 3288 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3289 if (mp[0].start + mp[0].size > mp[1].start) { 3290 mp[0].size = mp[1].start - mp[0].start; 3291 } 3292 DPRINTFN(BOOT, 3293 "pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3294 i, mp->start, mp->size); 3295 } 3296 DPRINTFN(BOOT, 3297 "pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3298 i, mp->start, mp->size); 3299 3300 #ifdef PTEGCOUNT 3301 pmap_pteg_cnt = PTEGCOUNT; 3302 #else /* PTEGCOUNT */ 3303 3304 pmap_pteg_cnt = 0x1000; 3305 3306 while (pmap_pteg_cnt < physmem) 3307 pmap_pteg_cnt <<= 1; 3308 3309 pmap_pteg_cnt >>= 1; 3310 #endif /* PTEGCOUNT */ 3311 3312 #ifdef DEBUG 3313 DPRINTFN(BOOT, "pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt); 3314 #endif 3315 3316 /* 3317 * Find suitably aligned memory for PTEG hash table. 3318 */ 3319 size = pmap_pteg_cnt * sizeof(struct pteg); 3320 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3321 3322 #ifdef DEBUG 3323 DPRINTFN(BOOT, 3324 "PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table); 3325 #endif 3326 3327 3328 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3329 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3330 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3331 pmap_pteg_table, size); 3332 #endif 3333 3334 memset(__UNVOLATILE(pmap_pteg_table), 0, 3335 pmap_pteg_cnt * sizeof(struct pteg)); 3336 pmap_pteg_mask = pmap_pteg_cnt - 1; 3337 3338 /* 3339 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3340 * with pages. So we just steal them before giving them to UVM. 3341 */ 3342 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3343 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3344 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3345 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3346 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3347 pmap_pvo_table, size); 3348 #endif 3349 3350 for (i = 0; i < pmap_pteg_cnt; i++) 3351 TAILQ_INIT(&pmap_pvo_table[i]); 3352 3353 #ifndef MSGBUFADDR 3354 /* 3355 * Allocate msgbuf in high memory. 3356 */ 3357 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3358 #endif 3359 3360 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3361 paddr_t pfstart = atop(mp->start); 3362 paddr_t pfend = atop(mp->start + mp->size); 3363 if (mp->size == 0) 3364 continue; 3365 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3366 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3367 VM_FREELIST_FIRST256); 3368 } else if (mp->start >= SEGMENT_LENGTH) { 3369 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3370 VM_FREELIST_DEFAULT); 3371 } else { 3372 pfend = atop(SEGMENT_LENGTH); 3373 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3374 VM_FREELIST_FIRST256); 3375 pfstart = atop(SEGMENT_LENGTH); 3376 pfend = atop(mp->start + mp->size); 3377 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3378 VM_FREELIST_DEFAULT); 3379 } 3380 } 3381 3382 /* 3383 * Make sure kernel vsid is allocated as well as VSID 0. 3384 */ 3385 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3386 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3387 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3388 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3389 pmap_vsid_bitmap[0] |= 1; 3390 3391 /* 3392 * Initialize kernel pmap and hardware. 3393 */ 3394 3395 /* PMAP_OEA64_BRIDGE does support these instructions */ 3396 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3397 for (i = 0; i < 16; i++) { 3398 #if defined(PPC_OEA601) 3399 /* XXX wedges for segment register 0xf , so set later */ 3400 if ((iosrtable[i] & SR601_T) && ((MFPVR() >> 16) == MPC601)) 3401 continue; 3402 #endif 3403 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3404 __asm volatile ("mtsrin %0,%1" 3405 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3406 } 3407 3408 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3409 __asm volatile ("mtsr %0,%1" 3410 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3411 #ifdef KERNEL2_SR 3412 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3413 __asm volatile ("mtsr %0,%1" 3414 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3415 #endif 3416 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3417 #if defined (PMAP_OEA) 3418 for (i = 0; i < 16; i++) { 3419 if (iosrtable[i] & SR601_T) { 3420 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3421 __asm volatile ("mtsrin %0,%1" 3422 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3423 } 3424 } 3425 __asm volatile ("sync; mtsdr1 %0; isync" 3426 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3427 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3428 __asm __volatile ("sync; mtsdr1 %0; isync" 3429 :: "r"((uintptr_t)pmap_pteg_table | (32 - __builtin_clz(pmap_pteg_mask >> 11)))); 3430 #endif 3431 tlbia(); 3432 3433 #ifdef ALTIVEC 3434 pmap_use_altivec = cpu_altivec; 3435 #endif 3436 3437 #ifdef DEBUG 3438 if (pmapdebug & PMAPDEBUG_BOOT) { 3439 u_int cnt; 3440 uvm_physseg_t bank; 3441 char pbuf[9]; 3442 for (cnt = 0, bank = uvm_physseg_get_first(); 3443 uvm_physseg_valid_p(bank); 3444 bank = uvm_physseg_get_next(bank)) { 3445 cnt += uvm_physseg_get_avail_end(bank) - 3446 uvm_physseg_get_avail_start(bank); 3447 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3448 bank, 3449 ptoa(uvm_physseg_get_avail_start(bank)), 3450 ptoa(uvm_physseg_get_avail_end(bank)), 3451 ptoa(uvm_physseg_get_avail_end(bank) - uvm_physseg_get_avail_start(bank))); 3452 } 3453 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3454 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3455 pbuf, cnt); 3456 } 3457 #endif 3458 3459 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3460 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3461 &pmap_pool_uallocator, IPL_VM); 3462 3463 pool_setlowat(&pmap_upvo_pool, 252); 3464 3465 pool_init(&pmap_pool, sizeof(struct pmap), 3466 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3467 IPL_NONE); 3468 3469 #if defined(PMAP_NEED_MAPKERNEL) 3470 { 3471 struct pmap *pm = pmap_kernel(); 3472 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3473 extern int etext[], kernel_text[]; 3474 vaddr_t va, va_etext = (paddr_t) etext; 3475 #endif 3476 paddr_t pa, pa_end; 3477 register_t sr; 3478 struct pte pt; 3479 unsigned int ptegidx; 3480 int bank; 3481 3482 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3483 pm->pm_sr[0] = sr; 3484 3485 for (bank = 0; bank < vm_nphysseg; bank++) { 3486 pa_end = ptoa(VM_PHYSMEM_PTR(bank)->avail_end); 3487 pa = ptoa(VM_PHYSMEM_PTR(bank)->avail_start); 3488 for (; pa < pa_end; pa += PAGE_SIZE) { 3489 ptegidx = va_to_pteg(pm, pa); 3490 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3491 pmap_pte_insert(ptegidx, &pt); 3492 } 3493 } 3494 3495 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3496 va = (vaddr_t) kernel_text; 3497 3498 for (pa = kernelstart; va < va_etext; 3499 pa += PAGE_SIZE, va += PAGE_SIZE) { 3500 ptegidx = va_to_pteg(pm, va); 3501 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3502 pmap_pte_insert(ptegidx, &pt); 3503 } 3504 3505 for (; pa < kernelend; 3506 pa += PAGE_SIZE, va += PAGE_SIZE) { 3507 ptegidx = va_to_pteg(pm, va); 3508 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3509 pmap_pte_insert(ptegidx, &pt); 3510 } 3511 3512 for (va = 0, pa = 0; va < kernelstart; 3513 pa += PAGE_SIZE, va += PAGE_SIZE) { 3514 ptegidx = va_to_pteg(pm, va); 3515 if (va < 0x3000) 3516 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3517 else 3518 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3519 pmap_pte_insert(ptegidx, &pt); 3520 } 3521 for (va = kernelend, pa = kernelend; va < SEGMENT_LENGTH; 3522 pa += PAGE_SIZE, va += PAGE_SIZE) { 3523 ptegidx = va_to_pteg(pm, va); 3524 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3525 pmap_pte_insert(ptegidx, &pt); 3526 } 3527 #endif 3528 3529 __asm volatile ("mtsrin %0,%1" 3530 :: "r"(sr), "r"(kernelstart)); 3531 } 3532 #endif 3533 3534 #if defined(PMAPDEBUG) 3535 if ( pmapdebug ) 3536 pmap_print_mmuregs(); 3537 #endif 3538 } 3539
Indexes created Fri Sep 26 20:09:58 GMT 2025