pmap.c revision 1.96
1 /* $NetBSD: pmap.c,v 1.96 2020/05/31 10:49:39 rin Exp $ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt (at) 3am-software.com> of Allegro Networks, Inc. 8 * 9 * Support for PPC64 Bridge mode added by Sanjay Lal <sanjayl (at) kymasys.com> 10 * of Kyma Systems LLC. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 36 * Copyright (C) 1995, 1996 TooLs GmbH. 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by TooLs GmbH. 50 * 4. The name of TooLs GmbH may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 58 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 59 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 60 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 61 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 62 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.96 2020/05/31 10:49:39 rin Exp $"); 67 68 #define PMAP_NOOPNAMES 69 70 #include "opt_ppcarch.h" 71 #include "opt_altivec.h" 72 #include "opt_multiprocessor.h" 73 #include "opt_pmap.h" 74 75 #include <sys/param.h> 76 #include <sys/proc.h> 77 #include <sys/pool.h> 78 #include <sys/queue.h> 79 #include <sys/device.h> /* for evcnt */ 80 #include <sys/systm.h> 81 #include <sys/atomic.h> 82 83 #include <uvm/uvm.h> 84 #include <uvm/uvm_physseg.h> 85 86 #include <machine/powerpc.h> 87 #include <powerpc/bat.h> 88 #include <powerpc/pcb.h> 89 #include <powerpc/psl.h> 90 #include <powerpc/spr.h> 91 #include <powerpc/oea/spr.h> 92 #include <powerpc/oea/sr_601.h> 93 94 #ifdef ALTIVEC 95 extern int pmap_use_altivec; 96 #endif 97 98 #ifdef PMAP_MEMLIMIT 99 static paddr_t pmap_memlimit = PMAP_MEMLIMIT; 100 #else 101 static paddr_t pmap_memlimit = -PAGE_SIZE; /* there is no limit */ 102 #endif 103 104 extern struct pmap kernel_pmap_; 105 static unsigned int pmap_pages_stolen; 106 static u_long pmap_pte_valid; 107 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 108 static u_long pmap_pvo_enter_depth; 109 static u_long pmap_pvo_remove_depth; 110 #endif 111 112 #ifndef MSGBUFADDR 113 extern paddr_t msgbuf_paddr; 114 #endif 115 116 static struct mem_region *mem, *avail; 117 static u_int mem_cnt, avail_cnt; 118 119 #if !defined(PMAP_OEA64) && !defined(PMAP_OEA64_BRIDGE) 120 # define PMAP_OEA 1 121 #endif 122 123 #if defined(PMAP_OEA) 124 #define _PRIxpte "lx" 125 #else 126 #define _PRIxpte PRIx64 127 #endif 128 #define _PRIxpa "lx" 129 #define _PRIxva "lx" 130 #define _PRIsr "lx" 131 132 #ifdef PMAP_NEEDS_FIXUP 133 #if defined(PMAP_OEA) 134 #define PMAPNAME(name) pmap32_##name 135 #elif defined(PMAP_OEA64) 136 #define PMAPNAME(name) pmap64_##name 137 #elif defined(PMAP_OEA64_BRIDGE) 138 #define PMAPNAME(name) pmap64bridge_##name 139 #else 140 #error unknown variant for pmap 141 #endif 142 #endif /* PMAP_NEEDS_FIXUP */ 143 144 #ifdef PMAPNAME 145 #define STATIC static 146 #define pmap_pte_spill PMAPNAME(pte_spill) 147 #define pmap_real_memory PMAPNAME(real_memory) 148 #define pmap_init PMAPNAME(init) 149 #define pmap_virtual_space PMAPNAME(virtual_space) 150 #define pmap_create PMAPNAME(create) 151 #define pmap_reference PMAPNAME(reference) 152 #define pmap_destroy PMAPNAME(destroy) 153 #define pmap_copy PMAPNAME(copy) 154 #define pmap_update PMAPNAME(update) 155 #define pmap_enter PMAPNAME(enter) 156 #define pmap_remove PMAPNAME(remove) 157 #define pmap_kenter_pa PMAPNAME(kenter_pa) 158 #define pmap_kremove PMAPNAME(kremove) 159 #define pmap_extract PMAPNAME(extract) 160 #define pmap_protect PMAPNAME(protect) 161 #define pmap_unwire PMAPNAME(unwire) 162 #define pmap_page_protect PMAPNAME(page_protect) 163 #define pmap_query_bit PMAPNAME(query_bit) 164 #define pmap_clear_bit PMAPNAME(clear_bit) 165 166 #define pmap_activate PMAPNAME(activate) 167 #define pmap_deactivate PMAPNAME(deactivate) 168 169 #define pmap_pinit PMAPNAME(pinit) 170 #define pmap_procwr PMAPNAME(procwr) 171 172 #define pmap_pool PMAPNAME(pool) 173 #define pmap_upvo_pool PMAPNAME(upvo_pool) 174 #define pmap_mpvo_pool PMAPNAME(mpvo_pool) 175 #define pmap_pvo_table PMAPNAME(pvo_table) 176 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 177 #define pmap_pte_print PMAPNAME(pte_print) 178 #define pmap_pteg_check PMAPNAME(pteg_check) 179 #define pmap_print_mmruregs PMAPNAME(print_mmuregs) 180 #define pmap_print_pte PMAPNAME(print_pte) 181 #define pmap_pteg_dist PMAPNAME(pteg_dist) 182 #endif 183 #if defined(DEBUG) || defined(PMAPCHECK) 184 #define pmap_pvo_verify PMAPNAME(pvo_verify) 185 #define pmapcheck PMAPNAME(check) 186 #endif 187 #if defined(DEBUG) || defined(PMAPDEBUG) 188 #define pmapdebug PMAPNAME(debug) 189 #endif 190 #define pmap_steal_memory PMAPNAME(steal_memory) 191 #define pmap_bootstrap PMAPNAME(bootstrap) 192 #else 193 #define STATIC /* nothing */ 194 #endif /* PMAPNAME */ 195 196 STATIC int pmap_pte_spill(struct pmap *, vaddr_t, bool); 197 STATIC void pmap_real_memory(paddr_t *, psize_t *); 198 STATIC void pmap_init(void); 199 STATIC void pmap_virtual_space(vaddr_t *, vaddr_t *); 200 STATIC pmap_t pmap_create(void); 201 STATIC void pmap_reference(pmap_t); 202 STATIC void pmap_destroy(pmap_t); 203 STATIC void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 204 STATIC void pmap_update(pmap_t); 205 STATIC int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); 206 STATIC void pmap_remove(pmap_t, vaddr_t, vaddr_t); 207 STATIC void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t, u_int); 208 STATIC void pmap_kremove(vaddr_t, vsize_t); 209 STATIC bool pmap_extract(pmap_t, vaddr_t, paddr_t *); 210 211 STATIC void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 212 STATIC void pmap_unwire(pmap_t, vaddr_t); 213 STATIC void pmap_page_protect(struct vm_page *, vm_prot_t); 214 STATIC bool pmap_query_bit(struct vm_page *, int); 215 STATIC bool pmap_clear_bit(struct vm_page *, int); 216 217 STATIC void pmap_activate(struct lwp *); 218 STATIC void pmap_deactivate(struct lwp *); 219 220 STATIC void pmap_pinit(pmap_t pm); 221 STATIC void pmap_procwr(struct proc *, vaddr_t, size_t); 222 223 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 224 STATIC void pmap_pte_print(volatile struct pte *); 225 STATIC void pmap_pteg_check(void); 226 STATIC void pmap_print_mmuregs(void); 227 STATIC void pmap_print_pte(pmap_t, vaddr_t); 228 STATIC void pmap_pteg_dist(void); 229 #endif 230 #if defined(DEBUG) || defined(PMAPCHECK) 231 STATIC void pmap_pvo_verify(void); 232 #endif 233 STATIC vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *); 234 STATIC void pmap_bootstrap(paddr_t, paddr_t); 235 236 #ifdef PMAPNAME 237 const struct pmap_ops PMAPNAME(ops) = { 238 .pmapop_pte_spill = pmap_pte_spill, 239 .pmapop_real_memory = pmap_real_memory, 240 .pmapop_init = pmap_init, 241 .pmapop_virtual_space = pmap_virtual_space, 242 .pmapop_create = pmap_create, 243 .pmapop_reference = pmap_reference, 244 .pmapop_destroy = pmap_destroy, 245 .pmapop_copy = pmap_copy, 246 .pmapop_update = pmap_update, 247 .pmapop_enter = pmap_enter, 248 .pmapop_remove = pmap_remove, 249 .pmapop_kenter_pa = pmap_kenter_pa, 250 .pmapop_kremove = pmap_kremove, 251 .pmapop_extract = pmap_extract, 252 .pmapop_protect = pmap_protect, 253 .pmapop_unwire = pmap_unwire, 254 .pmapop_page_protect = pmap_page_protect, 255 .pmapop_query_bit = pmap_query_bit, 256 .pmapop_clear_bit = pmap_clear_bit, 257 .pmapop_activate = pmap_activate, 258 .pmapop_deactivate = pmap_deactivate, 259 .pmapop_pinit = pmap_pinit, 260 .pmapop_procwr = pmap_procwr, 261 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 262 .pmapop_pte_print = pmap_pte_print, 263 .pmapop_pteg_check = pmap_pteg_check, 264 .pmapop_print_mmuregs = pmap_print_mmuregs, 265 .pmapop_print_pte = pmap_print_pte, 266 .pmapop_pteg_dist = pmap_pteg_dist, 267 #else 268 .pmapop_pte_print = NULL, 269 .pmapop_pteg_check = NULL, 270 .pmapop_print_mmuregs = NULL, 271 .pmapop_print_pte = NULL, 272 .pmapop_pteg_dist = NULL, 273 #endif 274 #if defined(DEBUG) || defined(PMAPCHECK) 275 .pmapop_pvo_verify = pmap_pvo_verify, 276 #else 277 .pmapop_pvo_verify = NULL, 278 #endif 279 .pmapop_steal_memory = pmap_steal_memory, 280 .pmapop_bootstrap = pmap_bootstrap, 281 }; 282 #endif /* !PMAPNAME */ 283 284 /* 285 * The following structure is aligned to 32 bytes 286 */ 287 struct pvo_entry { 288 LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ 289 TAILQ_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ 290 struct pte pvo_pte; /* Prebuilt PTE */ 291 pmap_t pvo_pmap; /* ptr to owning pmap */ 292 vaddr_t pvo_vaddr; /* VA of entry */ 293 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 294 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 295 #define PVO_WIRED 0x0010 /* PVO entry is wired */ 296 #define PVO_MANAGED 0x0020 /* PVO e. for managed page */ 297 #define PVO_EXECUTABLE 0x0040 /* PVO e. for executable page */ 298 #define PVO_WIRED_P(pvo) ((pvo)->pvo_vaddr & PVO_WIRED) 299 #define PVO_MANAGED_P(pvo) ((pvo)->pvo_vaddr & PVO_MANAGED) 300 #define PVO_EXECUTABLE_P(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 301 #define PVO_ENTER_INSERT 0 /* PVO has been removed */ 302 #define PVO_SPILL_UNSET 1 /* PVO has been evicted */ 303 #define PVO_SPILL_SET 2 /* PVO has been spilled */ 304 #define PVO_SPILL_INSERT 3 /* PVO has been inserted */ 305 #define PVO_PMAP_PAGE_PROTECT 4 /* PVO has changed */ 306 #define PVO_PMAP_PROTECT 5 /* PVO has changed */ 307 #define PVO_REMOVE 6 /* PVO has been removed */ 308 #define PVO_WHERE_MASK 15 309 #define PVO_WHERE_SHFT 8 310 } __attribute__ ((aligned (32))); 311 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 312 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 313 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 314 #define PVO_PTEGIDX_CLR(pvo) \ 315 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 316 #define PVO_PTEGIDX_SET(pvo,i) \ 317 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 318 #define PVO_WHERE(pvo,w) \ 319 ((pvo)->pvo_vaddr &= ~(PVO_WHERE_MASK << PVO_WHERE_SHFT), \ 320 (pvo)->pvo_vaddr |= ((PVO_ ## w) << PVO_WHERE_SHFT)) 321 322 TAILQ_HEAD(pvo_tqhead, pvo_entry); 323 struct pvo_tqhead *pmap_pvo_table; /* pvo entries by ptegroup index */ 324 static struct pvo_head pmap_pvo_kunmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 325 static struct pvo_head pmap_pvo_unmanaged = LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 326 327 struct pool pmap_pool; /* pool for pmap structures */ 328 struct pool pmap_upvo_pool; /* pool for pvo entries for unmanaged pages */ 329 struct pool pmap_mpvo_pool; /* pool for pvo entries for managed pages */ 330 331 /* 332 * We keep a cache of unmanaged pages to be used for pvo entries for 333 * unmanaged pages. 334 */ 335 struct pvo_page { 336 SIMPLEQ_ENTRY(pvo_page) pvop_link; 337 }; 338 SIMPLEQ_HEAD(pvop_head, pvo_page); 339 static struct pvop_head pmap_upvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_upvop_head); 340 static struct pvop_head pmap_mpvop_head = SIMPLEQ_HEAD_INITIALIZER(pmap_mpvop_head); 341 static u_long pmap_upvop_free; 342 static u_long pmap_upvop_maxfree; 343 static u_long pmap_mpvop_free; 344 static u_long pmap_mpvop_maxfree; 345 346 static void *pmap_pool_ualloc(struct pool *, int); 347 static void *pmap_pool_malloc(struct pool *, int); 348 349 static void pmap_pool_ufree(struct pool *, void *); 350 static void pmap_pool_mfree(struct pool *, void *); 351 352 static struct pool_allocator pmap_pool_mallocator = { 353 .pa_alloc = pmap_pool_malloc, 354 .pa_free = pmap_pool_mfree, 355 .pa_pagesz = 0, 356 }; 357 358 static struct pool_allocator pmap_pool_uallocator = { 359 .pa_alloc = pmap_pool_ualloc, 360 .pa_free = pmap_pool_ufree, 361 .pa_pagesz = 0, 362 }; 363 364 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 365 void pmap_pte_print(volatile struct pte *); 366 void pmap_pteg_check(void); 367 void pmap_pteg_dist(void); 368 void pmap_print_pte(pmap_t, vaddr_t); 369 void pmap_print_mmuregs(void); 370 #endif 371 372 #if defined(DEBUG) || defined(PMAPCHECK) 373 #ifdef PMAPCHECK 374 int pmapcheck = 1; 375 #else 376 int pmapcheck = 0; 377 #endif 378 void pmap_pvo_verify(void); 379 static void pmap_pvo_check(const struct pvo_entry *); 380 #define PMAP_PVO_CHECK(pvo) \ 381 do { \ 382 if (pmapcheck) \ 383 pmap_pvo_check(pvo); \ 384 } while (0) 385 #else 386 #define PMAP_PVO_CHECK(pvo) do { } while (/*CONSTCOND*/0) 387 #endif 388 static int pmap_pte_insert(int, struct pte *); 389 static int pmap_pvo_enter(pmap_t, struct pool *, struct pvo_head *, 390 vaddr_t, paddr_t, register_t, int); 391 static void pmap_pvo_remove(struct pvo_entry *, int, struct pvo_head *); 392 static void pmap_pvo_free(struct pvo_entry *); 393 static void pmap_pvo_free_list(struct pvo_head *); 394 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vaddr_t, int *); 395 static volatile struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 396 static struct pvo_entry *pmap_pvo_reclaim(struct pmap *); 397 static void pvo_set_exec(struct pvo_entry *); 398 static void pvo_clear_exec(struct pvo_entry *); 399 400 static void tlbia(void); 401 402 static void pmap_release(pmap_t); 403 static paddr_t pmap_boot_find_memory(psize_t, psize_t, int); 404 405 static uint32_t pmap_pvo_reclaim_nextidx; 406 #ifdef DEBUG 407 static int pmap_pvo_reclaim_debugctr; 408 #endif 409 410 #define VSID_NBPW (sizeof(uint32_t) * 8) 411 static uint32_t pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 412 413 static int pmap_initialized; 414 415 #if defined(DEBUG) || defined(PMAPDEBUG) 416 #define PMAPDEBUG_BOOT 0x0001 417 #define PMAPDEBUG_PTE 0x0002 418 #define PMAPDEBUG_EXEC 0x0008 419 #define PMAPDEBUG_PVOENTER 0x0010 420 #define PMAPDEBUG_PVOREMOVE 0x0020 421 #define PMAPDEBUG_ACTIVATE 0x0100 422 #define PMAPDEBUG_CREATE 0x0200 423 #define PMAPDEBUG_ENTER 0x1000 424 #define PMAPDEBUG_KENTER 0x2000 425 #define PMAPDEBUG_KREMOVE 0x4000 426 #define PMAPDEBUG_REMOVE 0x8000 427 428 unsigned int pmapdebug = 0; 429 430 # define DPRINTF(x, ...) printf(x, __VA_ARGS__) 431 # define DPRINTFN(n, x, ...) do if (pmapdebug & PMAPDEBUG_ ## n) printf(x, __VA_ARGS__); while (0) 432 #else 433 # define DPRINTF(x, ...) do { } while (0) 434 # define DPRINTFN(n, x, ...) do { } while (0) 435 #endif 436 437 438 #ifdef PMAPCOUNTERS 439 /* 440 * From pmap_subr.c 441 */ 442 extern struct evcnt pmap_evcnt_mappings; 443 extern struct evcnt pmap_evcnt_unmappings; 444 445 extern struct evcnt pmap_evcnt_kernel_mappings; 446 extern struct evcnt pmap_evcnt_kernel_unmappings; 447 448 extern struct evcnt pmap_evcnt_mappings_replaced; 449 450 extern struct evcnt pmap_evcnt_exec_mappings; 451 extern struct evcnt pmap_evcnt_exec_cached; 452 453 extern struct evcnt pmap_evcnt_exec_synced; 454 extern struct evcnt pmap_evcnt_exec_synced_clear_modify; 455 extern struct evcnt pmap_evcnt_exec_synced_pvo_remove; 456 457 extern struct evcnt pmap_evcnt_exec_uncached_page_protect; 458 extern struct evcnt pmap_evcnt_exec_uncached_clear_modify; 459 extern struct evcnt pmap_evcnt_exec_uncached_zero_page; 460 extern struct evcnt pmap_evcnt_exec_uncached_copy_page; 461 extern struct evcnt pmap_evcnt_exec_uncached_pvo_remove; 462 463 extern struct evcnt pmap_evcnt_updates; 464 extern struct evcnt pmap_evcnt_collects; 465 extern struct evcnt pmap_evcnt_copies; 466 467 extern struct evcnt pmap_evcnt_ptes_spilled; 468 extern struct evcnt pmap_evcnt_ptes_unspilled; 469 extern struct evcnt pmap_evcnt_ptes_evicted; 470 471 extern struct evcnt pmap_evcnt_ptes_primary[8]; 472 extern struct evcnt pmap_evcnt_ptes_secondary[8]; 473 extern struct evcnt pmap_evcnt_ptes_removed; 474 extern struct evcnt pmap_evcnt_ptes_changed; 475 extern struct evcnt pmap_evcnt_pvos_reclaimed; 476 extern struct evcnt pmap_evcnt_pvos_failed; 477 478 extern struct evcnt pmap_evcnt_zeroed_pages; 479 extern struct evcnt pmap_evcnt_copied_pages; 480 extern struct evcnt pmap_evcnt_idlezeroed_pages; 481 482 #define PMAPCOUNT(ev) ((pmap_evcnt_ ## ev).ev_count++) 483 #define PMAPCOUNT2(ev) ((ev).ev_count++) 484 #else 485 #define PMAPCOUNT(ev) ((void) 0) 486 #define PMAPCOUNT2(ev) ((void) 0) 487 #endif 488 489 #define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) 490 491 /* XXXSL: this needs to be moved to assembler */ 492 #define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) 493 494 #ifdef MD_TLBSYNC 495 #define TLBSYNC() MD_TLBSYNC() 496 #else 497 #define TLBSYNC() __asm volatile("tlbsync") 498 #endif 499 #define SYNC() __asm volatile("sync") 500 #define EIEIO() __asm volatile("eieio") 501 #define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va)) 502 #define MFMSR() mfmsr() 503 #define MTMSR(psl) mtmsr(psl) 504 #define MFPVR() mfpvr() 505 #define MFSRIN(va) mfsrin(va) 506 #define MFTB() mfrtcltbl() 507 508 #if defined(DDB) && !defined(PMAP_OEA64) 509 static inline register_t 510 mfsrin(vaddr_t va) 511 { 512 register_t sr; 513 __asm volatile ("mfsrin %0,%1" : "=r"(sr) : "r"(va)); 514 return sr; 515 } 516 #endif /* DDB && !PMAP_OEA64 */ 517 518 #if defined (PMAP_OEA64_BRIDGE) 519 extern void mfmsr64 (register64_t *result); 520 #endif /* PMAP_OEA64_BRIDGE */ 521 522 #define PMAP_LOCK() KERNEL_LOCK(1, NULL) 523 #define PMAP_UNLOCK() KERNEL_UNLOCK_ONE(NULL) 524 525 static inline register_t 526 pmap_interrupts_off(void) 527 { 528 register_t msr = MFMSR(); 529 if (msr & PSL_EE) 530 MTMSR(msr & ~PSL_EE); 531 return msr; 532 } 533 534 static void 535 pmap_interrupts_restore(register_t msr) 536 { 537 if (msr & PSL_EE) 538 MTMSR(msr); 539 } 540 541 static inline u_int32_t 542 mfrtcltbl(void) 543 { 544 #ifdef PPC_OEA601 545 if ((MFPVR() >> 16) == MPC601) 546 return (mfrtcl() >> 7); 547 else 548 #endif 549 return (mftbl()); 550 } 551 552 /* 553 * These small routines may have to be replaced, 554 * if/when we support processors other that the 604. 555 */ 556 557 void 558 tlbia(void) 559 { 560 char *i; 561 562 SYNC(); 563 #if defined(PMAP_OEA) 564 /* 565 * Why not use "tlbia"? Because not all processors implement it. 566 * 567 * This needs to be a per-CPU callback to do the appropriate thing 568 * for the CPU. XXX 569 */ 570 for (i = 0; i < (char *)0x00040000; i += 0x00001000) { 571 TLBIE(i); 572 EIEIO(); 573 SYNC(); 574 } 575 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 576 /* This is specifically for the 970, 970UM v1.6 pp. 140. */ 577 for (i = 0; i <= (char *)0xFF000; i += 0x00001000) { 578 TLBIEL(i); 579 EIEIO(); 580 SYNC(); 581 } 582 #endif 583 TLBSYNC(); 584 SYNC(); 585 } 586 587 static inline register_t 588 va_to_vsid(const struct pmap *pm, vaddr_t addr) 589 { 590 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 591 return (pm->pm_sr[addr >> ADDR_SR_SHFT] & SR_VSID) >> SR_VSID_SHFT; 592 #else /* PMAP_OEA64 */ 593 #if 0 594 const struct ste *ste; 595 register_t hash; 596 int i; 597 598 hash = (addr >> ADDR_ESID_SHFT) & ADDR_ESID_HASH; 599 600 /* 601 * Try the primary group first 602 */ 603 ste = pm->pm_stes[hash].stes; 604 for (i = 0; i < 8; i++, ste++) { 605 if (ste->ste_hi & STE_V) && 606 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 607 return ste; 608 } 609 610 /* 611 * Then the secondary group. 612 */ 613 ste = pm->pm_stes[hash ^ ADDR_ESID_HASH].stes; 614 for (i = 0; i < 8; i++, ste++) { 615 if (ste->ste_hi & STE_V) && 616 (addr & ~(ADDR_POFF|ADDR_PIDX)) == (ste->ste_hi & STE_ESID)) 617 return addr; 618 } 619 620 return NULL; 621 #else 622 /* 623 * Rather than searching the STE groups for the VSID, we know 624 * how we generate that from the ESID and so do that. 625 */ 626 return VSID_MAKE(addr >> ADDR_SR_SHFT, pm->pm_vsid) >> SR_VSID_SHFT; 627 #endif 628 #endif /* PMAP_OEA */ 629 } 630 631 static inline register_t 632 va_to_pteg(const struct pmap *pm, vaddr_t addr) 633 { 634 register_t hash; 635 636 hash = va_to_vsid(pm, addr) ^ ((addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); 637 return hash & pmap_pteg_mask; 638 } 639 640 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 641 /* 642 * Given a PTE in the page table, calculate the VADDR that hashes to it. 643 * The only bit of magic is that the top 4 bits of the address doesn't 644 * technically exist in the PTE. But we know we reserved 4 bits of the 645 * VSID for it so that's how we get it. 646 */ 647 static vaddr_t 648 pmap_pte_to_va(volatile const struct pte *pt) 649 { 650 vaddr_t va; 651 uintptr_t ptaddr = (uintptr_t) pt; 652 653 if (pt->pte_hi & PTE_HID) 654 ptaddr ^= (pmap_pteg_mask * sizeof(struct pteg)); 655 656 /* PPC Bits 10-19 PPC64 Bits 42-51 */ 657 #if defined(PMAP_OEA) 658 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x3ff; 659 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 660 va = ((pt->pte_hi >> PTE_VSID_SHFT) ^ (ptaddr / sizeof(struct pteg))) & 0x7ff; 661 #endif 662 va <<= ADDR_PIDX_SHFT; 663 664 /* PPC Bits 4-9 PPC64 Bits 36-41 */ 665 va |= (pt->pte_hi & PTE_API) << ADDR_API_SHFT; 666 667 #if defined(PMAP_OEA64) 668 /* PPC63 Bits 0-35 */ 669 /* va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; */ 670 #elif defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 671 /* PPC Bits 0-3 */ 672 va |= VSID_TO_SR(pt->pte_hi >> PTE_VSID_SHFT) << ADDR_SR_SHFT; 673 #endif 674 675 return va; 676 } 677 #endif 678 679 static inline struct pvo_head * 680 pa_to_pvoh(paddr_t pa, struct vm_page **pg_p) 681 { 682 struct vm_page *pg; 683 struct vm_page_md *md; 684 685 pg = PHYS_TO_VM_PAGE(pa); 686 if (pg_p != NULL) 687 *pg_p = pg; 688 if (pg == NULL) 689 return &pmap_pvo_unmanaged; 690 md = VM_PAGE_TO_MD(pg); 691 return &md->mdpg_pvoh; 692 } 693 694 static inline struct pvo_head * 695 vm_page_to_pvoh(struct vm_page *pg) 696 { 697 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 698 699 return &md->mdpg_pvoh; 700 } 701 702 703 static inline void 704 pmap_attr_clear(struct vm_page *pg, int ptebit) 705 { 706 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 707 708 md->mdpg_attrs &= ~ptebit; 709 } 710 711 static inline int 712 pmap_attr_fetch(struct vm_page *pg) 713 { 714 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 715 716 return md->mdpg_attrs; 717 } 718 719 static inline void 720 pmap_attr_save(struct vm_page *pg, int ptebit) 721 { 722 struct vm_page_md * const md = VM_PAGE_TO_MD(pg); 723 724 md->mdpg_attrs |= ptebit; 725 } 726 727 static inline int 728 pmap_pte_compare(const volatile struct pte *pt, const struct pte *pvo_pt) 729 { 730 if (pt->pte_hi == pvo_pt->pte_hi 731 #if 0 732 && ((pt->pte_lo ^ pvo_pt->pte_lo) & 733 ~(PTE_REF|PTE_CHG)) == 0 734 #endif 735 ) 736 return 1; 737 return 0; 738 } 739 740 static inline void 741 pmap_pte_create(struct pte *pt, const struct pmap *pm, vaddr_t va, register_t pte_lo) 742 { 743 /* 744 * Construct the PTE. Default to IMB initially. Valid bit 745 * only gets set when the real pte is set in memory. 746 * 747 * Note: Don't set the valid bit for correct operation of tlb update. 748 */ 749 #if defined(PMAP_OEA) 750 pt->pte_hi = (va_to_vsid(pm, va) << PTE_VSID_SHFT) 751 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 752 pt->pte_lo = pte_lo; 753 #elif defined (PMAP_OEA64_BRIDGE) || defined (PMAP_OEA64) 754 pt->pte_hi = ((u_int64_t)va_to_vsid(pm, va) << PTE_VSID_SHFT) 755 | (((va & ADDR_PIDX) >> (ADDR_API_SHFT - PTE_API_SHFT)) & PTE_API); 756 pt->pte_lo = (u_int64_t) pte_lo; 757 #endif /* PMAP_OEA */ 758 } 759 760 static inline void 761 pmap_pte_synch(volatile struct pte *pt, struct pte *pvo_pt) 762 { 763 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF|PTE_CHG); 764 } 765 766 static inline void 767 pmap_pte_clear(volatile struct pte *pt, vaddr_t va, int ptebit) 768 { 769 /* 770 * As shown in Section 7.6.3.2.3 771 */ 772 pt->pte_lo &= ~ptebit; 773 TLBIE(va); 774 SYNC(); 775 EIEIO(); 776 TLBSYNC(); 777 SYNC(); 778 #ifdef MULTIPROCESSOR 779 DCBST(pt); 780 #endif 781 } 782 783 static inline void 784 pmap_pte_set(volatile struct pte *pt, struct pte *pvo_pt) 785 { 786 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 787 if (pvo_pt->pte_hi & PTE_VALID) 788 panic("pte_set: setting an already valid pte %p", pvo_pt); 789 #endif 790 pvo_pt->pte_hi |= PTE_VALID; 791 792 /* 793 * Update the PTE as defined in section 7.6.3.1 794 * Note that the REF/CHG bits are from pvo_pt and thus should 795 * have been saved so this routine can restore them (if desired). 796 */ 797 pt->pte_lo = pvo_pt->pte_lo; 798 EIEIO(); 799 pt->pte_hi = pvo_pt->pte_hi; 800 TLBSYNC(); 801 SYNC(); 802 #ifdef MULTIPROCESSOR 803 DCBST(pt); 804 #endif 805 pmap_pte_valid++; 806 } 807 808 static inline void 809 pmap_pte_unset(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 810 { 811 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 812 if ((pvo_pt->pte_hi & PTE_VALID) == 0) 813 panic("pte_unset: attempt to unset an inactive pte#1 %p/%p", pvo_pt, pt); 814 if ((pt->pte_hi & PTE_VALID) == 0) 815 panic("pte_unset: attempt to unset an inactive pte#2 %p/%p", pvo_pt, pt); 816 #endif 817 818 pvo_pt->pte_hi &= ~PTE_VALID; 819 /* 820 * Force the ref & chg bits back into the PTEs. 821 */ 822 SYNC(); 823 /* 824 * Invalidate the pte ... (Section 7.6.3.3) 825 */ 826 pt->pte_hi &= ~PTE_VALID; 827 SYNC(); 828 TLBIE(va); 829 SYNC(); 830 EIEIO(); 831 TLBSYNC(); 832 SYNC(); 833 /* 834 * Save the ref & chg bits ... 835 */ 836 pmap_pte_synch(pt, pvo_pt); 837 pmap_pte_valid--; 838 } 839 840 static inline void 841 pmap_pte_change(volatile struct pte *pt, struct pte *pvo_pt, vaddr_t va) 842 { 843 /* 844 * Invalidate the PTE 845 */ 846 pmap_pte_unset(pt, pvo_pt, va); 847 pmap_pte_set(pt, pvo_pt); 848 } 849 850 /* 851 * Try to insert the PTE @ *pvo_pt into the pmap_pteg_table at ptegidx 852 * (either primary or secondary location). 853 * 854 * Note: both the destination and source PTEs must not have PTE_VALID set. 855 */ 856 857 static int 858 pmap_pte_insert(int ptegidx, struct pte *pvo_pt) 859 { 860 volatile struct pte *pt; 861 int i; 862 863 #if defined(DEBUG) 864 DPRINTFN(PTE, "pmap_pte_insert: idx %#x, pte %#" _PRIxpte " %#" _PRIxpte "\n", 865 ptegidx, pvo_pt->pte_hi, pvo_pt->pte_lo); 866 #endif 867 /* 868 * First try primary hash. 869 */ 870 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 871 if ((pt->pte_hi & PTE_VALID) == 0) { 872 pvo_pt->pte_hi &= ~PTE_HID; 873 pmap_pte_set(pt, pvo_pt); 874 return i; 875 } 876 } 877 878 /* 879 * Now try secondary hash. 880 */ 881 ptegidx ^= pmap_pteg_mask; 882 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 883 if ((pt->pte_hi & PTE_VALID) == 0) { 884 pvo_pt->pte_hi |= PTE_HID; 885 pmap_pte_set(pt, pvo_pt); 886 return i; 887 } 888 } 889 return -1; 890 } 891 892 /* 893 * Spill handler. 894 * 895 * Tries to spill a page table entry from the overflow area. 896 * This runs in either real mode (if dealing with a exception spill) 897 * or virtual mode when dealing with manually spilling one of the 898 * kernel's pte entries. In either case, interrupts are already 899 * disabled. 900 */ 901 902 int 903 pmap_pte_spill(struct pmap *pm, vaddr_t addr, bool exec) 904 { 905 struct pvo_entry *source_pvo, *victim_pvo, *next_pvo; 906 struct pvo_entry *pvo; 907 /* XXX: gcc -- vpvoh is always set at either *1* or *2* */ 908 struct pvo_tqhead *pvoh, *vpvoh = NULL; 909 int ptegidx, i, j; 910 volatile struct pteg *pteg; 911 volatile struct pte *pt; 912 913 PMAP_LOCK(); 914 915 ptegidx = va_to_pteg(pm, addr); 916 917 /* 918 * Have to substitute some entry. Use the primary hash for this. 919 * Use low bits of timebase as random generator. Make sure we are 920 * not picking a kernel pte for replacement. 921 */ 922 pteg = &pmap_pteg_table[ptegidx]; 923 i = MFTB() & 7; 924 for (j = 0; j < 8; j++) { 925 pt = &pteg->pt[i]; 926 if ((pt->pte_hi & PTE_VALID) == 0) 927 break; 928 if (VSID_TO_HASH((pt->pte_hi & PTE_VSID) >> PTE_VSID_SHFT) 929 < PHYSMAP_VSIDBITS) 930 break; 931 i = (i + 1) & 7; 932 } 933 KASSERT(j < 8); 934 935 source_pvo = NULL; 936 victim_pvo = NULL; 937 pvoh = &pmap_pvo_table[ptegidx]; 938 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 939 940 /* 941 * We need to find pvo entry for this address... 942 */ 943 PMAP_PVO_CHECK(pvo); /* sanity check */ 944 945 /* 946 * If we haven't found the source and we come to a PVO with 947 * a valid PTE, then we know we can't find it because all 948 * evicted PVOs always are first in the list. 949 */ 950 if (source_pvo == NULL && (pvo->pvo_pte.pte_hi & PTE_VALID)) 951 break; 952 if (source_pvo == NULL && pm == pvo->pvo_pmap && 953 addr == PVO_VADDR(pvo)) { 954 955 /* 956 * Now we have found the entry to be spilled into the 957 * pteg. Attempt to insert it into the page table. 958 */ 959 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 960 if (j >= 0) { 961 PVO_PTEGIDX_SET(pvo, j); 962 PMAP_PVO_CHECK(pvo); /* sanity check */ 963 PVO_WHERE(pvo, SPILL_INSERT); 964 pvo->pvo_pmap->pm_evictions--; 965 PMAPCOUNT(ptes_spilled); 966 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 967 ? pmap_evcnt_ptes_secondary 968 : pmap_evcnt_ptes_primary)[j]); 969 970 /* 971 * Since we keep the evicted entries at the 972 * from of the PVO list, we need move this 973 * (now resident) PVO after the evicted 974 * entries. 975 */ 976 next_pvo = TAILQ_NEXT(pvo, pvo_olink); 977 978 /* 979 * If we don't have to move (either we were the 980 * last entry or the next entry was valid), 981 * don't change our position. Otherwise 982 * move ourselves to the tail of the queue. 983 */ 984 if (next_pvo != NULL && 985 !(next_pvo->pvo_pte.pte_hi & PTE_VALID)) { 986 TAILQ_REMOVE(pvoh, pvo, pvo_olink); 987 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 988 } 989 PMAP_UNLOCK(); 990 return 1; 991 } 992 source_pvo = pvo; 993 if (exec && !PVO_EXECUTABLE_P(source_pvo)) { 994 PMAP_UNLOCK(); 995 return 0; 996 } 997 if (victim_pvo != NULL) 998 break; 999 } 1000 1001 /* 1002 * We also need the pvo entry of the victim we are replacing 1003 * so save the R & C bits of the PTE. 1004 */ 1005 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1006 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1007 vpvoh = pvoh; /* *1* */ 1008 victim_pvo = pvo; 1009 if (source_pvo != NULL) 1010 break; 1011 } 1012 } 1013 1014 if (source_pvo == NULL) { 1015 PMAPCOUNT(ptes_unspilled); 1016 PMAP_UNLOCK(); 1017 return 0; 1018 } 1019 1020 if (victim_pvo == NULL) { 1021 if ((pt->pte_hi & PTE_HID) == 0) 1022 panic("pmap_pte_spill: victim p-pte (%p) has " 1023 "no pvo entry!", pt); 1024 1025 /* 1026 * If this is a secondary PTE, we need to search 1027 * its primary pvo bucket for the matching PVO. 1028 */ 1029 vpvoh = &pmap_pvo_table[ptegidx ^ pmap_pteg_mask]; /* *2* */ 1030 TAILQ_FOREACH(pvo, vpvoh, pvo_olink) { 1031 PMAP_PVO_CHECK(pvo); /* sanity check */ 1032 1033 /* 1034 * We also need the pvo entry of the victim we are 1035 * replacing so save the R & C bits of the PTE. 1036 */ 1037 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1038 victim_pvo = pvo; 1039 break; 1040 } 1041 } 1042 if (victim_pvo == NULL) 1043 panic("pmap_pte_spill: victim s-pte (%p) has " 1044 "no pvo entry!", pt); 1045 } 1046 1047 /* 1048 * The victim should be not be a kernel PVO/PTE entry. 1049 */ 1050 KASSERT(victim_pvo->pvo_pmap != pmap_kernel()); 1051 KASSERT(PVO_PTEGIDX_ISSET(victim_pvo)); 1052 KASSERT(PVO_PTEGIDX_GET(victim_pvo) == i); 1053 1054 /* 1055 * We are invalidating the TLB entry for the EA for the 1056 * we are replacing even though its valid; If we don't 1057 * we lose any ref/chg bit changes contained in the TLB 1058 * entry. 1059 */ 1060 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1061 1062 /* 1063 * To enforce the PVO list ordering constraint that all 1064 * evicted entries should come before all valid entries, 1065 * move the source PVO to the tail of its list and the 1066 * victim PVO to the head of its list (which might not be 1067 * the same list, if the victim was using the secondary hash). 1068 */ 1069 TAILQ_REMOVE(pvoh, source_pvo, pvo_olink); 1070 TAILQ_INSERT_TAIL(pvoh, source_pvo, pvo_olink); 1071 TAILQ_REMOVE(vpvoh, victim_pvo, pvo_olink); 1072 TAILQ_INSERT_HEAD(vpvoh, victim_pvo, pvo_olink); 1073 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1074 pmap_pte_set(pt, &source_pvo->pvo_pte); 1075 victim_pvo->pvo_pmap->pm_evictions++; 1076 source_pvo->pvo_pmap->pm_evictions--; 1077 PVO_WHERE(victim_pvo, SPILL_UNSET); 1078 PVO_WHERE(source_pvo, SPILL_SET); 1079 1080 PVO_PTEGIDX_CLR(victim_pvo); 1081 PVO_PTEGIDX_SET(source_pvo, i); 1082 PMAPCOUNT2(pmap_evcnt_ptes_primary[i]); 1083 PMAPCOUNT(ptes_spilled); 1084 PMAPCOUNT(ptes_evicted); 1085 PMAPCOUNT(ptes_removed); 1086 1087 PMAP_PVO_CHECK(victim_pvo); 1088 PMAP_PVO_CHECK(source_pvo); 1089 1090 PMAP_UNLOCK(); 1091 return 1; 1092 } 1093 1094 /* 1095 * Restrict given range to physical memory 1096 */ 1097 void 1098 pmap_real_memory(paddr_t *start, psize_t *size) 1099 { 1100 struct mem_region *mp; 1101 1102 for (mp = mem; mp->size; mp++) { 1103 if (*start + *size > mp->start 1104 && *start < mp->start + mp->size) { 1105 if (*start < mp->start) { 1106 *size -= mp->start - *start; 1107 *start = mp->start; 1108 } 1109 if (*start + *size > mp->start + mp->size) 1110 *size = mp->start + mp->size - *start; 1111 return; 1112 } 1113 } 1114 *size = 0; 1115 } 1116 1117 /* 1118 * Initialize anything else for pmap handling. 1119 * Called during vm_init(). 1120 */ 1121 void 1122 pmap_init(void) 1123 { 1124 pool_init(&pmap_mpvo_pool, sizeof(struct pvo_entry), 1125 sizeof(struct pvo_entry), 0, 0, "pmap_mpvopl", 1126 &pmap_pool_mallocator, IPL_NONE); 1127 1128 pool_setlowat(&pmap_mpvo_pool, 1008); 1129 1130 pmap_initialized = 1; 1131 1132 } 1133 1134 /* 1135 * How much virtual space does the kernel get? 1136 */ 1137 void 1138 pmap_virtual_space(vaddr_t *start, vaddr_t *end) 1139 { 1140 /* 1141 * For now, reserve one segment (minus some overhead) for kernel 1142 * virtual memory 1143 */ 1144 *start = VM_MIN_KERNEL_ADDRESS; 1145 *end = VM_MAX_KERNEL_ADDRESS; 1146 } 1147 1148 /* 1149 * Allocate, initialize, and return a new physical map. 1150 */ 1151 pmap_t 1152 pmap_create(void) 1153 { 1154 pmap_t pm; 1155 1156 pm = pool_get(&pmap_pool, PR_WAITOK); 1157 KASSERT((vaddr_t)pm < VM_MIN_KERNEL_ADDRESS); 1158 memset((void *)pm, 0, sizeof *pm); 1159 pmap_pinit(pm); 1160 1161 DPRINTFN(CREATE, "pmap_create: pm %p:\n" 1162 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1163 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n" 1164 "\t%#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr 1165 " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr " %#" _PRIsr "\n", 1166 pm, 1167 pm->pm_sr[0], pm->pm_sr[1], 1168 pm->pm_sr[2], pm->pm_sr[3], 1169 pm->pm_sr[4], pm->pm_sr[5], 1170 pm->pm_sr[6], pm->pm_sr[7], 1171 pm->pm_sr[8], pm->pm_sr[9], 1172 pm->pm_sr[10], pm->pm_sr[11], 1173 pm->pm_sr[12], pm->pm_sr[13], 1174 pm->pm_sr[14], pm->pm_sr[15]); 1175 return pm; 1176 } 1177 1178 /* 1179 * Initialize a preallocated and zeroed pmap structure. 1180 */ 1181 void 1182 pmap_pinit(pmap_t pm) 1183 { 1184 register_t entropy = MFTB(); 1185 register_t mask; 1186 int i; 1187 1188 /* 1189 * Allocate some segment registers for this pmap. 1190 */ 1191 pm->pm_refs = 1; 1192 PMAP_LOCK(); 1193 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1194 static register_t pmap_vsidcontext; 1195 register_t hash; 1196 unsigned int n; 1197 1198 /* Create a new value by multiplying by a prime adding in 1199 * entropy from the timebase register. This is to make the 1200 * VSID more random so that the PT Hash function collides 1201 * less often. (note that the prime causes gcc to do shifts 1202 * instead of a multiply) 1203 */ 1204 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1205 hash = pmap_vsidcontext & (NPMAPS - 1); 1206 if (hash == 0) { /* 0 is special, avoid it */ 1207 entropy += 0xbadf00d; 1208 continue; 1209 } 1210 n = hash >> 5; 1211 mask = 1L << (hash & (VSID_NBPW-1)); 1212 hash = pmap_vsidcontext; 1213 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1214 /* anything free in this bucket? */ 1215 if (~pmap_vsid_bitmap[n] == 0) { 1216 entropy = hash ^ (hash >> 16); 1217 continue; 1218 } 1219 i = ffs(~pmap_vsid_bitmap[n]) - 1; 1220 mask = 1L << i; 1221 hash &= ~(VSID_NBPW-1); 1222 hash |= i; 1223 } 1224 hash &= PTE_VSID >> PTE_VSID_SHFT; 1225 pmap_vsid_bitmap[n] |= mask; 1226 pm->pm_vsid = hash; 1227 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1228 for (i = 0; i < 16; i++) 1229 pm->pm_sr[i] = VSID_MAKE(i, hash) | SR_PRKEY | 1230 SR_NOEXEC; 1231 #endif 1232 PMAP_UNLOCK(); 1233 return; 1234 } 1235 PMAP_UNLOCK(); 1236 panic("pmap_pinit: out of segments"); 1237 } 1238 1239 /* 1240 * Add a reference to the given pmap. 1241 */ 1242 void 1243 pmap_reference(pmap_t pm) 1244 { 1245 atomic_inc_uint(&pm->pm_refs); 1246 } 1247 1248 /* 1249 * Retire the given pmap from service. 1250 * Should only be called if the map contains no valid mappings. 1251 */ 1252 void 1253 pmap_destroy(pmap_t pm) 1254 { 1255 if (atomic_dec_uint_nv(&pm->pm_refs) == 0) { 1256 pmap_release(pm); 1257 pool_put(&pmap_pool, pm); 1258 } 1259 } 1260 1261 /* 1262 * Release any resources held by the given physical map. 1263 * Called when a pmap initialized by pmap_pinit is being released. 1264 */ 1265 void 1266 pmap_release(pmap_t pm) 1267 { 1268 int idx, mask; 1269 1270 KASSERT(pm->pm_stats.resident_count == 0); 1271 KASSERT(pm->pm_stats.wired_count == 0); 1272 1273 PMAP_LOCK(); 1274 if (pm->pm_sr[0] == 0) 1275 panic("pmap_release"); 1276 idx = pm->pm_vsid & (NPMAPS-1); 1277 mask = 1 << (idx % VSID_NBPW); 1278 idx /= VSID_NBPW; 1279 1280 KASSERT(pmap_vsid_bitmap[idx] & mask); 1281 pmap_vsid_bitmap[idx] &= ~mask; 1282 PMAP_UNLOCK(); 1283 } 1284 1285 /* 1286 * Copy the range specified by src_addr/len 1287 * from the source map to the range dst_addr/len 1288 * in the destination map. 1289 * 1290 * This routine is only advisory and need not do anything. 1291 */ 1292 void 1293 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vaddr_t dst_addr, 1294 vsize_t len, vaddr_t src_addr) 1295 { 1296 PMAPCOUNT(copies); 1297 } 1298 1299 /* 1300 * Require that all active physical maps contain no 1301 * incorrect entries NOW. 1302 */ 1303 void 1304 pmap_update(struct pmap *pmap) 1305 { 1306 PMAPCOUNT(updates); 1307 TLBSYNC(); 1308 } 1309 1310 static inline int 1311 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1312 { 1313 int pteidx; 1314 /* 1315 * We can find the actual pte entry without searching by 1316 * grabbing the PTEG index from 3 unused bits in pte_lo[11:9] 1317 * and by noticing the HID bit. 1318 */ 1319 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1320 if (pvo->pvo_pte.pte_hi & PTE_HID) 1321 pteidx ^= pmap_pteg_mask * 8; 1322 return pteidx; 1323 } 1324 1325 volatile struct pte * 1326 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1327 { 1328 volatile struct pte *pt; 1329 1330 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1331 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) 1332 return NULL; 1333 #endif 1334 1335 /* 1336 * If we haven't been supplied the ptegidx, calculate it. 1337 */ 1338 if (pteidx == -1) { 1339 int ptegidx; 1340 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1341 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1342 } 1343 1344 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1345 1346 #if !defined(DIAGNOSTIC) && !defined(DEBUG) && !defined(PMAPCHECK) 1347 return pt; 1348 #else 1349 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1350 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1351 "pvo but no valid pte index", pvo); 1352 } 1353 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1354 panic("pmap_pvo_to_pte: pvo %p: has valid pte index in " 1355 "pvo but no valid pte", pvo); 1356 } 1357 1358 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1359 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1360 #if defined(DEBUG) || defined(PMAPCHECK) 1361 pmap_pte_print(pt); 1362 #endif 1363 panic("pmap_pvo_to_pte: pvo %p: has valid pte in " 1364 "pmap_pteg_table %p but invalid in pvo", 1365 pvo, pt); 1366 } 1367 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) != 0) { 1368 #if defined(DEBUG) || defined(PMAPCHECK) 1369 pmap_pte_print(pt); 1370 #endif 1371 panic("pmap_pvo_to_pte: pvo %p: pvo pte does " 1372 "not match pte %p in pmap_pteg_table", 1373 pvo, pt); 1374 } 1375 return pt; 1376 } 1377 1378 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1379 #if defined(DEBUG) || defined(PMAPCHECK) 1380 pmap_pte_print(pt); 1381 #endif 1382 panic("pmap_pvo_to_pte: pvo %p: has nomatching pte %p in " 1383 "pmap_pteg_table but valid in pvo", pvo, pt); 1384 } 1385 return NULL; 1386 #endif /* !(!DIAGNOSTIC && !DEBUG && !PMAPCHECK) */ 1387 } 1388 1389 struct pvo_entry * 1390 pmap_pvo_find_va(pmap_t pm, vaddr_t va, int *pteidx_p) 1391 { 1392 struct pvo_entry *pvo; 1393 int ptegidx; 1394 1395 va &= ~ADDR_POFF; 1396 ptegidx = va_to_pteg(pm, va); 1397 1398 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1399 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1400 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 1401 panic("pmap_pvo_find_va: invalid pvo %p on " 1402 "list %#x (%p)", pvo, ptegidx, 1403 &pmap_pvo_table[ptegidx]); 1404 #endif 1405 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1406 if (pteidx_p) 1407 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1408 return pvo; 1409 } 1410 } 1411 if ((pm == pmap_kernel()) && (va < SEGMENT_LENGTH)) 1412 panic("%s: returning NULL for %s pmap, va: %#" _PRIxva "\n", 1413 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 1414 return NULL; 1415 } 1416 1417 #if defined(DEBUG) || defined(PMAPCHECK) 1418 void 1419 pmap_pvo_check(const struct pvo_entry *pvo) 1420 { 1421 struct pvo_head *pvo_head; 1422 struct pvo_entry *pvo0; 1423 volatile struct pte *pt; 1424 int failed = 0; 1425 1426 PMAP_LOCK(); 1427 1428 if ((uintptr_t)(pvo+1) >= SEGMENT_LENGTH) 1429 panic("pmap_pvo_check: pvo %p: invalid address", pvo); 1430 1431 if ((uintptr_t)(pvo->pvo_pmap+1) >= SEGMENT_LENGTH) { 1432 printf("pmap_pvo_check: pvo %p: invalid pmap address %p\n", 1433 pvo, pvo->pvo_pmap); 1434 failed = 1; 1435 } 1436 1437 if ((uintptr_t)TAILQ_NEXT(pvo, pvo_olink) >= SEGMENT_LENGTH || 1438 (((uintptr_t)TAILQ_NEXT(pvo, pvo_olink)) & 0x1f) != 0) { 1439 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1440 pvo, TAILQ_NEXT(pvo, pvo_olink)); 1441 failed = 1; 1442 } 1443 1444 if ((uintptr_t)LIST_NEXT(pvo, pvo_vlink) >= SEGMENT_LENGTH || 1445 (((uintptr_t)LIST_NEXT(pvo, pvo_vlink)) & 0x1f) != 0) { 1446 printf("pmap_pvo_check: pvo %p: invalid ovlink address %p\n", 1447 pvo, LIST_NEXT(pvo, pvo_vlink)); 1448 failed = 1; 1449 } 1450 1451 if (PVO_MANAGED_P(pvo)) { 1452 pvo_head = pa_to_pvoh(pvo->pvo_pte.pte_lo & PTE_RPGN, NULL); 1453 } else { 1454 if (pvo->pvo_vaddr < VM_MIN_KERNEL_ADDRESS) { 1455 printf("pmap_pvo_check: pvo %p: non kernel address " 1456 "on kernel unmanaged list\n", pvo); 1457 failed = 1; 1458 } 1459 pvo_head = &pmap_pvo_kunmanaged; 1460 } 1461 LIST_FOREACH(pvo0, pvo_head, pvo_vlink) { 1462 if (pvo0 == pvo) 1463 break; 1464 } 1465 if (pvo0 == NULL) { 1466 printf("pmap_pvo_check: pvo %p: not present " 1467 "on its vlist head %p\n", pvo, pvo_head); 1468 failed = 1; 1469 } 1470 if (pvo != pmap_pvo_find_va(pvo->pvo_pmap, pvo->pvo_vaddr, NULL)) { 1471 printf("pmap_pvo_check: pvo %p: not present " 1472 "on its olist head\n", pvo); 1473 failed = 1; 1474 } 1475 pt = pmap_pvo_to_pte(pvo, -1); 1476 if (pt == NULL) { 1477 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1478 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1479 "no PTE\n", pvo); 1480 failed = 1; 1481 } 1482 } else { 1483 if ((uintptr_t) pt < (uintptr_t) &pmap_pteg_table[0] || 1484 (uintptr_t) pt >= 1485 (uintptr_t) &pmap_pteg_table[pmap_pteg_cnt]) { 1486 printf("pmap_pvo_check: pvo %p: pte %p not in " 1487 "pteg table\n", pvo, pt); 1488 failed = 1; 1489 } 1490 if (((((uintptr_t) pt) >> 3) & 7) != PVO_PTEGIDX_GET(pvo)) { 1491 printf("pmap_pvo_check: pvo %p: pte_hi VALID but " 1492 "no PTE\n", pvo); 1493 failed = 1; 1494 } 1495 if (pvo->pvo_pte.pte_hi != pt->pte_hi) { 1496 printf("pmap_pvo_check: pvo %p: pte_hi differ: " 1497 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1498 pvo->pvo_pte.pte_hi, 1499 pt->pte_hi); 1500 failed = 1; 1501 } 1502 if (((pvo->pvo_pte.pte_lo ^ pt->pte_lo) & 1503 (PTE_PP|PTE_WIMG|PTE_RPGN)) != 0) { 1504 printf("pmap_pvo_check: pvo %p: pte_lo differ: " 1505 "%#" _PRIxpte "/%#" _PRIxpte "\n", pvo, 1506 (pvo->pvo_pte.pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN)), 1507 (pt->pte_lo & (PTE_PP|PTE_WIMG|PTE_RPGN))); 1508 failed = 1; 1509 } 1510 if ((pmap_pte_to_va(pt) ^ PVO_VADDR(pvo)) & 0x0fffffff) { 1511 printf("pmap_pvo_check: pvo %p: PTE %p derived VA %#" _PRIxva "" 1512 " doesn't not match PVO's VA %#" _PRIxva "\n", 1513 pvo, pt, pmap_pte_to_va(pt), PVO_VADDR(pvo)); 1514 failed = 1; 1515 } 1516 if (failed) 1517 pmap_pte_print(pt); 1518 } 1519 if (failed) 1520 panic("pmap_pvo_check: pvo %p, pm %p: bugcheck!", pvo, 1521 pvo->pvo_pmap); 1522 1523 PMAP_UNLOCK(); 1524 } 1525 #endif /* DEBUG || PMAPCHECK */ 1526 1527 /* 1528 * Search the PVO table looking for a non-wired entry. 1529 * If we find one, remove it and return it. 1530 */ 1531 1532 struct pvo_entry * 1533 pmap_pvo_reclaim(struct pmap *pm) 1534 { 1535 struct pvo_tqhead *pvoh; 1536 struct pvo_entry *pvo; 1537 uint32_t idx, endidx; 1538 1539 endidx = pmap_pvo_reclaim_nextidx; 1540 for (idx = (endidx + 1) & pmap_pteg_mask; idx != endidx; 1541 idx = (idx + 1) & pmap_pteg_mask) { 1542 pvoh = &pmap_pvo_table[idx]; 1543 TAILQ_FOREACH(pvo, pvoh, pvo_olink) { 1544 if (!PVO_WIRED_P(pvo)) { 1545 pmap_pvo_remove(pvo, -1, NULL); 1546 pmap_pvo_reclaim_nextidx = idx; 1547 PMAPCOUNT(pvos_reclaimed); 1548 return pvo; 1549 } 1550 } 1551 } 1552 return NULL; 1553 } 1554 1555 static struct pool * 1556 pmap_pvo_pl(struct pvo_entry *pvo) 1557 { 1558 1559 return PVO_MANAGED_P(pvo) ? &pmap_mpvo_pool : &pmap_upvo_pool; 1560 } 1561 1562 /* 1563 * This returns whether this is the first mapping of a page. 1564 */ 1565 int 1566 pmap_pvo_enter(pmap_t pm, struct pool *pl, struct pvo_head *pvo_head, 1567 vaddr_t va, paddr_t pa, register_t pte_lo, int flags) 1568 { 1569 struct pvo_entry *pvo; 1570 struct pvo_tqhead *pvoh; 1571 register_t msr; 1572 int ptegidx; 1573 int i; 1574 int poolflags = PR_NOWAIT; 1575 1576 /* 1577 * Compute the PTE Group index. 1578 */ 1579 va &= ~ADDR_POFF; 1580 ptegidx = va_to_pteg(pm, va); 1581 1582 msr = pmap_interrupts_off(); 1583 1584 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1585 if (pmap_pvo_remove_depth > 0) 1586 panic("pmap_pvo_enter: called while pmap_pvo_remove active!"); 1587 if (++pmap_pvo_enter_depth > 1) 1588 panic("pmap_pvo_enter: called recursively!"); 1589 #endif 1590 1591 /* 1592 * Remove any existing mapping for this page. Reuse the 1593 * pvo entry if there a mapping. 1594 */ 1595 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1596 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1597 #ifdef DEBUG 1598 if ((pmapdebug & PMAPDEBUG_PVOENTER) && 1599 ((pvo->pvo_pte.pte_lo ^ (pa|pte_lo)) & 1600 ~(PTE_REF|PTE_CHG)) == 0 && 1601 va < VM_MIN_KERNEL_ADDRESS) { 1602 printf("pmap_pvo_enter: pvo %p: dup %#" _PRIxpte "/%#" _PRIxpa "\n", 1603 pvo, pvo->pvo_pte.pte_lo, pte_lo|pa); 1604 printf("pmap_pvo_enter: pte_hi=%#" _PRIxpte " sr=%#" _PRIsr "\n", 1605 pvo->pvo_pte.pte_hi, 1606 pm->pm_sr[va >> ADDR_SR_SHFT]); 1607 pmap_pte_print(pmap_pvo_to_pte(pvo, -1)); 1608 #ifdef DDBX 1609 Debugger(); 1610 #endif 1611 } 1612 #endif 1613 PMAPCOUNT(mappings_replaced); 1614 pmap_pvo_remove(pvo, -1, NULL); 1615 break; 1616 } 1617 } 1618 1619 /* 1620 * If we aren't overwriting an mapping, try to allocate 1621 */ 1622 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1623 --pmap_pvo_enter_depth; 1624 #endif 1625 pmap_interrupts_restore(msr); 1626 if (pvo) { 1627 KASSERT(pmap_pvo_pl(pvo) == pl); 1628 } else { 1629 pvo = pool_get(pl, poolflags); 1630 } 1631 KASSERT((vaddr_t)pvo < VM_MIN_KERNEL_ADDRESS); 1632 1633 #ifdef DEBUG 1634 /* 1635 * Exercise pmap_pvo_reclaim() a little. 1636 */ 1637 if (pvo && (flags & PMAP_CANFAIL) != 0 && 1638 pmap_pvo_reclaim_debugctr++ > 0x1000 && 1639 (pmap_pvo_reclaim_debugctr & 0xff) == 0) { 1640 pool_put(pl, pvo); 1641 pvo = NULL; 1642 } 1643 #endif 1644 1645 msr = pmap_interrupts_off(); 1646 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1647 ++pmap_pvo_enter_depth; 1648 #endif 1649 if (pvo == NULL) { 1650 pvo = pmap_pvo_reclaim(pm); 1651 if (pvo == NULL) { 1652 if ((flags & PMAP_CANFAIL) == 0) 1653 panic("pmap_pvo_enter: failed"); 1654 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1655 pmap_pvo_enter_depth--; 1656 #endif 1657 PMAPCOUNT(pvos_failed); 1658 pmap_interrupts_restore(msr); 1659 return ENOMEM; 1660 } 1661 } 1662 1663 pvo->pvo_vaddr = va; 1664 pvo->pvo_pmap = pm; 1665 pvo->pvo_vaddr &= ~ADDR_POFF; 1666 if (flags & VM_PROT_EXECUTE) { 1667 PMAPCOUNT(exec_mappings); 1668 pvo_set_exec(pvo); 1669 } 1670 if (flags & PMAP_WIRED) 1671 pvo->pvo_vaddr |= PVO_WIRED; 1672 if (pvo_head != &pmap_pvo_kunmanaged) { 1673 pvo->pvo_vaddr |= PVO_MANAGED; 1674 PMAPCOUNT(mappings); 1675 } else { 1676 PMAPCOUNT(kernel_mappings); 1677 } 1678 pmap_pte_create(&pvo->pvo_pte, pm, va, pa | pte_lo); 1679 1680 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1681 if (PVO_WIRED_P(pvo)) 1682 pvo->pvo_pmap->pm_stats.wired_count++; 1683 pvo->pvo_pmap->pm_stats.resident_count++; 1684 #if defined(DEBUG) 1685 /* if (pm != pmap_kernel() && va < VM_MIN_KERNEL_ADDRESS) */ 1686 DPRINTFN(PVOENTER, 1687 "pmap_pvo_enter: pvo %p: pm %p va %#" _PRIxva " pa %#" _PRIxpa "\n", 1688 pvo, pm, va, pa); 1689 #endif 1690 1691 /* 1692 * We hope this succeeds but it isn't required. 1693 */ 1694 pvoh = &pmap_pvo_table[ptegidx]; 1695 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1696 if (i >= 0) { 1697 PVO_PTEGIDX_SET(pvo, i); 1698 PVO_WHERE(pvo, ENTER_INSERT); 1699 PMAPCOUNT2(((pvo->pvo_pte.pte_hi & PTE_HID) 1700 ? pmap_evcnt_ptes_secondary : pmap_evcnt_ptes_primary)[i]); 1701 TAILQ_INSERT_TAIL(pvoh, pvo, pvo_olink); 1702 1703 } else { 1704 /* 1705 * Since we didn't have room for this entry (which makes it 1706 * and evicted entry), place it at the head of the list. 1707 */ 1708 TAILQ_INSERT_HEAD(pvoh, pvo, pvo_olink); 1709 PMAPCOUNT(ptes_evicted); 1710 pm->pm_evictions++; 1711 /* 1712 * If this is a kernel page, make sure it's active. 1713 */ 1714 if (pm == pmap_kernel()) { 1715 i = pmap_pte_spill(pm, va, false); 1716 KASSERT(i); 1717 } 1718 } 1719 PMAP_PVO_CHECK(pvo); /* sanity check */ 1720 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1721 pmap_pvo_enter_depth--; 1722 #endif 1723 pmap_interrupts_restore(msr); 1724 return 0; 1725 } 1726 1727 static void 1728 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx, struct pvo_head *pvol) 1729 { 1730 volatile struct pte *pt; 1731 int ptegidx; 1732 1733 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1734 if (++pmap_pvo_remove_depth > 1) 1735 panic("pmap_pvo_remove: called recursively!"); 1736 #endif 1737 1738 /* 1739 * If we haven't been supplied the ptegidx, calculate it. 1740 */ 1741 if (pteidx == -1) { 1742 ptegidx = va_to_pteg(pvo->pvo_pmap, pvo->pvo_vaddr); 1743 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1744 } else { 1745 ptegidx = pteidx >> 3; 1746 if (pvo->pvo_pte.pte_hi & PTE_HID) 1747 ptegidx ^= pmap_pteg_mask; 1748 } 1749 PMAP_PVO_CHECK(pvo); /* sanity check */ 1750 1751 /* 1752 * If there is an active pte entry, we need to deactivate it 1753 * (and save the ref & chg bits). 1754 */ 1755 pt = pmap_pvo_to_pte(pvo, pteidx); 1756 if (pt != NULL) { 1757 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1758 PVO_WHERE(pvo, REMOVE); 1759 PVO_PTEGIDX_CLR(pvo); 1760 PMAPCOUNT(ptes_removed); 1761 } else { 1762 KASSERT(pvo->pvo_pmap->pm_evictions > 0); 1763 pvo->pvo_pmap->pm_evictions--; 1764 } 1765 1766 /* 1767 * Account for executable mappings. 1768 */ 1769 if (PVO_EXECUTABLE_P(pvo)) 1770 pvo_clear_exec(pvo); 1771 1772 /* 1773 * Update our statistics. 1774 */ 1775 pvo->pvo_pmap->pm_stats.resident_count--; 1776 if (PVO_WIRED_P(pvo)) 1777 pvo->pvo_pmap->pm_stats.wired_count--; 1778 1779 /* 1780 * Save the REF/CHG bits into their cache if the page is managed. 1781 */ 1782 if (PVO_MANAGED_P(pvo)) { 1783 register_t ptelo = pvo->pvo_pte.pte_lo; 1784 struct vm_page *pg = PHYS_TO_VM_PAGE(ptelo & PTE_RPGN); 1785 1786 if (pg != NULL) { 1787 /* 1788 * If this page was changed and it is mapped exec, 1789 * invalidate it. 1790 */ 1791 if ((ptelo & PTE_CHG) && 1792 (pmap_attr_fetch(pg) & PTE_EXEC)) { 1793 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 1794 if (LIST_EMPTY(pvoh)) { 1795 DPRINTFN(EXEC, "[pmap_pvo_remove: " 1796 "%#" _PRIxpa ": clear-exec]\n", 1797 VM_PAGE_TO_PHYS(pg)); 1798 pmap_attr_clear(pg, PTE_EXEC); 1799 PMAPCOUNT(exec_uncached_pvo_remove); 1800 } else { 1801 DPRINTFN(EXEC, "[pmap_pvo_remove: " 1802 "%#" _PRIxpa ": syncicache]\n", 1803 VM_PAGE_TO_PHYS(pg)); 1804 pmap_syncicache(VM_PAGE_TO_PHYS(pg), 1805 PAGE_SIZE); 1806 PMAPCOUNT(exec_synced_pvo_remove); 1807 } 1808 } 1809 1810 pmap_attr_save(pg, ptelo & (PTE_REF|PTE_CHG)); 1811 } 1812 PMAPCOUNT(unmappings); 1813 } else { 1814 PMAPCOUNT(kernel_unmappings); 1815 } 1816 1817 /* 1818 * Remove the PVO from its lists and return it to the pool. 1819 */ 1820 LIST_REMOVE(pvo, pvo_vlink); 1821 TAILQ_REMOVE(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1822 if (pvol) { 1823 LIST_INSERT_HEAD(pvol, pvo, pvo_vlink); 1824 } 1825 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 1826 pmap_pvo_remove_depth--; 1827 #endif 1828 } 1829 1830 void 1831 pmap_pvo_free(struct pvo_entry *pvo) 1832 { 1833 1834 pool_put(pmap_pvo_pl(pvo), pvo); 1835 } 1836 1837 void 1838 pmap_pvo_free_list(struct pvo_head *pvol) 1839 { 1840 struct pvo_entry *pvo, *npvo; 1841 1842 for (pvo = LIST_FIRST(pvol); pvo != NULL; pvo = npvo) { 1843 npvo = LIST_NEXT(pvo, pvo_vlink); 1844 LIST_REMOVE(pvo, pvo_vlink); 1845 pmap_pvo_free(pvo); 1846 } 1847 } 1848 1849 /* 1850 * Mark a mapping as executable. 1851 * If this is the first executable mapping in the segment, 1852 * clear the noexec flag. 1853 */ 1854 static void 1855 pvo_set_exec(struct pvo_entry *pvo) 1856 { 1857 struct pmap *pm = pvo->pvo_pmap; 1858 1859 if (pm == pmap_kernel() || PVO_EXECUTABLE_P(pvo)) { 1860 return; 1861 } 1862 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1863 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1864 { 1865 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1866 if (pm->pm_exec[sr]++ == 0) { 1867 pm->pm_sr[sr] &= ~SR_NOEXEC; 1868 } 1869 } 1870 #endif 1871 } 1872 1873 /* 1874 * Mark a mapping as non-executable. 1875 * If this was the last executable mapping in the segment, 1876 * set the noexec flag. 1877 */ 1878 static void 1879 pvo_clear_exec(struct pvo_entry *pvo) 1880 { 1881 struct pmap *pm = pvo->pvo_pmap; 1882 1883 if (pm == pmap_kernel() || !PVO_EXECUTABLE_P(pvo)) { 1884 return; 1885 } 1886 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1887 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 1888 { 1889 int sr = PVO_VADDR(pvo) >> ADDR_SR_SHFT; 1890 if (--pm->pm_exec[sr] == 0) { 1891 pm->pm_sr[sr] |= SR_NOEXEC; 1892 } 1893 } 1894 #endif 1895 } 1896 1897 /* 1898 * Insert physical page at pa into the given pmap at virtual address va. 1899 */ 1900 int 1901 pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 1902 { 1903 struct mem_region *mp; 1904 struct pvo_head *pvo_head; 1905 struct vm_page *pg; 1906 struct pool *pl; 1907 register_t pte_lo; 1908 int error; 1909 u_int was_exec = 0; 1910 1911 PMAP_LOCK(); 1912 1913 if (__predict_false(!pmap_initialized)) { 1914 pvo_head = &pmap_pvo_kunmanaged; 1915 pl = &pmap_upvo_pool; 1916 pg = NULL; 1917 was_exec = PTE_EXEC; 1918 } else { 1919 pvo_head = pa_to_pvoh(pa, &pg); 1920 pl = &pmap_mpvo_pool; 1921 } 1922 1923 DPRINTFN(ENTER, 1924 "pmap_enter(%p, %#" _PRIxva ", %#" _PRIxpa ", 0x%x, 0x%x):", 1925 pm, va, pa, prot, flags); 1926 1927 /* 1928 * If this is a managed page, and it's the first reference to the 1929 * page clear the execness of the page. Otherwise fetch the execness. 1930 */ 1931 if (pg != NULL) 1932 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 1933 1934 DPRINTFN(ENTER, " was_exec=%d", was_exec); 1935 1936 /* 1937 * Assume the page is cache inhibited and access is guarded unless 1938 * it's in our available memory array. If it is in the memory array, 1939 * asssume it's in memory coherent memory. 1940 */ 1941 if (flags & PMAP_MD_PREFETCHABLE) { 1942 pte_lo = 0; 1943 } else 1944 pte_lo = PTE_G; 1945 1946 if ((flags & PMAP_NOCACHE) == 0) { 1947 for (mp = mem; mp->size; mp++) { 1948 if (pa >= mp->start && pa < mp->start + mp->size) { 1949 pte_lo = PTE_M; 1950 break; 1951 } 1952 } 1953 #ifdef MULTIPROCESSOR 1954 if (((mfpvr() >> 16) & 0xffff) == MPC603e) 1955 pte_lo = PTE_M; 1956 #endif 1957 } else { 1958 pte_lo |= PTE_I; 1959 } 1960 1961 if (prot & VM_PROT_WRITE) 1962 pte_lo |= PTE_BW; 1963 else 1964 pte_lo |= PTE_BR; 1965 1966 /* 1967 * If this was in response to a fault, "pre-fault" the PTE's 1968 * changed/referenced bit appropriately. 1969 */ 1970 if (flags & VM_PROT_WRITE) 1971 pte_lo |= PTE_CHG; 1972 if (flags & VM_PROT_ALL) 1973 pte_lo |= PTE_REF; 1974 1975 /* 1976 * We need to know if this page can be executable 1977 */ 1978 flags |= (prot & VM_PROT_EXECUTE); 1979 1980 /* 1981 * Record mapping for later back-translation and pte spilling. 1982 * This will overwrite any existing mapping. 1983 */ 1984 error = pmap_pvo_enter(pm, pl, pvo_head, va, pa, pte_lo, flags); 1985 1986 /* 1987 * Flush the real page from the instruction cache if this page is 1988 * mapped executable and cacheable and has not been flushed since 1989 * the last time it was modified. 1990 */ 1991 if (error == 0 && 1992 (flags & VM_PROT_EXECUTE) && 1993 (pte_lo & PTE_I) == 0 && 1994 was_exec == 0) { 1995 DPRINTFN(ENTER, " %s", "syncicache"); 1996 PMAPCOUNT(exec_synced); 1997 pmap_syncicache(pa, PAGE_SIZE); 1998 if (pg != NULL) { 1999 pmap_attr_save(pg, PTE_EXEC); 2000 PMAPCOUNT(exec_cached); 2001 #if defined(DEBUG) || defined(PMAPDEBUG) 2002 if (pmapdebug & PMAPDEBUG_ENTER) 2003 printf(" marked-as-exec"); 2004 else if (pmapdebug & PMAPDEBUG_EXEC) 2005 printf("[pmap_enter: %#" _PRIxpa ": marked-as-exec]\n", 2006 VM_PAGE_TO_PHYS(pg)); 2007 2008 #endif 2009 } 2010 } 2011 2012 DPRINTFN(ENTER, ": error=%d\n", error); 2013 2014 PMAP_UNLOCK(); 2015 2016 return error; 2017 } 2018 2019 void 2020 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot, u_int flags) 2021 { 2022 struct mem_region *mp; 2023 register_t pte_lo; 2024 int error; 2025 2026 #if defined (PMAP_OEA64_BRIDGE) || defined (PMAP_OEA) 2027 if (va < VM_MIN_KERNEL_ADDRESS) 2028 panic("pmap_kenter_pa: attempt to enter " 2029 "non-kernel address %#" _PRIxva "!", va); 2030 #endif 2031 2032 DPRINTFN(KENTER, 2033 "pmap_kenter_pa(%#" _PRIxva ",%#" _PRIxpa ",%#x)\n", va, pa, prot); 2034 2035 PMAP_LOCK(); 2036 2037 /* 2038 * Assume the page is cache inhibited and access is guarded unless 2039 * it's in our available memory array. If it is in the memory array, 2040 * asssume it's in memory coherent memory. 2041 */ 2042 pte_lo = PTE_IG; 2043 if ((flags & PMAP_NOCACHE) == 0) { 2044 for (mp = mem; mp->size; mp++) { 2045 if (pa >= mp->start && pa < mp->start + mp->size) { 2046 pte_lo = PTE_M; 2047 break; 2048 } 2049 } 2050 #ifdef MULTIPROCESSOR 2051 if (((mfpvr() >> 16) & 0xffff) == MPC603e) 2052 pte_lo = PTE_M; 2053 #endif 2054 } 2055 2056 if (prot & VM_PROT_WRITE) 2057 pte_lo |= PTE_BW; 2058 else 2059 pte_lo |= PTE_BR; 2060 2061 /* 2062 * We don't care about REF/CHG on PVOs on the unmanaged list. 2063 */ 2064 error = pmap_pvo_enter(pmap_kernel(), &pmap_upvo_pool, 2065 &pmap_pvo_kunmanaged, va, pa, pte_lo, prot|PMAP_WIRED); 2066 2067 if (error != 0) 2068 panic("pmap_kenter_pa: failed to enter va %#" _PRIxva " pa %#" _PRIxpa ": %d", 2069 va, pa, error); 2070 2071 PMAP_UNLOCK(); 2072 } 2073 2074 void 2075 pmap_kremove(vaddr_t va, vsize_t len) 2076 { 2077 if (va < VM_MIN_KERNEL_ADDRESS) 2078 panic("pmap_kremove: attempt to remove " 2079 "non-kernel address %#" _PRIxva "!", va); 2080 2081 DPRINTFN(KREMOVE, "pmap_kremove(%#" _PRIxva ",%#" _PRIxva ")\n", va, len); 2082 pmap_remove(pmap_kernel(), va, va + len); 2083 } 2084 2085 /* 2086 * Remove the given range of mapping entries. 2087 */ 2088 void 2089 pmap_remove(pmap_t pm, vaddr_t va, vaddr_t endva) 2090 { 2091 struct pvo_head pvol; 2092 struct pvo_entry *pvo; 2093 register_t msr; 2094 int pteidx; 2095 2096 PMAP_LOCK(); 2097 LIST_INIT(&pvol); 2098 msr = pmap_interrupts_off(); 2099 for (; va < endva; va += PAGE_SIZE) { 2100 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2101 if (pvo != NULL) { 2102 pmap_pvo_remove(pvo, pteidx, &pvol); 2103 } 2104 } 2105 pmap_interrupts_restore(msr); 2106 pmap_pvo_free_list(&pvol); 2107 PMAP_UNLOCK(); 2108 } 2109 2110 /* 2111 * Get the physical page address for the given pmap/virtual address. 2112 */ 2113 bool 2114 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap) 2115 { 2116 struct pvo_entry *pvo; 2117 register_t msr; 2118 2119 PMAP_LOCK(); 2120 2121 /* 2122 * If this is a kernel pmap lookup, also check the battable 2123 * and if we get a hit, translate the VA to a PA using the 2124 * BAT entries. Don't check for VM_MAX_KERNEL_ADDRESS is 2125 * that will wrap back to 0. 2126 */ 2127 if (pm == pmap_kernel() && 2128 (va < VM_MIN_KERNEL_ADDRESS || 2129 (KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) { 2130 KASSERT((va >> ADDR_SR_SHFT) != USER_SR); 2131 #if defined (PMAP_OEA) 2132 #ifdef PPC_OEA601 2133 if ((MFPVR() >> 16) == MPC601) { 2134 register_t batu = battable[va >> 23].batu; 2135 register_t batl = battable[va >> 23].batl; 2136 register_t sr = iosrtable[va >> ADDR_SR_SHFT]; 2137 if (BAT601_VALID_P(batl) && 2138 BAT601_VA_MATCH_P(batu, batl, va)) { 2139 register_t mask = 2140 (~(batl & BAT601_BSM) << 17) & ~0x1ffffL; 2141 if (pap) 2142 *pap = (batl & mask) | (va & ~mask); 2143 PMAP_UNLOCK(); 2144 return true; 2145 } else if (SR601_VALID_P(sr) && 2146 SR601_PA_MATCH_P(sr, va)) { 2147 if (pap) 2148 *pap = va; 2149 PMAP_UNLOCK(); 2150 return true; 2151 } 2152 } else 2153 #endif /* PPC_OEA601 */ 2154 { 2155 register_t batu = battable[BAT_VA2IDX(va)].batu; 2156 if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) { 2157 register_t batl = battable[BAT_VA2IDX(va)].batl; 2158 register_t mask = 2159 (~(batu & (BAT_XBL|BAT_BL)) << 15) & ~0x1ffffL; 2160 if (pap) 2161 *pap = (batl & mask) | (va & ~mask); 2162 PMAP_UNLOCK(); 2163 return true; 2164 } 2165 } 2166 PMAP_UNLOCK(); 2167 return false; 2168 #elif defined (PMAP_OEA64_BRIDGE) 2169 if (va >= SEGMENT_LENGTH) 2170 panic("%s: pm: %s va >= SEGMENT_LENGTH, va: 0x%08lx\n", 2171 __func__, (pm == pmap_kernel() ? "kernel" : "user"), va); 2172 else { 2173 if (pap) 2174 *pap = va; 2175 PMAP_UNLOCK(); 2176 return true; 2177 } 2178 #elif defined (PMAP_OEA64) 2179 #error PPC_OEA64 not supported 2180 #endif /* PPC_OEA */ 2181 } 2182 2183 msr = pmap_interrupts_off(); 2184 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 2185 if (pvo != NULL) { 2186 PMAP_PVO_CHECK(pvo); /* sanity check */ 2187 if (pap) 2188 *pap = (pvo->pvo_pte.pte_lo & PTE_RPGN) 2189 | (va & ADDR_POFF); 2190 } 2191 pmap_interrupts_restore(msr); 2192 PMAP_UNLOCK(); 2193 return pvo != NULL; 2194 } 2195 2196 /* 2197 * Lower the protection on the specified range of this pmap. 2198 */ 2199 void 2200 pmap_protect(pmap_t pm, vaddr_t va, vaddr_t endva, vm_prot_t prot) 2201 { 2202 struct pvo_entry *pvo; 2203 volatile struct pte *pt; 2204 register_t msr; 2205 int pteidx; 2206 2207 /* 2208 * Since this routine only downgrades protection, we should 2209 * always be called with at least one bit not set. 2210 */ 2211 KASSERT(prot != VM_PROT_ALL); 2212 2213 /* 2214 * If there is no protection, this is equivalent to 2215 * remove the pmap from the pmap. 2216 */ 2217 if ((prot & VM_PROT_READ) == 0) { 2218 pmap_remove(pm, va, endva); 2219 return; 2220 } 2221 2222 PMAP_LOCK(); 2223 2224 msr = pmap_interrupts_off(); 2225 for (; va < endva; va += PAGE_SIZE) { 2226 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2227 if (pvo == NULL) 2228 continue; 2229 PMAP_PVO_CHECK(pvo); /* sanity check */ 2230 2231 /* 2232 * Revoke executable if asked to do so. 2233 */ 2234 if ((prot & VM_PROT_EXECUTE) == 0) 2235 pvo_clear_exec(pvo); 2236 2237 #if 0 2238 /* 2239 * If the page is already read-only, no change 2240 * needs to be made. 2241 */ 2242 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) 2243 continue; 2244 #endif 2245 /* 2246 * Grab the PTE pointer before we diddle with 2247 * the cached PTE copy. 2248 */ 2249 pt = pmap_pvo_to_pte(pvo, pteidx); 2250 /* 2251 * Change the protection of the page. 2252 */ 2253 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2254 pvo->pvo_pte.pte_lo |= PTE_BR; 2255 2256 /* 2257 * If the PVO is in the page table, update 2258 * that pte at well. 2259 */ 2260 if (pt != NULL) { 2261 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2262 PVO_WHERE(pvo, PMAP_PROTECT); 2263 PMAPCOUNT(ptes_changed); 2264 } 2265 2266 PMAP_PVO_CHECK(pvo); /* sanity check */ 2267 } 2268 pmap_interrupts_restore(msr); 2269 PMAP_UNLOCK(); 2270 } 2271 2272 void 2273 pmap_unwire(pmap_t pm, vaddr_t va) 2274 { 2275 struct pvo_entry *pvo; 2276 register_t msr; 2277 2278 PMAP_LOCK(); 2279 msr = pmap_interrupts_off(); 2280 pvo = pmap_pvo_find_va(pm, va, NULL); 2281 if (pvo != NULL) { 2282 if (PVO_WIRED_P(pvo)) { 2283 pvo->pvo_vaddr &= ~PVO_WIRED; 2284 pm->pm_stats.wired_count--; 2285 } 2286 PMAP_PVO_CHECK(pvo); /* sanity check */ 2287 } 2288 pmap_interrupts_restore(msr); 2289 PMAP_UNLOCK(); 2290 } 2291 2292 /* 2293 * Lower the protection on the specified physical page. 2294 */ 2295 void 2296 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 2297 { 2298 struct pvo_head *pvo_head, pvol; 2299 struct pvo_entry *pvo, *next_pvo; 2300 volatile struct pte *pt; 2301 register_t msr; 2302 2303 PMAP_LOCK(); 2304 2305 KASSERT(prot != VM_PROT_ALL); 2306 LIST_INIT(&pvol); 2307 msr = pmap_interrupts_off(); 2308 2309 /* 2310 * When UVM reuses a page, it does a pmap_page_protect with 2311 * VM_PROT_NONE. At that point, we can clear the exec flag 2312 * since we know the page will have different contents. 2313 */ 2314 if ((prot & VM_PROT_READ) == 0) { 2315 DPRINTFN(EXEC, "[pmap_page_protect: %#" _PRIxpa ": clear-exec]\n", 2316 VM_PAGE_TO_PHYS(pg)); 2317 if (pmap_attr_fetch(pg) & PTE_EXEC) { 2318 PMAPCOUNT(exec_uncached_page_protect); 2319 pmap_attr_clear(pg, PTE_EXEC); 2320 } 2321 } 2322 2323 pvo_head = vm_page_to_pvoh(pg); 2324 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 2325 next_pvo = LIST_NEXT(pvo, pvo_vlink); 2326 PMAP_PVO_CHECK(pvo); /* sanity check */ 2327 2328 /* 2329 * Downgrading to no mapping at all, we just remove the entry. 2330 */ 2331 if ((prot & VM_PROT_READ) == 0) { 2332 pmap_pvo_remove(pvo, -1, &pvol); 2333 continue; 2334 } 2335 2336 /* 2337 * If EXEC permission is being revoked, just clear the 2338 * flag in the PVO. 2339 */ 2340 if ((prot & VM_PROT_EXECUTE) == 0) 2341 pvo_clear_exec(pvo); 2342 2343 /* 2344 * If this entry is already RO, don't diddle with the 2345 * page table. 2346 */ 2347 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 2348 PMAP_PVO_CHECK(pvo); 2349 continue; 2350 } 2351 2352 /* 2353 * Grab the PTE before the we diddle the bits so 2354 * pvo_to_pte can verify the pte contents are as 2355 * expected. 2356 */ 2357 pt = pmap_pvo_to_pte(pvo, -1); 2358 pvo->pvo_pte.pte_lo &= ~PTE_PP; 2359 pvo->pvo_pte.pte_lo |= PTE_BR; 2360 if (pt != NULL) { 2361 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 2362 PVO_WHERE(pvo, PMAP_PAGE_PROTECT); 2363 PMAPCOUNT(ptes_changed); 2364 } 2365 PMAP_PVO_CHECK(pvo); /* sanity check */ 2366 } 2367 pmap_interrupts_restore(msr); 2368 pmap_pvo_free_list(&pvol); 2369 2370 PMAP_UNLOCK(); 2371 } 2372 2373 /* 2374 * Activate the address space for the specified process. If the process 2375 * is the current process, load the new MMU context. 2376 */ 2377 void 2378 pmap_activate(struct lwp *l) 2379 { 2380 struct pcb *pcb = lwp_getpcb(l); 2381 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap; 2382 2383 DPRINTFN(ACTIVATE, 2384 "pmap_activate: lwp %p (curlwp %p)\n", l, curlwp); 2385 2386 /* 2387 * XXX Normally performed in cpu_lwp_fork(). 2388 */ 2389 pcb->pcb_pm = pmap; 2390 2391 /* 2392 * In theory, the SR registers need only be valid on return 2393 * to user space wait to do them there. 2394 */ 2395 if (l == curlwp) { 2396 /* Store pointer to new current pmap. */ 2397 curpm = pmap; 2398 } 2399 } 2400 2401 /* 2402 * Deactivate the specified process's address space. 2403 */ 2404 void 2405 pmap_deactivate(struct lwp *l) 2406 { 2407 } 2408 2409 bool 2410 pmap_query_bit(struct vm_page *pg, int ptebit) 2411 { 2412 struct pvo_entry *pvo; 2413 volatile struct pte *pt; 2414 register_t msr; 2415 2416 PMAP_LOCK(); 2417 2418 if (pmap_attr_fetch(pg) & ptebit) { 2419 PMAP_UNLOCK(); 2420 return true; 2421 } 2422 2423 msr = pmap_interrupts_off(); 2424 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2425 PMAP_PVO_CHECK(pvo); /* sanity check */ 2426 /* 2427 * See if we saved the bit off. If so cache, it and return 2428 * success. 2429 */ 2430 if (pvo->pvo_pte.pte_lo & ptebit) { 2431 pmap_attr_save(pg, ptebit); 2432 PMAP_PVO_CHECK(pvo); /* sanity check */ 2433 pmap_interrupts_restore(msr); 2434 PMAP_UNLOCK(); 2435 return true; 2436 } 2437 } 2438 /* 2439 * No luck, now go thru the hard part of looking at the ptes 2440 * themselves. Sync so any pending REF/CHG bits are flushed 2441 * to the PTEs. 2442 */ 2443 SYNC(); 2444 LIST_FOREACH(pvo, vm_page_to_pvoh(pg), pvo_vlink) { 2445 PMAP_PVO_CHECK(pvo); /* sanity check */ 2446 /* 2447 * See if this pvo have a valid PTE. If so, fetch the 2448 * REF/CHG bits from the valid PTE. If the appropriate 2449 * ptebit is set, cache, it and return success. 2450 */ 2451 pt = pmap_pvo_to_pte(pvo, -1); 2452 if (pt != NULL) { 2453 pmap_pte_synch(pt, &pvo->pvo_pte); 2454 if (pvo->pvo_pte.pte_lo & ptebit) { 2455 pmap_attr_save(pg, ptebit); 2456 PMAP_PVO_CHECK(pvo); /* sanity check */ 2457 pmap_interrupts_restore(msr); 2458 PMAP_UNLOCK(); 2459 return true; 2460 } 2461 } 2462 } 2463 pmap_interrupts_restore(msr); 2464 PMAP_UNLOCK(); 2465 return false; 2466 } 2467 2468 bool 2469 pmap_clear_bit(struct vm_page *pg, int ptebit) 2470 { 2471 struct pvo_head *pvoh = vm_page_to_pvoh(pg); 2472 struct pvo_entry *pvo; 2473 volatile struct pte *pt; 2474 register_t msr; 2475 int rv = 0; 2476 2477 PMAP_LOCK(); 2478 msr = pmap_interrupts_off(); 2479 2480 /* 2481 * Fetch the cache value 2482 */ 2483 rv |= pmap_attr_fetch(pg); 2484 2485 /* 2486 * Clear the cached value. 2487 */ 2488 pmap_attr_clear(pg, ptebit); 2489 2490 /* 2491 * Sync so any pending REF/CHG bits are flushed to the PTEs (so we 2492 * can reset the right ones). Note that since the pvo entries and 2493 * list heads are accessed via BAT0 and are never placed in the 2494 * page table, we don't have to worry about further accesses setting 2495 * the REF/CHG bits. 2496 */ 2497 SYNC(); 2498 2499 /* 2500 * For each pvo entry, clear pvo's ptebit. If this pvo have a 2501 * valid PTE. If so, clear the ptebit from the valid PTE. 2502 */ 2503 LIST_FOREACH(pvo, pvoh, pvo_vlink) { 2504 PMAP_PVO_CHECK(pvo); /* sanity check */ 2505 pt = pmap_pvo_to_pte(pvo, -1); 2506 if (pt != NULL) { 2507 /* 2508 * Only sync the PTE if the bit we are looking 2509 * for is not already set. 2510 */ 2511 if ((pvo->pvo_pte.pte_lo & ptebit) == 0) 2512 pmap_pte_synch(pt, &pvo->pvo_pte); 2513 /* 2514 * If the bit we are looking for was already set, 2515 * clear that bit in the pte. 2516 */ 2517 if (pvo->pvo_pte.pte_lo & ptebit) 2518 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2519 } 2520 rv |= pvo->pvo_pte.pte_lo & (PTE_CHG|PTE_REF); 2521 pvo->pvo_pte.pte_lo &= ~ptebit; 2522 PMAP_PVO_CHECK(pvo); /* sanity check */ 2523 } 2524 pmap_interrupts_restore(msr); 2525 2526 /* 2527 * If we are clearing the modify bit and this page was marked EXEC 2528 * and the user of the page thinks the page was modified, then we 2529 * need to clean it from the icache if it's mapped or clear the EXEC 2530 * bit if it's not mapped. The page itself might not have the CHG 2531 * bit set if the modification was done via DMA to the page. 2532 */ 2533 if ((ptebit & PTE_CHG) && (rv & PTE_EXEC)) { 2534 if (LIST_EMPTY(pvoh)) { 2535 DPRINTFN(EXEC, "[pmap_clear_bit: %#" _PRIxpa ": clear-exec]\n", 2536 VM_PAGE_TO_PHYS(pg)); 2537 pmap_attr_clear(pg, PTE_EXEC); 2538 PMAPCOUNT(exec_uncached_clear_modify); 2539 } else { 2540 DPRINTFN(EXEC, "[pmap_clear_bit: %#" _PRIxpa ": syncicache]\n", 2541 VM_PAGE_TO_PHYS(pg)); 2542 pmap_syncicache(VM_PAGE_TO_PHYS(pg), PAGE_SIZE); 2543 PMAPCOUNT(exec_synced_clear_modify); 2544 } 2545 } 2546 PMAP_UNLOCK(); 2547 return (rv & ptebit) != 0; 2548 } 2549 2550 void 2551 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 2552 { 2553 struct pvo_entry *pvo; 2554 size_t offset = va & ADDR_POFF; 2555 int s; 2556 2557 PMAP_LOCK(); 2558 s = splvm(); 2559 while (len > 0) { 2560 size_t seglen = PAGE_SIZE - offset; 2561 if (seglen > len) 2562 seglen = len; 2563 pvo = pmap_pvo_find_va(p->p_vmspace->vm_map.pmap, va, NULL); 2564 if (pvo != NULL && PVO_EXECUTABLE_P(pvo)) { 2565 pmap_syncicache( 2566 (pvo->pvo_pte.pte_lo & PTE_RPGN) | offset, seglen); 2567 PMAP_PVO_CHECK(pvo); 2568 } 2569 va += seglen; 2570 len -= seglen; 2571 offset = 0; 2572 } 2573 splx(s); 2574 PMAP_UNLOCK(); 2575 } 2576 2577 #if defined(DEBUG) || defined(PMAPCHECK) || defined(DDB) 2578 void 2579 pmap_pte_print(volatile struct pte *pt) 2580 { 2581 printf("PTE %p: ", pt); 2582 2583 #if defined(PMAP_OEA) 2584 /* High word: */ 2585 printf("%#" _PRIxpte ": [", pt->pte_hi); 2586 #else 2587 printf("%#" _PRIxpte ": [", pt->pte_hi); 2588 #endif /* PMAP_OEA */ 2589 2590 printf("%c ", (pt->pte_hi & PTE_VALID) ? 'v' : 'i'); 2591 printf("%c ", (pt->pte_hi & PTE_HID) ? 'h' : '-'); 2592 2593 printf("%#" _PRIxpte " %#" _PRIxpte "", 2594 (pt->pte_hi &~ PTE_VALID)>>PTE_VSID_SHFT, 2595 pt->pte_hi & PTE_API); 2596 #if defined(PMAP_OEA) || defined(PMAP_OEA64_BRIDGE) 2597 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2598 #else 2599 printf(" (va %#" _PRIxva ")] ", pmap_pte_to_va(pt)); 2600 #endif /* PMAP_OEA */ 2601 2602 /* Low word: */ 2603 #if defined (PMAP_OEA) 2604 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2605 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2606 #else 2607 printf(" %#" _PRIxpte ": [", pt->pte_lo); 2608 printf("%#" _PRIxpte "... ", pt->pte_lo >> 12); 2609 #endif 2610 printf("%c ", (pt->pte_lo & PTE_REF) ? 'r' : 'u'); 2611 printf("%c ", (pt->pte_lo & PTE_CHG) ? 'c' : 'n'); 2612 printf("%c", (pt->pte_lo & PTE_W) ? 'w' : '.'); 2613 printf("%c", (pt->pte_lo & PTE_I) ? 'i' : '.'); 2614 printf("%c", (pt->pte_lo & PTE_M) ? 'm' : '.'); 2615 printf("%c ", (pt->pte_lo & PTE_G) ? 'g' : '.'); 2616 switch (pt->pte_lo & PTE_PP) { 2617 case PTE_BR: printf("br]\n"); break; 2618 case PTE_BW: printf("bw]\n"); break; 2619 case PTE_SO: printf("so]\n"); break; 2620 case PTE_SW: printf("sw]\n"); break; 2621 } 2622 } 2623 #endif 2624 2625 #if defined(DDB) 2626 void 2627 pmap_pteg_check(void) 2628 { 2629 volatile struct pte *pt; 2630 int i; 2631 int ptegidx; 2632 u_int p_valid = 0; 2633 u_int s_valid = 0; 2634 u_int invalid = 0; 2635 2636 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2637 for (pt = pmap_pteg_table[ptegidx].pt, i = 8; --i >= 0; pt++) { 2638 if (pt->pte_hi & PTE_VALID) { 2639 if (pt->pte_hi & PTE_HID) 2640 s_valid++; 2641 else 2642 { 2643 p_valid++; 2644 } 2645 } else 2646 invalid++; 2647 } 2648 } 2649 printf("pteg_check: v(p) %#x (%d), v(s) %#x (%d), i %#x (%d)\n", 2650 p_valid, p_valid, s_valid, s_valid, 2651 invalid, invalid); 2652 } 2653 2654 void 2655 pmap_print_mmuregs(void) 2656 { 2657 int i; 2658 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2659 u_int cpuvers; 2660 #endif 2661 #ifndef PMAP_OEA64 2662 vaddr_t addr; 2663 register_t soft_sr[16]; 2664 #endif 2665 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2666 struct bat soft_ibat[4]; 2667 struct bat soft_dbat[4]; 2668 #endif 2669 paddr_t sdr1; 2670 2671 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2672 cpuvers = MFPVR() >> 16; 2673 #endif 2674 __asm volatile ("mfsdr1 %0" : "=r"(sdr1)); 2675 #ifndef PMAP_OEA64 2676 addr = 0; 2677 for (i = 0; i < 16; i++) { 2678 soft_sr[i] = MFSRIN(addr); 2679 addr += (1 << ADDR_SR_SHFT); 2680 } 2681 #endif 2682 2683 #if defined (PMAP_OEA) || defined (PMAP_OEA_BRIDGE) 2684 /* read iBAT (601: uBAT) registers */ 2685 __asm volatile ("mfibatu %0,0" : "=r"(soft_ibat[0].batu)); 2686 __asm volatile ("mfibatl %0,0" : "=r"(soft_ibat[0].batl)); 2687 __asm volatile ("mfibatu %0,1" : "=r"(soft_ibat[1].batu)); 2688 __asm volatile ("mfibatl %0,1" : "=r"(soft_ibat[1].batl)); 2689 __asm volatile ("mfibatu %0,2" : "=r"(soft_ibat[2].batu)); 2690 __asm volatile ("mfibatl %0,2" : "=r"(soft_ibat[2].batl)); 2691 __asm volatile ("mfibatu %0,3" : "=r"(soft_ibat[3].batu)); 2692 __asm volatile ("mfibatl %0,3" : "=r"(soft_ibat[3].batl)); 2693 2694 2695 if (cpuvers != MPC601) { 2696 /* read dBAT registers */ 2697 __asm volatile ("mfdbatu %0,0" : "=r"(soft_dbat[0].batu)); 2698 __asm volatile ("mfdbatl %0,0" : "=r"(soft_dbat[0].batl)); 2699 __asm volatile ("mfdbatu %0,1" : "=r"(soft_dbat[1].batu)); 2700 __asm volatile ("mfdbatl %0,1" : "=r"(soft_dbat[1].batl)); 2701 __asm volatile ("mfdbatu %0,2" : "=r"(soft_dbat[2].batu)); 2702 __asm volatile ("mfdbatl %0,2" : "=r"(soft_dbat[2].batl)); 2703 __asm volatile ("mfdbatu %0,3" : "=r"(soft_dbat[3].batu)); 2704 __asm volatile ("mfdbatl %0,3" : "=r"(soft_dbat[3].batl)); 2705 } 2706 #endif 2707 2708 printf("SDR1:\t%#" _PRIxpa "\n", sdr1); 2709 #ifndef PMAP_OEA64 2710 printf("SR[]:\t"); 2711 for (i = 0; i < 4; i++) 2712 printf("0x%08lx, ", soft_sr[i]); 2713 printf("\n\t"); 2714 for ( ; i < 8; i++) 2715 printf("0x%08lx, ", soft_sr[i]); 2716 printf("\n\t"); 2717 for ( ; i < 12; i++) 2718 printf("0x%08lx, ", soft_sr[i]); 2719 printf("\n\t"); 2720 for ( ; i < 16; i++) 2721 printf("0x%08lx, ", soft_sr[i]); 2722 printf("\n"); 2723 #endif 2724 2725 #if defined(PMAP_OEA) || defined(PMAP_OEA_BRIDGE) 2726 printf("%cBAT[]:\t", cpuvers == MPC601 ? 'u' : 'i'); 2727 for (i = 0; i < 4; i++) { 2728 printf("0x%08lx 0x%08lx, ", 2729 soft_ibat[i].batu, soft_ibat[i].batl); 2730 if (i == 1) 2731 printf("\n\t"); 2732 } 2733 if (cpuvers != MPC601) { 2734 printf("\ndBAT[]:\t"); 2735 for (i = 0; i < 4; i++) { 2736 printf("0x%08lx 0x%08lx, ", 2737 soft_dbat[i].batu, soft_dbat[i].batl); 2738 if (i == 1) 2739 printf("\n\t"); 2740 } 2741 } 2742 printf("\n"); 2743 #endif /* PMAP_OEA... */ 2744 } 2745 2746 void 2747 pmap_print_pte(pmap_t pm, vaddr_t va) 2748 { 2749 struct pvo_entry *pvo; 2750 volatile struct pte *pt; 2751 int pteidx; 2752 2753 pvo = pmap_pvo_find_va(pm, va, &pteidx); 2754 if (pvo != NULL) { 2755 pt = pmap_pvo_to_pte(pvo, pteidx); 2756 if (pt != NULL) { 2757 printf("VA %#" _PRIxva " -> %p -> %s %#" _PRIxpte ", %#" _PRIxpte "\n", 2758 va, pt, 2759 pt->pte_hi & PTE_HID ? "(sec)" : "(pri)", 2760 pt->pte_hi, pt->pte_lo); 2761 } else { 2762 printf("No valid PTE found\n"); 2763 } 2764 } else { 2765 printf("Address not in pmap\n"); 2766 } 2767 } 2768 2769 void 2770 pmap_pteg_dist(void) 2771 { 2772 struct pvo_entry *pvo; 2773 int ptegidx; 2774 int depth; 2775 int max_depth = 0; 2776 unsigned int depths[64]; 2777 2778 memset(depths, 0, sizeof(depths)); 2779 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2780 depth = 0; 2781 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2782 depth++; 2783 } 2784 if (depth > max_depth) 2785 max_depth = depth; 2786 if (depth > 63) 2787 depth = 63; 2788 depths[depth]++; 2789 } 2790 2791 for (depth = 0; depth < 64; depth++) { 2792 printf(" [%2d]: %8u", depth, depths[depth]); 2793 if ((depth & 3) == 3) 2794 printf("\n"); 2795 if (depth == max_depth) 2796 break; 2797 } 2798 if ((depth & 3) != 3) 2799 printf("\n"); 2800 printf("Max depth found was %d\n", max_depth); 2801 } 2802 #endif /* DEBUG */ 2803 2804 #if defined(PMAPCHECK) || defined(DEBUG) 2805 void 2806 pmap_pvo_verify(void) 2807 { 2808 int ptegidx; 2809 int s; 2810 2811 s = splvm(); 2812 for (ptegidx = 0; ptegidx < pmap_pteg_cnt; ptegidx++) { 2813 struct pvo_entry *pvo; 2814 TAILQ_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2815 if ((uintptr_t) pvo >= SEGMENT_LENGTH) 2816 panic("pmap_pvo_verify: invalid pvo %p " 2817 "on list %#x", pvo, ptegidx); 2818 pmap_pvo_check(pvo); 2819 } 2820 } 2821 splx(s); 2822 } 2823 #endif /* PMAPCHECK */ 2824 2825 2826 void * 2827 pmap_pool_ualloc(struct pool *pp, int flags) 2828 { 2829 struct pvo_page *pvop; 2830 2831 if (uvm.page_init_done != true) { 2832 return (void *) uvm_pageboot_alloc(PAGE_SIZE); 2833 } 2834 2835 PMAP_LOCK(); 2836 pvop = SIMPLEQ_FIRST(&pmap_upvop_head); 2837 if (pvop != NULL) { 2838 pmap_upvop_free--; 2839 SIMPLEQ_REMOVE_HEAD(&pmap_upvop_head, pvop_link); 2840 PMAP_UNLOCK(); 2841 return pvop; 2842 } 2843 PMAP_UNLOCK(); 2844 return pmap_pool_malloc(pp, flags); 2845 } 2846 2847 void * 2848 pmap_pool_malloc(struct pool *pp, int flags) 2849 { 2850 struct pvo_page *pvop; 2851 struct vm_page *pg; 2852 2853 PMAP_LOCK(); 2854 pvop = SIMPLEQ_FIRST(&pmap_mpvop_head); 2855 if (pvop != NULL) { 2856 pmap_mpvop_free--; 2857 SIMPLEQ_REMOVE_HEAD(&pmap_mpvop_head, pvop_link); 2858 PMAP_UNLOCK(); 2859 return pvop; 2860 } 2861 PMAP_UNLOCK(); 2862 again: 2863 pg = uvm_pagealloc_strat(NULL, 0, NULL, UVM_PGA_USERESERVE, 2864 UVM_PGA_STRAT_ONLY, VM_FREELIST_FIRST256); 2865 if (__predict_false(pg == NULL)) { 2866 if (flags & PR_WAITOK) { 2867 uvm_wait("plpg"); 2868 goto again; 2869 } else { 2870 return (0); 2871 } 2872 } 2873 KDASSERT(VM_PAGE_TO_PHYS(pg) == (uintptr_t)VM_PAGE_TO_PHYS(pg)); 2874 return (void *)(uintptr_t) VM_PAGE_TO_PHYS(pg); 2875 } 2876 2877 void 2878 pmap_pool_ufree(struct pool *pp, void *va) 2879 { 2880 struct pvo_page *pvop; 2881 #if 0 2882 if (PHYS_TO_VM_PAGE((paddr_t) va) != NULL) { 2883 pmap_pool_mfree(va, size, tag); 2884 return; 2885 } 2886 #endif 2887 PMAP_LOCK(); 2888 pvop = va; 2889 SIMPLEQ_INSERT_HEAD(&pmap_upvop_head, pvop, pvop_link); 2890 pmap_upvop_free++; 2891 if (pmap_upvop_free > pmap_upvop_maxfree) 2892 pmap_upvop_maxfree = pmap_upvop_free; 2893 PMAP_UNLOCK(); 2894 } 2895 2896 void 2897 pmap_pool_mfree(struct pool *pp, void *va) 2898 { 2899 struct pvo_page *pvop; 2900 2901 PMAP_LOCK(); 2902 pvop = va; 2903 SIMPLEQ_INSERT_HEAD(&pmap_mpvop_head, pvop, pvop_link); 2904 pmap_mpvop_free++; 2905 if (pmap_mpvop_free > pmap_mpvop_maxfree) 2906 pmap_mpvop_maxfree = pmap_mpvop_free; 2907 PMAP_UNLOCK(); 2908 #if 0 2909 uvm_pagefree(PHYS_TO_VM_PAGE((paddr_t) va)); 2910 #endif 2911 } 2912 2913 /* 2914 * This routine in bootstraping to steal to-be-managed memory (which will 2915 * then be unmanaged). We use it to grab from the first 256MB for our 2916 * pmap needs and above 256MB for other stuff. 2917 */ 2918 vaddr_t 2919 pmap_steal_memory(vsize_t vsize, vaddr_t *vstartp, vaddr_t *vendp) 2920 { 2921 vsize_t size; 2922 vaddr_t va; 2923 paddr_t start, end, pa = 0; 2924 int npgs, freelist; 2925 uvm_physseg_t bank; 2926 2927 if (uvm.page_init_done == true) 2928 panic("pmap_steal_memory: called _after_ bootstrap"); 2929 2930 *vstartp = VM_MIN_KERNEL_ADDRESS; 2931 *vendp = VM_MAX_KERNEL_ADDRESS; 2932 2933 size = round_page(vsize); 2934 npgs = atop(size); 2935 2936 /* 2937 * PA 0 will never be among those given to UVM so we can use it 2938 * to indicate we couldn't steal any memory. 2939 */ 2940 2941 for (bank = uvm_physseg_get_first(); 2942 uvm_physseg_valid_p(bank); 2943 bank = uvm_physseg_get_next(bank)) { 2944 2945 freelist = uvm_physseg_get_free_list(bank); 2946 start = uvm_physseg_get_start(bank); 2947 end = uvm_physseg_get_end(bank); 2948 2949 if (freelist == VM_FREELIST_FIRST256 && 2950 (end - start) >= npgs) { 2951 pa = ptoa(start); 2952 break; 2953 } 2954 } 2955 2956 if (pa == 0) 2957 panic("pmap_steal_memory: no approriate memory to steal!"); 2958 2959 uvm_physseg_unplug(start, npgs); 2960 2961 va = (vaddr_t) pa; 2962 memset((void *) va, 0, size); 2963 pmap_pages_stolen += npgs; 2964 #ifdef DEBUG 2965 if (pmapdebug && npgs > 1) { 2966 u_int cnt = 0; 2967 for (bank = uvm_physseg_get_first(); 2968 uvm_physseg_valid_p(bank); 2969 bank = uvm_physseg_get_next(bank)) { 2970 cnt += uvm_physseg_get_avail_end(bank) - uvm_physseg_get_avail_start(bank); 2971 } 2972 printf("pmap_steal_memory: stole %u (total %u) pages (%u left)\n", 2973 npgs, pmap_pages_stolen, cnt); 2974 } 2975 #endif 2976 2977 return va; 2978 } 2979 2980 /* 2981 * Find a chuck of memory with right size and alignment. 2982 */ 2983 paddr_t 2984 pmap_boot_find_memory(psize_t size, psize_t alignment, int at_end) 2985 { 2986 struct mem_region *mp; 2987 paddr_t s, e; 2988 int i, j; 2989 2990 size = round_page(size); 2991 2992 DPRINTFN(BOOT, 2993 "pmap_boot_find_memory: size=%#" _PRIxpa ", alignment=%#" _PRIxpa ", at_end=%d", 2994 size, alignment, at_end); 2995 2996 if (alignment < PAGE_SIZE || (alignment & (alignment-1)) != 0) 2997 panic("pmap_boot_find_memory: invalid alignment %#" _PRIxpa, 2998 alignment); 2999 3000 if (at_end) { 3001 if (alignment != PAGE_SIZE) 3002 panic("pmap_boot_find_memory: invalid ending " 3003 "alignment %#" _PRIxpa, alignment); 3004 3005 for (mp = &avail[avail_cnt-1]; mp >= avail; mp--) { 3006 s = mp->start + mp->size - size; 3007 if (s >= mp->start && mp->size >= size) { 3008 DPRINTFN(BOOT, ": %#" _PRIxpa "\n", s); 3009 DPRINTFN(BOOT, 3010 "pmap_boot_find_memory: b-avail[%d] start " 3011 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3012 mp->start, mp->size); 3013 mp->size -= size; 3014 DPRINTFN(BOOT, 3015 "pmap_boot_find_memory: a-avail[%d] start " 3016 "%#" _PRIxpa " size %#" _PRIxpa "\n", mp - avail, 3017 mp->start, mp->size); 3018 return s; 3019 } 3020 } 3021 panic("pmap_boot_find_memory: no available memory"); 3022 } 3023 3024 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3025 s = (mp->start + alignment - 1) & ~(alignment-1); 3026 e = s + size; 3027 3028 /* 3029 * Is the calculated region entirely within the region? 3030 */ 3031 if (s < mp->start || e > mp->start + mp->size) 3032 continue; 3033 3034 DPRINTFN(BOOT, ": %#" _PRIxpa "\n", s); 3035 if (s == mp->start) { 3036 /* 3037 * If the block starts at the beginning of region, 3038 * adjust the size & start. (the region may now be 3039 * zero in length) 3040 */ 3041 DPRINTFN(BOOT, 3042 "pmap_boot_find_memory: b-avail[%d] start " 3043 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3044 mp->start += size; 3045 mp->size -= size; 3046 DPRINTFN(BOOT, 3047 "pmap_boot_find_memory: a-avail[%d] start " 3048 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3049 } else if (e == mp->start + mp->size) { 3050 /* 3051 * If the block starts at the beginning of region, 3052 * adjust only the size. 3053 */ 3054 DPRINTFN(BOOT, 3055 "pmap_boot_find_memory: b-avail[%d] start " 3056 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3057 mp->size -= size; 3058 DPRINTFN(BOOT, 3059 "pmap_boot_find_memory: a-avail[%d] start " 3060 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3061 } else { 3062 /* 3063 * Block is in the middle of the region, so we 3064 * have to split it in two. 3065 */ 3066 for (j = avail_cnt; j > i + 1; j--) { 3067 avail[j] = avail[j-1]; 3068 } 3069 DPRINTFN(BOOT, 3070 "pmap_boot_find_memory: b-avail[%d] start " 3071 "%#" _PRIxpa " size %#" _PRIxpa "\n", i, mp->start, mp->size); 3072 mp[1].start = e; 3073 mp[1].size = mp[0].start + mp[0].size - e; 3074 mp[0].size = s - mp[0].start; 3075 avail_cnt++; 3076 for (; i < avail_cnt; i++) { 3077 DPRINTFN(BOOT, 3078 "pmap_boot_find_memory: a-avail[%d] " 3079 "start %#" _PRIxpa " size %#" _PRIxpa "\n", i, 3080 avail[i].start, avail[i].size); 3081 } 3082 } 3083 KASSERT(s == (uintptr_t) s); 3084 return s; 3085 } 3086 panic("pmap_boot_find_memory: not enough memory for " 3087 "%#" _PRIxpa "/%#" _PRIxpa " allocation?", size, alignment); 3088 } 3089 3090 /* XXXSL: we dont have any BATs to do this, map in Segment 0 1:1 using page tables */ 3091 #if defined (PMAP_OEA64_BRIDGE) 3092 int 3093 pmap_setup_segment0_map(int use_large_pages, ...) 3094 { 3095 vaddr_t va, va_end; 3096 3097 register_t pte_lo = 0x0; 3098 int ptegidx = 0; 3099 struct pte pte; 3100 va_list ap; 3101 3102 /* Coherent + Supervisor RW, no user access */ 3103 pte_lo = PTE_M; 3104 3105 /* XXXSL 3106 * Map in 1st segment 1:1, we'll be careful not to spill kernel entries later, 3107 * these have to take priority. 3108 */ 3109 for (va = 0x0; va < SEGMENT_LENGTH; va += 0x1000) { 3110 ptegidx = va_to_pteg(pmap_kernel(), va); 3111 pmap_pte_create(&pte, pmap_kernel(), va, va | pte_lo); 3112 (void)pmap_pte_insert(ptegidx, &pte); 3113 } 3114 3115 va_start(ap, use_large_pages); 3116 while (1) { 3117 paddr_t pa; 3118 size_t size; 3119 3120 va = va_arg(ap, vaddr_t); 3121 3122 if (va == 0) 3123 break; 3124 3125 pa = va_arg(ap, paddr_t); 3126 size = va_arg(ap, size_t); 3127 3128 for (va_end = va + size; va < va_end; va += 0x1000, pa += 0x1000) { 3129 #if 0 3130 printf("%s: Inserting: va: %#" _PRIxva ", pa: %#" _PRIxpa "\n", __func__, va, pa); 3131 #endif 3132 ptegidx = va_to_pteg(pmap_kernel(), va); 3133 pmap_pte_create(&pte, pmap_kernel(), va, pa | pte_lo); 3134 (void)pmap_pte_insert(ptegidx, &pte); 3135 } 3136 } 3137 va_end(ap); 3138 3139 TLBSYNC(); 3140 SYNC(); 3141 return (0); 3142 } 3143 #endif /* PMAP_OEA64_BRIDGE */ 3144 3145 /* 3146 * This is not part of the defined PMAP interface and is specific to the 3147 * PowerPC architecture. This is called during initppc, before the system 3148 * is really initialized. 3149 */ 3150 void 3151 pmap_bootstrap(paddr_t kernelstart, paddr_t kernelend) 3152 { 3153 struct mem_region *mp, tmp; 3154 paddr_t s, e; 3155 psize_t size; 3156 int i, j; 3157 3158 /* 3159 * Get memory. 3160 */ 3161 mem_regions(&mem, &avail); 3162 #if defined(DEBUG) 3163 if (pmapdebug & PMAPDEBUG_BOOT) { 3164 printf("pmap_bootstrap: memory configuration:\n"); 3165 for (mp = mem; mp->size; mp++) { 3166 printf("pmap_bootstrap: mem start %#" _PRIxpa " size %#" _PRIxpa "\n", 3167 mp->start, mp->size); 3168 } 3169 for (mp = avail; mp->size; mp++) { 3170 printf("pmap_bootstrap: avail start %#" _PRIxpa " size %#" _PRIxpa "\n", 3171 mp->start, mp->size); 3172 } 3173 } 3174 #endif 3175 3176 /* 3177 * Find out how much physical memory we have and in how many chunks. 3178 */ 3179 for (mem_cnt = 0, mp = mem; mp->size; mp++) { 3180 if (mp->start >= pmap_memlimit) 3181 continue; 3182 if (mp->start + mp->size > pmap_memlimit) { 3183 size = pmap_memlimit - mp->start; 3184 physmem += btoc(size); 3185 } else { 3186 physmem += btoc(mp->size); 3187 } 3188 mem_cnt++; 3189 } 3190 3191 /* 3192 * Count the number of available entries. 3193 */ 3194 for (avail_cnt = 0, mp = avail; mp->size; mp++) 3195 avail_cnt++; 3196 3197 /* 3198 * Page align all regions. 3199 */ 3200 kernelstart = trunc_page(kernelstart); 3201 kernelend = round_page(kernelend); 3202 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3203 s = round_page(mp->start); 3204 mp->size -= (s - mp->start); 3205 mp->size = trunc_page(mp->size); 3206 mp->start = s; 3207 e = mp->start + mp->size; 3208 3209 DPRINTFN(BOOT, 3210 "pmap_bootstrap: b-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3211 i, mp->start, mp->size); 3212 3213 /* 3214 * Don't allow the end to run beyond our artificial limit 3215 */ 3216 if (e > pmap_memlimit) 3217 e = pmap_memlimit; 3218 3219 /* 3220 * Is this region empty or strange? skip it. 3221 */ 3222 if (e <= s) { 3223 mp->start = 0; 3224 mp->size = 0; 3225 continue; 3226 } 3227 3228 /* 3229 * Does this overlap the beginning of kernel? 3230 * Does extend past the end of the kernel? 3231 */ 3232 else if (s < kernelstart && e > kernelstart) { 3233 if (e > kernelend) { 3234 avail[avail_cnt].start = kernelend; 3235 avail[avail_cnt].size = e - kernelend; 3236 avail_cnt++; 3237 } 3238 mp->size = kernelstart - s; 3239 } 3240 /* 3241 * Check whether this region overlaps the end of the kernel. 3242 */ 3243 else if (s < kernelend && e > kernelend) { 3244 mp->start = kernelend; 3245 mp->size = e - kernelend; 3246 } 3247 /* 3248 * Look whether this regions is completely inside the kernel. 3249 * Nuke it if it does. 3250 */ 3251 else if (s >= kernelstart && e <= kernelend) { 3252 mp->start = 0; 3253 mp->size = 0; 3254 } 3255 /* 3256 * If the user imposed a memory limit, enforce it. 3257 */ 3258 else if (s >= pmap_memlimit) { 3259 mp->start = -PAGE_SIZE; /* let's know why */ 3260 mp->size = 0; 3261 } 3262 else { 3263 mp->start = s; 3264 mp->size = e - s; 3265 } 3266 DPRINTFN(BOOT, 3267 "pmap_bootstrap: a-avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3268 i, mp->start, mp->size); 3269 } 3270 3271 /* 3272 * Move (and uncount) all the null return to the end. 3273 */ 3274 for (mp = avail, i = 0; i < avail_cnt; i++, mp++) { 3275 if (mp->size == 0) { 3276 tmp = avail[i]; 3277 avail[i] = avail[--avail_cnt]; 3278 avail[avail_cnt] = avail[i]; 3279 } 3280 } 3281 3282 /* 3283 * (Bubble)sort them into ascending order. 3284 */ 3285 for (i = 0; i < avail_cnt; i++) { 3286 for (j = i + 1; j < avail_cnt; j++) { 3287 if (avail[i].start > avail[j].start) { 3288 tmp = avail[i]; 3289 avail[i] = avail[j]; 3290 avail[j] = tmp; 3291 } 3292 } 3293 } 3294 3295 /* 3296 * Make sure they don't overlap. 3297 */ 3298 for (mp = avail, i = 0; i < avail_cnt - 1; i++, mp++) { 3299 if (mp[0].start + mp[0].size > mp[1].start) { 3300 mp[0].size = mp[1].start - mp[0].start; 3301 } 3302 DPRINTFN(BOOT, 3303 "pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3304 i, mp->start, mp->size); 3305 } 3306 DPRINTFN(BOOT, 3307 "pmap_bootstrap: avail[%d] start %#" _PRIxpa " size %#" _PRIxpa "\n", 3308 i, mp->start, mp->size); 3309 3310 #ifdef PTEGCOUNT 3311 pmap_pteg_cnt = PTEGCOUNT; 3312 #else /* PTEGCOUNT */ 3313 3314 pmap_pteg_cnt = 0x1000; 3315 3316 while (pmap_pteg_cnt < physmem) 3317 pmap_pteg_cnt <<= 1; 3318 3319 pmap_pteg_cnt >>= 1; 3320 #endif /* PTEGCOUNT */ 3321 3322 #ifdef DEBUG 3323 DPRINTFN(BOOT, "pmap_pteg_cnt: 0x%x\n", pmap_pteg_cnt); 3324 #endif 3325 3326 /* 3327 * Find suitably aligned memory for PTEG hash table. 3328 */ 3329 size = pmap_pteg_cnt * sizeof(struct pteg); 3330 pmap_pteg_table = (void *)(uintptr_t) pmap_boot_find_memory(size, size, 0); 3331 3332 #ifdef DEBUG 3333 DPRINTFN(BOOT, 3334 "PTEG cnt: 0x%x HTAB size: 0x%08x bytes, address: %p\n", pmap_pteg_cnt, (unsigned int)size, pmap_pteg_table); 3335 #endif 3336 3337 3338 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3339 if ( (uintptr_t) pmap_pteg_table + size > SEGMENT_LENGTH) 3340 panic("pmap_bootstrap: pmap_pteg_table end (%p + %#" _PRIxpa ") > 256MB", 3341 pmap_pteg_table, size); 3342 #endif 3343 3344 memset(__UNVOLATILE(pmap_pteg_table), 0, 3345 pmap_pteg_cnt * sizeof(struct pteg)); 3346 pmap_pteg_mask = pmap_pteg_cnt - 1; 3347 3348 /* 3349 * We cannot do pmap_steal_memory here since UVM hasn't been loaded 3350 * with pages. So we just steal them before giving them to UVM. 3351 */ 3352 size = sizeof(pmap_pvo_table[0]) * pmap_pteg_cnt; 3353 pmap_pvo_table = (void *)(uintptr_t) pmap_boot_find_memory(size, PAGE_SIZE, 0); 3354 #if defined(DIAGNOSTIC) || defined(DEBUG) || defined(PMAPCHECK) 3355 if ( (uintptr_t) pmap_pvo_table + size > SEGMENT_LENGTH) 3356 panic("pmap_bootstrap: pmap_pvo_table end (%p + %#" _PRIxpa ") > 256MB", 3357 pmap_pvo_table, size); 3358 #endif 3359 3360 for (i = 0; i < pmap_pteg_cnt; i++) 3361 TAILQ_INIT(&pmap_pvo_table[i]); 3362 3363 #ifndef MSGBUFADDR 3364 /* 3365 * Allocate msgbuf in high memory. 3366 */ 3367 msgbuf_paddr = pmap_boot_find_memory(MSGBUFSIZE, PAGE_SIZE, 1); 3368 #endif 3369 3370 for (mp = avail, i = 0; i < avail_cnt; mp++, i++) { 3371 paddr_t pfstart = atop(mp->start); 3372 paddr_t pfend = atop(mp->start + mp->size); 3373 if (mp->size == 0) 3374 continue; 3375 if (mp->start + mp->size <= SEGMENT_LENGTH) { 3376 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3377 VM_FREELIST_FIRST256); 3378 } else if (mp->start >= SEGMENT_LENGTH) { 3379 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3380 VM_FREELIST_DEFAULT); 3381 } else { 3382 pfend = atop(SEGMENT_LENGTH); 3383 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3384 VM_FREELIST_FIRST256); 3385 pfstart = atop(SEGMENT_LENGTH); 3386 pfend = atop(mp->start + mp->size); 3387 uvm_page_physload(pfstart, pfend, pfstart, pfend, 3388 VM_FREELIST_DEFAULT); 3389 } 3390 } 3391 3392 /* 3393 * Make sure kernel vsid is allocated as well as VSID 0. 3394 */ 3395 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3396 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 3397 pmap_vsid_bitmap[(PHYSMAP_VSIDBITS & (NPMAPS-1)) / VSID_NBPW] 3398 |= 1 << (PHYSMAP_VSIDBITS % VSID_NBPW); 3399 pmap_vsid_bitmap[0] |= 1; 3400 3401 /* 3402 * Initialize kernel pmap and hardware. 3403 */ 3404 3405 /* PMAP_OEA64_BRIDGE does support these instructions */ 3406 #if defined (PMAP_OEA) || defined (PMAP_OEA64_BRIDGE) 3407 for (i = 0; i < 16; i++) { 3408 #if defined(PPC_OEA601) 3409 /* XXX wedges for segment register 0xf , so set later */ 3410 if ((iosrtable[i] & SR601_T) && ((MFPVR() >> 16) == MPC601)) 3411 continue; 3412 #endif 3413 pmap_kernel()->pm_sr[i] = KERNELN_SEGMENT(i)|SR_PRKEY; 3414 __asm volatile ("mtsrin %0,%1" 3415 :: "r"(KERNELN_SEGMENT(i)|SR_PRKEY), "r"(i << ADDR_SR_SHFT)); 3416 } 3417 3418 pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY; 3419 __asm volatile ("mtsr %0,%1" 3420 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 3421 #ifdef KERNEL2_SR 3422 pmap_kernel()->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT|SR_SUKEY|SR_PRKEY; 3423 __asm volatile ("mtsr %0,%1" 3424 :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 3425 #endif 3426 #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ 3427 #if defined (PMAP_OEA) 3428 for (i = 0; i < 16; i++) { 3429 if (iosrtable[i] & SR601_T) { 3430 pmap_kernel()->pm_sr[i] = iosrtable[i]; 3431 __asm volatile ("mtsrin %0,%1" 3432 :: "r"(iosrtable[i]), "r"(i << ADDR_SR_SHFT)); 3433 } 3434 } 3435 __asm volatile ("sync; mtsdr1 %0; isync" 3436 :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); 3437 #elif defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE) 3438 __asm __volatile ("sync; mtsdr1 %0; isync" 3439 :: "r"((uintptr_t)pmap_pteg_table | (32 - __builtin_clz(pmap_pteg_mask >> 11)))); 3440 #endif 3441 tlbia(); 3442 3443 #ifdef ALTIVEC 3444 pmap_use_altivec = cpu_altivec; 3445 #endif 3446 3447 #ifdef DEBUG 3448 if (pmapdebug & PMAPDEBUG_BOOT) { 3449 u_int cnt; 3450 uvm_physseg_t bank; 3451 char pbuf[9]; 3452 for (cnt = 0, bank = uvm_physseg_get_first(); 3453 uvm_physseg_valid_p(bank); 3454 bank = uvm_physseg_get_next(bank)) { 3455 cnt += uvm_physseg_get_avail_end(bank) - 3456 uvm_physseg_get_avail_start(bank); 3457 printf("pmap_bootstrap: vm_physmem[%d]=%#" _PRIxpa "-%#" _PRIxpa "/%#" _PRIxpa "\n", 3458 bank, 3459 ptoa(uvm_physseg_get_avail_start(bank)), 3460 ptoa(uvm_physseg_get_avail_end(bank)), 3461 ptoa(uvm_physseg_get_avail_end(bank) - uvm_physseg_get_avail_start(bank))); 3462 } 3463 format_bytes(pbuf, sizeof(pbuf), ptoa((u_int64_t) cnt)); 3464 printf("pmap_bootstrap: UVM memory = %s (%u pages)\n", 3465 pbuf, cnt); 3466 } 3467 #endif 3468 3469 pool_init(&pmap_upvo_pool, sizeof(struct pvo_entry), 3470 sizeof(struct pvo_entry), 0, 0, "pmap_upvopl", 3471 &pmap_pool_uallocator, IPL_VM); 3472 3473 pool_setlowat(&pmap_upvo_pool, 252); 3474 3475 pool_init(&pmap_pool, sizeof(struct pmap), 3476 sizeof(void *), 0, 0, "pmap_pl", &pmap_pool_uallocator, 3477 IPL_NONE); 3478 3479 #if defined(PMAP_NEED_MAPKERNEL) 3480 { 3481 struct pmap *pm = pmap_kernel(); 3482 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3483 extern int etext[], kernel_text[]; 3484 vaddr_t va, va_etext = (paddr_t) etext; 3485 #endif 3486 paddr_t pa, pa_end; 3487 register_t sr; 3488 struct pte pt; 3489 unsigned int ptegidx; 3490 int bank; 3491 3492 sr = PHYSMAPN_SEGMENT(0) | SR_SUKEY|SR_PRKEY; 3493 pm->pm_sr[0] = sr; 3494 3495 for (bank = 0; bank < vm_nphysseg; bank++) { 3496 pa_end = ptoa(VM_PHYSMEM_PTR(bank)->avail_end); 3497 pa = ptoa(VM_PHYSMEM_PTR(bank)->avail_start); 3498 for (; pa < pa_end; pa += PAGE_SIZE) { 3499 ptegidx = va_to_pteg(pm, pa); 3500 pmap_pte_create(&pt, pm, pa, pa | PTE_M|PTE_BW); 3501 pmap_pte_insert(ptegidx, &pt); 3502 } 3503 } 3504 3505 #if defined(PMAP_NEED_FULL_MAPKERNEL) 3506 va = (vaddr_t) kernel_text; 3507 3508 for (pa = kernelstart; va < va_etext; 3509 pa += PAGE_SIZE, va += PAGE_SIZE) { 3510 ptegidx = va_to_pteg(pm, va); 3511 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3512 pmap_pte_insert(ptegidx, &pt); 3513 } 3514 3515 for (; pa < kernelend; 3516 pa += PAGE_SIZE, va += PAGE_SIZE) { 3517 ptegidx = va_to_pteg(pm, va); 3518 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3519 pmap_pte_insert(ptegidx, &pt); 3520 } 3521 3522 for (va = 0, pa = 0; va < kernelstart; 3523 pa += PAGE_SIZE, va += PAGE_SIZE) { 3524 ptegidx = va_to_pteg(pm, va); 3525 if (va < 0x3000) 3526 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BR); 3527 else 3528 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3529 pmap_pte_insert(ptegidx, &pt); 3530 } 3531 for (va = kernelend, pa = kernelend; va < SEGMENT_LENGTH; 3532 pa += PAGE_SIZE, va += PAGE_SIZE) { 3533 ptegidx = va_to_pteg(pm, va); 3534 pmap_pte_create(&pt, pm, va, pa | PTE_M|PTE_BW); 3535 pmap_pte_insert(ptegidx, &pt); 3536 } 3537 #endif 3538 3539 __asm volatile ("mtsrin %0,%1" 3540 :: "r"(sr), "r"(kernelstart)); 3541 } 3542 #endif 3543 3544 #if defined(PMAPDEBUG) 3545 if ( pmapdebug ) 3546 pmap_print_mmuregs(); 3547 #endif 3548 } 3549
Indexes created Sun Sep 28 07:09:56 GMT 2025