pic_openpic.c revision 1.14
1 /* $NetBSD: pic_openpic.c,v 1.14 2018/05/16 21:54:38 macallan Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: pic_openpic.c,v 1.14 2018/05/16 21:54:38 macallan Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/kmem.h> 34 #include <sys/kernel.h> 35 36 #include <uvm/uvm_extern.h> 37 38 #include <machine/pio.h> 39 #include <powerpc/openpic.h> 40 41 #include <powerpc/pic/picvar.h> 42 43 #include "opt_interrupt.h" 44 45 static void opic_enable_irq(struct pic_ops *, int, int); 46 static void opic_disable_irq(struct pic_ops *, int); 47 static void opic_establish_irq(struct pic_ops*, int, int, int); 48 49 struct pic_ops * 50 setup_openpic(void *addr, int passthrough) 51 { 52 struct openpic_ops *opicops; 53 struct pic_ops *pic; 54 int irq; 55 u_int x; 56 57 openpic_base = addr; 58 opicops = kmem_alloc(sizeof(*opicops), KM_SLEEP); 59 pic = &opicops->pic; 60 61 x = openpic_read(OPENPIC_FEATURE); 62 if (((x & 0x07ff0000) >> 16) == 0) 63 panic("setup_openpic() called on distributed openpic"); 64 65 aprint_normal("OpenPIC Version 1.%d: " 66 "Supports %d CPUs and %d interrupt sources.\n", 67 x & 0xff, ((x & 0x1f00) >> 8) + 1, ((x & 0x07ff0000) >> 16) + 1); 68 69 pic->pic_numintrs = IPI_VECTOR + 1; 70 pic->pic_cookie = addr; 71 pic->pic_enable_irq = opic_enable_irq; 72 pic->pic_reenable_irq = opic_enable_irq; 73 pic->pic_disable_irq = opic_disable_irq; 74 pic->pic_get_irq = opic_get_irq; 75 pic->pic_ack_irq = opic_ack_irq; 76 pic->pic_establish_irq = opic_establish_irq; 77 pic->pic_finish_setup = opic_finish_setup; 78 opicops->isu = NULL; 79 opicops->nrofisus = 0; /* internal only */ 80 opicops->flags = 0; /* no flags (yet) */ 81 opicops->irq_per = NULL; /* internal ISU only */ 82 strcpy(pic->pic_name, "openpic"); 83 pic_add(pic); 84 85 /* 86 * the following sequence should make the same effects as openpic 87 * controller reset by writing a one at the self-clearing 88 * OPENPIC_CONFIG_RESET bit. Please check the document of your 89 * OpenPIC compliant interrupt controller and see whether #else 90 * portion can work as described. 91 */ 92 #if 1 93 openpic_set_priority(0, 15); 94 95 for (irq = 0; irq < (pic->pic_numintrs - 1); irq++) { 96 /* make sure to keep disabled */ 97 openpic_write(OPENPIC_SRC_VECTOR(irq), OPENPIC_IMASK); 98 /* send all interrupts to CPU 0 */ 99 openpic_write(OPENPIC_IDEST(irq), 1 << 0); 100 } 101 102 x = openpic_read(OPENPIC_CONFIG); 103 if (passthrough) 104 x &= ~OPENPIC_CONFIG_8259_PASSTHRU_DISABLE; 105 else 106 x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE; 107 openpic_write(OPENPIC_CONFIG, x); 108 109 openpic_write(OPENPIC_SPURIOUS_VECTOR, 0xff); 110 111 openpic_set_priority(0, 0); 112 113 /* clear all pending interrunts */ 114 for (irq = 0; irq < pic->pic_numintrs; irq++) { 115 openpic_read_irq(0); 116 openpic_eoi(0); 117 } 118 #else 119 irq = 0; 120 openpic_write(OPENPIC_CONFIG, OPENPIC_CONFIG_RESET); 121 do { 122 x = openpic_read(OPENPIC_CONFIG); 123 } while (x & OPENPIC_CONFIG_RESET); /* S1C bit */ 124 if (passthrough) 125 x &= ~OPENPIC_CONFIG_8259_PASSTHRU_DISABLE; 126 else 127 x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE; 128 openpic_write(OPENPIC_CONFIG, x); 129 openpic_set_priority(0, 0); 130 #endif 131 132 #if 0 133 printf("timebase freq=%d\n", openpic_read(0x10f0)); 134 #endif 135 return pic; 136 } 137 138 static void 139 opic_establish_irq(struct pic_ops *pic, int irq, int type, int pri) 140 { 141 int realpri = max(1, min(15, pri)); 142 uint32_t x; 143 144 x = irq; 145 x |= OPENPIC_IMASK; 146 147 if (type == IST_EDGE_RISING || type == IST_LEVEL_HIGH) 148 x |= OPENPIC_POLARITY_POSITIVE; 149 else 150 x |= OPENPIC_POLARITY_NEGATIVE; 151 152 if (type == IST_EDGE_FALLING || type == IST_EDGE_RISING) 153 x |= OPENPIC_SENSE_EDGE; 154 else 155 x |= OPENPIC_SENSE_LEVEL; 156 157 x |= realpri << OPENPIC_PRIORITY_SHIFT; 158 #ifdef MULTIPROCESSOR 159 if (irq < IPI_VECTOR) 160 #endif 161 openpic_write(OPENPIC_SRC_VECTOR(irq), x); 162 163 aprint_debug("%s: setting IRQ %d to priority %d\n", __func__, irq, 164 realpri); 165 } 166 167 static void 168 opic_enable_irq(struct pic_ops *pic, int irq, int type) 169 { 170 u_int x; 171 #ifdef MULTIPROCESSOR 172 if (irq == IPI_VECTOR) return; 173 #endif 174 x = openpic_read(OPENPIC_SRC_VECTOR(irq)); 175 x &= ~OPENPIC_IMASK; 176 openpic_write(OPENPIC_SRC_VECTOR(irq), x); 177 } 178 179 static void 180 opic_disable_irq(struct pic_ops *pic, int irq) 181 { 182 u_int x; 183 184 #ifdef MULTIPROCESSOR 185 if (irq == IPI_VECTOR) return; 186 #endif 187 x = openpic_read(OPENPIC_SRC_VECTOR(irq)); 188 x |= OPENPIC_IMASK; 189 openpic_write(OPENPIC_SRC_VECTOR(irq), x); 190 } 191
Indexes created Mon Sep 29 03:10:08 GMT 2025