pci_machdep.c revision 1.3 1 1.3 cgd /* $NetBSD: pci_machdep.c,v 1.3 2000/06/04 19:15:00 cgd Exp $ */
2 1.1 nonaka
3 1.1 nonaka /*
4 1.1 nonaka * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 1.1 nonaka * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 1.1 nonaka *
7 1.1 nonaka * Redistribution and use in source and binary forms, with or without
8 1.1 nonaka * modification, are permitted provided that the following conditions
9 1.1 nonaka * are met:
10 1.1 nonaka * 1. Redistributions of source code must retain the above copyright
11 1.1 nonaka * notice, this list of conditions and the following disclaimer.
12 1.1 nonaka * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 nonaka * notice, this list of conditions and the following disclaimer in the
14 1.1 nonaka * documentation and/or other materials provided with the distribution.
15 1.1 nonaka * 3. All advertising materials mentioning features or use of this software
16 1.1 nonaka * must display the following acknowledgement:
17 1.1 nonaka * This product includes software developed by Charles M. Hannum.
18 1.1 nonaka * 4. The name of the author may not be used to endorse or promote products
19 1.1 nonaka * derived from this software without specific prior written permission.
20 1.1 nonaka *
21 1.1 nonaka * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 nonaka * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 nonaka * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 nonaka * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 nonaka * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 nonaka * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 nonaka * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 nonaka * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 nonaka * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 nonaka * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 nonaka */
32 1.1 nonaka
33 1.1 nonaka /*
34 1.1 nonaka * Machine-specific functions for PCI autoconfiguration.
35 1.1 nonaka *
36 1.1 nonaka * On PCs, there are two methods of generating PCI configuration cycles.
37 1.1 nonaka * We try to detect the appropriate mechanism for this machine and set
38 1.1 nonaka * up a few function pointers to access the correct method directly.
39 1.1 nonaka */
40 1.1 nonaka
41 1.1 nonaka #include <sys/types.h>
42 1.1 nonaka #include <sys/param.h>
43 1.1 nonaka #include <sys/time.h>
44 1.1 nonaka #include <sys/systm.h>
45 1.1 nonaka #include <sys/errno.h>
46 1.1 nonaka #include <sys/device.h>
47 1.1 nonaka
48 1.1 nonaka #include <vm/vm.h>
49 1.1 nonaka #include <vm/vm_kern.h>
50 1.1 nonaka
51 1.1 nonaka #define _PREP_BUS_DMA_PRIVATE
52 1.1 nonaka #include <machine/bus.h>
53 1.1 nonaka #include <machine/pio.h>
54 1.1 nonaka #include <machine/intr.h>
55 1.1 nonaka
56 1.1 nonaka #include <dev/isa/isavar.h>
57 1.1 nonaka #include <dev/pci/pcivar.h>
58 1.1 nonaka #include <dev/pci/pcireg.h>
59 1.1 nonaka #include <dev/pci/pcidevs.h>
60 1.1 nonaka
61 1.1 nonaka #define PCI_MODE1_ENABLE 0x80000000UL
62 1.2 nonaka #define PCI_MODE1_ADDRESS_REG (PREP_BUS_SPACE_IO + 0xcf8)
63 1.2 nonaka #define PCI_MODE1_DATA_REG (PREP_BUS_SPACE_IO + 0xcfc)
64 1.1 nonaka
65 1.1 nonaka /*
66 1.1 nonaka * PCI constants.
67 1.1 nonaka * XXX These should be in a common file!
68 1.1 nonaka */
69 1.1 nonaka #define PCI_CBIO 0x10
70 1.1 nonaka
71 1.1 nonaka /*
72 1.1 nonaka * PCI doesn't have any special needs; just use the generic versions
73 1.1 nonaka * of these functions.
74 1.1 nonaka */
75 1.1 nonaka struct prep_bus_dma_tag pci_bus_dma_tag = {
76 1.1 nonaka 0, /* _bounce_thresh */
77 1.1 nonaka _bus_dmamap_create,
78 1.1 nonaka _bus_dmamap_destroy,
79 1.1 nonaka _bus_dmamap_load,
80 1.1 nonaka _bus_dmamap_load_mbuf,
81 1.1 nonaka _bus_dmamap_load_uio,
82 1.1 nonaka _bus_dmamap_load_raw,
83 1.1 nonaka _bus_dmamap_unload,
84 1.1 nonaka NULL, /* _dmamap_sync */
85 1.1 nonaka _bus_dmamem_alloc,
86 1.1 nonaka _bus_dmamem_free,
87 1.1 nonaka _bus_dmamem_map,
88 1.1 nonaka _bus_dmamem_unmap,
89 1.1 nonaka _bus_dmamem_mmap,
90 1.1 nonaka };
91 1.1 nonaka
92 1.1 nonaka void
93 1.1 nonaka pci_attach_hook(parent, self, pba)
94 1.1 nonaka struct device *parent, *self;
95 1.1 nonaka struct pcibus_attach_args *pba;
96 1.1 nonaka {
97 1.1 nonaka pci_chipset_tag_t pc;
98 1.1 nonaka int bus, device, maxndevs, function, nfunctions;
99 1.1 nonaka
100 1.1 nonaka pc = pba->pba_pc;
101 1.1 nonaka bus = pba->pba_bus;
102 1.1 nonaka
103 1.1 nonaka maxndevs = pci_bus_maxdevs(pba->pba_pc, pba->pba_bus);
104 1.1 nonaka
105 1.1 nonaka for (device = 0; device < maxndevs; device++) {
106 1.1 nonaka pcitag_t tag;
107 1.1 nonaka pcireg_t id, intr, bhlcr, csr, address;
108 1.1 nonaka int line;
109 1.1 nonaka
110 1.1 nonaka tag = pci_make_tag(pc, bus, device, 0);
111 1.1 nonaka id = pci_conf_read(pc, tag, PCI_ID_REG);
112 1.1 nonaka
113 1.1 nonaka /* Invalid vendor ID value? */
114 1.1 nonaka if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
115 1.1 nonaka continue;
116 1.1 nonaka /* XXX Not invalid, but we've done this ~forever. */
117 1.1 nonaka if (PCI_VENDOR(id) == 0)
118 1.1 nonaka continue;
119 1.1 nonaka
120 1.1 nonaka bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
121 1.1 nonaka if (PCI_HDRTYPE_MULTIFN(bhlcr))
122 1.1 nonaka nfunctions = 8;
123 1.1 nonaka else
124 1.1 nonaka nfunctions = 1;
125 1.1 nonaka
126 1.1 nonaka for (function = 0; function < nfunctions; function++) {
127 1.2 nonaka int i;
128 1.1 nonaka
129 1.1 nonaka tag = pci_make_tag(pc, bus, device, function);
130 1.1 nonaka id = pci_conf_read(pc, tag, PCI_ID_REG);
131 1.1 nonaka
132 1.1 nonaka /* Invalid vendor ID value? */
133 1.1 nonaka if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
134 1.1 nonaka continue;
135 1.1 nonaka /* XXX Not invalid, but we've done this ~forever. */
136 1.1 nonaka if (PCI_VENDOR(id) == 0)
137 1.1 nonaka continue;
138 1.1 nonaka
139 1.1 nonaka /* Enable io/mem */
140 1.1 nonaka /* XXX: ibm_machdep : ppc830 depend */
141 1.1 nonaka switch (device) {
142 1.1 nonaka case 12:
143 1.1 nonaka case 18:
144 1.1 nonaka case 22:
145 1.2 nonaka csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
146 1.2 nonaka csr |= (PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
147 1.2 nonaka pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
148 1.2 nonaka break;
149 1.1 nonaka }
150 1.1 nonaka
151 1.2 nonaka /* Fixup insane address */
152 1.2 nonaka for (i = 0; i < 6; i ++) {
153 1.2 nonaka address = pci_conf_read(pc, tag, PCI_CBIO + i * 4);
154 1.2 nonaka if (address > 0x10000000) {
155 1.2 nonaka address &= 0x00ffffff;
156 1.2 nonaka address |= 0x01000000;
157 1.2 nonaka pci_conf_write(pc, tag, PCI_CBIO + i * 4, address);
158 1.2 nonaka }
159 1.1 nonaka }
160 1.1 nonaka
161 1.1 nonaka /* Fixup intr */
162 1.1 nonaka /* XXX: ibm_machdep : ppc830 depend */
163 1.1 nonaka switch (device) {
164 1.1 nonaka case 12:
165 1.1 nonaka case 18:
166 1.1 nonaka case 22:
167 1.1 nonaka line = 15;
168 1.1 nonaka break;
169 1.1 nonaka default:
170 1.1 nonaka line = 0;
171 1.1 nonaka break;
172 1.1 nonaka }
173 1.1 nonaka
174 1.1 nonaka if (line) {
175 1.2 nonaka intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
176 1.2 nonaka pci_conf_write(pc, tag, PCI_INTERRUPT_REG,
177 1.2 nonaka (intr & ~0xff) | line);
178 1.1 nonaka }
179 1.1 nonaka }
180 1.1 nonaka }
181 1.1 nonaka }
182 1.1 nonaka
183 1.1 nonaka int
184 1.1 nonaka pci_bus_maxdevs(pc, busno)
185 1.1 nonaka pci_chipset_tag_t pc;
186 1.1 nonaka int busno;
187 1.1 nonaka {
188 1.1 nonaka
189 1.1 nonaka /*
190 1.1 nonaka * Bus number is irrelevant. Configuration Mechanism 1 is in
191 1.1 nonaka * use, can have devices 0-32 (i.e. the `normal' range).
192 1.1 nonaka */
193 1.1 nonaka return (32);
194 1.1 nonaka }
195 1.1 nonaka
196 1.1 nonaka pcitag_t
197 1.1 nonaka pci_make_tag(pc, bus, device, function)
198 1.1 nonaka pci_chipset_tag_t pc;
199 1.1 nonaka int bus, device, function;
200 1.1 nonaka {
201 1.1 nonaka pcitag_t tag;
202 1.1 nonaka
203 1.1 nonaka if (bus >= 256 || device >= 32 || function >= 8)
204 1.1 nonaka panic("pci_make_tag: bad request");
205 1.1 nonaka
206 1.1 nonaka tag = PCI_MODE1_ENABLE |
207 1.1 nonaka (bus << 16) | (device << 11) | (function << 8);
208 1.1 nonaka return tag;
209 1.1 nonaka }
210 1.1 nonaka
211 1.1 nonaka void
212 1.1 nonaka pci_decompose_tag(pc, tag, bp, dp, fp)
213 1.1 nonaka pci_chipset_tag_t pc;
214 1.1 nonaka pcitag_t tag;
215 1.1 nonaka int *bp, *dp, *fp;
216 1.1 nonaka {
217 1.1 nonaka
218 1.1 nonaka if (bp != NULL)
219 1.1 nonaka *bp = (tag >> 16) & 0xff;
220 1.1 nonaka if (dp != NULL)
221 1.1 nonaka *dp = (tag >> 11) & 0x1f;
222 1.1 nonaka if (fp != NULL)
223 1.1 nonaka *fp = (tag >> 8) & 0x7;
224 1.1 nonaka return;
225 1.1 nonaka }
226 1.1 nonaka
227 1.1 nonaka pcireg_t
228 1.1 nonaka pci_conf_read(pc, tag, reg)
229 1.1 nonaka pci_chipset_tag_t pc;
230 1.1 nonaka pcitag_t tag;
231 1.1 nonaka int reg;
232 1.1 nonaka {
233 1.1 nonaka pcireg_t data;
234 1.1 nonaka
235 1.1 nonaka out32rb(PCI_MODE1_ADDRESS_REG, tag | reg);
236 1.1 nonaka data = in32rb(PCI_MODE1_DATA_REG);
237 1.1 nonaka out32rb(PCI_MODE1_ADDRESS_REG, 0);
238 1.1 nonaka return data;
239 1.1 nonaka }
240 1.1 nonaka
241 1.1 nonaka void
242 1.1 nonaka pci_conf_write(pc, tag, reg, data)
243 1.1 nonaka pci_chipset_tag_t pc;
244 1.1 nonaka pcitag_t tag;
245 1.1 nonaka int reg;
246 1.1 nonaka pcireg_t data;
247 1.1 nonaka {
248 1.1 nonaka
249 1.1 nonaka out32rb(PCI_MODE1_ADDRESS_REG, tag | reg);
250 1.1 nonaka out32rb(PCI_MODE1_DATA_REG, data);
251 1.1 nonaka out32rb(PCI_MODE1_ADDRESS_REG, 0);
252 1.1 nonaka }
253 1.1 nonaka
254 1.1 nonaka int
255 1.1 nonaka pci_intr_map(pc, intrtag, pin, line, ihp)
256 1.1 nonaka pci_chipset_tag_t pc;
257 1.1 nonaka pcitag_t intrtag;
258 1.1 nonaka int pin, line;
259 1.1 nonaka pci_intr_handle_t *ihp;
260 1.1 nonaka {
261 1.1 nonaka
262 1.1 nonaka if (pin == 0) {
263 1.1 nonaka /* No IRQ used. */
264 1.1 nonaka goto bad;
265 1.1 nonaka }
266 1.1 nonaka
267 1.1 nonaka if (pin > 4) {
268 1.1 nonaka printf("pci_intr_map: bad interrupt pin %d\n", pin);
269 1.1 nonaka goto bad;
270 1.1 nonaka }
271 1.1 nonaka
272 1.1 nonaka /*
273 1.1 nonaka * Section 6.2.4, `Miscellaneous Functions', says that 255 means
274 1.1 nonaka * `unknown' or `no connection' on a PC. We assume that a device with
275 1.1 nonaka * `no connection' either doesn't have an interrupt (in which case the
276 1.1 nonaka * pin number should be 0, and would have been noticed above), or
277 1.1 nonaka * wasn't configured by the BIOS (in which case we punt, since there's
278 1.1 nonaka * no real way we can know how the interrupt lines are mapped in the
279 1.1 nonaka * hardware).
280 1.1 nonaka *
281 1.1 nonaka * XXX
282 1.1 nonaka * Since IRQ 0 is only used by the clock, and we can't actually be sure
283 1.1 nonaka * that the BIOS did its job, we also recognize that as meaning that
284 1.1 nonaka * the BIOS has not configured the device.
285 1.1 nonaka */
286 1.1 nonaka if (line == 0 || line == 255) {
287 1.1 nonaka printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
288 1.1 nonaka goto bad;
289 1.1 nonaka } else {
290 1.1 nonaka if (line >= ICU_LEN) {
291 1.1 nonaka printf("pci_intr_map: bad interrupt line %d\n", line);
292 1.1 nonaka goto bad;
293 1.1 nonaka }
294 1.1 nonaka if (line == IRQ_SLAVE) {
295 1.1 nonaka printf("pci_intr_map: changed line 2 to line 9\n");
296 1.1 nonaka line = 9;
297 1.1 nonaka }
298 1.1 nonaka }
299 1.1 nonaka
300 1.1 nonaka *ihp = line;
301 1.1 nonaka return 0;
302 1.1 nonaka
303 1.1 nonaka bad:
304 1.1 nonaka *ihp = -1;
305 1.1 nonaka return 1;
306 1.1 nonaka }
307 1.1 nonaka
308 1.1 nonaka const char *
309 1.1 nonaka pci_intr_string(pc, ih)
310 1.1 nonaka pci_chipset_tag_t pc;
311 1.1 nonaka pci_intr_handle_t ih;
312 1.1 nonaka {
313 1.1 nonaka static char irqstr[8]; /* 4 + 2 + NULL + sanity */
314 1.1 nonaka
315 1.1 nonaka if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE)
316 1.1 nonaka panic("pci_intr_string: bogus handle 0x%x\n", ih);
317 1.1 nonaka
318 1.1 nonaka sprintf(irqstr, "irq %d", ih);
319 1.1 nonaka return (irqstr);
320 1.1 nonaka
321 1.3 cgd }
322 1.3 cgd
323 1.3 cgd const struct evcnt *
324 1.3 cgd pci_intr_evcnt(pc, ih)
325 1.3 cgd pci_chipset_tag_t pc;
326 1.3 cgd pci_intr_handle_t ih;
327 1.3 cgd {
328 1.3 cgd
329 1.3 cgd /* XXX for now, no evcnt parent reported */
330 1.3 cgd return NULL;
331 1.1 nonaka }
332 1.1 nonaka
333 1.1 nonaka void *
334 1.1 nonaka pci_intr_establish(pc, ih, level, func, arg)
335 1.1 nonaka pci_chipset_tag_t pc;
336 1.1 nonaka pci_intr_handle_t ih;
337 1.1 nonaka int level, (*func) __P((void *));
338 1.1 nonaka void *arg;
339 1.1 nonaka {
340 1.1 nonaka
341 1.1 nonaka if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE)
342 1.1 nonaka panic("pci_intr_establish: bogus handle 0x%x\n", ih);
343 1.1 nonaka
344 1.1 nonaka return isa_intr_establish(NULL, ih, IST_LEVEL, level, func, arg);
345 1.1 nonaka }
346 1.1 nonaka
347 1.1 nonaka void
348 1.1 nonaka pci_intr_disestablish(pc, cookie)
349 1.1 nonaka pci_chipset_tag_t pc;
350 1.1 nonaka void *cookie;
351 1.1 nonaka {
352 1.1 nonaka
353 1.1 nonaka return isa_intr_disestablish(NULL, cookie);
354 1.1 nonaka }
355