pci_machdep.c revision 1.3
1 /* $NetBSD: pci_machdep.c,v 1.3 2000/06/04 19:15:00 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Charles M. Hannum. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Machine-specific functions for PCI autoconfiguration. 35 * 36 * On PCs, there are two methods of generating PCI configuration cycles. 37 * We try to detect the appropriate mechanism for this machine and set 38 * up a few function pointers to access the correct method directly. 39 */ 40 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/time.h> 44 #include <sys/systm.h> 45 #include <sys/errno.h> 46 #include <sys/device.h> 47 48 #include <vm/vm.h> 49 #include <vm/vm_kern.h> 50 51 #define _PREP_BUS_DMA_PRIVATE 52 #include <machine/bus.h> 53 #include <machine/pio.h> 54 #include <machine/intr.h> 55 56 #include <dev/isa/isavar.h> 57 #include <dev/pci/pcivar.h> 58 #include <dev/pci/pcireg.h> 59 #include <dev/pci/pcidevs.h> 60 61 #define PCI_MODE1_ENABLE 0x80000000UL 62 #define PCI_MODE1_ADDRESS_REG (PREP_BUS_SPACE_IO + 0xcf8) 63 #define PCI_MODE1_DATA_REG (PREP_BUS_SPACE_IO + 0xcfc) 64 65 /* 66 * PCI constants. 67 * XXX These should be in a common file! 68 */ 69 #define PCI_CBIO 0x10 70 71 /* 72 * PCI doesn't have any special needs; just use the generic versions 73 * of these functions. 74 */ 75 struct prep_bus_dma_tag pci_bus_dma_tag = { 76 0, /* _bounce_thresh */ 77 _bus_dmamap_create, 78 _bus_dmamap_destroy, 79 _bus_dmamap_load, 80 _bus_dmamap_load_mbuf, 81 _bus_dmamap_load_uio, 82 _bus_dmamap_load_raw, 83 _bus_dmamap_unload, 84 NULL, /* _dmamap_sync */ 85 _bus_dmamem_alloc, 86 _bus_dmamem_free, 87 _bus_dmamem_map, 88 _bus_dmamem_unmap, 89 _bus_dmamem_mmap, 90 }; 91 92 void 93 pci_attach_hook(parent, self, pba) 94 struct device *parent, *self; 95 struct pcibus_attach_args *pba; 96 { 97 pci_chipset_tag_t pc; 98 int bus, device, maxndevs, function, nfunctions; 99 100 pc = pba->pba_pc; 101 bus = pba->pba_bus; 102 103 maxndevs = pci_bus_maxdevs(pba->pba_pc, pba->pba_bus); 104 105 for (device = 0; device < maxndevs; device++) { 106 pcitag_t tag; 107 pcireg_t id, intr, bhlcr, csr, address; 108 int line; 109 110 tag = pci_make_tag(pc, bus, device, 0); 111 id = pci_conf_read(pc, tag, PCI_ID_REG); 112 113 /* Invalid vendor ID value? */ 114 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 115 continue; 116 /* XXX Not invalid, but we've done this ~forever. */ 117 if (PCI_VENDOR(id) == 0) 118 continue; 119 120 bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG); 121 if (PCI_HDRTYPE_MULTIFN(bhlcr)) 122 nfunctions = 8; 123 else 124 nfunctions = 1; 125 126 for (function = 0; function < nfunctions; function++) { 127 int i; 128 129 tag = pci_make_tag(pc, bus, device, function); 130 id = pci_conf_read(pc, tag, PCI_ID_REG); 131 132 /* Invalid vendor ID value? */ 133 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 134 continue; 135 /* XXX Not invalid, but we've done this ~forever. */ 136 if (PCI_VENDOR(id) == 0) 137 continue; 138 139 /* Enable io/mem */ 140 /* XXX: ibm_machdep : ppc830 depend */ 141 switch (device) { 142 case 12: 143 case 18: 144 case 22: 145 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 146 csr |= (PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 147 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 148 break; 149 } 150 151 /* Fixup insane address */ 152 for (i = 0; i < 6; i ++) { 153 address = pci_conf_read(pc, tag, PCI_CBIO + i * 4); 154 if (address > 0x10000000) { 155 address &= 0x00ffffff; 156 address |= 0x01000000; 157 pci_conf_write(pc, tag, PCI_CBIO + i * 4, address); 158 } 159 } 160 161 /* Fixup intr */ 162 /* XXX: ibm_machdep : ppc830 depend */ 163 switch (device) { 164 case 12: 165 case 18: 166 case 22: 167 line = 15; 168 break; 169 default: 170 line = 0; 171 break; 172 } 173 174 if (line) { 175 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 176 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, 177 (intr & ~0xff) | line); 178 } 179 } 180 } 181 } 182 183 int 184 pci_bus_maxdevs(pc, busno) 185 pci_chipset_tag_t pc; 186 int busno; 187 { 188 189 /* 190 * Bus number is irrelevant. Configuration Mechanism 1 is in 191 * use, can have devices 0-32 (i.e. the `normal' range). 192 */ 193 return (32); 194 } 195 196 pcitag_t 197 pci_make_tag(pc, bus, device, function) 198 pci_chipset_tag_t pc; 199 int bus, device, function; 200 { 201 pcitag_t tag; 202 203 if (bus >= 256 || device >= 32 || function >= 8) 204 panic("pci_make_tag: bad request"); 205 206 tag = PCI_MODE1_ENABLE | 207 (bus << 16) | (device << 11) | (function << 8); 208 return tag; 209 } 210 211 void 212 pci_decompose_tag(pc, tag, bp, dp, fp) 213 pci_chipset_tag_t pc; 214 pcitag_t tag; 215 int *bp, *dp, *fp; 216 { 217 218 if (bp != NULL) 219 *bp = (tag >> 16) & 0xff; 220 if (dp != NULL) 221 *dp = (tag >> 11) & 0x1f; 222 if (fp != NULL) 223 *fp = (tag >> 8) & 0x7; 224 return; 225 } 226 227 pcireg_t 228 pci_conf_read(pc, tag, reg) 229 pci_chipset_tag_t pc; 230 pcitag_t tag; 231 int reg; 232 { 233 pcireg_t data; 234 235 out32rb(PCI_MODE1_ADDRESS_REG, tag | reg); 236 data = in32rb(PCI_MODE1_DATA_REG); 237 out32rb(PCI_MODE1_ADDRESS_REG, 0); 238 return data; 239 } 240 241 void 242 pci_conf_write(pc, tag, reg, data) 243 pci_chipset_tag_t pc; 244 pcitag_t tag; 245 int reg; 246 pcireg_t data; 247 { 248 249 out32rb(PCI_MODE1_ADDRESS_REG, tag | reg); 250 out32rb(PCI_MODE1_DATA_REG, data); 251 out32rb(PCI_MODE1_ADDRESS_REG, 0); 252 } 253 254 int 255 pci_intr_map(pc, intrtag, pin, line, ihp) 256 pci_chipset_tag_t pc; 257 pcitag_t intrtag; 258 int pin, line; 259 pci_intr_handle_t *ihp; 260 { 261 262 if (pin == 0) { 263 /* No IRQ used. */ 264 goto bad; 265 } 266 267 if (pin > 4) { 268 printf("pci_intr_map: bad interrupt pin %d\n", pin); 269 goto bad; 270 } 271 272 /* 273 * Section 6.2.4, `Miscellaneous Functions', says that 255 means 274 * `unknown' or `no connection' on a PC. We assume that a device with 275 * `no connection' either doesn't have an interrupt (in which case the 276 * pin number should be 0, and would have been noticed above), or 277 * wasn't configured by the BIOS (in which case we punt, since there's 278 * no real way we can know how the interrupt lines are mapped in the 279 * hardware). 280 * 281 * XXX 282 * Since IRQ 0 is only used by the clock, and we can't actually be sure 283 * that the BIOS did its job, we also recognize that as meaning that 284 * the BIOS has not configured the device. 285 */ 286 if (line == 0 || line == 255) { 287 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin); 288 goto bad; 289 } else { 290 if (line >= ICU_LEN) { 291 printf("pci_intr_map: bad interrupt line %d\n", line); 292 goto bad; 293 } 294 if (line == IRQ_SLAVE) { 295 printf("pci_intr_map: changed line 2 to line 9\n"); 296 line = 9; 297 } 298 } 299 300 *ihp = line; 301 return 0; 302 303 bad: 304 *ihp = -1; 305 return 1; 306 } 307 308 const char * 309 pci_intr_string(pc, ih) 310 pci_chipset_tag_t pc; 311 pci_intr_handle_t ih; 312 { 313 static char irqstr[8]; /* 4 + 2 + NULL + sanity */ 314 315 if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE) 316 panic("pci_intr_string: bogus handle 0x%x\n", ih); 317 318 sprintf(irqstr, "irq %d", ih); 319 return (irqstr); 320 321 } 322 323 const struct evcnt * 324 pci_intr_evcnt(pc, ih) 325 pci_chipset_tag_t pc; 326 pci_intr_handle_t ih; 327 { 328 329 /* XXX for now, no evcnt parent reported */ 330 return NULL; 331 } 332 333 void * 334 pci_intr_establish(pc, ih, level, func, arg) 335 pci_chipset_tag_t pc; 336 pci_intr_handle_t ih; 337 int level, (*func) __P((void *)); 338 void *arg; 339 { 340 341 if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE) 342 panic("pci_intr_establish: bogus handle 0x%x\n", ih); 343 344 return isa_intr_establish(NULL, ih, IST_LEVEL, level, func, arg); 345 } 346 347 void 348 pci_intr_disestablish(pc, cookie) 349 pci_chipset_tag_t pc; 350 void *cookie; 351 { 352 353 return isa_intr_disestablish(NULL, cookie); 354 } 355
Indexes created Sat Sep 27 14:09:57 GMT 2025