pci_machdep.c revision 1.35 1 /* $NetBSD: pci_machdep.c,v 1.35 2011/06/22 18:06:35 matt Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Machine-specific functions for PCI autoconfiguration.
35 *
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
39 */
40
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.35 2011/06/22 18:06:35 matt Exp $");
43
44 #include <sys/types.h>
45 #include <sys/param.h>
46 #include <sys/time.h>
47 #include <sys/systm.h>
48 #include <sys/errno.h>
49 #include <sys/extent.h>
50 #include <sys/device.h>
51 #include <sys/malloc.h>
52
53 #include <uvm/uvm_extern.h>
54
55 #define _POWERPC_BUS_DMA_PRIVATE
56 #include <machine/bus.h>
57 #include <machine/intr.h>
58 #include <machine/platform.h>
59 #include <machine/pnp.h>
60
61 #include <dev/isa/isavar.h>
62
63 #include <dev/pci/pcivar.h>
64 #include <dev/pci/pcireg.h>
65 #include <dev/pci/pcidevs.h>
66 #include <dev/pci/pciconf.h>
67
68 /* 0 == direct 1 == indirect */
69 int prep_pci_config_mode = 1;
70 extern struct genppc_pci_chipset *genppc_pct;
71 extern u_int32_t prep_pci_baseaddr;
72 extern u_int32_t prep_pci_basedata;
73
74 static void
75 prep_pci_get_chipset_tag_indirect(pci_chipset_tag_t pc)
76 {
77
78 pc->pc_conf_v = (void *)pc;
79
80 pc->pc_attach_hook = genppc_pci_indirect_attach_hook;
81 pc->pc_bus_maxdevs = prep_pci_bus_maxdevs;
82 pc->pc_make_tag = genppc_pci_indirect_make_tag;
83 pc->pc_conf_read = genppc_pci_indirect_conf_read;
84 pc->pc_conf_write = genppc_pci_indirect_conf_write;
85
86 pc->pc_intr_v = (void *)pc;
87
88 pc->pc_intr_map = prep_pci_intr_map;
89 pc->pc_intr_string = genppc_pci_intr_string;
90 pc->pc_intr_evcnt = genppc_pci_intr_evcnt;
91 pc->pc_intr_establish = genppc_pci_intr_establish;
92 pc->pc_intr_disestablish = genppc_pci_intr_disestablish;
93 pc->pc_intr_setattr = genppc_pci_intr_setattr;
94
95 pc->pc_conf_interrupt = genppc_pci_conf_interrupt;
96 pc->pc_decompose_tag = genppc_pci_indirect_decompose_tag;
97 pc->pc_conf_hook = prep_pci_conf_hook;
98
99 pc->pc_addr = mapiodev(prep_pci_baseaddr, 4);
100 pc->pc_data = mapiodev(prep_pci_basedata, 4);
101 pc->pc_bus = 0;
102 pc->pc_node = 0;
103 pc->pc_memt = 0;
104 pc->pc_iot = 0;
105 }
106
107 void
108 prep_pci_get_chipset_tag(pci_chipset_tag_t pc)
109 {
110 int i;
111
112 i = pci_chipset_tag_type();
113
114 if (i == PCIBridgeIndirect || i == PCIBridgeRS6K) {
115 prep_pci_config_mode = 1;
116 prep_pci_get_chipset_tag_indirect(pc);
117 } else if (i == PCIBridgeDirect) {
118 prep_pci_get_chipset_tag_direct(pc);
119 prep_pci_config_mode = 0;
120 } else
121 panic("Unknown PCI chipset tag configuration method");
122 }
123
124 int
125 prep_pci_bus_maxdevs(void *v, int busno)
126 {
127 struct genppc_pci_chipset_businfo *pbi;
128 prop_object_t busmax;
129
130 pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
131 while (busno--)
132 pbi = SIMPLEQ_NEXT(pbi, next);
133 if (pbi == NULL)
134 return 32;
135
136 busmax = prop_dictionary_get(pbi->pbi_properties,
137 "prep-pcibus-maxdevices");
138 if (busmax == NULL)
139 return 32;
140 else
141 return prop_number_integer_value(busmax);
142
143 return 32;
144 }
145
146 int
147 prep_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
148 {
149 struct genppc_pci_chipset_businfo *pbi;
150 prop_dictionary_t dict, devsub;
151 prop_object_t pinsub;
152 prop_number_t pbus;
153 int busno, bus, pin, line, swiz, dev, origdev, i;
154 char key[20];
155
156 pin = pa->pa_intrpin;
157 line = pa->pa_intrline;
158 bus = busno = pa->pa_bus;
159 swiz = pa->pa_intrswiz;
160 origdev = dev = pa->pa_device;
161 i = 0;
162
163 pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
164 while (busno--)
165 pbi = SIMPLEQ_NEXT(pbi, next);
166 KASSERT(pbi != NULL);
167
168 dict = prop_dictionary_get(pbi->pbi_properties, "prep-pci-intrmap");
169
170 if (dict != NULL)
171 i = prop_dictionary_count(dict);
172
173 if (dict == NULL || i == 0) {
174 /* We have a non-PReP bus. now it gets hard */
175 pbus = prop_dictionary_get(pbi->pbi_properties,
176 "prep-pcibus-parent");
177 if (pbus == NULL)
178 goto bad;
179 busno = prop_number_integer_value(pbus);
180 pbus = prop_dictionary_get(pbi->pbi_properties,
181 "prep-pcibus-rawdevnum");
182 dev = prop_number_integer_value(pbus);
183
184 /* now that we know the parent bus, we need to find it's pbi */
185 pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
186 while (busno--)
187 pbi = SIMPLEQ_NEXT(pbi, next);
188 KASSERT(pbi != NULL);
189
190 /* swizzle the pin */
191 pin = ((pin + origdev - 1) & 3) + 1;
192
193 /* now we have the pbi, ask for dict again */
194 dict = prop_dictionary_get(pbi->pbi_properties,
195 "prep-pci-intrmap");
196 if (dict == NULL)
197 goto bad;
198 }
199
200 /* No IRQ used. */
201 if (pin == 0)
202 goto bad;
203 if (pin > 4) {
204 aprint_error("pci_intr_map: bad interrupt pin %d\n", pin);
205 goto bad;
206 }
207
208 sprintf(key, "devfunc-%d", dev);
209 devsub = prop_dictionary_get(dict, key);
210 if (devsub == NULL)
211 goto bad;
212 sprintf(key, "pin-%c", 'A' + (pin-1));
213 pinsub = prop_dictionary_get(devsub, key);
214 if (pinsub == NULL)
215 goto bad;
216 line = prop_number_integer_value(pinsub);
217
218 /*
219 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
220 * `unknown' or `no connection' on a PC. We assume that a device with
221 * `no connection' either doesn't have an interrupt (in which case the
222 * pin number should be 0, and would have been noticed above), or
223 * wasn't configured by the BIOS (in which case we punt, since there's
224 * no real way we can know how the interrupt lines are mapped in the
225 * hardware).
226 *
227 * XXX
228 * Since IRQ 0 is only used by the clock, and we can't actually be sure
229 * that the BIOS did its job, we also recognize that as meaning that
230 * the BIOS has not configured the device.
231 */
232 if (line == 0 || line == 255) {
233 aprint_error("pci_intr_map: no mapping for pin %c\n",
234 '@' + pin);
235 goto bad;
236 } else {
237 if (line >= ICU_LEN) {
238 aprint_error("pci_intr_map: bad interrupt line %d\n",
239 line);
240 goto bad;
241 }
242 if (line == IRQ_SLAVE) {
243 aprint_verbose("pci_intr_map: changed line 2 to line 9\n");
244 line = 9;
245 }
246 }
247
248 *ihp = line;
249 return 0;
250
251 bad:
252 *ihp = -1;
253 return 1;
254 }
255
256 extern pcitag_t prep_pci_direct_make_tag(void *, int, int, int);
257 extern pcitag_t genppc_pci_indirect_make_tag(void *, int, int, int);
258 extern pcireg_t prep_pci_direct_conf_read(void *, pcitag_t, int);
259 extern pcireg_t genppc_pci_indirect_conf_read(void *, pcitag_t, int);
260
261 int
262 prep_pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
263 {
264 pci_chipset_tag_t pc = v;
265 struct genppc_pci_chipset_businfo *pbi;
266 prop_number_t bmax, pbus;
267 pcitag_t tag;
268 pcireg_t class;
269
270 /*
271 * The P9100 board found in some IBM machines cannot be
272 * over-configured.
273 */
274 if (PCI_VENDOR(id) == PCI_VENDOR_WEITEK &&
275 PCI_PRODUCT(id) == PCI_PRODUCT_WEITEK_P9100)
276 return 0;
277
278 /* We have already mapped the MPIC2 if we have one, so leave it
279 alone */
280 if (PCI_VENDOR(id) == PCI_VENDOR_IBM &&
281 PCI_PRODUCT(id) == PCI_PRODUCT_IBM_MPIC2)
282 return 0;
283
284 if (PCI_VENDOR(id) == PCI_VENDOR_IBM &&
285 PCI_PRODUCT(id) == PCI_PRODUCT_IBM_MPIC)
286 return 0;
287
288 if (PCI_VENDOR(id) == PCI_VENDOR_INTEL &&
289 PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_PCEB)
290 return 0;
291
292 if (PCI_VENDOR(id) == PCI_VENDOR_MOT &&
293 PCI_PRODUCT(id) == PCI_PRODUCT_MOT_RAVEN)
294 return (PCI_CONF_ALL & ~PCI_CONF_MAP_MEM);
295
296 /* NOTE, all device specific stuff must be above this line */
297 /* don't do this on the primary host bridge */
298 if (bus == 0 && dev == 0 && func == 0)
299 return PCI_CONF_DEFAULT;
300
301 if (prep_pci_config_mode) {
302 tag = genppc_pci_indirect_make_tag(pc, bus, dev, func);
303 class = genppc_pci_indirect_conf_read(pc, tag,
304 PCI_CLASS_REG);
305 } else {
306 tag = prep_pci_direct_make_tag(pc, bus, dev, func);
307 class = prep_pci_direct_conf_read(pc, tag,
308 PCI_CLASS_REG);
309 }
310
311 /*
312 * PCI bridges have special needs. We need to discover where they
313 * came from, and wire them appropriately.
314 */
315 if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
316 PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_PCI) {
317 pbi = malloc(sizeof(struct genppc_pci_chipset_businfo),
318 M_DEVBUF, M_NOWAIT);
319 KASSERT(pbi != NULL);
320 pbi->pbi_properties = prop_dictionary_create();
321 KASSERT(pbi->pbi_properties != NULL);
322 setup_pciintr_map(pbi, bus, dev, func);
323
324 /* record the parent bus, and the parent device number */
325 pbus = prop_number_create_integer(bus);
326 prop_dictionary_set(pbi->pbi_properties, "prep-pcibus-parent",
327 pbus);
328 prop_object_release(pbus);
329 pbus = prop_number_create_integer(dev);
330 prop_dictionary_set(pbi->pbi_properties,
331 "prep-pcibus-rawdevnum", pbus);
332 prop_object_release(pbus);
333
334 /* now look for bus quirks */
335
336 if (PCI_VENDOR(id) == PCI_VENDOR_DEC &&
337 PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21154) {
338 bmax = prop_number_create_integer(8);
339 KASSERT(bmax != NULL);
340 prop_dictionary_set(pbi->pbi_properties,
341 "prep-pcibus-maxdevices", bmax);
342 prop_object_release(bmax);
343 }
344
345 SIMPLEQ_INSERT_TAIL(&genppc_pct->pc_pbi, pbi, next);
346 }
347
348 return (PCI_CONF_DEFAULT);
349 }
350