pci_machdep.c revision 1.41 1 /* $NetBSD: pci_machdep.c,v 1.41 2014/10/18 08:33:26 snj Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Machine-specific functions for PCI autoconfiguration.
35 *
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
39 */
40
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.41 2014/10/18 08:33:26 snj Exp $");
43
44 #include <sys/types.h>
45 #include <sys/param.h>
46 #include <sys/time.h>
47 #include <sys/systm.h>
48 #include <sys/errno.h>
49 #include <sys/extent.h>
50 #include <sys/device.h>
51 #include <sys/malloc.h>
52
53 #include <uvm/uvm_extern.h>
54
55 #define _POWERPC_BUS_DMA_PRIVATE
56 #include <sys/bus.h>
57 #include <machine/intr.h>
58 #include <machine/platform.h>
59 #include <machine/pnp.h>
60
61 #include <dev/isa/isavar.h>
62
63 #include <dev/pci/pcivar.h>
64 #include <dev/pci/pcireg.h>
65 #include <dev/pci/pcidevs.h>
66 #include <dev/pci/pciconf.h>
67
68 /* 0 == direct 1 == indirect */
69 int prep_pci_config_mode = 1;
70 extern struct genppc_pci_chipset *genppc_pct;
71 extern u_int32_t prep_pci_baseaddr;
72 extern u_int32_t prep_pci_basedata;
73
74 static void
75 prep_pci_get_chipset_tag_indirect(pci_chipset_tag_t pc)
76 {
77
78 pc->pc_conf_v = (void *)pc;
79
80 pc->pc_attach_hook = genppc_pci_indirect_attach_hook;
81 pc->pc_bus_maxdevs = prep_pci_bus_maxdevs;
82 pc->pc_make_tag = genppc_pci_indirect_make_tag;
83 pc->pc_conf_read = genppc_pci_indirect_conf_read;
84 pc->pc_conf_write = genppc_pci_indirect_conf_write;
85
86 pc->pc_intr_v = (void *)pc;
87
88 pc->pc_intr_map = prep_pci_intr_map;
89 pc->pc_intr_string = genppc_pci_intr_string;
90 pc->pc_intr_evcnt = genppc_pci_intr_evcnt;
91 pc->pc_intr_establish = genppc_pci_intr_establish;
92 pc->pc_intr_disestablish = genppc_pci_intr_disestablish;
93 pc->pc_intr_setattr = genppc_pci_intr_setattr;
94
95 pc->pc_msi_v = (void *)pc;
96 genppc_pci_chipset_msi_init(pc);
97
98 pc->pc_conf_interrupt = genppc_pci_conf_interrupt;
99 pc->pc_decompose_tag = genppc_pci_indirect_decompose_tag;
100 pc->pc_conf_hook = prep_pci_conf_hook;
101
102 pc->pc_addr = mapiodev(prep_pci_baseaddr, 4, false);
103 pc->pc_data = mapiodev(prep_pci_basedata, 4, false);
104 pc->pc_bus = 0;
105 pc->pc_node = 0;
106 pc->pc_memt = 0;
107 pc->pc_iot = 0;
108 }
109
110 void
111 prep_pci_get_chipset_tag(pci_chipset_tag_t pc)
112 {
113 int i;
114
115 i = pci_chipset_tag_type();
116
117 if (i == PCIBridgeIndirect || i == PCIBridgeRS6K) {
118 prep_pci_config_mode = 1;
119 prep_pci_get_chipset_tag_indirect(pc);
120 } else if (i == PCIBridgeDirect) {
121 prep_pci_get_chipset_tag_direct(pc);
122 prep_pci_config_mode = 0;
123 } else
124 panic("Unknown PCI chipset tag configuration method");
125 }
126
127 int
128 prep_pci_bus_maxdevs(void *v, int busno)
129 {
130 struct genppc_pci_chipset_businfo *pbi;
131 prop_object_t busmax;
132
133 pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
134 while (busno--)
135 pbi = SIMPLEQ_NEXT(pbi, next);
136 if (pbi == NULL)
137 return 32;
138
139 busmax = prop_dictionary_get(pbi->pbi_properties,
140 "prep-pcibus-maxdevices");
141 if (busmax == NULL)
142 return 32;
143 else
144 return prop_number_integer_value(busmax);
145
146 return 32;
147 }
148
149 int
150 prep_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
151 {
152 struct genppc_pci_chipset_businfo *pbi;
153 prop_dictionary_t dict, devsub;
154 prop_object_t pinsub;
155 prop_number_t pbus;
156 int busno, pin, line, dev, origdev, i;
157 char key[20];
158
159 pin = pa->pa_intrpin;
160 line = pa->pa_intrline;
161 busno = pa->pa_bus;
162 origdev = dev = pa->pa_device;
163 i = 0;
164
165 pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
166 while (busno--)
167 pbi = SIMPLEQ_NEXT(pbi, next);
168 KASSERT(pbi != NULL);
169
170 dict = prop_dictionary_get(pbi->pbi_properties, "prep-pci-intrmap");
171
172 if (dict != NULL)
173 i = prop_dictionary_count(dict);
174
175 if (dict == NULL || i == 0) {
176 /* We have a non-PReP bus. now it gets hard */
177 pbus = prop_dictionary_get(pbi->pbi_properties,
178 "prep-pcibus-parent");
179 if (pbus == NULL)
180 goto bad;
181 busno = prop_number_integer_value(pbus);
182 pbus = prop_dictionary_get(pbi->pbi_properties,
183 "prep-pcibus-rawdevnum");
184 dev = prop_number_integer_value(pbus);
185
186 /* now that we know the parent bus, we need to find its pbi */
187 pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
188 while (busno--)
189 pbi = SIMPLEQ_NEXT(pbi, next);
190 KASSERT(pbi != NULL);
191
192 /* swizzle the pin */
193 pin = ((pin + origdev - 1) & 3) + 1;
194
195 /* now we have the pbi, ask for dict again */
196 dict = prop_dictionary_get(pbi->pbi_properties,
197 "prep-pci-intrmap");
198 if (dict == NULL)
199 goto bad;
200 }
201
202 /* No IRQ used. */
203 if (pin == 0)
204 goto bad;
205 if (pin > 4) {
206 aprint_error("pci_intr_map: bad interrupt pin %d\n", pin);
207 goto bad;
208 }
209
210 snprintf(key, sizeof(key), "devfunc-%d", dev);
211 devsub = prop_dictionary_get(dict, key);
212 if (devsub == NULL)
213 goto bad;
214 snprintf(key, sizeof(key), "pin-%c", 'A' + (pin-1));
215 pinsub = prop_dictionary_get(devsub, key);
216 if (pinsub == NULL)
217 goto bad;
218 line = prop_number_integer_value(pinsub);
219
220 /*
221 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
222 * `unknown' or `no connection' on a PC. We assume that a device with
223 * `no connection' either doesn't have an interrupt (in which case the
224 * pin number should be 0, and would have been noticed above), or
225 * wasn't configured by the BIOS (in which case we punt, since there's
226 * no real way we can know how the interrupt lines are mapped in the
227 * hardware).
228 *
229 * XXX
230 * Since IRQ 0 is only used by the clock, and we can't actually be sure
231 * that the BIOS did its job, we also recognize that as meaning that
232 * the BIOS has not configured the device.
233 */
234 if (line == 0 || line == 255) {
235 aprint_error("pci_intr_map: no mapping for pin %c\n",
236 '@' + pin);
237 goto bad;
238 } else {
239 if (line >= ICU_LEN) {
240 aprint_error("pci_intr_map: bad interrupt line %d\n",
241 line);
242 goto bad;
243 }
244 if (line == IRQ_SLAVE) {
245 aprint_verbose("pci_intr_map: changed line 2 to line 9\n");
246 line = 9;
247 }
248 }
249
250 *ihp = line;
251 return 0;
252
253 bad:
254 *ihp = -1;
255 return 1;
256 }
257
258 extern pcitag_t prep_pci_direct_make_tag(void *, int, int, int);
259 extern pcitag_t genppc_pci_indirect_make_tag(void *, int, int, int);
260 extern pcireg_t prep_pci_direct_conf_read(void *, pcitag_t, int);
261 extern pcireg_t genppc_pci_indirect_conf_read(void *, pcitag_t, int);
262
263 int
264 prep_pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
265 {
266 pci_chipset_tag_t pc = v;
267 struct genppc_pci_chipset_businfo *pbi;
268 prop_number_t bmax, pbus;
269 pcitag_t tag;
270 pcireg_t class;
271
272 /*
273 * The P9100 board found in some IBM machines cannot be
274 * over-configured.
275 */
276 if (PCI_VENDOR(id) == PCI_VENDOR_WEITEK &&
277 PCI_PRODUCT(id) == PCI_PRODUCT_WEITEK_P9100)
278 return 0;
279
280 /* We have already mapped the MPIC2 if we have one, so leave it
281 alone */
282 if (PCI_VENDOR(id) == PCI_VENDOR_IBM &&
283 PCI_PRODUCT(id) == PCI_PRODUCT_IBM_MPIC2)
284 return 0;
285
286 if (PCI_VENDOR(id) == PCI_VENDOR_IBM &&
287 PCI_PRODUCT(id) == PCI_PRODUCT_IBM_MPIC)
288 return 0;
289
290 if (PCI_VENDOR(id) == PCI_VENDOR_INTEL &&
291 PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_PCEB)
292 return 0;
293
294 if (PCI_VENDOR(id) == PCI_VENDOR_MOT &&
295 PCI_PRODUCT(id) == PCI_PRODUCT_MOT_RAVEN)
296 return (PCI_CONF_ALL & ~PCI_CONF_MAP_MEM);
297
298 /* NOTE, all device specific stuff must be above this line */
299 /* don't do this on the primary host bridge */
300 if (bus == 0 && dev == 0 && func == 0)
301 return PCI_CONF_DEFAULT;
302
303 if (prep_pci_config_mode) {
304 tag = genppc_pci_indirect_make_tag(pc, bus, dev, func);
305 class = genppc_pci_indirect_conf_read(pc, tag,
306 PCI_CLASS_REG);
307 } else {
308 tag = prep_pci_direct_make_tag(pc, bus, dev, func);
309 class = prep_pci_direct_conf_read(pc, tag,
310 PCI_CLASS_REG);
311 }
312
313 /*
314 * PCI bridges have special needs. We need to discover where they
315 * came from, and wire them appropriately.
316 */
317 if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
318 PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_PCI) {
319 pbi = malloc(sizeof(struct genppc_pci_chipset_businfo),
320 M_DEVBUF, M_NOWAIT);
321 KASSERT(pbi != NULL);
322 pbi->pbi_properties = prop_dictionary_create();
323 KASSERT(pbi->pbi_properties != NULL);
324 setup_pciintr_map(pbi, bus, dev, func);
325
326 /* record the parent bus, and the parent device number */
327 pbus = prop_number_create_integer(bus);
328 prop_dictionary_set(pbi->pbi_properties, "prep-pcibus-parent",
329 pbus);
330 prop_object_release(pbus);
331 pbus = prop_number_create_integer(dev);
332 prop_dictionary_set(pbi->pbi_properties,
333 "prep-pcibus-rawdevnum", pbus);
334 prop_object_release(pbus);
335
336 /* now look for bus quirks */
337
338 if (PCI_VENDOR(id) == PCI_VENDOR_DEC &&
339 PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21154) {
340 bmax = prop_number_create_integer(8);
341 KASSERT(bmax != NULL);
342 prop_dictionary_set(pbi->pbi_properties,
343 "prep-pcibus-maxdevices", bmax);
344 prop_object_release(bmax);
345 }
346
347 SIMPLEQ_INSERT_TAIL(&genppc_pct->pc_pbi, pbi, next);
348 }
349
350 return (PCI_CONF_DEFAULT);
351 }
352