nvram_pnpbus.c revision 1.18 1 /* $NetBSD: nvram_pnpbus.c,v 1.18 2014/02/28 10:16:51 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 2006 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Tim Rightnour
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: nvram_pnpbus.c,v 1.18 2014/02/28 10:16:51 skrll Exp $");
34
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/ioctl.h>
39 #include <sys/conf.h>
40 #include <sys/kthread.h>
41 #include <sys/device.h>
42 #include <sys/malloc.h>
43 #include <sys/bus.h>
44 #include <sys/intr.h>
45
46 #include <machine/isa_machdep.h>
47 /* clock stuff for motorolla machines */
48 #include <dev/clock_subr.h>
49 #include <dev/ic/mk48txxreg.h>
50
51 #include <uvm/uvm_extern.h>
52
53 #include <machine/residual.h>
54 #include <machine/nvram.h>
55
56 #include <prep/pnpbus/pnpbusvar.h>
57
58 #include "opt_nvram.h"
59
60 static char *nvramData;
61 static NVRAM_MAP *nvram;
62 static char *nvramGEAp; /* pointer to the GE area */
63 static char *nvramCAp; /* pointer to the Config area */
64 static char *nvramOSAp; /* pointer to the OSArea */
65
66 int prep_clock_mk48txx;
67
68 extern char bootpath[256];
69 extern RESIDUAL resdata;
70
71 #define NVRAM_STD_DEV 0
72
73 static int nvram_pnpbus_probe(device_t, cfdata_t, void *);
74 static void nvram_pnpbus_attach(device_t, device_t, void *);
75 uint8_t prep_nvram_read_val(int);
76 char *prep_nvram_next_var(char *);
77 char *prep_nvram_find_var(const char *);
78 char *prep_nvram_get_var(const char *);
79 int prep_nvram_get_var_len(const char *);
80 int prep_nvram_count_vars(void);
81 void prep_nvram_write_val(int, uint8_t);
82 uint8_t mkclock_pnpbus_nvrd(struct mk48txx_softc *, int);
83 void mkclock_pnpbus_nvwr(struct mk48txx_softc *, int, uint8_t);
84
85 CFATTACH_DECL_NEW(nvram_pnpbus, sizeof(struct nvram_pnpbus_softc),
86 nvram_pnpbus_probe, nvram_pnpbus_attach, NULL, NULL);
87
88 dev_type_open(prep_nvramopen);
89 dev_type_ioctl(prep_nvramioctl);
90 dev_type_close(prep_nvramclose);
91 dev_type_read(prep_nvramread);
92
93 const struct cdevsw nvram_cdevsw = {
94 prep_nvramopen, prep_nvramclose, prep_nvramread, nowrite,
95 prep_nvramioctl, nostop, notty, nopoll, nommap, nokqfilter, D_OTHER,
96 };
97
98 extern struct cfdriver nvram_cd;
99
100 static int
101 nvram_pnpbus_probe(device_t parent, cfdata_t match, void *aux)
102 {
103 struct pnpbus_dev_attach_args *pna = aux;
104 int ret = 0;
105
106 if (strcmp(pna->pna_devid, "IBM0008") == 0)
107 ret = 1;
108
109 if (ret)
110 pnpbus_scan(pna, pna->pna_ppc_dev);
111
112 return ret;
113 }
114
115 static void
116 nvram_pnpbus_attach(device_t parent, device_t self, void *aux)
117 {
118 struct nvram_pnpbus_softc *sc = device_private(self);
119 struct pnpbus_dev_attach_args *pna = aux;
120 int as_iobase, as_len, data_iobase, data_len, i, nvlen, cur;
121 uint8_t *p;
122 HEADER prep_nvram_header;
123
124 sc->sc_iot = pna->pna_iot;
125
126 pnpbus_getioport(&pna->pna_res, 0, &as_iobase, &as_len);
127 pnpbus_getioport(&pna->pna_res, 1, &data_iobase, &data_len);
128
129 if (pnpbus_io_map(&pna->pna_res, 0, &sc->sc_as, &sc->sc_ash) ||
130 pnpbus_io_map(&pna->pna_res, 1, &sc->sc_data, &sc->sc_datah)) {
131 aprint_error("nvram: couldn't map registers\n");
132 return;
133 }
134
135 /* Initialize the nvram header */
136 p = (uint8_t *) &prep_nvram_header;
137 for (i = 0; i < sizeof(HEADER); i++)
138 *p++ = prep_nvram_read_val(i);
139
140 /*
141 * now that we have the header, we know how big the NVRAM part on
142 * this machine really is. Malloc space to save a copy.
143 */
144
145 nvlen = 1024 * prep_nvram_header.Size;
146 nvramData = malloc(nvlen, M_DEVBUF, M_NOWAIT);
147 p = (uint8_t *) nvramData;
148
149 /*
150 * now read the whole nvram in, one chunk at a time, marking down
151 * the main start points as we go.
152 */
153 for (i = 0; i < sizeof(HEADER) && i < nvlen; i++)
154 *p++ = prep_nvram_read_val(i);
155 nvramGEAp = p;
156 cur = i;
157 for (; i < cur + prep_nvram_header.GELength && i < nvlen; i++)
158 *p++ = prep_nvram_read_val(i);
159 nvramOSAp = p;
160 cur = i;
161 for (; i < cur + prep_nvram_header.OSAreaLength && i < nvlen; i++)
162 *p++ = prep_nvram_read_val(i);
163 nvramCAp = p;
164 cur = i;
165 for (; i < cur + prep_nvram_header.ConfigLength && i < nvlen; i++)
166 *p++ = prep_nvram_read_val(i);
167
168 /* we should be done here. umm.. yay? */
169 nvram = (NVRAM_MAP *)&nvramData[0];
170 aprint_normal("\n");
171 aprint_verbose("%s: Read %d bytes from nvram of size %d\n",
172 device_xname(self), i, nvlen);
173
174 #if defined(NVRAM_DUMP)
175 printf("Boot device: %s\n", prep_nvram_get_var("fw-boot-device"));
176 printf("Dumping nvram\n");
177 for (cur=0; cur < i; cur++) {
178 printf("%c", nvramData[cur]);
179 if (cur % 70 == 0)
180 printf("\n");
181 }
182 #endif
183 strncpy(bootpath, prep_nvram_get_var("fw-boot-device"), 256);
184
185
186 if (prep_clock_mk48txx == 0)
187 return;
188 /* otherwise, we have a motorolla clock chip. Set it up. */
189 sc->sc_mksc.sc_model = "mk48t18";
190 sc->sc_mksc.sc_year0 = 1900;
191 sc->sc_mksc.sc_nvrd = mkclock_pnpbus_nvrd;
192 sc->sc_mksc.sc_nvwr = mkclock_pnpbus_nvwr;
193 /* copy down the bus space tags */
194 sc->sc_mksc.sc_bst = sc->sc_as;
195 sc->sc_mksc.sc_bsh = sc->sc_ash;
196 sc->sc_mksc.sc_data = sc->sc_data;
197 sc->sc_mksc.sc_datah = sc->sc_datah;
198
199 aprint_normal("%s: attaching clock", device_xname(self));
200 mk48txx_attach((struct mk48txx_softc *)&sc->sc_mksc);
201 aprint_normal("\n");
202 }
203
204 /*
205 * This function should be called at a high spl only, as it interfaces with
206 * real hardware.
207 */
208
209 uint8_t
210 prep_nvram_read_val(int addr)
211 {
212 struct nvram_pnpbus_softc *sc;
213
214 sc = device_lookup_private(&nvram_cd, NVRAM_STD_DEV);
215 if (sc == NULL)
216 return 0;
217
218 /* tell the NVRAM what we want */
219 bus_space_write_1(sc->sc_as, sc->sc_ash, 0, addr);
220 bus_space_write_1(sc->sc_as, sc->sc_ash, 1, addr>>8);
221
222 return bus_space_read_1(sc->sc_data, sc->sc_datah, 0);
223 }
224
225 /*
226 * This function should be called at a high spl only, as it interfaces with
227 * real hardware.
228 */
229
230 void
231 prep_nvram_write_val(int addr, uint8_t val)
232 {
233 struct nvram_pnpbus_softc *sc;
234
235 sc = device_lookup_private(&nvram_cd, NVRAM_STD_DEV);
236 if (sc == NULL)
237 return;
238
239 /* tell the NVRAM what we want */
240 bus_space_write_1(sc->sc_as, sc->sc_ash, 0, addr);
241 bus_space_write_1(sc->sc_as, sc->sc_ash, 1, addr>>8);
242
243 bus_space_write_1(sc->sc_data, sc->sc_datah, 0, val);
244 }
245
246 /* the rest of these should all be called with the lock held */
247
248 char *
249 prep_nvram_next_var(char *name)
250 {
251 char *cp;
252
253 if (name == NULL)
254 return NULL;
255
256 cp = name;
257 /* skip forward to the first null char */
258 while ((cp - nvramGEAp) < nvram->Header.GELength && (*cp != '\0'))
259 cp++;
260 /* skip nulls */
261 while ((cp - nvramGEAp) < nvram->Header.GELength && (*cp == '\0'))
262 cp++;
263 if ((cp - nvramGEAp) < nvram->Header.GELength)
264 return cp;
265 else
266 return NULL;
267 }
268
269 char *
270 prep_nvram_find_var(const char *name)
271 {
272 char *cp = nvramGEAp;
273 size_t len;
274
275 len = strlen(name);
276 while (cp != NULL) {
277 if ((strncmp(name, cp, len) == 0) && (cp[len] == '='))
278 return cp;
279 cp = prep_nvram_next_var(cp);
280 }
281 return NULL;
282 }
283
284 char *
285 prep_nvram_get_var(const char *name)
286 {
287 char *cp = nvramGEAp;
288 size_t len;
289
290 if (name == NULL)
291 return NULL;
292 len = strlen(name);
293 while (cp != NULL) {
294 if ((strncmp(name, cp, len) == 0) && (cp[len] == '='))
295 return cp+len+1;
296 cp = prep_nvram_next_var(cp);
297 }
298 return NULL;
299 }
300
301 int
302 prep_nvram_get_var_len(const char *name)
303 {
304 char *cp = nvramGEAp;
305 char *ep;
306 size_t len;
307
308 if (name == NULL)
309 return -1;
310
311 len = strlen(name);
312 while (cp != NULL) {
313 if ((strncmp(name, cp, len) == 0) && (cp[len] == '='))
314 goto out;
315 cp = prep_nvram_next_var(cp);
316 }
317 return -1;
318
319 out:
320 ep = cp;
321 while (ep != NULL && *ep != '\0')
322 ep++;
323 return ep-cp;
324 }
325
326 int
327 prep_nvram_count_vars(void)
328 {
329 char *cp = nvramGEAp;
330 int i=0;
331
332 while (cp != NULL) {
333 i++;
334 cp = prep_nvram_next_var(cp);
335 }
336 return i;
337 }
338
339 static int
340 nvramgetstr(int len, char *user, char **cpp)
341 {
342 int error;
343 char *cp;
344
345 /* Reject obvious bogus requests */
346 if ((u_int)len > (8 * 1024) - 1)
347 return ENAMETOOLONG;
348
349 *cpp = cp = malloc(len + 1, M_TEMP, M_WAITOK);
350 error = copyin(user, cp, len);
351 cp[len] = '\0';
352 return error;
353 }
354
355 int
356 prep_nvramioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l)
357 {
358 int len, error;
359 struct pnviocdesc *pnv;
360 char *np, *cp, *name;
361
362 pnv = (struct pnviocdesc *)data;
363 error = 0;
364 cp = name = NULL;
365
366 switch (cmd) {
367 case PNVIOCGET:
368 if (pnv->pnv_name == NULL)
369 return EINVAL;
370
371 error = nvramgetstr(pnv->pnv_namelen, pnv->pnv_name, &name);
372 np = prep_nvram_get_var(name);
373 if (np == NULL)
374 return EINVAL;
375 len = prep_nvram_get_var_len(name);
376
377 if (len > pnv->pnv_buflen) {
378 error = ENOMEM;
379 break;
380 }
381 if (len <= 0)
382 break;
383 error = copyout(np, pnv->pnv_buf, len);
384 pnv->pnv_buflen = len;
385 break;
386
387 case PNVIOCGETNEXTNAME:
388 /* if the first one is null, we give them the first name */
389 if (pnv->pnv_name == NULL) {
390 cp = nvramGEAp;
391 } else {
392 error = nvramgetstr(pnv->pnv_namelen, pnv->pnv_name,
393 &name);
394 if (!error) {
395 np = prep_nvram_find_var(name);
396 cp = prep_nvram_next_var(np);
397 }
398 }
399 if (cp == NULL)
400 error = EINVAL;
401 if (error)
402 break;
403
404 np = cp;
405 while (*np != '=')
406 np++;
407 len = np-cp;
408 if (len > pnv->pnv_buflen) {
409 error = ENOMEM;
410 break;
411 }
412 error = copyout(cp, pnv->pnv_buf, len);
413 if (error)
414 break;
415 pnv->pnv_buflen = len;
416 break;
417
418 case PNVIOCGETNUMGE:
419 /* count the GE variables */
420 pnv->pnv_num = prep_nvram_count_vars();
421 break;
422 case PNVIOCSET:
423 /* this will require some real work. Not ready yet */
424 return ENOTSUP;
425
426 default:
427 return ENOTTY;
428 }
429 if (name)
430 free(name, M_TEMP);
431 return error;
432 }
433
434 int
435 prep_nvramread(dev_t dev, struct uio *uio, int flags)
436 {
437 int size, resid, error;
438 u_int c;
439 char *rdata;
440
441 error = 0;
442 rdata = (char *)&resdata;
443
444 if (uio->uio_rw == UIO_WRITE) {
445 uio->uio_resid = 0;
446 return 0;
447 }
448
449 switch (minor(dev)) {
450 case DEV_NVRAM:
451 size = nvram->Header.Size * 1024;
452 break;
453 case DEV_RESIDUAL:
454 size = res->ResidualLength;
455 break;
456 default:
457 return ENXIO;
458 }
459 resid = size;
460 if (uio->uio_resid < resid)
461 resid = uio->uio_resid;
462 while (resid > 0 && error == 0 && uio->uio_offset < size) {
463 switch (minor(dev)) {
464 case DEV_NVRAM:
465 c = min(resid, PAGE_SIZE);
466 error = uiomove(&nvramData[uio->uio_offset], c, uio);
467 break;
468 case DEV_RESIDUAL:
469 c = min(resid, PAGE_SIZE);
470 error = uiomove(&rdata[uio->uio_offset], c, uio);
471 break;
472 default:
473 return ENXIO;
474 }
475 }
476 return error;
477 }
478
479 int
480 prep_nvramopen(dev_t dev, int flags, int mode, struct lwp *l)
481 {
482 struct nvram_pnpbus_softc *sc;
483
484 sc = device_lookup_private(&nvram_cd, NVRAM_STD_DEV);
485 if (sc == NULL)
486 return ENODEV;
487
488 if (sc->sc_open)
489 return EBUSY;
490
491 sc->sc_open = 1;
492
493 return 0;
494 }
495
496 int
497 prep_nvramclose(dev_t dev, int flags, int mode, struct lwp *l)
498 {
499 struct nvram_pnpbus_softc *sc;
500
501 sc = device_lookup_private(&nvram_cd, NVRAM_STD_DEV);
502 if (sc == NULL)
503 return ENODEV;
504 sc->sc_open = 0;
505 return 0;
506 }
507
508 /* Motorola mk48txx clock routines */
509 uint8_t
510 mkclock_pnpbus_nvrd(struct mk48txx_softc *osc, int off)
511 {
512 struct prep_mk48txx_softc *sc = (struct prep_mk48txx_softc *)osc;
513 uint8_t datum;
514 int s;
515
516 #ifdef DEBUG
517 aprint_debug("mkclock_pnpbus_nvrd(%d)", off);
518 #endif
519 s = splclock();
520 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 0, off & 0xff);
521 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1, off >> 8);
522 datum = bus_space_read_1(sc->sc_data, sc->sc_datah, 0);
523 splx(s);
524 #ifdef DEBUG
525 aprint_debug(" -> %02x\n", datum);
526 #endif
527 return datum;
528 }
529
530 void
531 mkclock_pnpbus_nvwr(struct mk48txx_softc *osc, int off, uint8_t datum)
532 {
533 struct prep_mk48txx_softc *sc = (struct prep_mk48txx_softc *)osc;
534 int s;
535
536 #ifdef DEBUG
537 aprint_debug("mkclock_isa_nvwr(%d, %02x)\n", off, datum);
538 #endif
539 s = splclock();
540 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 0, off & 0xff);
541 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1, off >> 8);
542 bus_space_write_1(sc->sc_data, sc->sc_datah, 0, datum);
543 splx(s);
544 }
545