nvram_pnpbus.c revision 1.19 1 /* $NetBSD: nvram_pnpbus.c,v 1.19 2014/03/16 05:20:25 dholland Exp $ */
2
3 /*-
4 * Copyright (c) 2006 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Tim Rightnour
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: nvram_pnpbus.c,v 1.19 2014/03/16 05:20:25 dholland Exp $");
34
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/ioctl.h>
39 #include <sys/conf.h>
40 #include <sys/kthread.h>
41 #include <sys/device.h>
42 #include <sys/malloc.h>
43 #include <sys/bus.h>
44 #include <sys/intr.h>
45
46 #include <machine/isa_machdep.h>
47 /* clock stuff for motorolla machines */
48 #include <dev/clock_subr.h>
49 #include <dev/ic/mk48txxreg.h>
50
51 #include <uvm/uvm_extern.h>
52
53 #include <machine/residual.h>
54 #include <machine/nvram.h>
55
56 #include <prep/pnpbus/pnpbusvar.h>
57
58 #include "opt_nvram.h"
59
60 static char *nvramData;
61 static NVRAM_MAP *nvram;
62 static char *nvramGEAp; /* pointer to the GE area */
63 static char *nvramCAp; /* pointer to the Config area */
64 static char *nvramOSAp; /* pointer to the OSArea */
65
66 int prep_clock_mk48txx;
67
68 extern char bootpath[256];
69 extern RESIDUAL resdata;
70
71 #define NVRAM_STD_DEV 0
72
73 static int nvram_pnpbus_probe(device_t, cfdata_t, void *);
74 static void nvram_pnpbus_attach(device_t, device_t, void *);
75 uint8_t prep_nvram_read_val(int);
76 char *prep_nvram_next_var(char *);
77 char *prep_nvram_find_var(const char *);
78 char *prep_nvram_get_var(const char *);
79 int prep_nvram_get_var_len(const char *);
80 int prep_nvram_count_vars(void);
81 void prep_nvram_write_val(int, uint8_t);
82 uint8_t mkclock_pnpbus_nvrd(struct mk48txx_softc *, int);
83 void mkclock_pnpbus_nvwr(struct mk48txx_softc *, int, uint8_t);
84
85 CFATTACH_DECL_NEW(nvram_pnpbus, sizeof(struct nvram_pnpbus_softc),
86 nvram_pnpbus_probe, nvram_pnpbus_attach, NULL, NULL);
87
88 dev_type_open(prep_nvramopen);
89 dev_type_ioctl(prep_nvramioctl);
90 dev_type_close(prep_nvramclose);
91 dev_type_read(prep_nvramread);
92
93 const struct cdevsw nvram_cdevsw = {
94 .d_open = prep_nvramopen,
95 .d_close = prep_nvramclose,
96 .d_read = prep_nvramread,
97 .d_write = nowrite,
98 .d_ioctl = prep_nvramioctl,
99 .d_stop = nostop,
100 .d_tty = notty,
101 .d_poll = nopoll,
102 .d_mmap = nommap,
103 .d_kqfilter = nokqfilter,
104 .d_flag = D_OTHER,
105 };
106
107 extern struct cfdriver nvram_cd;
108
109 static int
110 nvram_pnpbus_probe(device_t parent, cfdata_t match, void *aux)
111 {
112 struct pnpbus_dev_attach_args *pna = aux;
113 int ret = 0;
114
115 if (strcmp(pna->pna_devid, "IBM0008") == 0)
116 ret = 1;
117
118 if (ret)
119 pnpbus_scan(pna, pna->pna_ppc_dev);
120
121 return ret;
122 }
123
124 static void
125 nvram_pnpbus_attach(device_t parent, device_t self, void *aux)
126 {
127 struct nvram_pnpbus_softc *sc = device_private(self);
128 struct pnpbus_dev_attach_args *pna = aux;
129 int as_iobase, as_len, data_iobase, data_len, i, nvlen, cur;
130 uint8_t *p;
131 HEADER prep_nvram_header;
132
133 sc->sc_iot = pna->pna_iot;
134
135 pnpbus_getioport(&pna->pna_res, 0, &as_iobase, &as_len);
136 pnpbus_getioport(&pna->pna_res, 1, &data_iobase, &data_len);
137
138 if (pnpbus_io_map(&pna->pna_res, 0, &sc->sc_as, &sc->sc_ash) ||
139 pnpbus_io_map(&pna->pna_res, 1, &sc->sc_data, &sc->sc_datah)) {
140 aprint_error("nvram: couldn't map registers\n");
141 return;
142 }
143
144 /* Initialize the nvram header */
145 p = (uint8_t *) &prep_nvram_header;
146 for (i = 0; i < sizeof(HEADER); i++)
147 *p++ = prep_nvram_read_val(i);
148
149 /*
150 * now that we have the header, we know how big the NVRAM part on
151 * this machine really is. Malloc space to save a copy.
152 */
153
154 nvlen = 1024 * prep_nvram_header.Size;
155 nvramData = malloc(nvlen, M_DEVBUF, M_NOWAIT);
156 p = (uint8_t *) nvramData;
157
158 /*
159 * now read the whole nvram in, one chunk at a time, marking down
160 * the main start points as we go.
161 */
162 for (i = 0; i < sizeof(HEADER) && i < nvlen; i++)
163 *p++ = prep_nvram_read_val(i);
164 nvramGEAp = p;
165 cur = i;
166 for (; i < cur + prep_nvram_header.GELength && i < nvlen; i++)
167 *p++ = prep_nvram_read_val(i);
168 nvramOSAp = p;
169 cur = i;
170 for (; i < cur + prep_nvram_header.OSAreaLength && i < nvlen; i++)
171 *p++ = prep_nvram_read_val(i);
172 nvramCAp = p;
173 cur = i;
174 for (; i < cur + prep_nvram_header.ConfigLength && i < nvlen; i++)
175 *p++ = prep_nvram_read_val(i);
176
177 /* we should be done here. umm.. yay? */
178 nvram = (NVRAM_MAP *)&nvramData[0];
179 aprint_normal("\n");
180 aprint_verbose("%s: Read %d bytes from nvram of size %d\n",
181 device_xname(self), i, nvlen);
182
183 #if defined(NVRAM_DUMP)
184 printf("Boot device: %s\n", prep_nvram_get_var("fw-boot-device"));
185 printf("Dumping nvram\n");
186 for (cur=0; cur < i; cur++) {
187 printf("%c", nvramData[cur]);
188 if (cur % 70 == 0)
189 printf("\n");
190 }
191 #endif
192 strncpy(bootpath, prep_nvram_get_var("fw-boot-device"), 256);
193
194
195 if (prep_clock_mk48txx == 0)
196 return;
197 /* otherwise, we have a motorolla clock chip. Set it up. */
198 sc->sc_mksc.sc_model = "mk48t18";
199 sc->sc_mksc.sc_year0 = 1900;
200 sc->sc_mksc.sc_nvrd = mkclock_pnpbus_nvrd;
201 sc->sc_mksc.sc_nvwr = mkclock_pnpbus_nvwr;
202 /* copy down the bus space tags */
203 sc->sc_mksc.sc_bst = sc->sc_as;
204 sc->sc_mksc.sc_bsh = sc->sc_ash;
205 sc->sc_mksc.sc_data = sc->sc_data;
206 sc->sc_mksc.sc_datah = sc->sc_datah;
207
208 aprint_normal("%s: attaching clock", device_xname(self));
209 mk48txx_attach((struct mk48txx_softc *)&sc->sc_mksc);
210 aprint_normal("\n");
211 }
212
213 /*
214 * This function should be called at a high spl only, as it interfaces with
215 * real hardware.
216 */
217
218 uint8_t
219 prep_nvram_read_val(int addr)
220 {
221 struct nvram_pnpbus_softc *sc;
222
223 sc = device_lookup_private(&nvram_cd, NVRAM_STD_DEV);
224 if (sc == NULL)
225 return 0;
226
227 /* tell the NVRAM what we want */
228 bus_space_write_1(sc->sc_as, sc->sc_ash, 0, addr);
229 bus_space_write_1(sc->sc_as, sc->sc_ash, 1, addr>>8);
230
231 return bus_space_read_1(sc->sc_data, sc->sc_datah, 0);
232 }
233
234 /*
235 * This function should be called at a high spl only, as it interfaces with
236 * real hardware.
237 */
238
239 void
240 prep_nvram_write_val(int addr, uint8_t val)
241 {
242 struct nvram_pnpbus_softc *sc;
243
244 sc = device_lookup_private(&nvram_cd, NVRAM_STD_DEV);
245 if (sc == NULL)
246 return;
247
248 /* tell the NVRAM what we want */
249 bus_space_write_1(sc->sc_as, sc->sc_ash, 0, addr);
250 bus_space_write_1(sc->sc_as, sc->sc_ash, 1, addr>>8);
251
252 bus_space_write_1(sc->sc_data, sc->sc_datah, 0, val);
253 }
254
255 /* the rest of these should all be called with the lock held */
256
257 char *
258 prep_nvram_next_var(char *name)
259 {
260 char *cp;
261
262 if (name == NULL)
263 return NULL;
264
265 cp = name;
266 /* skip forward to the first null char */
267 while ((cp - nvramGEAp) < nvram->Header.GELength && (*cp != '\0'))
268 cp++;
269 /* skip nulls */
270 while ((cp - nvramGEAp) < nvram->Header.GELength && (*cp == '\0'))
271 cp++;
272 if ((cp - nvramGEAp) < nvram->Header.GELength)
273 return cp;
274 else
275 return NULL;
276 }
277
278 char *
279 prep_nvram_find_var(const char *name)
280 {
281 char *cp = nvramGEAp;
282 size_t len;
283
284 len = strlen(name);
285 while (cp != NULL) {
286 if ((strncmp(name, cp, len) == 0) && (cp[len] == '='))
287 return cp;
288 cp = prep_nvram_next_var(cp);
289 }
290 return NULL;
291 }
292
293 char *
294 prep_nvram_get_var(const char *name)
295 {
296 char *cp = nvramGEAp;
297 size_t len;
298
299 if (name == NULL)
300 return NULL;
301 len = strlen(name);
302 while (cp != NULL) {
303 if ((strncmp(name, cp, len) == 0) && (cp[len] == '='))
304 return cp+len+1;
305 cp = prep_nvram_next_var(cp);
306 }
307 return NULL;
308 }
309
310 int
311 prep_nvram_get_var_len(const char *name)
312 {
313 char *cp = nvramGEAp;
314 char *ep;
315 size_t len;
316
317 if (name == NULL)
318 return -1;
319
320 len = strlen(name);
321 while (cp != NULL) {
322 if ((strncmp(name, cp, len) == 0) && (cp[len] == '='))
323 goto out;
324 cp = prep_nvram_next_var(cp);
325 }
326 return -1;
327
328 out:
329 ep = cp;
330 while (ep != NULL && *ep != '\0')
331 ep++;
332 return ep-cp;
333 }
334
335 int
336 prep_nvram_count_vars(void)
337 {
338 char *cp = nvramGEAp;
339 int i=0;
340
341 while (cp != NULL) {
342 i++;
343 cp = prep_nvram_next_var(cp);
344 }
345 return i;
346 }
347
348 static int
349 nvramgetstr(int len, char *user, char **cpp)
350 {
351 int error;
352 char *cp;
353
354 /* Reject obvious bogus requests */
355 if ((u_int)len > (8 * 1024) - 1)
356 return ENAMETOOLONG;
357
358 *cpp = cp = malloc(len + 1, M_TEMP, M_WAITOK);
359 error = copyin(user, cp, len);
360 cp[len] = '\0';
361 return error;
362 }
363
364 int
365 prep_nvramioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l)
366 {
367 int len, error;
368 struct pnviocdesc *pnv;
369 char *np, *cp, *name;
370
371 pnv = (struct pnviocdesc *)data;
372 error = 0;
373 cp = name = NULL;
374
375 switch (cmd) {
376 case PNVIOCGET:
377 if (pnv->pnv_name == NULL)
378 return EINVAL;
379
380 error = nvramgetstr(pnv->pnv_namelen, pnv->pnv_name, &name);
381 np = prep_nvram_get_var(name);
382 if (np == NULL)
383 return EINVAL;
384 len = prep_nvram_get_var_len(name);
385
386 if (len > pnv->pnv_buflen) {
387 error = ENOMEM;
388 break;
389 }
390 if (len <= 0)
391 break;
392 error = copyout(np, pnv->pnv_buf, len);
393 pnv->pnv_buflen = len;
394 break;
395
396 case PNVIOCGETNEXTNAME:
397 /* if the first one is null, we give them the first name */
398 if (pnv->pnv_name == NULL) {
399 cp = nvramGEAp;
400 } else {
401 error = nvramgetstr(pnv->pnv_namelen, pnv->pnv_name,
402 &name);
403 if (!error) {
404 np = prep_nvram_find_var(name);
405 cp = prep_nvram_next_var(np);
406 }
407 }
408 if (cp == NULL)
409 error = EINVAL;
410 if (error)
411 break;
412
413 np = cp;
414 while (*np != '=')
415 np++;
416 len = np-cp;
417 if (len > pnv->pnv_buflen) {
418 error = ENOMEM;
419 break;
420 }
421 error = copyout(cp, pnv->pnv_buf, len);
422 if (error)
423 break;
424 pnv->pnv_buflen = len;
425 break;
426
427 case PNVIOCGETNUMGE:
428 /* count the GE variables */
429 pnv->pnv_num = prep_nvram_count_vars();
430 break;
431 case PNVIOCSET:
432 /* this will require some real work. Not ready yet */
433 return ENOTSUP;
434
435 default:
436 return ENOTTY;
437 }
438 if (name)
439 free(name, M_TEMP);
440 return error;
441 }
442
443 int
444 prep_nvramread(dev_t dev, struct uio *uio, int flags)
445 {
446 int size, resid, error;
447 u_int c;
448 char *rdata;
449
450 error = 0;
451 rdata = (char *)&resdata;
452
453 if (uio->uio_rw == UIO_WRITE) {
454 uio->uio_resid = 0;
455 return 0;
456 }
457
458 switch (minor(dev)) {
459 case DEV_NVRAM:
460 size = nvram->Header.Size * 1024;
461 break;
462 case DEV_RESIDUAL:
463 size = res->ResidualLength;
464 break;
465 default:
466 return ENXIO;
467 }
468 resid = size;
469 if (uio->uio_resid < resid)
470 resid = uio->uio_resid;
471 while (resid > 0 && error == 0 && uio->uio_offset < size) {
472 switch (minor(dev)) {
473 case DEV_NVRAM:
474 c = min(resid, PAGE_SIZE);
475 error = uiomove(&nvramData[uio->uio_offset], c, uio);
476 break;
477 case DEV_RESIDUAL:
478 c = min(resid, PAGE_SIZE);
479 error = uiomove(&rdata[uio->uio_offset], c, uio);
480 break;
481 default:
482 return ENXIO;
483 }
484 }
485 return error;
486 }
487
488 int
489 prep_nvramopen(dev_t dev, int flags, int mode, struct lwp *l)
490 {
491 struct nvram_pnpbus_softc *sc;
492
493 sc = device_lookup_private(&nvram_cd, NVRAM_STD_DEV);
494 if (sc == NULL)
495 return ENODEV;
496
497 if (sc->sc_open)
498 return EBUSY;
499
500 sc->sc_open = 1;
501
502 return 0;
503 }
504
505 int
506 prep_nvramclose(dev_t dev, int flags, int mode, struct lwp *l)
507 {
508 struct nvram_pnpbus_softc *sc;
509
510 sc = device_lookup_private(&nvram_cd, NVRAM_STD_DEV);
511 if (sc == NULL)
512 return ENODEV;
513 sc->sc_open = 0;
514 return 0;
515 }
516
517 /* Motorola mk48txx clock routines */
518 uint8_t
519 mkclock_pnpbus_nvrd(struct mk48txx_softc *osc, int off)
520 {
521 struct prep_mk48txx_softc *sc = (struct prep_mk48txx_softc *)osc;
522 uint8_t datum;
523 int s;
524
525 #ifdef DEBUG
526 aprint_debug("mkclock_pnpbus_nvrd(%d)", off);
527 #endif
528 s = splclock();
529 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 0, off & 0xff);
530 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1, off >> 8);
531 datum = bus_space_read_1(sc->sc_data, sc->sc_datah, 0);
532 splx(s);
533 #ifdef DEBUG
534 aprint_debug(" -> %02x\n", datum);
535 #endif
536 return datum;
537 }
538
539 void
540 mkclock_pnpbus_nvwr(struct mk48txx_softc *osc, int off, uint8_t datum)
541 {
542 struct prep_mk48txx_softc *sc = (struct prep_mk48txx_softc *)osc;
543 int s;
544
545 #ifdef DEBUG
546 aprint_debug("mkclock_isa_nvwr(%d, %02x)\n", off, datum);
547 #endif
548 s = splclock();
549 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 0, off & 0xff);
550 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1, off >> 8);
551 bus_space_write_1(sc->sc_data, sc->sc_datah, 0, datum);
552 splx(s);
553 }
554