locore.S revision 1.4 1 1.4 matt /* $NetBSD: locore.S,v 1.4 2003/02/02 20:43:25 matt Exp $ */
2 1.1 simonb /* $OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $ */
3 1.1 simonb
4 1.1 simonb /*
5 1.1 simonb * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6 1.1 simonb * Copyright (C) 1995, 1996 TooLs GmbH.
7 1.1 simonb * All rights reserved.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed by TooLs GmbH.
20 1.1 simonb * 4. The name of TooLs GmbH may not be used to endorse or promote products
21 1.1 simonb * derived from this software without specific prior written permission.
22 1.1 simonb *
23 1.1 simonb * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 1.1 simonb * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 1.1 simonb * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28 1.1 simonb * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29 1.1 simonb * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 1.1 simonb * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31 1.1 simonb * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32 1.1 simonb * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.1 simonb */
34 1.1 simonb
35 1.1 simonb #include "opt_ddb.h"
36 1.1 simonb #include "fs_kernfs.h"
37 1.1 simonb #include "opt_ipkdb.h"
38 1.1 simonb #include "opt_lockdebug.h"
39 1.1 simonb #include "opt_multiprocessor.h"
40 1.4 matt #include "opt_ppcparam.h"
41 1.1 simonb #include "assym.h"
42 1.1 simonb
43 1.1 simonb #include <sys/syscall.h>
44 1.1 simonb
45 1.1 simonb #include <machine/param.h>
46 1.2 nonaka #include <machine/vmparam.h>
47 1.1 simonb #include <machine/pmap.h>
48 1.1 simonb #include <machine/psl.h>
49 1.1 simonb #include <machine/trap.h>
50 1.1 simonb #include <machine/asm.h>
51 1.1 simonb
52 1.3 matt #include <powerpc/spr.h>
53 1.3 matt
54 1.1 simonb /*
55 1.1 simonb * Some instructions gas doesn't understand (yet?)
56 1.1 simonb */
57 1.1 simonb #define bdneq bdnzf 2,
58 1.1 simonb
59 1.1 simonb /*
60 1.1 simonb * cache bit
61 1.1 simonb */
62 1.1 simonb #define HID0_BTCD (1<<1)
63 1.1 simonb #define HID0_BHTE (1<<2)
64 1.1 simonb #define HID0_SIED (1<<7)
65 1.1 simonb #define HID0_DCI (1<<10)
66 1.1 simonb #define HID0_ICFI (1<<11)
67 1.1 simonb #define HID0_DCE (1<<14)
68 1.1 simonb #define HID0_ICE (1<<15)
69 1.1 simonb
70 1.1 simonb /*
71 1.1 simonb * Globals
72 1.1 simonb */
73 1.1 simonb GLOBAL(startsym)
74 1.1 simonb .long 0 /* start symbol table */
75 1.1 simonb GLOBAL(endsym)
76 1.1 simonb .long 0 /* end symbol table */
77 1.1 simonb GLOBAL(proc0paddr)
78 1.1 simonb .long 0 /* proc0 p_addr */
79 1.1 simonb
80 1.1 simonb GLOBAL(intrnames)
81 1.1 simonb .asciz "clock", "irq1", "irq2", "irq3"
82 1.1 simonb .asciz "irq4", "irq5", "irq6", "irq7"
83 1.1 simonb .asciz "irq8", "irq9", "irq10", "irq11"
84 1.1 simonb .asciz "irq12", "irq13", "irq14", "irq15"
85 1.1 simonb .asciz "irq16", "irq17", "irq18", "irq19"
86 1.1 simonb .asciz "irq20", "irq21", "irq22", "irq23"
87 1.1 simonb .asciz "irq24", "irq25", "irq26", "irq27"
88 1.1 simonb .asciz "irq28", "softnet", "softclock", "softserial"
89 1.1 simonb GLOBAL(eintrnames)
90 1.1 simonb .align 4
91 1.1 simonb GLOBAL(intrcnt)
92 1.1 simonb .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
93 1.1 simonb .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
94 1.1 simonb GLOBAL(eintrcnt)
95 1.1 simonb
96 1.1 simonb /*
97 1.1 simonb * This symbol is here for the benefit of kvm_mkdb, and is supposed to
98 1.1 simonb * mark the start of kernel text.
99 1.1 simonb */
100 1.1 simonb .text
101 1.1 simonb .globl _C_LABEL(kernel_text)
102 1.1 simonb _C_LABEL(kernel_text):
103 1.1 simonb
104 1.1 simonb /*
105 1.1 simonb * Startup entry. Note, this must be the first thing in the text
106 1.1 simonb * segment!
107 1.1 simonb */
108 1.1 simonb .text
109 1.1 simonb .globl __start
110 1.1 simonb __start:
111 1.1 simonb li 0,0
112 1.1 simonb mtmsr 0 /* Disable FPU/MMU/exceptions */
113 1.1 simonb isync
114 1.1 simonb
115 1.1 simonb /* compute end of kernel memory */
116 1.1 simonb #if defined(DDB) || defined(KERNFS)
117 1.1 simonb lis 7,_C_LABEL(startsym)@ha
118 1.1 simonb addi 7,7,_C_LABEL(startsym)@l
119 1.1 simonb stw 3,0(7)
120 1.1 simonb lis 7,_C_LABEL(endsym)@ha
121 1.1 simonb addi 7,7,_C_LABEL(endsym)@l
122 1.1 simonb stw 4,0(7)
123 1.4 matt #else
124 1.4 matt lis 4,_C_LABEL(end)@ha
125 1.4 matt addi 4,4,_C_LABEL(end)@l
126 1.1 simonb #endif
127 1.4 matt
128 1.4 matt INIT_CPUINFO(4,1,9,0)
129 1.1 simonb
130 1.1 simonb lis 3,__start@ha
131 1.1 simonb addi 3,3,__start@l
132 1.1 simonb
133 1.1 simonb bl _C_LABEL(initppc)
134 1.1 simonb
135 1.1 simonb /* enable internal i/d-cache */
136 1.1 simonb mfpvr 9
137 1.1 simonb rlwinm 9,9,16,16,31
138 1.1 simonb cmpi 0,9,1
139 1.1 simonb beq 3f /* not needed for 601 */
140 1.3 matt mfspr 11,SPR_HID0
141 1.1 simonb andi. 0,11,HID0_DCE
142 1.1 simonb ori 11,11,HID0_ICE|HID0_DCE
143 1.1 simonb ori 8,11,HID0_ICFI
144 1.1 simonb bne 1f /* don't invalidate the D-cache */
145 1.1 simonb ori 8,8,HID0_DCI /* unless it wasn't enabled */
146 1.1 simonb 1:
147 1.1 simonb sync
148 1.3 matt mtspr SPR_HID0,8 /* enable and invalidate caches */
149 1.1 simonb sync
150 1.3 matt mtspr SPR_HID0,11 /* enable caches */
151 1.1 simonb sync
152 1.1 simonb isync
153 1.1 simonb cmpi 0,9,4 /* check for 604 */
154 1.1 simonb cmpi 1,9,9 /* or 604e */
155 1.1 simonb cmpi 2,9,10 /* or mach5 */
156 1.1 simonb cror 2,2,6
157 1.1 simonb cror 2,2,10
158 1.1 simonb bne 3f
159 1.1 simonb ori 11,11,HID0_SIED|HID0_BHTE /* for 604[e], enable */
160 1.1 simonb bne 2,2f
161 1.1 simonb ori 11,11,HID0_BTCD
162 1.1 simonb 2:
163 1.3 matt mtspr SPR_HID0,11
164 1.1 simonb 3:
165 1.1 simonb sync
166 1.1 simonb isync
167 1.1 simonb
168 1.1 simonb bl _C_LABEL(main)
169 1.1 simonb
170 1.1 simonb loop:
171 1.1 simonb b loop /* not reached */
172 1.1 simonb
173 1.1 simonb .globl _C_LABEL(enable_intr)
174 1.1 simonb _C_LABEL(enable_intr):
175 1.1 simonb mfmsr 3
176 1.1 simonb ori 3,3,PSL_EE@l
177 1.1 simonb mtmsr 3
178 1.1 simonb blr
179 1.1 simonb
180 1.1 simonb .globl _C_LABEL(disable_intr)
181 1.1 simonb _C_LABEL(disable_intr):
182 1.1 simonb mfmsr 3
183 1.1 simonb andi. 3,3,~PSL_EE@l
184 1.1 simonb mtmsr 3
185 1.1 simonb blr
186 1.1 simonb
187 1.1 simonb /*
188 1.1 simonb * Pull in common switch / setfault code.
189 1.1 simonb */
190 1.1 simonb #include <powerpc/powerpc/locore_subr.S>
191 1.1 simonb
192 1.1 simonb /*
193 1.1 simonb * Pull in common trap vector code.
194 1.1 simonb */
195 1.1 simonb #include <powerpc/powerpc/trap_subr.S>
196