plic_fdt.c revision 1.7
1/* $NetBSD: plic_fdt.c,v 1.7 2024/08/04 08:16:25 skrll Exp $ */ 2 3/*- 4 * Copyright (c) 2022 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Portions of this code is derived from software contributed to The NetBSD 8 * Foundation by Simon Burge and Nick Hudson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#include <sys/cdefs.h> 33__KERNEL_RCSID(0, "$NetBSD: plic_fdt.c,v 1.7 2024/08/04 08:16:25 skrll Exp $"); 34 35#include <sys/param.h> 36 37#include <sys/bus.h> 38#include <sys/cpu.h> 39#include <sys/device.h> 40#include <sys/intr.h> 41 42#include <dev/fdt/fdtvar.h> 43 44#include <riscv/sysreg.h> 45#include <riscv/fdt/riscv_fdtvar.h> 46#include <riscv/dev/plicreg.h> 47#include <riscv/dev/plicvar.h> 48 49static const struct device_compatible_entry compat_data[] = { 50 { .compat = "riscv,plic0" }, 51 { .compat = "sifive,plic-1.0.0" }, 52 DEVICE_COMPAT_EOL 53}; 54 55static void * 56plic_fdt_intr_establish(device_t dev, u_int *specifier, int ipl, int flags, 57 int (*func)(void *), void *arg, const char *xname) 58{ 59 struct plic_softc * const sc = device_private(dev); 60 struct plic_intrhand *ih; 61 62 /* 1st cell is the interrupt number */ 63 const u_int irq = be32toh(specifier[0]); 64 if (irq > sc->sc_ndev) { 65 aprint_error_dev(dev, "irq %d greater than max irq %d\n", 66 irq, sc->sc_ndev); 67 return NULL; 68 } 69 ih = plic_intr_establish_xname(irq, ipl, 70 (flags & FDT_INTR_MPSAFE) != 0 ? IST_MPSAFE : 0, func, arg, xname); 71 72 return ih; 73} 74 75static void 76plic_fdt_intr_disestablish(device_t dev, void *cookie) 77{ 78 79 plic_intr_disestablish(cookie); 80} 81 82 83static bool 84plic_intrstr(device_t dev, u_int *specifier, char *buf, size_t buflen) 85{ 86 /* 1st cell is the interrupt number */ 87 const int irq = be32toh(specifier[0]); 88 89 snprintf(buf, buflen, "%s irq %d", device_xname(dev), irq); 90 91 return true; 92} 93 94static struct fdtbus_interrupt_controller_func plic_funcs = { 95 .establish = plic_fdt_intr_establish, 96 .disestablish = plic_fdt_intr_disestablish, 97 .intrstr = plic_intrstr, 98}; 99 100static int 101plic_fdt_match(device_t parent, cfdata_t cf, void *aux) 102{ 103 struct fdt_attach_args * const faa = aux; 104 105 return of_compatible_match(faa->faa_phandle, compat_data); 106} 107 108 109static void 110plic_fdt_attach_source(device_t self, int phandle, int context, int xref, 111 int intr_source) 112{ 113 struct plic_softc * const sc = device_private(self); 114 static const struct device_compatible_entry clint_compat_data[] = { 115 { .compat = "riscv,cpu-intc" }, 116 DEVICE_COMPAT_EOL 117 }; 118 119 if (!of_compatible_match(xref, clint_compat_data)) { 120 aprint_error_dev(self, "incompatible CLINT " 121 "for PLIC for context %d\n", context); 122 return; 123 } 124 125 const int cpu_ref = OF_parent(xref); 126 if (!riscv_fdt_cpu_okay(cpu_ref)) { 127 aprint_verbose_dev(self, "inactive HART " 128 "for PLIC for context %d\n", context); 129 return; 130 } 131 132 /* What do we want to pass as arg to plic_intr */ 133 void *ih = fdtbus_intr_establish_xname(phandle, 134 context, IPL_VM, FDT_INTR_MPSAFE, 135 plic_intr, sc, device_xname(self)); 136 if (ih == NULL) { 137 aprint_error_dev(self, "couldn't install " 138 "interrupt handler\n"); 139 } else { 140 char intrstr[128]; 141 bool ok = fdtbus_intr_str(phandle, context, 142 intrstr, sizeof(intrstr)); 143 aprint_verbose_dev(self, "interrupt %s handler " 144 "installed\n", ok ? intrstr : "(unk)"); 145 } 146 147 if (intr_source == IRQ_SUPERVISOR_EXTERNAL) { 148 bus_addr_t hartid; 149 /* get cpuid for the parent node */ 150 fdtbus_get_reg(cpu_ref, 0, &hartid, NULL); 151 152 KASSERT(context <= PLIC_MAX_CONTEXT); 153 sc->sc_context[hartid] = context; 154 aprint_verbose_dev(self, "hart %"PRId64" context %d\n", 155 hartid, context); 156 } 157} 158 159 160static void 161plic_fdt_attach(device_t parent, device_t self, void *aux) 162{ 163 struct plic_softc * const sc = device_private(self); 164 struct fdt_attach_args * const faa = aux; 165 const int phandle = faa->faa_phandle; 166 bus_addr_t addr; 167 bus_size_t size; 168 const uint32_t *data; 169 int error, context, len; 170 171 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 172 aprint_error(": couldn't get registers\n"); 173 return; 174 } 175 176 sc->sc_dev = self; 177 sc->sc_bst = faa->faa_bst; 178 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 179 aprint_error(": couldn't get registers\n"); 180 return; 181 } 182 183 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 184 aprint_error(": couldn't map registers\n"); 185 return; 186 } 187 188 error = of_getprop_uint32(phandle, "riscv,ndev", &sc->sc_ndev); 189 if (error) { 190 aprint_error("couldn't get supported number of external " 191 "interrupts\n"); 192 return; 193 } 194 if (sc->sc_ndev > PLIC_MAX_IRQ) { 195 aprint_error(": invalid number of external interrupts (%u)\n", 196 sc->sc_ndev); 197 return; 198 } 199 aprint_verbose("\n"); 200 201 /* 202 * PLIC context device mappings is documented at 203 * https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/sifive%2Cplic-1.0.0.yaml 204 * We need to walk the "interrupts-extended" property of 205 * and register handlers for the defined contexts. 206 * 207 * XXX 208 * This is usually an abstraction violation to inspect 209 * the current node's properties directly. We do it 210 * in this case because the current binding spec defines 211 * this case. We do a bit of error checking to make 212 * sure all the documented assumptions are correct. 213 */ 214 215 data = fdtbus_get_prop(phandle, "interrupts-extended", &len); 216 if (data == NULL) { 217 aprint_error_dev(self, "couldn't get context data\n"); 218 return; 219 } 220 context = 0; 221 while (len > 0) { 222 const int pphandle = be32toh(data[0]); 223 const int xref = fdtbus_get_phandle_from_native(pphandle); 224 const int intr_source = be32toh(data[1]); 225 uint32_t intr_cells; 226 227 error = of_getprop_uint32(xref, "#interrupt-cells", &intr_cells); 228 if (error) { 229 aprint_error_dev(self, "couldn't get cell length " 230 "for parent CPU for context %d", context); 231 return; 232 } 233 234 if (intr_source != -1) { 235 plic_fdt_attach_source(self, phandle, context, xref, 236 intr_source); 237 } 238 len -= (intr_cells + 1) * 4; 239 data += (intr_cells + 1); 240 context++; 241 } 242 243 aprint_verbose_dev(self, "attaching"); 244 error = plic_attach_common(sc, addr, size); 245 if (error != 0) { 246 return; 247 } 248 249 /* Setup complete, register this FDT bus. */ 250 error = fdtbus_register_interrupt_controller(self, phandle, 251 &plic_funcs); 252 if (error != 0) { 253 aprint_error(": couldn't register with fdtbus: %d\n", error); 254 } 255} 256 257CFATTACH_DECL_NEW(plic_fdt, sizeof(struct plic_softc), 258 plic_fdt_match, plic_fdt_attach, NULL, NULL); 259