mcontext.h revision 1.11 
1/* $NetBSD: mcontext.h,v 1.11 2024/11/04 15:45:25 christos Exp $ */
2
3/*-
4 * Copyright (c) 2014 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31#ifndef _RISCV_MCONTEXT_H_
32#define _RISCV_MCONTEXT_H_
33
34/*
35 */
36
37#define	_NGREG	32		/* GR1-31 */
38#define	_NFREG	33		/* F0-31, FCSR */
39
40/*
41 * This fragment is common to <riscv/mcontext.h> and <riscv/reg.h>
42 */
43#ifndef _BSD_FPREG_T_
44union __fpreg {
45		__uint64_t u_u64;
46		double u_d;
47};
48#define _BSD_FPREG_T_	union __fpreg
49#endif
50
51typedef	long		__greg_t;
52typedef	__greg_t	__gregset_t[_NGREG];
53typedef	__uint32_t	__greg32_t;
54typedef	__greg32_t	__gregset32_t[_NGREG];
55typedef _BSD_FPREG_T_	__fregset_t[_NFREG];
56
57#define	_REG_X1		0
58#define	_REG_X2		1
59#define	_REG_X3		2
60#define	_REG_X4		3
61#define	_REG_X5		4
62#define	_REG_X6		5
63#define	_REG_X7		6
64#define	_REG_X8		7
65#define	_REG_X9		8
66#define	_REG_X10	9
67#define	_REG_X11	10
68#define	_REG_X12	11
69#define	_REG_X13	12
70#define	_REG_X14	13
71#define	_REG_X15	14
72#define	_REG_X16	15
73#define	_REG_X17	16
74#define	_REG_X18	17
75#define	_REG_X19	18
76#define	_REG_X20	19
77#define	_REG_X21	20
78#define	_REG_X22	21
79#define	_REG_X23	22
80#define	_REG_X24	23
81#define	_REG_X25	24
82#define	_REG_X26	25
83#define	_REG_X27	26
84#define	_REG_X28	27
85#define	_REG_X29	28
86#define	_REG_X30	29
87#define	_REG_X31	30
88#define	_REG_PC		31
89
90#define	_REG_RA		_REG_X1
91#define	_REG_SP		_REG_X2
92#define	_REG_GP		_REG_X3
93#define	_REG_TP		_REG_X4
94#define	_REG_T0		_REG_X5
95#define	_REG_T1		_REG_X6
96#define	_REG_T2		_REG_X7
97#define	_REG_S0		_REG_X8
98#define	_REG_S1		_REG_X9
99#define	_REG_RV		_REG_X10
100#define	_REG_A0		_REG_X10
101#define	_REG_A1		_REG_X11
102#define	_REG_A2		_REG_X12
103#define	_REG_A3		_REG_X13
104#define	_REG_A4		_REG_X14
105#define	_REG_A5		_REG_X15
106#define	_REG_A6		_REG_X16
107#define	_REG_A7		_REG_X17
108#define	_REG_S2		_REG_X18
109#define	_REG_S3		_REG_X19
110#define	_REG_S4		_REG_X20
111#define	_REG_S5		_REG_X21
112#define	_REG_S6		_REG_X22
113#define	_REG_S7		_REG_X23
114#define	_REG_S8		_REG_X24
115#define	_REG_S9		_REG_X25
116#define	_REG_S10	_REG_X26
117#define	_REG_S11	_REG_X27
118#define	_REG_T3		_REG_X28
119#define	_REG_T4		_REG_X29
120#define	_REG_T5		_REG_X30
121#define	_REG_T6		_REG_X31
122
123#define	_REG_F0		0
124#define	_REG_FPCSR	32
125
126typedef struct {
127	__gregset_t	__gregs;	/* General Purpose Register set */
128	__fregset_t	__fregs;	/* Floating Point Register set */
129	__greg_t	__spare[7];	/* future proof */
130} mcontext_t;
131
132typedef struct {
133	__gregset32_t	__gregs;	/* General Purpose Register set */
134	__fregset_t	__fregs;	/* Floating Point Register set */
135	__greg32_t	__spare[7];	/* future proof */
136} mcontext32_t;
137
138/* Machine-dependent uc_flags */
139#define	_UC_SETSTACK	0x00010000	/* see <sys/ucontext.h> */
140#define	_UC_CLRSTACK	0x00020000	/* see <sys/ucontext.h> */
141#define	_UC_TLSBASE	0x00080000	/* see <sys/ucontext.h> */
142
143#define _UC_MACHINE_SP(uc)		((uc)->uc_mcontext.__gregs[_REG_SP])
144#define _UC_MACHINE_FP(uc)		((uc)->uc_mcontext.__gregs[_REG_S0])
145#define _UC_MACHINE_PC(uc)		((uc)->uc_mcontext.__gregs[_REG_PC])
146#define _UC_MACHINE_INTRV(uc)		((uc)->uc_mcontext.__gregs[_REG_RV])
147
148#define	_UC_MACHINE_SET_PC(uc, pc)	_UC_MACHINE_PC(uc) = (pc)
149
150#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || defined(__LIBPTHREAD_SOURCE__)
151#include <sys/tls.h>
152
153static __inline void *
154__lwp_getprivate_fast(void)
155{
156	void *__tp;
157	__asm("mv %0, tp" : "=r"(__tp));
158	return __tp;
159}
160
161/*
162 * On RISCV, since displacements are signed 12-bit values, the TCB Pointer
163 * is biased by sizeof(tcb) so that first thread datum can be addressed by
164 * -sizeof(tcb).
165 */
166
167#define	TLS_TP_OFFSET	0x0
168#define	TLS_TCB_ALIGN	16
169#define	TLS_DTV_OFFSET	0x800
170__CTASSERT(TLS_TP_OFFSET + sizeof(struct tls_tcb) < 0x800);
171
172static __inline void *
173__lwp_gettcb_fast(void)
174{
175	void *__tcb;
176
177	__asm __volatile(
178		"addi %[__tcb], tp, %[__offset]"
179	    :	[__tcb] "=r" (__tcb)
180	    :	[__offset] "n" (-(TLS_TP_OFFSET + sizeof(struct tls_tcb))));
181
182	return __tcb;
183}
184
185static __inline void
186__lwp_settcb(void *__tcb)
187{
188	__asm __volatile(
189		"addi tp, %[__tcb], %[__offset]"
190	    :
191	    :	[__tcb] "r" (__tcb),
192		[__offset] "n" (TLS_TP_OFFSET + sizeof(struct tls_tcb)));
193}
194
195#endif /* _RTLD_SOURCE || _LIBC_SOURCE || __LIBPTHREAD_SOURCE__ */
196
197#endif /* !_RISCV_MCONTEXT_H_ */
198